Operational Amplifier

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OPERATIONAL
OP-AMP & PLL
AMPLIFIER
TEAM
ANSHU KATARIA (1613501)
JITENDER KUMAR (1613627)
RAJAT SARDANA (1613641)
SALIL BATABYAL (1613526)
SUKRITI HANS (1613447)
TANYA VERMA (1613731)

ACKNOWLEDGEMENT
The fo|qr group acknowledges the deep sense of gratitude to all the faculty members Prof.
Amitabh Mukherjee, Prof. Vinay gupta, Prof. Nivedita Deo, Prof. K. Sreenivas and Dr. Manjula for
their spirited encouragement, healthy criticism and inspiring discussion throughout session
August 2017 to December 2017. Acknowledgements are due to Prof. Amitabh Mukherjee and
Prof. Vinay Gupta for their valuable suggestions regarding the new addition to the work
“Differential Equation Solver”, and Prof. Nivedita Deo for “Lissajous Figure”. We are also
fortunate to have a company of all the motivated students of electronics lab 2017-18, without
their help and cooperation it would have been difficult for us to enjoy the academic environment
of the lab.
At the end, the fo|qr, is also grateful to the lab staff for the constant help during the course of
work.
Contents
1.0. INTRODUCTION ................................................................................................................................ 1
1.1. OFFSET NULL .................................................................................................................................... 8
1.2. VOLTAGE FOLLOWER .................................................................................................................... 10
1.3. NON-INVERING AMPLIFIER .......................................................................................................... 13
1.4. INTEGRATOR................................................................................................................................... 19
1.5. DIFFERENTIATOR ........................................................................................................................... 24
1.6. SUMMING, SCALING AND AVERAGING AMPLIFIER .................................................................. 30
1.7. ZERO-CROSSING DETECTOR ......................................................................................................... 34
1.8. SQUARE WAVE GENERATOR ........................................................................................................ 36
1.9. VOLTAGE TO CURRENT CONVERTOR ............................................................................................... 39
1.10. PEAKING AMPLIFIER...................................................................................................................... 42
1.11. CLIPPER ......................................................................................................................................... 46
1.12. D/A CONVERTOR ........................................................................................................................... 50
1.13. LOW PASS FILTER .......................................................................................................................... 54
1.14. HIGH PASS FILTER.......................................................................................................................... 58
1.15. INSTRUMENTATION AMPLIFIER .................................................................................................... 62
1.16. LISSAJOUS FIGURE .............................................................................................................. 66
1.17. VOLTAGE TO FREQUENCY CONVERTOR ................................................................................ 70
1.18. DIFFERENTIAL EQUATION SOLVER ....................................................................................... 73
BIBLIOGRAPHY ........................................................................................................................................ 80
fo|q r INTRODUCTION
INTRODUCTION
OP AMP – OPERATIONAL AMPLIFIER:
An op-amp is a multi-stage, direct coupled, high gain negative feedback amplifier that has one or
more differential amplifiers and its concluded with a level translator and an output stage. It is the
basic building block of analog electronic circuits that accomplish a different types of analog signal
processing tasks. A voltage-shunt feedback is provided in an op-amp to obtain a stabilized voltage
gain.
The main use of an op-amp is to amplify ac and dc input signals and was initially used for basic
mathematical operations such as addition, subtraction, multiplication, differentiation and
integration. Nowadays, the applications of op-amp vary from ac and dc signal amplification to
use in active filters, oscillators, comparators, voltage regulators, instrumentation and control
systems, pulse generators, square wave generators and many more electronic circuits. For the
design of all these circuits the op-amps are manufactured with integrated transistors, diodes,
capacitors and resistors, thus making it an extremely compact, multi-tasking, low cost, highly
reliable and temperature stable integrated circuit. It is also designed in such a way that the
external characteristics can be changed with the addition of external components like capacitors
and resistors. Thus, it can act as a complete amplifier with various characteristics.
BLOCK DIAGRAM OF AN OPERATIONAL AMPLIFIER (OP AMP):

The op-amp begins with a differential amplifier stage, which operates in the differential mode.
Thus, the inputs noted with ‘+’ & ‘- ‘. The positive sign is for the non-inverting input and negative
is for the inverting input. The non-inverting input is the ac signal (or dc) applied to the differential
amplifier which produces the same polarity of the signal at the output of op-amp. The inverting
signal input is the ac signal (or dc) applied to the differential amplifier. This produces 180° out of
phase signal at the output.
1
fo|q r INTRODUCTION
The block diagram of a multi-stage operational amplifier is given below:
Fig. 1.0.1
The inverting and non-inverting inputs are provided to the input stage which is a dual input,
balanced output differential amplifier. The voltage gain required for the amplifier is provided in
this stage along with the input resistance for the op-amp. The output of the initial stage is given
to the intermediate stage, which is driven by the output of the input stage. In this stage direct
coupling is used, which makes the dc voltage at the output of the intermediate stage above
ground potential. Therefore, the dc level at its output must be shifted down to 0Volts with
respect to the ground. For this, the level shifting stage is used where usually an emitter follower
with the constant current source is applied. The level shifted signal is then given to the output
stage where a push-pull amplifier increases the output voltage swing of the signal and increases
the current supplying capability of the op-amp.
1. The first stage of op-amp IC 741 is differential amplifier.

The circuit below shows a generalized form of a differential amplifier with two inputs marked
V1 and V2. The two identical transistors TR1 and TR2 are both biased at the same operating
point with their emitters connected together and returned to the common rail, -VEE by way
of resistor Re.
2
fo|q r INTRODUCTION
Fig. 1.0.2
The circuit operates from a dual supply +Vcc and –VEE which ensures a constant supply. The
voltage that appears at the output, Vout of the amplifier is the difference between the two
input signals as the two base inputs are in anti-phase with each other.
So as the forward bias of transistor, TR1 is increased, the forward bias of transistor TR2 is
reduced and vice versa. Then if the two transistors are perfectly matched, the current flowing
through the common emitter resistor, RE will remain constant.
Like the input signal, the output signal is also balanced and since the collector voltages either
swing in opposite directions (anti-phase) or in the same direction (in-phase) the output
voltage signal, taken from between the two collectors is, assuming a perfectly balanced circuit
the zero difference between the two collector voltages.
2. The second stage is a high-gain voltage amplifier. This stage may be made from several
transistors to provide high gain. A typical operational amplifier could have a voltage gain of
200,000. Most of this gain comes from the voltage amplifier stage.
3. The final stage of the OP AMP is an output amplifier. The output amplifier provides low
output impedance. The actual circuit used could be an emitter follower. The output stage
should allow the operational amplifier to deliver several milliamperes to a load.
3
fo|q r INTRODUCTION
EQUIVALENT CIRCUIT OF AN OPERATIONAL AMPLIFIER (OP AMP):
Fig. 1.0.3
SCHEMATICS REPRESENTATION OF AN OPERATIONAL AMPLIFIER (OP

AMP):
Fig. 1.0.4
The above shown symbol is the most widely used op-amp symbol for all electronic
circuits.
V1 (Volts) – Non-inverting input voltage.
V2 (Volts) – Inverting input voltage.
V (Volts) – Output voltage
4
fo|q r INTRODUCTION
CHARACTERISTICS OF AN OPERATIONAL AMPLIFIER (OP AMP):

1. High input impedance- More than 100kilo ohms.
2. Low output – Less than 100 ohms.
3. Amplifier signals with frequency range from 0Hz to 1MHz.
4. Low offset voltage and low offset current.
5. Very high voltage gain – About 2,00,000.
IDEAL AND PRACTICAL OP AMP CHARACTERISTICS :

CHARACTERISTICS IDEAL OP AMP PRACTICAL OP AMP
INFINITE VOLTAGE An ideal op amp will have infinite A real op amp can only produce
GAIN voltage gain. a finite gain.
INFINITELY HIGH An ideal op amp will have infinitely A real op amp has finite input
INPUT IMPEDANCE high input impedance. This will impedance. Even though many
ensure that the op amp causes no types of op amps, such as
loading in the circuit. MOSFETs, have extremely high
input impedance, in the order
of tera ohms, it is still finite.
ZERO OUTPUT An ideal op amp will have zero A real op amp will always have
IMPEDANCE output impedance. When an op some output impedance,
amp produces its output signal, we though it is low. A typical value
want the op amp to have zero can be 75Ω.
voltage so that the maximum
voltage will be transferred to the
output load.
GAIN INDEPENDENT In an ideal op amp, the gain that In real op amps, the gain that is
OF FREQUENCY the op amp produces will be produced is only for a certain
independent of frequency. bandwidth of frequencies.
Outside of this bandwidth, the
gain that the op amp produces
will decline.
ZERO INPUT In an ideal op amp, if no voltage is A real op amp will have slight
VOLTAGE OFFSET applied to the inverting and non- offset even if the voltage
inverting input pins, the op amp will applied to the pins are the
output a voltage of 0, since there is same. To correct this offset,
no difference at all of the voltage voltage must be applied to the
applied to the 2 input pins. offset pin.
5
fo|q r INTRODUCTION
POSITIVE AND In an ideal op amp, the ac voltage which is In real op amps, the
NEGATIVE fed into the op amp to be amplified will amplified signal will not
VOLTAGE swing all the way up for the DC positive fully reach the DC supply
SWINGS TO supply rail and all the way down for the DC rails. They will fall short of
SUPPLY RAILS negative supply rail, making 100% efficient it.
use of the DC voltage supplied to an op
amp.
OUTPUT In an ideal op amp, the output will swing In real op amps, the
SWINGS instantly to the amplified voltage value. amplified signal will take
INSTANTLY TO There will be no time delay between the time to reach the fully
THE CORRECT time the voltage is input into the op amp till amplified voltage value.
VALUE the time it is output. It will all be This is determined by the
instantaneous. slew rate of the op amp.
OPEN LOOP FREQUENCY RESPONSE:
Fig. 1.0.5
From this frequency response curve, we can see that the product of the gain against frequency
is constant at any point along the curve. Also, that the unity gain (0 dB) frequency also determines
the gain of the amplifier at any point along the curve. This constant is generally known as the
Gain Bandwidth Product or GBP. Therefore:
GBP = Gain x Bandwidth = A x BW

For example, from the graph above the gain of the amplifier at 100kHz is given as 20dB or 10,
then the gain bandwidth product is calculated as:
GBP = A x BW = 10 x 100,000Hz = 1,000,000.
6
fo|q r INTRODUCTION
Similarly, the operational amplifiers gain at 1kHz = 60dB or 1000, therefore the GBP is given as:
GBP = A x BW = 1,000 x 1,000Hz = 1,000,000.
The Voltage Gain (AV) of the operational amplifier can be found using the following formula:
V
Voltage gain, Av  out
Vin
V 
and in Decibels or (dB) is given as 20log  out  in dB .
 Vin 
741 - IC:
Op-amps are available as Integrated Circuits (IC’s). These ICs uses an exterior feedback to regulate
its functions and these components are used as a multipurpose device in various electronic
instruments. It consists of two inputs and two outputs, namely inverting and non-inverting
terminals. This 741 IC is most commonly used in various electrical and electronic circuits. The
main intention of this 741 op-amp is to strengthen AC & DC signals and for mathematical
operations.
The representation of 741 IC Op-Amp is given below that comprises of eight pins. The most
significant pins are 2, 3 and 6, where pin 2 and 3 are pin 2 and 3 denote inverting & non-inverting
terminals and pin 6 denotes output voltage. The triangular form in the IC signifies an op-amp
integrated circuit. The current version of the chip is denoted by the famous IC 741 op amp. The
main function of this IC 741 is to do mathematical operations in various circuits.
PIN DIAGRAM OF 741 - IC:

The pin configuration of the IC 741 operational amplifier is shown below. It comprises of eight
pins where the function of each pin is discussed below.
• Pin-1 is Offset null.
• Pin-2 is Inverting (-) input terminal.
• Pin-3 is a non-inverting (+) input
terminal.
• Pin-4 is negative voltage supply (Vcc)
• Pin-5 is offset null.
• Pin-6 is the output voltage.
• Pin-7 is positive voltage supply (+Vcc).
• Pin-8 is not connected.
7
fo|q r OFFSET NULL
OFFSET NULL
AIM:
To null the output offset voltage of an Op-amp.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors Ri = 1kΩ; Potentiometer R = 10kΩ.
THEORY:
The input offset voltage of operational amplifiers (op amps) arises from unavoidable mismatches
in the differential input stage of the op-amp circuit caused by mismatched transistor pairs,
collector currents, current gain betas (β), collector or emitter resistors, etc.
Operational amplifiers (op amps) may exhibit an input offset voltage (VOS) in the range µV to mV.
Since, the active and passive devices in the internal op-amp circuit have inherent temperature
dependent parameters, so does the input offset voltage.
Input offset voltage VIO is the differential input voltage that should be applied to the input to
force the output voltage to zero. The output voltage caused by mismatching between two input
terminals are called output offset VOO.
REASON FOR OUTPUT OFFSET VOLTAGE:

Even though all the components are integrated on same chip, it’s not possible to have two
transistors in input differential stage with same characteristics. This means those collector
currents in these two transistors are not equal, which causes differential output voltage from
first stage.
The output offset voltage VOO is a DC Voltage; it may be positive or negative in polarity
depending upon whether the potential difference between two inputs is positive or negative.
It’s possible to predict the polarity of input offset voltage since it’s dependent upon mismatching
between the input terminals. Therefore, on absolute maximum value.
8
fo|q r OFFSET NULL
Fig. 1.1.1
The input offset voltage gives rise to output offset voltage. Thus, we need to apply a differential
input voltage of specific amplitude and correct polarity to reduce offset voltage VOO to zero. The
voltage is referred to as input offset voltage.
PROCEDURE:
1. Design the circuit as shown in the figure.
i. Connect both the input pins 3 & 2 to ground.
ii. Connect pin 4 to -VCC and pin 7 to +VCC.
iii. Connect pin 6 i.e. output to ground through a load resistance RL.
iv. Connect a 10kΩ potentiometer between pin 1 and pin 5 with wiper connected to
negative supply pin 4.
2. Connect a multimeter to load RL to detect VOUT.
3. Adjust the wiper until the output offset voltage is reduced to zero.
RESULT:
The output offset voltage was reduced to minimum value in mV through fluctuating but was very
small to be neglected
9
fo|q r VOLTAGE FOLLOWER
VOLTAGE FOLLOWER
AIM:
To design a voltage follower using 741 op-amp.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors RL = 1kΩ; Function Generator; CRO/DSO.
THEORY:
VOLTAGE FOLLOWER:
It is an op-amp circuit with a voltage gain of 1, this means that the op-amp does not provide any
amplification to the input signal. The output voltage is equal to the input voltage and hence
output follows the input.
A voltage follower is also known as a unity gain amplifier, a buffer amplifier and an isolation
amplifier.
PRACTICAL CONSIDERATIONS FOR 741 OP-AMP VOLTAGE FOLLOWER:

• The input signal is applied to the non- inverting input terminal of 741 op-amp, so that the
output signal is not inverted and remains in phase with the input signal.
• Inverting input is connected to the output pin of the op-amp.
• The feedback resistance i.e. RF = 0Ω and input resistance Ri is considered to be infinite.
• This amplifier has unity gain and does not invert the phase of the input signal.
FORMULA USED:
𝑅𝑓
𝐴𝑉 = 1 +
𝑅𝑖
Since RF is taken to be zero,
𝐴𝑉 = 1
10
CIRCUIT DIAGRAM:
Fig. 1.2.1
PROCEDURE:
1. Make the circuit according to the circuit diagram.
2. Use a variable power supply at the input.
3. Change the voltage at input and note down the output voltage.
4. Calculate the gain of the circuit and the gain should be 1.
OBSERVATIONS:
Vin (V) Vout (V)
0.244 0.2
0.536 0.5
0.981 0.9
1.050 1.0
1.302 1.3
1.576 1.5
2.030 2.0
2.113 2.1
2.498 2.5
3.716 3.7
4.08 4.1
5.52 5.5
6.61 6.6
Table 1.2.1
11
RESULT:
The voltage follower circuit is designed and been studied successfully.
DISCUSSION:
The voltage follower provides impedance matching. This means the op-amp provides high
resistance to the signal source that would otherwise be severely loaded down by a low
resistance value.
12
fo|q r NON-INVERTING AMPLIFIER
NON-INVERTING AMPLIFIER
AIM:
To design a non- inverting Op-Amp and to study its frequency response.
APPARATUS:
IC-741, Rf = 1kΩ, Ri = 1kΩ, 15V dual power supply, variable power supply, function generator.
THEORY:
In this configuration, the input voltage signal, (Vin) is applied directly to the non-inverting (+)
input terminal which means that the output gain of the amplifier becomes “Positive”. The result
of this is that the output signal is “in-phase” with the input signal.
Fig. 1.3.1
Feedback control of the non-inverting operational amplifier is achieved by applying a small part
of the output voltage signal back to the inverting (–) input terminal via a Rf –Rin voltage divider
network, again producing negative feedback. This closed-loop configuration produces a non-
inverting amplifier circuit with very good stability, a very high input impedance, Rin approaching
infinity, as no current flows into the positive input terminal, (ideal conditions).
In other words, the junction is a “virtual earth” summing point. Because of this virtual earth node,
the resistors, Rf and Rin form a simple potential divider network across the non-inverting amplifier
with the voltage gain of the circuit being determined by the ratios of Rin and Rin.
13
Then using the formula to calculate the output voltage of a potential divider network of the Non-
Inverting Amplifier as follows:
R in
V1 = ×Vout ;
R in +R f
Ideal summing point: V1 =Vin ;
Vout
Voltage gain, AV is equal to: A v = ;
Vin
Then,
Vout R in +R f
Av = = ,
Vin R in
Rf
A V =1+ ;
R in
Then the closed loop voltage gain of a Non-Inverting Operational Amplifier will be given as:
Rf
A V =1+ .
R in
CIRCUIT DIAGRAM:
Fig. 1.3.2
14
PROCEDURE:
1. Make the circuit according to the circuit diagram (Fig. 1.3.2).
2. First use a variable power supply at input.
3. Vary the voltage and note the output voltage.
R
4. Compare the calculated gain A V =1+ f . with the observed one.
R in
5. For frequency response, use an A.C source at input. Observer the input and output wave
(they should be in phase with each other).
6. Vary the frequency at input and measure the input and output voltage.
7. Draw a graph between frequency and gain.
OBSERVATIONS:
SET I: For gain 3.17.
Take Rf = 10KΩ and Ri =4.6KΩ.
(A) Table for gain 3.17.
Vin (V) Vout (V)

1.80 5.4
2.12 6.4
2.40 7.2
2.72 8.2
2.92 8.8
3.20 9.8
3.72 11.2
4.24 12.6
4.80 14.4
Table 1.3.1
15
(B) Frequency response of gain 3.17.

𝑽𝒐 Gain (dB)
Frequency (kHz) Vin (V) Vout (V) Gain (𝑨𝑽 = )
𝑽𝒊𝒏
0.298 1.48 4.80 3.24 10.22
0.544 1.48 4.80 3.24 10.22
1.670 1.48 4.80 3.24 10.22
3.029 1.48 4.80 3.24 10.22
87.1 1.48 4.60 3.11 9.85
144.5 1.48 4.40 2.97 9.46
178.1 1.48 4.20 2.84 9.06
242.9 1.48 4.00 2.70 8.64
316.8 1.48 3.80 2.57 8.19
374.1 1.48 3.60 2.43 7.72
414.0 1.48 3.40 2.30 7.22
491.0 1.48 3.20 2.16 6.70
497.0 1.48 3.00 2.03 6.14
534.0 1.48 2.80 1.89 5.54
717.0 1.48 2.60 1.76 4.89
779.0 1.48 2.40 1.62 4.20
851.0 1.48 2.20 1.49 3.44
996.0 1.48 2.00 1.35 2.62
1148.0 1.48 1.80 1.22 1.70
1275.0 1.48 1.60 1.08 0.68
Table 1.3.2
16
SET II: For gain 2.

Take Ri=10KΩ and Rf =10KΩ.
Frequency response of gain 2.
𝑽𝒐 Gain (dB)
Frequency (kHz) Vin (V) Vout (V) Gain (𝑨𝑽 = )
𝑽𝒊𝒏
0.52 2.58 4.87 1.89 5.52
1.00 2.58 4.86 1.88 5.50
3.00 2.58 4.84 1.88 5.46
4.01 2.58 4.81 1.86 5.41
10.57 2.58 4.62 1.79 5.06
15.53 2.58 4.26 1.65 4.36
17.44 2.58 3.98 1.54 3.77
20.00 2.58 3.53 1.37 2.72
22.00 2.58 3.16 1.22 1.76
25.01 2.58 2.79 1.08 0.68
30.22 2.58 2.14 0.83 -1.62
33.65 2.58 1.79 0.69 -3.18
40.70 2.58 1.30 0.50 -5.95
45.00 2.58 1.00 0.39 -8.23
50.10 2.58 0.83 0.32 -9.85
55.00 2.58 0.59 0.23 -12.82
60.00 2.58 0.42 0.16 -15.77
65.50 2.58 0.24 0.09 -20.63
70.40 2.58 0.12 0.04 -26.65
74.60 2.58 0.07 0.03 -31.33
Table 1.3.3
17
RESULT:
The non-inverting Op-Amp circuit is designed successfully for gain 2 and 3.17. The output
waveform is in the phase with the input waveform.
And the frequency response for the gain 2 and 3.17 has been studied successfully.
18
fo|q r INTEGRATOR
INTEGRATOR
AIM:
To design an OP-AMP integrator.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors Ri = 1kΩ, Rf = 10kΩ; Capacitor Cf = 0.01µF; Function
Generator; CRO/DSO.
THEORY:
The Op-amp Integrator is an operational amplifier circuit that performs the mathematical
operation of Integration, that is we can cause the output to respond to changes in the input
voltage over time as the op-amp integrator produces an output voltage which is proportional to
the integral of the input voltage.
Fig. 1.4.1
An ideal op-amp integrator uses a capacitor C, connected between the output and the op-amp
inverting input terminal, as shown in the Fig 1.4.1. The negative feedback to the inverting input
terminal ensures that the node X is held at ground potential (virtual ground). If the input voltage
is 0 V, there will be no current through the input resistor Rin, and the capacitor is uncharged.
Hence, the output voltage is ideally zero.
When a step voltage, Vin is firstly applied to the input of an integrating amplifier, the uncharged
capacitor C has very little resistance and acts a bit like a short circuit allowing maximum current
to flow via the input resistor, Rin as potential difference exists between the two plates. No
current flows into the amplifiers input and point X is a virtual earth resulting in zero output. As
19
fo|q r INTEGRATOR
the impedance of the capacitor at this point is very low, the gain ratio of XC/Rin is also very small
giving an overall voltage gain of less than unity, (voltage follower circuit).
As the feedback capacitor, C begins to charge up due to the influence of the input voltage, its
impedance XC slowly increase in proportion to its rate of charge. The capacitor charges up at a
rate determined by the RC time constant, (τ) of the series RC network. Negative feedback forces
the op-amp to produce an output voltage that maintains a virtual earth at the op-amp’s inverting
input.
Since the capacitor is connected between the op-amp’s inverting input (which is at earth
potential) and the op-amp’s output (which is negative), the potential voltage, VC developed
across the capacitor slowly increases causing the charging current to decrease as the impedance
of the capacitor increases. This results in the ratio of XC/Rin increasing producing a linearly
increasing ramp output voltage that continues to increase until the capacitor is fully charged.
At this point the capacitor acts as an open circuit, blocking any more flow of DC current. The ratio
of feedback capacitor to input resistor (XC/Rin) is now infinite resulting in infinite gain. The result
of this high gain (like the op-amps open-loop gain), is that the output of the amplifier goes into
saturation as shown in Fig 1.4.2. (Saturation occurs when the output voltage of the amplifier
swings heavily to one voltage supply rail or the other with little or no control in between).
Fig 1.4.2
The rate at which the output voltage increases (the rate of change) is determined by the value of
the resistor and the capacitor, “RC time constant”.
If we apply a constantly changing input signal such as a square wave to the input of an Integrator
Amplifier then the capacitor will charge and discharge in response to changes in the input signal.
This results in the output signal being that of a sawtooth waveform.
20
fo|q r INTEGRATOR
Fig 1.4.3
CIRCUIT ANALYSIS:
The circuit can be analyzed by applying Kirchhoff's current law at the node X, keeping ideal op-
amp behavior in mind.
𝐼𝑖𝑛 = 𝐼𝑓
Furthermore, the capacitor has a voltage-current relationship governed by the equation:
𝑑𝑉𝐶
𝐼𝐶 = 𝐶
𝑑𝑡
Substituting the appropriate variables:
𝑉𝑖𝑛 − 𝑉𝑋 𝑑(𝑉𝑋 − 𝑉𝑜𝑢𝑡 )

=𝐶
𝑅𝑖𝑛 𝑑𝑡
Here, 𝑉𝑋 is voltage appeared at node X. But, due to virtual ground, 𝑉𝑋 = 0. So,
𝑉𝑖𝑛 𝑑𝑉𝑜𝑢𝑡
= −𝐶
𝑅𝑖𝑛 𝑑𝑡
Integrating both sides with respect to time:

𝑡 𝑡
𝑉𝑖𝑛 𝑑𝑉𝑜𝑢𝑡
∫ 𝑑𝑡 = − ∫ 𝐶 𝑑𝑡
0 𝑅𝑖𝑛 0 𝑑𝑡
If we assume initial value of 𝑉𝑜𝑢𝑡 to be 0𝑉,

𝑡
1
𝑉𝑜𝑢𝑡 = − ∫ 𝑉𝑖𝑛 𝑑𝑡
𝑅𝑖𝑛 𝐶 0
The above equation shows that the output, with an inversion, is proportional to the integral of
1
input voltage. And 𝑅 is time constant.
𝑖𝑛 𝐶
21
fo|q r INTEGRATOR
PRACTICAL CIRCUIT:
At 0Hz or DC, the capacitor acts like an open circuit blocking any feedback voltage resulting in
very little negative feedback from the output back to the input of the amplifier. Then with just
the feedback capacitor, C, the amplifier effectively is connected as a normal open-loop amplifier
which has very high open-loop gain resulting in the output voltage saturating.
Fig. 1.4.4
This circuit connects a high value resistance in parallel with a continuously charging and
discharging capacitor. The addition of this feedback resistor, R2 across the capacitor, C gives the
circuit the characteristics of an inverting amplifier with finite closed-loop gain of R2/R1. The result
is at very low frequencies the circuit acts as a standard integrator, while at higher frequencies
the capacitor shorts out the feedback resistor, R2 because of capacitive reactance reducing the
amplifiers gain.
CIRCUIT DIAGRAM:
Fig. 1.4.5
22
fo|q r INTEGRATOR
PROCEDURE:
1. This circuit shown in Fig. 1.4.5 is connected on a breadboard/chassis.
2. An alternating input signal is applied.
3. Input and output waves are recorded/traced.
OBSERVATIONS:
OUTPUT
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
RESULT:
Output wave is observed to be proportional to the integral of input wave.
23
fo|q r DIFFERENTIATOR
DIFFERENTIATOR
AIM:
To design an OP-AMP differentiator.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors Ri = 100Ω, Rf = 1kΩ; Capacitors Ci = 0.1µF; Function
Generator; CRO/DSO.
THEORY:
An op-amp differentiator or a differentiating amplifier is a circuit configuration which produces
output voltage amplitude that is proportional to the rate of change of the applied input voltage.
A differentiator with only RC network is called a passive differentiator, whereas a differentiator

with active circuit components like transistors and operational amplifiers is called an active
differentiator. Active differentiators have higher output voltage and much lower output
resistance than simple RC differentiators.
An op-amp differentiator is an inverting amplifier, which uses a capacitor in series with the input
voltage. Differentiating circuits are usually designed to respond for triangular and rectangular
input waveforms. For a sine wave input, the output of a differentiator is also, a sine wave, which
is out of phase by 180° with respect to the input (cosine wave).
Differentiators have frequency limitations while operating on sine wave inputs; the circuit
attenuates all low frequency signal components and allows only high frequency components at
the output. In other words, the circuit behaves like a high-pass filter.
The input signal to the differentiator is applied to the capacitor. The capacitor blocks any DC
content so there is no current flow to the amplifier summing point, X resulting in zero output
voltage. The capacitor only allows AC type input voltage changes to pass through and whose
frequency is dependent on the rate of change of the input signal.
24
Fig. 1.5.1
At low frequencies, the reactance of the capacitor is “High” resulting in a low gain (RF/XC) and low
output voltage from the op-amp. At higher frequencies, the reactance of the capacitor is much
lower resulting in a higher gain and higher output voltage from the differentiator amplifier.
However, at high frequencies an op-amp differentiator circuit becomes unstable and will start to
oscillate. This is due mainly to the first-order effect, which determines the frequency response of
the op-amp circuit causing a second-order response which, at high frequencies gives an output
voltage far higher than what would be expected. To avoid this the high frequency gain of the
circuit needs to be reduced by adding an additional small value capacitor across the feedback
resistor RF.
Since the node voltage of the operational amplifier at its inverting input terminal is zero, the
current, I flowing through the capacitor will be given as:
𝐼𝑖𝑛 = 𝐼𝐹
𝑉𝑜𝑢𝑡
And 𝐼𝐹 = 𝑅𝐹
The charge on the capacitor will be
𝑄 = 𝐶𝑉𝑖𝑛
The rate of change of this charge is:
𝑑𝑄 𝑑𝑉𝑖𝑛
=𝐶
𝑑𝑡 𝑑𝑡
𝑑𝑄
But, = 𝐼𝑖𝑛 = 𝐼𝐹
𝑑𝑡
𝑉𝑜𝑢𝑡 𝑑𝑉𝑖𝑛
=𝐶
𝑅𝐹 𝑑𝑡
25
from which we have an ideal voltage output for the op-amp differentiator is given as:
𝑑𝑉𝑖𝑛
𝑉𝑜𝑢𝑡 = 𝐶𝑅𝐹
𝑑𝑡
Therefore, the output voltage Vout is a constant, –CRF times the derivative of the input voltage
Vin with respect to time. The minus sign indicates a 180° phase shift because the input signal is
connected to the inverting input terminal of the operational amplifier.
One final point to mention, the Op-amp Differentiator circuit in its basic form has two main
disadvantages compared to the previous operational amplifier integrator circuit.
One is that it suffers from instability at high frequencies as mentioned above, and the other is
that the capacitive input makes it very susceptible to random noise signals and any noise or
harmonics present in the source circuit will be amplified more than the input signal itself. This is
because the output is proportional to the slope of the input voltage so some means of limiting
the bandwidth to achieve closed-loop stability is required.
OP-AMP DIFFERENTIATOR WAVEFORMS:

If we apply a constantly changing signal such as a Square-wave, Triangular or Sine-wave type
signal to the input of a differentiator amplifier circuit the resultant output signal will be changed
and whose final shape is dependent upon the RC time constant of the Resistor/Capacitor
combination.
Fig. 1.5.2
26
PRACTICAL CIRCUIT:
The basic single resistor and single capacitor op-amp differentiator circuit is not widely used to
reform the mathematical function of Differentiation because of the two inherent faults
mentioned above, “Instability” and “Noise”. So, in order to reduce the overall closed-loop gain
of the circuit at high frequencies, an extra resistor, Rin is added to the input as shown below.
Fig. 1.5.3
Adding the input resistor Rin limits the differentiators increase in gain at a ratio of R F/Rin. The
circuit now acts like a differentiator amplifier at low frequencies and an amplifier with resistive
feedback at high frequencies giving much better noise rejection.
Additional attenuation of higher frequencies is accomplished by connecting a capacitor C F in
parallel with the differentiator feedback resistor, RF. This then forms the basis of an Active High
Pass Filter.
CIRCUIT DIAGRAM:
Fig. 1.5.4
27
PROCEDURE:
OBSERVATIONS:
OUTPUT
INPUT
OUTPUT
INPUT
28
OUTPUT
INPUT
OUTPUT
INPUT
RESULT:
The output voltage increases with increasing frequency or the differentiator circuit has high gain
at high frequencies.
29
fo|q r SUMMING, SCALING AND AVERAGING AMPLIFIER
SUMMING, SCALING AND AVERAGING AMPLIFIER

AIM:
To design Summing, Scaling and Averaging amplifier of 3-inputs.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors; DC variable power supply and a multimeter.
THEORY:
SUMMING AMPLIFIER:
Fig. 1.6.1
In the circuit (Fig. 1.6.1), the output voltage, (VOUT) becomes proportional to the sum of the input
voltages, V1, V2, V3, etc. Then we can modify the original equation for the inverting amplifier to
take account of these new inputs thus:
𝑉1 𝑉2 𝑉3
𝐼𝐹 = 𝐼1 + 𝐼2 + 𝐼3 = − [ + + ]
𝑅𝑖𝑛 𝑅𝑖𝑛 𝑅𝑖𝑛
𝑉𝑂𝑈𝑇
But, 𝐼𝐹 = 𝑅𝐹
So, the output voltage can be written as,

𝑅 𝑅 𝑅
𝑉𝑂𝑈𝑇 = − [𝑅 𝐹 𝑉1 + 𝑅 𝐹 𝑉2 + 𝑅 𝐹 𝑉3 ] …1.6.1
𝑖𝑛 𝑖𝑛 𝑖𝑛
30
However, if all the input impedances, (Rin) are equal in value and equal to the feedback resistance
(Rf), we can simplify the equation 1.6.1 to give an output voltage of:
𝑉𝑂𝑈𝑇 = −[𝑉1 + 𝑉2 + 𝑉3 ]
We now have an operational amplifier circuit that will produce an output voltage signal that is
proportional to the algebraic “SUM” of the three individual input voltages V1, V2 and V3.
SCALING AMPLIFIER:
A Scaling Summing Amplifier can be made if the individual input resistors are “NOT” equal.
Then the equation would have to be modified to:
𝑉1 𝑉2 𝑉3
𝑉𝑂𝑈𝑇 = −𝑅𝐹 [ + + ]
𝑅𝑖𝑛 𝑅𝑖𝑛 𝑅𝑖𝑛
AVERAGING AMPLIFIER:
An Averaging Amplifier can be made if the individual input resistors are equal to thrice the
value of feedback resistance (i.e. Rin = 3Rf). Then the equation would have to be modified to:
𝑉1 + 𝑉2 + 𝑉3
𝑉𝑂𝑈𝑇 = −
3
CIRCUIT DIAGRAM:
Fig. 1.6.2
31
PROCEDURE:
1. Make the circuit according to the circuit diagram as shown in the figure.
2. Use three positive power supplies at Rins input in inverting configuration.
3. Ground the non-inverting terminal through R0.
4. Use the multimeter to note the output DC voltage corresponding to three DC inputs
through the load resistance RL
5. Verify the results with theoretical and the experimental.
OBSERVATIONS:
SUMMING AMPLIFIER:
Here, Ra = Rb = Rc = Rf = 0.97kΩ
Va (V) Vb (V) Vc (V) VTh (V) Vout (V)

1.4 2.1 4.1 7.6 7.84
1.4 2.1 4.4 7.9 8.34
1.5 2.6 4.4 8.5 8.61
1.3 3.0 4.4 8.7 8.97
1.3 3.1 4.4 8.8 9.04
1.3 3.5 4.4 9.2 9.43
1.3 4.0 4.4 9.7 9.97
1.3 4.3 4.4 10.1 10.24
1.3 4.3 4.6 10.2 10.43
1.3 4.3 4.9 10.5 10.65
1.3 4.7 4.9 10.9 11.07
1.3 4.9 4.9 11.1 11.28
1.3 5.2 4.9 11.4 11.62
1.3 5.2 5.1 11.5 11.86
1.3 5.2 5.2 11.7 11.99
1.3 5.4 5.2 11.9 12.18
1.3 5.4 5.6 12.3 12.35
1.3 5.6 5.6 12.5 12.36
Table 1.6.1
SCALING AMPLIFIER:
Here, Ra = 2.91kΩ, Rb = 1.94kΩ, Rc = 0.97kΩ

1.5 4.13 3.48 1.99 2.001
1.5 4.13 4.22 2.24 2.26
32
1.5 4.13 4.68 2.39 2.392

1.5 4.13 5.17 2.55 2.557
1.5 4.13 5.70 2.73 2.733
1.5 4.13 6.23 2.90 2.907
1.5 4.13 7.17 3.21 3.216
1.5 4.13 8.08 3.51 3.516
1.5 4.61 8.08 3.59 3.592
1.5 5.10 8.08 3.67 3.673
1.5 5.60 8.08 3.75 3.754
1.5 6.18 8.08 3.85 3.850
1.5 6.63 8.08 3.92 3.925
1.5 7.15 8.08 4.01 4.010
1.5 8.14 8.08 4.17 4.170
Table 1.6.2
AVERAGING AMPLIFIER:
Here, Ra = Rb = Rc = 0.97kΩ and Rf = 320Ω

1.468 2.130 2.140 1.913 1.886
1.468 2.595 2.140 2.068 2.034
1.468 3.142 2.140 2.250 2.213
1.468 3.573 2.140 2.394 2.355
1.468 4.080 2.140 2.563 2.521
1.468 4.620 2.140 2.743 2.700
1.468 5.160 2.140 2.923 2.880
1.468 5.160 2.63 3.086 3.040
1.468 5.160 3.10 3.243 3.196
1.468 5.160 3.636 3.421 3.369
1.468 5.160 4.140 3.589 3.534
1.468 5.160 4.620 3.749 3.692
1.468 5.160 5.150 3.926 3.865
1.468 5.160 5.700 4.109 4.050
1.468 5.160 6.210 4.279 4.210
1.468 5.160 6.660 4.429 4.360
1.468 5.160 7.180 4.603 4.530
1.468 5.160 7.640 4.756 4.680
Table 1.6.3
RESULT:
Experimental values match with theoretical values within the limit of experimental errors.
33
fo|q r ZERO CROSSING DETECTOR
ZERO CROSSING DETECTOR

AIM:
To design an Zero Crossing Detector.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors Ri = 1kΩ; Function Generator; CRO/DSO.
THEORY:
The Op-amp comparator compares one analogue voltage level with another analogue voltage
level, or some preset reference voltage, VREF and produces an output signal based on this voltage
comparison. In other words, the op-amp voltage comparator compares the magnitudes of two
voltage inputs and determines which is the largest of the two.
Voltage comparators, either use positive feedback or no feedback at all (open-loop mode) to
switch its output between two saturated states, because in the open-loop mode the amplifiers
voltage gain is basically equal to AVO (Open Loop gain). Then due to this high open loop gain, the
output from the comparator swings either fully to its positive supply rail, +VCC or fully to its
negative supply rail, -VCC on the application of varying input signal which passes some preset
threshold value. The open-loop op-amp comparator behave like a Digital Bistable Device as
triggering causes it to have two possible output states, +VCC or -VCC.
Fig. 1.7.1
With reference to the op-amp comparator circuit above (Fig. 1.7.1), let’s first assume that VIN is
less than the DC voltage level at VREF, (VIN < VREF). As the non-inverting (positive) input of the
comparator is less than the inverting (negative) input, the output will be LOW and at the negative
supply voltage, -VCC resulting in a negative saturation of the output.
If we now increase the input voltage, VIN so that its value is greater than the reference
voltage VREF, (VIN > VREF) on the inverting input, the output voltage rapidly switches HIGH towards
34
fo|q r ZERO CROSSING DETECTOR
the positive supply voltage, +VCC resulting in a positive saturation of the output. If we reduce
again the input voltage VIN, so that it is slightly less than the reference voltage, the op-amp’s
output switches back to its negative saturation voltage acting as a threshold detector.
If we set VREF = 0V, the comparator will be called Zero Crossing Detector.
CIRCUIT DIAGRAM:
Fig. 1.7.2
PROCEDURE:
OBSERVATIONS:
RESULT:
Output wave is observed to be a square wave peaking at ±VCC.
35
fo|q r SQUARE WAVE GENERATOR
SQUARE WAVE GENERATOR

AIM:
To design a Square Wave Generator.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors R = 100Ω, R1 = 1kΩ, R2 = 10kΩ; Capacitors C = 1µF;
Function Generator; CRO/DSO.
THEORY:
SQUARE WAVE GENERATOR:

The term “Square wave” can be defined as a non-sinusoidal periodic waveform that can be
denoted as an infinite summary of sinusoidal waves. It has an alternate of amplitude at a fixed
frequency between stable min and max value with the equal duration.
Generally, this type of generator is used in various applications like electronics and in signal
processing. This wave is the special example of rectangular wave. The square wave generator is
just like a Schmitt trigger in which the reference voltage for the comparator depends on the o/p
voltage. It is also called as an Astable Multivibrator.
WORKING (USING IC-741):

Firstly, let’s assume that the capacitor is fully discharged and the output of the op-amp is
saturated at the positive supply rail. The capacitor, C starts to charge up from the output
voltage, Vout through resistor, R at a rate determined by their RC time constant.
We know from our tutorials about RC Circuits that the capacitor wants to charge up fully to the
value of Vout (which is +Vsat) within five time constants. However, as soon as the capacitors
charging voltage at the op-amps inverting (-) terminal is equal to or greater than the voltage at
the non-inverting terminal (the op-amps output voltage fraction divided between
resistors R1 and R2), the output will change state and be driven to the opposing negative supply
rail.
36
Fig. 1.8.1
But the capacitor, which has been happily charging towards the positive supply rail (+Vsat), now
sees a negative voltage, -Vsat across its plates. This sudden reversal of the output voltage causes
the capacitor to discharge toward the new value of Vout at a rate dictated again by their RC time
constant.
The period of the output waveform is determined by the RC time constant of the two timing
components and the feedback ratio established by the R1, R2 voltage divider network which sets
the reference voltage level. If the positive and negative values of the amplifiers saturation voltage
have the same magnitude, then t1 = t2 and the expression to give the period of oscillation
becomes:
1+𝛽
𝑇 = 2𝑅𝐶 ln ( )
1−𝛽
𝑅2
Where 𝛽 = 𝑅
1 +𝑅2
The frequency can be defined by the equation:

1
𝑓=
𝑇
and the frequency of the square wave is independent of output voltage. The circuit is also named
as astable multivibrator or free-running due to its quasi-stable states. The o/p remains in one
state for T1 time and then makes a sudden transition to the other state and remains in that state
for T2 time. The cycle recurrences itself after time T = (T1 + T2) where ‘T’ is the time period of the
square-wave.
37
Fig. 1.8.2
The square-wave generator using op-amp is beneficial in the frequency range of about 10 Hz to10
kHz. At upper frequencies, the slew rate of the op-amp limits the slope of the o/p square wave.
The balance of the output waveform is dependent on the corresponding of two Zener diodes
namely Z1 and Z2. The irregular square-wave (T1 not equal to T2) can be had by using various
factors for charging the capacitor to +Vout & -Vout.
PROCEDURE:
OBSERVATIONS:
RESULT:
The square wave generator is designed and its behavior with different frequencies has been
observed.
38
fo|q r VOLTAGE TO CURRENT CONVERTER
VOLTAGE TO CURRENT CONVERTER

AIM:
To design a voltage to current converter with floating load using op-amp.
APPARATUS:
IC-741, RL = 4.72kΩ, R = 9.87kΩ, 15V dual power supply, variable power supply, function
generator.
THEORY:
Op-amp is implemented to simply convert the voltage signal to corresponding current signal. The
Op-amp is designed to hold the precise amount of current by applying the voltage which is
essential to sustain that current throughout the circuit.
Floating Load Voltage to Current Converter.
As the name indicates, the load resistor is floating in this converter circuit. That is, the resistor RL
is not linked to ground. The voltage, VIN which is the input voltage is given to the non-inverting
input terminal. The inverting input terminal is driven by the feedback voltage which is across the
RL resistor. This feedback voltage is determined by the load current and it is in series with the VD,
which is the input difference voltage. So, this circuit is also known as current series negative
feedback amplifier.
Fig. 1.9.1
39
For the input loop, the voltage equation (using Kirchoff’s voltage law) is
Vin =VD +Vf
Since A is very large, VD =0;

So, Vin =Vf ;
Since, the input to the Op-amp, IB =0.

Vin =IL ×R;
Vin
I I =I L = ;
R
From the above equation, it is clear that the load current depends on the input voltage and the
input resistance. That is, the load current, IL  Vin , which is the input voltage. The load current
is controlled by the resistor, R. Here, the proportionality constant is 1/R. So, this converter circuit
is also known as Trans-Conductance Amplifier. Other name of this circuit is Voltage Controlled
Current Source.
The type of load may be resistive, capacitive or non-linear load. The type of load has no role in
the above equation. When the load connected is capacitor then it will get charge or discharge at
a steady rate. Due to this reason, the converter circuit is used for the production of saw tooth
and triangular wave forms.
PROCEDURE:
1. Make the circuit according to the circuit diagram.
2. A variable power supply is applied at input.
3. Vary the voltage and note the output current.
4. Compare the calculated output current with the observed one.
OBSERVATIONS:
R=9.87KΩ,R L =4.72KΩ
Input current,
Vin
Ii (therotical)=
R
V0 (exp) V0
Ii (exp)= = .
RL 4.72KΩ
40
Vin (V) Ii(th) (mA) Vout (V) Ii(exp) (mA)

0.00 0.00 0.00 0.00
1.06 0.11 0.51 0.11
1.51 0.15 0.71 0.15
2.10 0.21 0.98 0.21
3.10 0.31 1.42 0.30
3.50 0.35 1.66 0.35
4.03 0.41 1.98 0.42
5.08 0.51 2.56 0.54
6.05 0.61 3.10 0.66
7.10 0.72 3.58 0.76
8.01 0.81 3.96 0.84
Table 1.9.1
RESULT:
Voltage to current converter using 741 Op-Amp IC was designed. The theoretical and
experimental values of output current due to input voltage is well matched.
APPLICATION:
The voltage to current converter can be used in such application as low voltage DC and AC
voltmeters, diode match finders, light –emitting diodes (LED), and Zener diode testers.
41
fo|q r PEAKING AMPLIFIER
PEAKING AMPLIFIER
AIM:
To design a Peaking Amplifier.
APPARATUS:
IC-741; 15V Dual Power Supply; Inductor L = 44mH; Resistors Ri = 1kΩ, Rf = 10kΩ; Capacitor Cf =
0.1µF; Function Generator; CRO/DSO.
THEORY:
Basically, an op-amp can amplify two types of signal: dc and ac. In a dc amplifier, the output signal
changes in response to changes in its DC input level. A DC amplifier can be inverting, non-
inverting, or differential. To reduce the output offset voltage to zero, that is, to improve the
accuracy of the DC amplifier, the offset null circuitry of the op-amp should be used.
However, if the designer needs the ac response characteristics of the op-amp, that is low-and
high frequency limits, or if the ac input is riding on some DC level, it is necessary to use an AC
amplifier with a coupling capacitor for example an audio receiver system.
Fig. 1.10.1
42
The peaking response that is the frequency response that peak at a certain frequency, can be
obtained by using a parallel LC network with the op-amp. Fig. 1.10.1 shows a peaking amplifier
that uses parallel LC network in the feedback path. The frequency response of the amplifier is
shown in the Fig. 1.10.2.
The resonant frequency or peak frequency at which the peaking occurs is determined by the
combination of L and C.
1
𝑓𝑝 =
2𝜋√𝐿𝐶
If Qcoil ≥ 10. Where Qcoil is figure of merit of the coil.
Fig. 1.10.2
The impedance of the parallel LC network is very large at the resonant frequency. Therefore, the
gain of the amplifier at resonance is maximum and is given by
𝑅𝐹 || 𝑅𝑃
𝐴𝐹 = −
𝑅1
2
Where RP = Equivalent resistance of parallel combination of LC circuit. = 𝑄𝑐𝑜𝑖𝑙 𝑅
𝑋𝐿
𝑄𝑐𝑜𝑖𝑙 = 𝑅
XL = Inductive Reactance = ωL.
L = Inductance.
R = Internal resistance of coil.
43
The impedance of the parallel LC network below and above the peak frequency is less than R P;
𝑅𝐹 || 𝑅𝑃
therefore, the gain of the amplifier is less than at any frequency other than peaking
𝑅1
frequency, fP.
Thus, the impedance of the tank circuit RP at resonance can easily be computed from the
measured value of gain and known values of R1 & RF.
The bandwidth of the peaking amplifier can be determined using the following equation:
𝑓𝑃
𝐵𝑊 =
𝑄𝑃
PROCEDURE:
i. Connect pin 3 to ground.
ii. Connect pin 4 to -VCC and pin 7 to +VCC.
iii. Connect pin 6 i.e. output to ground through a load resistance RL.
iv. Connect a 10kΩ resistor, 44mH inductor and 0.1µF between pin 2 and 6.
2. Provide input signal through 2 with a 1kΩ resistor.
3. Connect CRO/DSO to load RL to detect Vout.
OBSERVATIONS AND CALCULATIONS:

L = 44mH, C = 0.1µF
1
𝑓𝑝 = = 2399.35𝐻𝑧
2𝜋√(44 × 10−3 𝐻) × (0.1 × 10−6 𝐹)
Frequency, f (Hz) Vin (Volts) Vout (Volts) Gain Gain (dB)

200 0.542 1.76 3.24 10.21
500 0.542 2.01 3.70 11.36
800 0.542 3.31 6.10 15.71
1388 0.542 4.88 9.00 19.08
1515 0.542 5.44 10.00 20.00
1978 0.542 9.88 18.22 25.21
2075 0.542 10.60 19.55 25.82
2103 0.542 11.00 20.29 26.14
2214 0.542 13.10 24.16 27.66
2316 0.542 15.40 28.41 29.07
2400 0.542 17.70 32.65 30.28
2537 0.542 20.30 37.45 31.47
3371 0.542 19.50 35.97 31.12
44
3409 0.542 18.60 34.32 30.66

3522 0.542 16.30 30.07 29.56
3751 0.542 12.90 23.80 27.53
3980 0.542 10.06 18.56 25.37
4440 0.542 5.50 10.14 20.12
6080 0.542 4.56 8.41 18.50
7330 0.542 3.60 6.64 16.44
8820 0.542 2.80 5.16 14.25
11920 0.542 2.00 3.69 11.34
Table 1.10.1
RESULT:
The peak to peak voltage of the output signal is measured with respect to the varying input signal,
we have observed that the gain is maximum for a specific frequency, and the gain decreases on
both side.
45
fo|q r CLIPPER
CLIPPER
AIM:
To design a clipper using OP-AMP.
APPARATUS:
IC-741; 15V Dual Power Supply; PN junction diode; Resistors R1 = 10kΩ (Pot.), R2 = 10kΩ; Function
Generator; CRO/DSO.
THEORY:
In electronics, a clipper is a device designed to prevent the output of a circuit from exceeding a
predetermined voltage level without distorting the remaining part of the applied waveform.
A clipping circuit consists of linear elements like resistors and non-linear elements like junction
diodes or transistors, but it does not contain energy-storage elements like capacitors. Clipping
circuits are used to select for purposes of transmission, that part of a signal wave form which lies
above or below a certain reference voltage level.
Thus, a clipper circuit can remove certain portions of an arbitrary waveform near the positive or
negative peaks. Clipping may be achieved either at one level or two levels. Usually under the
section of clipping, there is a change brought about in the wave shape of the signal.
So overall, we can say that clipper is used to clip-off a certain portion of the input signal. There
are two types of clipper
1) Positive clipper
2) Negative clipper
POSITIVE CLIPPER:
It removes positive parts of the input signal. It is formed by using an op-amp with a rectifier
diode as show in Fig. 1.11.1.
46
fo|q r CLIPPER
Fig. 1.11.1
During positive half cycle of the input signal, the diode conducts only till V in = Vref. This happens
because when Vin < Vref, Vref at (-) input is higher than at (+) input; hence VO of the op-amp is then
sufficiently negative to drive the diode into conduction. When diode conducts, it closes the
feedback loop and the op-amp operates as a voltage follower; i.e. VO follows Vin until Vin = Vref.
However, when Vin > Vref the output VO becomes positive to drive diode into cut-off. This opens
the feedback loop and op-amp operates as open loop; so, it drives VO towards positive saturation
(≈ VCC). This happens for every positive cycle of input signal.
Fig. 1.11.2
Output Waveform of a positive clipper
NEGATIVE CLIPPER:
It removes negative parts of the input signal. It is formed by just reversing the polarity of the
diode used in the earlier circuit i.e. positive clipper circuit.
47
fo|q r CLIPPER
Fig. 1.11.3
Working of a negative clipper is same as that of positive clipper. The difference is just that V ref
becomes -Vref.
Fig. 1.11.4
Output Waveform of a negative clipper
PROCEDURE:
1. Set up the circuit shown in Fig. 1.11.1.
2. One end of the potentiometer should be connected to pin 7 and another end to the
ground & wiper should be connected with load resistor.
4. Change the direction of diode for negative clipper.
5. Recode observation as done for positive clippers
48
fo|q r CLIPPER
OBSERVATIONS:
POSITIVE CLIPPER:
INPUT
OUTPUT
NEGATIVE CLIPPER:
INPUT
OUTPUT
RESULT:
Positive and negative clippers were designed and waveforms were recorded.
49
fo|q r D/A CONVERTOR
D/A CONVERTOR
AIM:
To design a D/A converter with binary weighted resistors.
APPARATUS:
IC-741, Resistors Rf = 1kΩ, Ri = Nine 1kΩ, 15V dual power supply, variable power supply,
multimeter.
THEORY:
In electronics, a digital-to-analog convertor (DAC, D/A, D–A, D2A, or D-to-A) is a device that
converts a digital signal into an analog signal. An analog-to-digital converter (ADC) performs the
reverse function.
DACs are commonly used in music players to convert digital data streams into analog audio
signals. They are also used in televisions and mobile phones to convert digital video data into
analog video signals which connect to the screen drivers to display monochrome or color images.
D/A convertor convert digital or binary data into its equivalent analog data. This analog data is
required to drive motors and other analog devices. The converted analog value is either in voltage
or current form.
There are two types of D/A converters:
• Weighted Resistor or Resistive Divider type
• R-2R Ladder type
Here we’re concerned about Weighted Resistors D/A Convertor. An op-amp is used as summing amplifier.
There are four resistors R, 2R, 4R and 8R at the input terminals of the op-amp with R as feedback resistor.
The network of resistors at the input terminal of op-amp is called as variable resistor network. The four
inputs of the circuit are D, C, B & A. Input D is at MSB and A is at LSB. Here we shall connect 8V DC voltage
as logic–1 level. So, we shall assume that 0 = 0V and 1 = 8V.
50
Fig. 1.12.1
Now the working of the circuit is as follows. Since the circuit is summing amplifier, its output is given by
the following equation:
𝐷0 𝐷1 𝐷2 𝐷3
𝑉0 = −𝑅𝑓 ( + + + )
𝑅0 𝑅1 𝑅2 𝑅3
To understand this circuit, let us consider the following cases with V = 4V, R0 = 4kΩ = R (Say), R1 =
𝑅 𝑅 𝑅
= 2kΩ, R2 = 4 = 1kΩ, R3 = 8 = 0.5kΩ & Rf=1kΩ.
2
1. D0 = 1, D1 = D2 = D3 = 0
Voltage across R0, V = 4V
4𝑉
Current through R0 is I = = 1𝑚𝐴
4𝑘Ω
Since, the input impedance is large,
If = I = 1mA
So, Vo= IfRf = (1mA) (1kΩ) = 1V
51
2. D0 = 0, D1 = 1, D2 = D3 = 0
Voltage across R1, V= 4V
4𝑉
Current through R1, I = 2𝑘Ω = 2mA
If = I = 2mA
3. D0 = 1, D1 = 1, D2 = D3 = 0
Here the total resistance is parallel combination of R0 & R1
i.e. RT=R||(R/2) =R/3= (4/3) kΩ
4𝑉
This implies I = (4⁄3)𝑘Ω = 3mA
If = I = 3mA
PROCEDURE:
1. Make the circuit as shown in Fig. 1.12.1.
2. Now apply voltage to the weighted resistors as per the truth table, (High or Vin = 1 &
Ground = 0)
3. Check the output at multimeter connected to pin 6.
OBSERVATIONS:
𝑅 𝑅 𝑅
Here V = 2V, R0 = 4kΩ = R (Say), R1 = = 2kΩ, R2 = 4 = 1kΩ, R3 = 8 = 0.5kΩ & Rf =1kΩ.
2
D3 (23) D2 (22) D1 (21) D0 (20) Vth (V) Vobs (V)

0 0 0 0 0.00 0.011
0 0 0 1 0.50 0.502
0 0 1 0 1.00 0.995
0 0 1 1 1.50 1.495
0 1 0 0 2.00 1.993
0 1 0 1 2.50 2.483
0 1 1 0 3.00 2.960
0 1 1 1 3.50 3.490
1 0 0 0 4.00 3.960
1 0 0 1 4.50 4.470
1 0 1 0 5.00 4.960
1 0 1 1 5.50 5.460
1 1 0 0 6.00 5.950
1 1 0 1 6.50 6.440
52
1 1 1 0 7.00 6.930
1 1 1 1 7.50 7.340
RESULT:
D/A convertor have been constructed giving accurate results.
53
fo|q r LOW PASS FILTER
LOW PASS FILTER

AIM:
To design a Low Pass Filter using OP-AMP.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors R1 = 10kΩ, R2 = 10kΩ, R3 = 1kΩ; Capacitor C = 0.1µF;
THEORY:
INTRODUCTION TO FILTERS:
An electric filter is a frequency-selecting circuit designed to pass a specified band of frequencies
while attenuating signals of frequencies outside this band. Filters may be either active or passive
depending on the type of elements used in their circuitry. Passive filters contain only resistors,
capacitors, and inductors. Active filters employ transistors or op-amps in addition to resistors and
capacitors. Active filters offer several advantages over passive filters. Since the op-amp can
provide a gain, the input signal is not attenuated as it is in a passive filter. Because of the high
input and low output resistance of the op-amp, the active filter does not cause loading of the
source or load.
Fig. 1.13.1
Passive Low Pass Filter
There are basically four types of active filters: low-pass, high-pass, band-pass, and band-reject
filters.
Here, we will discuss the circuitry and functioning of a low pass filter.
54
LOW PASS FILTER:

𝑉𝑜𝑢𝑡
A low-pass filter has a constant gain (= ) from 0 Hz to a high cut off frequency fH. The cut-off
𝑉𝑖𝑛
1
is given by 𝑓𝐶 = 2𝜋𝑅𝐶
The cut-off frequency is often referred to as the 3dB cut-off and is when the output has an
amplitude of 0.707 times the maximum input. For a low pass filter, fC is represented as fH that is
at fH the gain is down by 3 dB; after that (f > fH) the gain decreases as frequency increases with a
roll down rate of 20dB/decade. The frequencies between 0 Hz and f H are called pass band
frequencies, whereas the frequencies beyond fH are the so-called stop band frequencies.
CIRCUIT ANALYSIS:
Fig. 1.13.2
Applying voltage divider rule at node:
−𝑗𝑋𝐶
𝑉1 = 𝑉
𝑅3 − 𝑗𝑋𝐶 𝑖𝑛
1
Where −𝑗𝑋𝐶 = 𝑗2𝜋𝑓𝐶
1
So, 𝑉1 = 𝑉
1+𝑗2𝜋𝑓𝑅3 𝐶 𝑖𝑛
𝑉 𝑅
Also, for non-inverting mode, gain 𝐴𝑉 = 𝑉𝑜 = 1 + 𝑅2
1 1
1
Therefore, 𝑉0 = 𝑉1 𝐴𝑉 = (1+𝑗2𝜋𝑓𝑅 𝐶 𝑉𝑖𝑛 ) 𝐴𝑉
3
𝑉0 𝐴
Or 𝑉 = 1+𝑗𝑓𝑉⁄𝑓
𝑖𝑛 𝐻
1
Where 𝑓𝐻 = 2𝜋𝑅 𝐶
3
𝑉 𝐴𝑉
Also, magnitude of the gain is |𝑉 0 | =
𝑖𝑛 √1+(𝑓⁄𝑓𝐻 )2
55
PROCEDURE:
3. Vary input frequency and note corresponding input and output voltages.
OBSERVATIONS:
Frequency (Hz) Vin (V) Vout (V) 𝑽𝒐 Gain (dB)
Gain (𝑨𝑽 = )
𝑽𝒊𝒏
27.7 0.466 0.931 2.00 6.01
156.2 0.465 0.925 1.99 5.97
223.3 0.464 0.919 1.98 5.94
304.2 0.462 0.909 1.97 5.88
440.0 0.455 0.883 1.94 5.76
529.0 0.459 0.882 1.92 5.67
662.0 0.456 0.858 1.88 5.49
735.0 0.454 0.846 1.86 5.41
864.0 0.451 0.821 1.82 5.20
940.0 0.446 0.800 1.79 5.08
1064.0 0.442 0.773 1.75 4.86
1251.0 0.420 0.707 1.68 4.52
1462.0 0.409 0.655 1.60 4.09
1638.0 0.380 0.632 1.66 4.42
1844.0 0.407 0.595 1.46 3.30
1930.0 0.407 0.582 1.43 3.11
2043.0 0.403 0.561 1.39 2.87
2171.0 0.399 0.537 1.34 2.58
2355.0 0.392 0.504 1.29 2.18
2583.0 0.383 0.466 1.22 1.70
2770.0 0.353 0.436 1.24 1.83
3038.0 0.366 0.402 1.10 0.82
3322.0 0.361 0.372 1.03 0.26
3568.0 0.311 0.302 0.97 -0.26
CALCULATIONS:
1
𝑓𝐻 =
2𝜋𝑅𝐶
Where R = 1kΩ and C = 83nF
So, fH = 1917.5Hz
56
RESULT:
It has been observed that the gain is constant for f < fH, as calculated above fH is 1917 Hz, which
matches approximately with the value that we get from frequency response curve i.e 1974 Hz
approx. (frequency corresponding to gain that is 3db down the peak value of gain) and decreases
for f > fH. Hence, the low pass filter has been designed.
57
fo|q r HIGH PASS FILTER
HIGH PASS FILTER

AIM:
To design a High Pass Filter using OP-AMP.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors R1 = 10kΩ, R2 = 10kΩ, R3 = 1kΩ; Capacitor C = 0.01µF;
THEORY:
ACTIVE HIGH PASS FILTER:

A first-order (single-pole) Active High Pass Filter as its name implies, attenuates low frequencies
and passes high frequency signals. It consists simply of a passive filter section followed by a non-
inverting operational amplifier. The frequency response of the circuit is the same as that of the
passive filter, except that the amplitude of the signal is increased by the gain of the amplifier and
𝑅
for a non-inverting amplifier the value of the pass band voltage gain is given as (1 + 𝑅2).
1
CIRCUIT ANALYSIS:
Fig. 1.14.1
58
Applying voltage divider rule at node:

𝑅3
𝑉1 = 𝑉
𝑅3 − 𝑗𝑋𝐶 𝑖𝑛
1
Where −𝑗𝑋𝐶 = 𝑗2𝜋𝑓𝐶
𝑗2𝜋𝑓𝑅 𝐶
So, 𝑉1 = 1+𝑗2𝜋𝑓𝑅3 𝐶 𝑉𝑖𝑛
3
𝑉 𝑅
Also, for non-inverting mode, gain 𝐴𝑉 = 𝑉𝑜 = 1 + 𝑅2
1 1
𝑗2𝜋𝑓𝑅3 𝐶
Therefore, 𝑉0 = 𝑉1 𝐴𝑉 = (1+𝑗2𝜋𝑓𝑅 𝐶 𝑉𝑖𝑛 ) 𝐴𝑉
3
𝑓
𝑉 𝐴𝑉 (𝑗 )
𝑓𝐿
Or 𝑉 0 = 𝑓
𝑖𝑛 1+(𝑗 )
𝑓𝐿
1
Where 𝑓𝐿 = 2𝜋𝑅
3𝐶
𝑓
𝑉0 𝐴𝑉 ( )
𝑓𝐿
Also, magnitude of the gain is |𝑉 | =
𝑖𝑛 √1+(𝑓⁄𝑓𝐿 )2
WORKING:
The operation of a high pass active filter can be verified from the frequency gain equation above
as:
𝑉𝑜𝑢𝑡
• At very low frequencies, ƒ < ƒC, < 𝐴𝑉
𝑉𝑖𝑛
𝑉𝑜𝑢𝑡 𝐴𝑉
• At the cut-off frequency, ƒ = ƒC, =
𝑉𝑖𝑛 √2
𝑉𝑜𝑢𝑡
• At very high frequencies, ƒ > ƒC, ≈ 𝐴𝑉
𝑉𝑖𝑛
Then, the Active High Pass Filter has a gain AF that increases from 0Hz to the low frequency cut-
off point, ƒC at 20dB/decade as the frequency increases. At ƒC the gain is 0.707AV, and after ƒC all
frequencies are pass band frequencies so the filter has a constant gain AV with the highest
frequency being determined by the closed loop bandwidth of the op-amp.
When dealing with filter circuits the magnitude of the pass band gain of the circuit is generally
expressed in decibels or dB as a function of the voltage gain, and this is defined as:
𝑉𝑜𝑢𝑡
𝐴𝑉 (𝑑𝐵) = 20 log10 ( )
𝑉𝑖𝑛
For a first-order filter the frequency response curve of the filter increases by 20dB/decade or
6dB/octave up to the determined cut-off frequency point which is always at -3dB below the
maximum gain value. As with the previous filter circuits, the lower cut-off or corner frequency
(ƒC) can be found by using the same formula:
1
𝑓𝐶 =
2𝜋𝑅𝐶
59
The corresponding phase angle or phase shift of the output signal is the same as that given for
the passive RC filter and leads that of the input signal. It is equal to +45° at the cut-off frequency
ƒC value and is given as:
1
𝜑 = tan−1 ( )
2𝜋𝑓𝑅𝐶
PROCEDURE:
3. Vary input frequency and note corresponding input and output voltages.
OBSERVATIONS:
Frequency (Hz) Vin (V) Vout (V) 𝑽 Gain (dB)
Gain (𝑨𝑽 = 𝑽 𝒐 )
𝒊𝒏
100 13.6 3.2 0.2 -12.6
300 14.6 7.2 0.5 -6.1
500 14.6 11.2 0.8 -2.3
700 14.4 13.6 0.9 -0.5
1000 14.6 16.8 1.2 1.2
1300 14.4 20.0 1.4 2.8
2000 14.2 23.2 1.6 4.3
3000 14.0 25.6 1.8 5.2
5000 14.0 27.2 1.9 5.8
7000 13.8 28.0 2.0 6.1
8000 13.8 28.0 2.0 6.1
8500 13.8 28.0 2.0 6.1
CALCULATIONS:
1
𝑓𝐻 =
2𝜋𝑅𝐶
Where R = 1kΩ and C = 0.1µF
So, fH = 1591.5Hz
60
RESULT:
It has been observed that the gain is constant for f > fL, as calculated above fL is 1591.5 Hz, which
matches approximately with the value that we get from frequency response curve i.e 1410 Hz
approx. (frequency corresponding to gain that is 3db down the peak value of gain) and decreases
for f < fL. Hence, the low pass filter has been designed.
61
fo|q r INSTRUMENTATION AMPLIFIER
INSTRUMENTATION AMPLIFIER
AIM:
To design an instrumentation amplifier.
APPARATUS:
Three IC-741; 15V Dual Power Supply; Two 5V DC power supply; Resistors Ri = 1kΩ, Rf = 10kΩ;
Capacitor Cf = 0.01µF; Function Generator; CRO/DSO.
THEORY:
An instrumentation amplifier is typically the first stage in an instrumentation system. It is used to
amplify the signal produced by a transducer such as thermocouple or a strain gauge. An
instrumentation amplifier is a differential amplifier. It amplifies the voltage difference between
its two input terminals. An instrumentation amplifier should have the following characteristics,
high input resistance, high voltage gain, high CMRR; usually a transducer is used in bridge from
in differential configuration, so often it is called differential instrumentation system arrangement
using a transducer bridge circuit. Usually we use a resistive transducer/ variable resistance in the
circuit.
WORKING:
The output stage of the instrumentation amplifier is a difference amplifier, whose output V out is
the amplified difference of the input signals applied to its input terminals. If the output of op-
amp1 and op-amp2 are V01 and V02 respectively, then the output of the difference amplifier is
given by
𝑅3
𝑉𝑜𝑢𝑡 = (𝑉 − 𝑉01 )
𝑅2 02
The expression for V01 and V02 can be found in terms of the input voltages and resistance.
Consider the input stage of the instrumentation amplifier as shown in Fig. 1.15.1
62
Fig. 1.15.1
Input Stage of Instrumentation Amplifier
The potential at node A is the input voltage V1. Hence the potential at node B is also V1, from the
virtual short concept. Thus, the potential at node G is also V1.
The potential at node D is the input voltage V2. Hence the potential at node C is also V2, from the
virtual short. Thus, the potential at node H is also V2.
Ideally the current to the input stage op-amps is zero. Therefore, the current I through the
resistors R1, Rgain and R1 remains the same.
Applying Ohm’s law between the nodes E and F,

(𝑉01 −𝑉02 ) (𝑉 −𝑉 )
𝐼=𝑅 = 2𝑅01+𝑅 02 …1.15.1
1 +𝑅𝑔𝑎𝑖𝑛 +𝑅1 1 𝑔𝑎𝑖𝑛
Since no current is flowing to the input of the op-amps 1 & 2, the current I between the nodes G
and H can be given as,
(𝑉𝐺 −𝑉𝐻 ) (𝑉1 −𝑉2 )

𝐼= = …1.15.2
𝑅𝑔𝑎𝑖𝑛 𝑅𝑔𝑎𝑖𝑛
Equating equations 1.15.1 and 1.15.2,
(𝑉01 − 𝑉02 ) (𝑉1 − 𝑉2 )

=
2𝑅1 + 𝑅𝑔𝑎𝑖𝑛 𝑅𝑔𝑎𝑖𝑛
(𝑉1 −𝑉2 )
(𝑉01 − 𝑉02 ) = (2𝑅1 + 𝑅𝑔𝑎𝑖𝑛 ) …1.15.3
𝑅𝑔𝑎𝑖𝑛
The output of the difference amplifier is given as,
63
𝑅3 (𝑉02 − 𝑉01 )
𝑉𝑜𝑢𝑡 =
𝑅2
𝑅
Therefore, (𝑉01 − 𝑉02 ) = − 𝑅2 𝑉𝑜𝑢𝑡
3
Substituting (Vo1 – Vo2) value in the equation 1.15.3, we get
𝑅2 (𝑉1 − 𝑉2 )
− 𝑉𝑜𝑢𝑡 = (2𝑅1 + 𝑅𝑔𝑎𝑖𝑛 )
𝑅3 𝑅𝑔𝑎𝑖𝑛
𝑅 (2𝑅1 +𝑅𝑔𝑎𝑖𝑛 )
i.e. 𝑉𝑜𝑢𝑡 = 𝑅3 (𝑉2 − 𝑉1 )
2 𝑅𝑔𝑎𝑖𝑛
When R1, R2, R3, are all equal to R the output of the instrumentation amplifier will be
(2𝑅 + 𝑅𝑔𝑎𝑖𝑛 )
𝑉𝑜𝑢𝑡 = (𝑉2 − 𝑉1 )
𝑅𝑔𝑎𝑖𝑛
The above equation gives the output voltage of an instrumentation amplifier. The overall gain of
𝑅 (2𝑅1 +𝑅𝑔𝑎𝑖𝑛 )
the amplifier is given by the term 𝑅3 .
2 𝑅𝑔𝑎𝑖𝑛
CIRCUIT DIAGRAM:
Fig. 1.15.2
64
PROCEDURE:
2. Use V1 and V2 to be 5V.
OBSERVATIONS:
R1 = R2 = R3 = 1kΩ, V1 = 0.01V
𝑹𝒈𝒂𝒊𝒏 (kΩ) 𝑽𝒊𝒏 = |𝑽𝟐 – 𝑽𝟏 | (V) 𝑽𝒐𝒃𝒔

𝒐𝒖𝒕 (V) 𝑽𝒄𝒂𝒍
𝒐𝒖𝒕 (V)
0.333 1.000 6.430 6.880
1.000 0.300 0.858 0.900
1.000 0.588 1.119 1.764
2.200 1.000 1.462 1.435
3.850 1.000 1.285 1.519
4.420 1.000 1.250 1.450
4.680 1.000 1.241 1.427
8.110 1.000 1.151 1.246
9.186 1.000 1.136 1.218
9.980 0.260 0.291 0.312
15.300 1.000 1.092 1.13
19.740 1.000 1.079 1.101
25.220 1.000 1.066 1.079
136.000 1.000 1.034 1.014
RESULT:
In the instrumentation circuit we are getting change in the output for change the resistance of
the input in the Rgain.
65
fo|q r LISSAJOUS FIGURE
LISSAJOUS FIGURE
AIM:
To design Lissajous figure using Op-Amp.
APPARATUS:
IC-741; 15V Dual Power Supply; Resistors Ri = 1kΩ, Rf = 10kΩ; Capacitor C = 1µF and 32nF;
THEORY:
Lissajous figure, pattern produced by the intersection of two sinusoidal curves the axes of which
are at right angles to each other. It is graph of parametric equations,
x  A sin t    ,
y  A sin t 
If the frequency and phase angle of the two curves are identical, the resultant is a straight line
lying at 45° (and 225°) to the coordinate axes. If one of the curves is 180° out of phase with
respect to the Otherwise, with identical amplitude and frequency but a varying phase relation,
ellipses are formed with varying angular positions, except that a phase difference of 90° (or 270°)
produces a circle around the origin. If the curves are out of phase and differing in frequency,
intricate meshing figures are formed.
Other, another straight line is produced lying 90° away from the line produced where the curves
are in phase (i.e., at 135° and 315°).
Of particular value in electronics, the curves can be made to appear on an oscilloscope, the shape
of the curve serving to identify the characteristics of an unknown electric signal. For this purpose,
one of the two curves is a signal of known characteristics. In general, the curves can be used to
analyze the properties of any pair of simple harmonic motions that are at right angles to each
other.
66
Fig. 1.16.1
As we have already seen that the integrator circuit produces phase difference between input and
output waves and it can also be done by inverting and non-inverting op-amp. So, we used that
functionality to introduce phase.
67
Fig. 1.16.2
The output form of the integrator is of the form

1
Vout   Vin .
j RC
PROCEDURE:
2. By varying the feedback capacitor, phase difference between input and output varies.
So, by varying the capacitance output waveform has been recorded.
NOTE: Take observations in X-Y plane instead of actual X-T plane. It is recommended to use CRO.
OBSERVATIONS:
Capacitor, C (µF) Inverting Mode Non-Inverting Mode
68
0.032
RESULT:
Lissajous figure for different phase was designed successfully.
69
fo|q r VOLTAGE TO FREQUENCY CONVERTOR
VOLTAGE TO FREQUENCY CONVERTOR

AIM:
To design a voltage to frequency converter using Op-Amp.
APPARATUS:
IC-741; IC-555; 15V Dual Power Supply; Variable DC power supply; Resistors R1 = R4 = 5.6kΩ,
R2 = R3 = 2.7kΩ; Capacitor C1 = 0.20µF, C2 = 0.01 µF; CRO/DSO.
THEORY:
A voltage to frequency converter produces an output signal whose instantaneous frequency is a
function of external control voltage. The output signal may be a sine wave, a square wave, or a
pulse train of particular frequency. For the latter case, the instantaneous frequency is often
interpreted as the number of pulses generated per unit time. The resulting frequency variation
with input signal is a form of frequency modulation (FM) and some of the technology developed
in communications may be applied to Voltage to Frequency conversion.
A voltage to frequency converter (VFC) is a type of voltage controlled oscillator. It is often only
useful at lower frequencies and may have a narrow pulse output instead of a nice sine wave or
square wave. The frequency of many oscillator circuits can be varied by the application of a
control voltage at certain points.
In one sense Voltage to Frequency conversion with a pulse train can be thought of as a form of
analog to digital (A/D) conversion which is used in mixed-signal processing. This interpretation is
based on the fact that pulses assume only two states and number of pulses produced per unit
time is a function of the signal level. Voltage to frequency conversion is particularly useful for
conversion systems in which the data are to be transmitted over some reasonable distance, since
the output is in a modulated form. Thus, there is no need to transmit a dc level and various ac
coupling methods such as transformers and ac amplifiers may be employed. At the receiving end
an F/V converter matched to the V/F converter at the sending end to convert the data back to
analog form.
70
Fig. 1.17.1
In this circuit IC741 and IC555 is used to convert voltage in to frequency. A very compact and
precise voltage to frequency converter using this circuit can accept input voltages. This circuit
can accept positive or negative or differential control voltages. The output frequency is zero
when the control voltage is zero. The 741 opamp forms a current source controlled by the voltage
EC to charge the timing capacitor C1 linearly. IC-555 is connected in the Astable mode. so that
the capacitor charges and discharges between 113 Vee and 213 Vee Â· The offset is adjusted by
the 10-KΩ potentiometer so that the frequency is zero when the input is zero. If two dc voltages
are applied to the ends of R1 and R4, the output frequency will be proportional to the difference
between the two voltages.
PROCEDURE:
1. Make the circuit according to the circuit diagram (Fig. 1.17.1).
2. Adjust the wiper of potentiometer until output offset voltage is reduced to zero.
3. Vary the input voltage and note the output frequency at pin 3 of IC-555.
OBSERVATIONS:
Input Voltage (Volts) Output Frequency (Hz)
3.0 8.026
3.5 10.36
4.0 12.29
4.5 14.12
5.0 15.52
5.5 17.29
71
6.0 19.10
6.5 20.75
7.0 22.22
7.5 23.90
8.0 25.25
8.5 27.00
9.0 28.36
9.5 30.18
10.0 31.69
RESULT:
During the experiment, the voltage to frequency converter was designed successfully and we
can easily convert any signal of a particular voltage into frequency signal. Also, it was
observed that voltage and frequency are linearly related, i.e. frequency increases when
voltage increases.
72
fo|q r DIFFERENTIAL EQUATION SOLVER
DIFFERENTIAL EQUATION SOLVER

AIM:
To design a circuit (analog computer) using Op-Amp to solve a second order differential
equation.
APPARATUS:
Three IC-741; 15V Dual Power Supply; Resistors R1 = 100Ω, R2 = 5kΩ, R3 = 33.3Ω, R4 = 1MΩ, Two
R = 10kΩ; Capacitors C1 = C2 = 1µF; Function Generator; CRO/DSO.
MOTIVATION:
In the due course of time while working with op-amp for designing various practical circuit like
circuit of integrator, differentiator, summing circuit separately we thought is it possible to design
a circuit where we can actually merge all the above-mentioned circuitry into a single unit so as
to solve a complex mathematical problem where all the above-mentioned circuits are used. From
the already existing literature we come to know solving ODE using operational amplifier is one
such problem where many discrete concepts of op-amp can be put together.
THEORY:
Analog computational circuitry is a type of circuit which is used extensively for performing the
calculus operations integration and differentiation with respect to time, by using capacitor in an
op-amp feedback loop.
The inverting amplifiers, summing circuits, and integrators described in the previous sections are
used as building blocks to form analog computers for solving linear differential equations.
Differentiators are avoided because of considerable effect of noise despite its low level.
To design a computing circuit, first rearrange the differential equation such that the highest
existing derivative of the desired variable is on one side of the equation. Add integrators and
amplifiers in cascade and in nested loops as shown later to solve an ODE.
But before we go into the circuit details lets revisit the concepts of integrator i.e. leaky integrator
as the results of this circuit will be used to interpret the results of differential equation circuit.
73
INTEGRATOR:
The integrator circuit using op-amp is shown below
Fig. 1.18.1
For this circuit if we want to derive the input out relationship the by using KCL we will get
𝑣1 𝑑𝑣2
+𝐶 =0
𝑅 𝑑𝑡
From which
𝑑𝑣2 1
=− 𝑣
𝑑𝑡 𝑅𝐶 1
1 𝑡
𝑣2 = − ∫ 𝑣 𝑑𝑡
𝑅𝐶 −∞ 1
Now using this circuit if we want to calculate v2 for t  0 assuming v2 (0)  0 when
𝑅 = 1𝑘Ω, 𝐶 = 1µ𝐹 𝑎𝑛𝑑 𝑣1 = sin(2000𝑡).
We will get
𝑡
1
𝑣2 = − 3 ∫ sin(2000𝑡) 𝑑𝑡 = 0.5(cos(2000𝑡) − 1)
10 × 10−6 −∞
LEAKY INTEGRATOR:
The circuit of Fig. 1.18.2 is called a leaky integrator, as the capacitor voltage is continuously
discharged through the feedback resistor Rf. This will result in a reduction in gain |V2/V1| and a
phase shift in V2.
Let’s solve one problem so that it will be clear to idea. For example, if in the below circuit we are
asked to find the value of v2 for the given parameters
𝑅1 = 𝑅2 = 1𝑘Ω, 𝐶 = 1µ𝐹 𝑎𝑛𝑑 𝑣1 = sin(2000𝑡).
74
Fig. 1.18.2
The inverting node is at zero voltage, and the sum of currents arriving at it is zero. Thus,
𝑣1 𝑑𝑣2 𝑣2
+𝐶 + =0
𝑅1 𝑑𝑡 𝑅𝑓
𝑑𝑣2
𝑣1 + 10−3 + 𝑣2 = 0
𝑑𝑡
𝑑𝑣
10−3 𝑑𝑡2 + 𝑣2 = − sin(2000𝑡) …1.18.1
The solution for v2 in is a sinusoidal with the same frequency as that of v1 but different
amplitude and phase angle, i.e.
𝑣2 = 𝐴 cos(2000𝑡 + 𝐵) …1.18.2
dv
To find A & B, we substitute v2 and 2 in (1.18.2) into (1.18.1).
dt
𝑣2 = 0.447 cos(2000𝑡 + 26.57)
So, it is very evident that there is phase in the output and it different from the integrator
without feedback resistor.
INTEGRATOR-SUMMER AMPLIFIER:
A single op-amp in an inverting configuration with multiple input lines and a feedback capacitor as
shown in Fig. 1.18.3 can produce the sum of the integrals of several functions with desired gains.
75
Fig. 1.18.3
For this circuit the output input relation will be
𝑣1 𝑣2 𝑣3 𝑑𝑣0
+ + +𝐶 =0
𝑅1 𝑅2 𝑅3 𝑑𝑡
𝑡 𝑣 𝑣 𝑣
𝑣0 = − ∫−∞ (𝑅 1𝐶 + 𝑅 2𝐶 + 𝑅 3𝐶) 𝑑𝑡 …1.18.3
1 2 3
THE PROBLEM:
Design a circuit with x(t ) as input to generate output y(t) which satisfies the following equation
𝑦̈ (𝑡) + 200𝑦̇ (𝑡) + 30000𝑦(𝑡) = 𝑥(𝑡)
Here 𝑥(𝑡) = 10000 sin(100𝑡)
𝑦̈ (𝑡) + 200𝑦̇ (𝑡) + 30000𝑦(𝑡) = 10000 sin(100𝑡) …1.18.4
Here, to solve a differential equation having big coefficient like this will be tedious job so we
have scaled the same.
Here we have scale the differential equation as 100𝑡 = 𝜏
So, we will get,
𝑦̈ (𝜏) = sin(𝜏) − 2𝑦̇ (𝜏) − 3𝑦(𝜏) …1.18.5
This equation will be used for mathematical calculation.
Note: Even this equation can be solved using op-amp but since we don’t have a 1Hz frequency
source, so we have solved equation 1.18.4 using op-amp.
76
CIRCUIT DIAGRAM:
Fig. 1.18.4
PROCEDURE:
1. Rearrange the differential equation 1.18.4 as follows
𝑦̈ (𝑡) = 10000 sin(100𝑡) − 200𝑦̇ (𝑡) − 30000𝑦(𝑡)
2. Use the summer integrator op-amp in Fig. 1.18.3 to integrate equation above. Compare
the coefficients in equation 1.18.3 with that in above equation to find the value of R1,
R2, R3 and C1, such that output of op-amp #1 is 𝑣1 = −𝑦̇ (𝑡).
3. Let C1=1uF and compute the resistor accordingly
1
R1C1 
1000
Here C=106μF
So, R1 =100
1
Similarly, R2C1 
30000
6
Here C=10 μF
So, R 2 =33.3
1
And for R3, R3C1 
200
6
Here C=10 μF
So, R 3 =5000 .
77
Therefore,
𝑣1 = − ∫ 𝑦̈ (𝑡)𝑑𝑡 = − ∫(10000 sin(100𝑡) − 200𝑦̇ (𝑡) − 30000𝑦(𝑡))𝑑𝑡
𝑣1 = −𝑦̇ (𝑡)
4. Set frequency to be 100Hz*.
5. Integrate 𝑣1 = −𝑦̇ (𝑡) by op-amp #2 to obtain y . We let C2  1μF and R4  1MΩ to
obtain v2  y at the output of op-amp #2.
1
R4C2 
v2   v2 dt   y ' dt  y
6. Supply inputs to op-amp #1 through the following connections. Feed 𝑣1 = −𝑦̇ (𝑡) directly
back to the R3 input of op-amp #1. Pass v2   y through the unity gain inverting op-amp
#3 to generate  y , and then feed it to the R2 input of op-amp #1. Connect the voltage
source x(t ) i.e. sin( ) to the R1 input of the op amp #1. The complete circuit is shown in
Fig. 1.18.4.
CALCULATIONS AND RESULTS:

When solved equation 1.18.5, we get,
1
𝑦(𝜏) = 𝑒 −𝜏 (𝑐1 cos(√2𝜏) + 𝑐2 sin(√2𝜏)) + (sin(𝜏) − cos(𝜏))
4
On substituting 100𝑡 = 𝜏,
1
𝑦(𝑡) = 𝑒 −100𝑡 (𝑐1 cos(100√2𝑡) + 𝑐2 sin(100√2𝑡)) + (sin(100𝑡) − cos(100𝑡))
4
The theoretical plots are shown with great details here
Fig. 1.18.5: Theoretical plot of y (t ) v/s t
78
The output of op-amp2 i.e. (y) v/s input signal is shown by Fig. 1.18.6.
Fig. 1.18.6: Experimental plot of y (t ) v/s t
• Since the equation of our interest resemble with that of the equation of forced
harmonic oscillator so it will have a transient part and stationary part, and the
transient part will die up after some time, so we will be left with stationary part.
• The theoretical value of phase shift is 45⁰
• The measured value of phase shift is – 22.7⁰
DISCUSSION:
While designing the circuit to solve ODE, few points should be keep mind, like if it’s difficult to
solve the equation analytically then scale the coefficient of ODE, also the numerical solutions are
more accurate when the coefficients are linear in nature so if it’s not so, try to convert the same
using a suitable scaling.
* While performing the experiment we made a blunder of assuming frequency to be same as ω.

When we performed simulation for same we found this mistake, this was the reason the
observations were not consistent with theoretical results. So, according to the differential
equation, the argument of sine was ωt which was misunderstood to be ft. Therefore, frequency
𝜔 100
of input signal used would be 2𝜋 or 2𝜋 which is approximately 16Hz.
Now, when we use the same, we obtain following results:
79
Fig. 1.18.7: Circuit
Fig. 1.18.8: Result
80
fo|q r BIBLIOGRAPHY
BIBLIOGRAPHY
REFERENCE BOOKS:
1. Operational Amplifier and linear Integrated Circuits, Ramakant A. Gaykward.
2. B.Sc. Practical Physics, Geeta Sanon.
3. Nulling input offset voltage of an operational amplifier, Bao Nguyen and W. David Smith.
4. Rosenow. (2001). Lesson 1436: Operational amplifier characteristics.
5. Cleveland: Cleveland Institute of Electronics.
INTERNET SOURCES:
1. http://www.electronics-tutorials.ws
2. https://en.wikipedia.org
3. http://www.wisc-online.com
4. https://www.wolframalpha.com
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ANSHU KATARIA (1613501)

JITENDER KUMAR (1613627)

RAJAT SARDANA (1613641)

SALIL BATABYAL (1613526)

SUKRITI HANS (1613447)

TANYA VERMA (1613731)

BLOCK DIAGRAM OF AN OPERATIONAL AMPLIFIER (OP AMP):

The block diagram of a multi-stage operational amplifier is given below:

1. The first stage of op-amp IC 741 is differential amplifier.

EQUIVALENT CIRCUIT OF AN OPERATIONAL AMPLIFIER (OP AMP):

SCHEMATICS REPRESENTATION OF AN OPERATIONAL AMPLIFIER (OP

CHARACTERISTICS OF AN OPERATIONAL AMPLIFIER (OP AMP):

IDEAL AND PRACTICAL OP AMP CHARACTERISTICS :

OPEN LOOP FREQUENCY RESPONSE:

GBP = Gain x Bandwidth = A x BW

GBP = A x BW = 10 x 100,000Hz = 1,000,000.

PIN DIAGRAM OF 741 - IC:

REASON FOR OUTPUT OFFSET VOLTAGE:

PRACTICAL CONSIDERATIONS FOR 741 OP-AMP VOLTAGE FOLLOWER:

Ideal summing point: V1 =Vin ;

Vin (V) Vout (V)

(B) Frequency response of gain 3.17.

SET II: For gain 2.

Furthermore, the capacitor has a voltage-current relationship governed by the equation:

𝑉𝑖𝑛 − 𝑉𝑋 𝑑(𝑉𝑋 − 𝑉𝑜𝑢𝑡 )

Here, 𝑉𝑋 is voltage appeared at node X. But, due to virtual ground, 𝑉𝑋 = 0. So,

Integrating both sides with respect to time:

If we assume initial value of 𝑉𝑜𝑢𝑡 to be 0𝑉,

A differentiator with only RC network is called a passive differentiator, whereas a differentiator

The charge on the capacitor will be

The rate of change of this charge is:

OP-AMP DIFFERENTIATOR WAVEFORMS:

SUMMING, SCALING AND AVERAGING AMPLIFIER

So, the output voltage can be written as,

Va (V) Vb (V) Vc (V) VTh (V) Vout (V)

Va (V) Vb (V) Vc (V) VTh (V) Vout (V)

1.5 4.13 4.68 2.39 2.392

Va (V) Vb (V) Vc (V) VTh (V) Vout (V)

ZERO CROSSING DETECTOR

SQUARE WAVE GENERATOR

SQUARE WAVE GENERATOR:

WORKING (USING IC-741):

The frequency can be defined by the equation:

VOLTAGE TO CURRENT CONVERTER

Floating Load Voltage to Current Converter.

Since A is very large, VD =0;

Since, the input to the Op-amp, IB =0.

Vin (V) Ii(th) (mA) Vout (V) Ii(exp) (mA)

If Qcoil ≥ 10. Where Qcoil is figure of merit of the coil.

OBSERVATIONS AND CALCULATIONS:

Frequency, f (Hz) Vin (Volts) Vout (Volts) Gain Gain (dB)

3409 0.542 18.60 34.32 30.66

D3 (23) D2 (22) D1 (21) D0 (20) Vth (V) Vobs (V)

LOW PASS FILTER

LOW PASS FILTER:

HIGH PASS FILTER

ACTIVE HIGH PASS FILTER:

Applying voltage divider rule at node:

Applying Ohm’s law between the nodes E and F,

(𝑉𝐺 −𝑉𝐻 ) (𝑉1 −𝑉2 )

Equating equations 1.15.1 and 1.15.2,

(𝑉01 − 𝑉02 ) (𝑉1 − 𝑉2 )

The output of the difference amplifier is given as,