Beruflich Dokumente
Kultur Dokumente
Yes
Yes
Yes
No
C300(VBAT) = 3.0V? Check the related circuit
Yes
①
Check the MEM_1.8V of U300 No
is more than 1.8V Check the U300 and C307
1.8V
Yes
Check PM300
②
3.0V_DIG = 3.0V No
Check the PM 300 and C322, C321,
3.0V_ANLG = 3.0V
1.2V_ANLG = 1.2V C313
Yes
③
Check CLK32K No
Freq = 32KHz Check the clock 32KHz_DIGIT
Yes
Yes
END
9-1
SAMSUNG Proprietary-Contents may change without notice
This Document can not be used without Samsung's authorization
Flow Chart of Troubleshooting
R3 0 0 10
1 . 3 V_ VC XO
V BAT
TA 300 C3 00
2.7V _V RF
R3 0 2 0 .1
2.5V _US BOTG
C304
C3 0 1 C3 0 2 C 30 3
1005 1005
1 2 5 6
C4
C3
Q300 C2
4
E C1
B C3 0 7
2200 nF
3
D C _ IN
G10
H11
F10
L10
J10
B7
K8
K4
K5
K3
B8
B9
A4
K7
H3
B6
A5
A6
F1
C3 08
VCHGR
VIVCC
VDDO
VLCLDO
VABAT
VAXBAT
VLSBAT
VRFBAT
PDRIVE
VHBAT1
VHBAT2
VLVVDD
VRFLDO1
VRFLDO2
VMSBAT
RSENSE
VOFFBUS\
BAT_PRSNT
VMBAT_SNS
H1 0
CCP
T P3 0 0
F2 J1
G P I O 1 | O T G SH D N \ P O NKY \ P O NKE Y
T P3 0 1 G3
G P IO 2
L3
V IO L D O 3 . 0 V_ D I G
H9 B1
A N A T ES T 1 V IO SRB AT VB A T
J9 B2
A N A T ES T 2 VI O SR F B
A1
VI O S R G N D L 300
C4 A2
D IGTE ST0 V IOS RL 1 . 8 V_ M EM
C3
D IGTE ST1
A8
V ALD O1 3 . 0 V_ A N L G
F9 A7
I D_I N V ALD O2 3 . 2 V_ K E Y_ L I G H T
H2 L8
I D_OU T V AU XLD O1 2 . 8 V_ C A M _ I O
L9
V AU XLD O2 3 . 2 V_ VI B
B 11
F G S N S1
A 11 L6
F G S N S2 V MSLD O1 2 . 9 V_ L C D
L7
V MSLD O2 3 . 3 V_ U S B _ N V R A M
A 10
PC P C1
C9 E 10
CL K_ RE Q P C2 V BS W1
TP 30 2 U 300 E 11
V BS W2
T P3 0 3 A3
P WM LED 1
J3 L4
P WM LED 2 V HCLD O1 3.0V_AM P1
L5
V HCLD O2 3 . 0 V_ SD
G1 J4
S T AT 1 VH CLD O1_S NS
G2 J5
S TA T2 VH CLD O2_S NS
J8 B4
N TC V LVLD O1 1 . 2 V_ A N L G
K9 B3
N T C _ B IA S V LVLD O2 1 . 3 V_ VR F
K 10
N T C_ G ND
R3 0 3 1K D2 A9
B B _ R ESE T R ES ET \ VS I M L D O SI M V C C
10 05
C30 9
K 11 L2 L30 1
R EF B P VC S R L 1 . 2 V_ VC O R E
L11 K2
R EFBP _GND VC SR F B
K1
V C SR B A T VB A T
C310 H1 L1
CLK 32 K C L K3 2 V CS RG N D
D1 E1
1005 X T AL I VD I S C H G R
C1 J11
X T AL O VB B A T BAC KUP
G11
VB F B
R3 0 4 D 10 F11
U G ND VB ST B U S 1
C311 D1 1
VB ST B U S 2 VB U S
TP3 04 C 11
ACC _DE T A CD\
D3 B1 0
P MU _IR Q I NT\ NC
1005 E3 1
S CL S CL NC
E2 2
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
VSSC
OS C3 00 SD A S DA NC
C10
G4
G5
G6
G7
G8
G9
B5
C2
C5
C6
C7
C8
D4
D5
D6
D7
D8
D9
H4
H5
H6
H7
H8
K6
E4
E5
E6
E7
E8
E9
F4
F5
F6
F7
F8
J6
J7
F3
J2
1005
1
1005
1005
1005
C323 C 325 C3 2 7 C 312 C3 1 3 C3 1 4 C315 C 316 C31 7 C318 C3 19 C 320 C 321 C3 2 8 C329 C3 2 2
C3 2 4 C 326 C345 C346
2
PMU BA T300
R4 1 2
C4 3
C2
C2
C2
R
1
R218
R206
C3 2 5
C3 2 9
OSC300
L300 R205
C326
C328
TP3 0 1
C322
C307
TP3 0 4
TP303
C315
U3 0 0
C301 C313
R3 0 3
C317
C321 C303
C5 0 0
C300 C319
TP300
C327
TP2 2 6
C318 R300
C3 0 6
TP400
C309 R302
C3 2
C304
9-2
9-2. Initial
Initial Failure
Yes
Yes
Yes
END
9-3
1.8V_MEM
1005
1005
C 239 C 240
M2
G9
B6
N7
N6
B4
H2
D2
K2
F2
DA(0:12)
VCCN
VCCN
VCCQN
VDDD
VDDD
VDDD
VDDD
VDDQD
VDDQD
VDDQD
DA(0) TP203 C7
A 0D
DA(1) C8
A 1D
DA(2) C9
A 2D
DA(3) B8 G3 TP204
A 3D LDMD DDQM0
DA(4) M9 F3 TP205 1.8V_MEM
A 4D LDQSD DDQS0
DA(5) L9 H3 TP206
A 5D UDMD DDQM1
DA(6) K9 J3 TP207
A 6D UDQSD DDQS1
DA(7) J9
A 7D
DA(8) H7 D5 TP208 R209
A 8D ALEN NAND_ALE
DA(9) H8 F7 TP209
A 9D CASD DCASN
DA(10) D9 E7 TP210
A 10D RASD DRASN
DA(11) H9 E6
A 11D R|BN NRDY
DA(12) G7 C6 TP212
A 12D CEN NANDCEN
G4 TP213 DCLKN
_CKD
TP214 D7 H4 TP215
DBA0 B A 0D CKD DCLK
TP216 D8 G8 TP217
DDQ(0:15) DBA1 B A 1D CKED DCKE
C5 TP218
CLEN NAND_CLE
DDQ(0) TP219 B3 E9 TP220
DQ0D CSD DDRCE
DDQ(1) C4 F5 TP221
DQ1D WPN F WP
DDQ(2) C3 E5
DQ2D _REN OEN
DDQ(3) D4 F8 TP222
DQ3D _WED D WE N
DDQ(4) D3 D6
DQ4D _WEN WE N
DDQ(5) E4 UME200
DQ5D
DDQ(6) E3 A2
DQ6D DNU
DDQ(7) F4 A9
DQ7D DNU
DDQ(8) J4 A10
DQ8D DNU
DDQ(9) K3 B1
DQ9D DNU
DDQ(10) K4 B10
DQ10D DNU
DDQ(11) L3 N1
DQ11D DNU
DDQ(12) L4 N10
DQ12D DNU
DDQ(13) M3 P1
DQ13D DNU
DDQ(14) M4 P2
DQ14D DNU
DDQ(15) N3 P9
FADQ(0:15) DQ15D DNU
P 10
DNU
FADQ(0) TP223 J5
I O 0N
FADQ(1) L5 B2
I O 1N NC
FADQ(2) J6 B7
I O 2N NC
FADQ(3) L6 B9
I O 3N NC
FADQ(4) J7 E8
I O 4N NC
FADQ(5) L7 F6
I O 5N NC
FADQ(6) J8 G5
I O 6N NC
FADQ(7) L8 G6
I O 7N NC
FADQ(8) K5 H5
I O 8N NC
FADQ(9) M5 H6
I O 9N NC
FADQ(10) K6 N2
I O 10N NC
FADQ(11) M6 N9
I O 11N NC
FADQ(12) K7 1
I O 12N NC
FADQ(13) M7 2
I O 1 3N NC
FADQ(14) K8
I O 14N
FADQ(15) M8
I O 15N
VSSQD
VSSQD
VSSQD
VSSD
VSSD
VSSD
VSSD
VSSN
VSSN
VSSN
G2
C2
N4
B5
N5
N8
E2
F9
L2
J2
TP2 0 3
TP20 6 TP207
TP216
UME2 0 0
TP208
TP2 1 0
TP224 TP504
TP2 1 4
TP2 1 1
TP2 2 8
C242
TP222
C2 4 0
R2 1 1
R2 1 3
R2 1 2
C2 3 9
R2 1 4
OSC200
TP2 1 8
R210
U2 0 0
TP2 1 2
R215 C243
C241
9-4
Yes
Yes
Yes
Yes
END
9-5
R3 0 0 10
1 . 3 V_ VC XO
V BAT
TA 300 C3 00
2.7V _V RF
R3 0 2 0 .1
2.5V _US BOTG
C304
C3 0 1 C3 0 2 C 30 3
1005 1005
1 2 5 6
C4
C3
Q300 C2
4
E C1
B C3 0 7
2200 nF
3
D C _ IN
G10
H11
F10
L10
J10
B7
K8
K4
K5
K3
B8
B9
A4
K7
H3
B6
A5
A6
F1
C3 08
VDDO
VCHGR
VIVCC
VHBAT1
VHBAT2
VLVVDD
VLCLDO
VABAT
VAXBAT
VLSBAT
VMSBAT
VRFBAT
RSENSE
PDRIVE
VRFLDO1
VRFLDO2
BAT_PRSNT
VOFFBUS\
VMBAT_SNS
H1 0
CCP
T P3 0 0
F2 J1
G P I O 1 | O T G SH D N \ P O NKY \ P O NKE Y
T P3 0 1 G3
G P IO 2
L3
V IO L D O 3 . 0 V_ D I G
H9 B1
A N A T ES T 1 V IO SRB AT VB A T
J9 B2
A N A T ES T 2 VI O SR F B
A1
VI O S R G N D L 300
C4 A2
D IGTE ST0 V IOS RL 1 . 8 V_ M EM
C3
D IGTE ST1
A8
V ALD O1 3 . 0 V_ A N L G
F9 A7
I D_I N V ALD O2 3 . 2 V_ K E Y_ L I G H T
H2 L8
I D_OU T V AU XLD O1 2 . 8 V_ C A M _ I O
L9
V AU XLD O2 3 . 2 V_ VI B
B 11
F G S N S1
A 11 L6
F G S N S2 V MSLD O1 2 . 9 V_ L C D
L7
V MSLD O2 3 . 3 V_ U S B _ N V R A M
A 10
PC P C1
C9 E 10
CL K_ RE Q P C2 V BS W1
TP 30 2 U 300 E 11
V BS W2
T P3 0 3 A3
P WM LED 1
J3 L4
P WM LED 2 V HCLD O1 3.0V_AM P1
L5
V HCLD O2 3 . 0 V_ SD
G1 J4
S T AT 1 VH CLD O1_S NS
G2 J5
S TA T2 VH CLD O2_S NS
J8 B4
N TC V LVLD O1 1 . 2 V_ A N L G
K9 B3
N T C _ B IA S V LVLD O2 1 . 3 V_ VR F
K 10
N T C_ G ND
R3 0 3 1K D2 A9
B B _ R ESE T R ES ET \ VS I M L D O SI M V C C
10 05
C30 9
K 11 L2 L30 1
R EF B P VC S R L 1 . 2 V_ VC O R E
L11 K2
R EFBP _GND VC SR F B
K1
V C SR B A T VB A T
C310 H1 L1
CLK 32 K C L K3 2 V CS RG N D
D1 E1
1005 X T AL I VD I S C H G R
C1 J11
X T AL O VB B A T BAC KUP
G11
VB F B
R3 0 4 D 10 F11
U G ND VB ST B U S 1
C311 D1 1
VB ST B U S 2 VB U S
TP3 04 C 11
ACC _DE T A CD\
D3 B1 0
P MU _IR Q I NT\ NC
1005 E3 1
S CL S CL NC
E2 2
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
VSSC
OS C3 00 SD A S DA NC
C10
G4
G5
G6
G7
G8
G9
B5
C2
C5
C6
C7
C8
D4
D5
D6
D7
D8
D9
E4
E5
E6
E7
E8
E9
H4
H5
H6
H7
H8
K6
F4
F5
F6
F7
F8
J6
J7
F3
J2
1005
1005 1
1005
1005
C323 C 325 C3 2 7 C 312 C3 1 3 C3 1 4 C315 C 316 C31 7 C318 C3 19 C 320 C 321 C3 2 8 C329 C3 2 2
C3 2 4 C 326 C345 C346
2
PMU BA T300
R4 1 2
C4 3
C2
C2
C2
R
1
R218
R206
C3 2 5
C3 2 9
OSC300
L300 R205
C326
C328
TP3 0 1
C322
C307
TP3 0 4
TP303
C315
U3 0 0
C301 C313
R3 0 3
C317
C321 C303
C5 0 0
C300 C319
TP300
C327
TP2 2 6
C318 R300
C3 0 6
TP400
C309 R302
C3 2
C304
9-6
Yes
①
No
Check the SIMVCC = 3.0V Check the circuit related to R312, C336
Yes
②
No
Check the SIM connector's
connector's to SIM card resolder or change SIM300
Yes
③
No
Check the circuit around SIM300
input circuitry Check the related circuit of SIM300
Yes
END
9-7
SIMVCC
1005
R312
SIMIO
1 1 6 6
SIMRST 2 2 5 5
SIMCLK 3 3 4 4
7 7 12 12
8 8 11 11 SIM300
9 9 10 10
G G G G
1005
1005
16 15 14 13
C333 C335 C336 C337
C334
SIM CONNECTOR
C336
R222
ZD400
C102 C423
R3 1 2
C3 3 4
C3 3 3
C335
C337
SIM300
9-8
Yes
No
Check the connection
Resolder MIC
from MIC
Yes
Yes
No
Check the MIC Replace the MIC
Yes
END
9-9
C423
R407
1005
C425
ZD400
IFC400
1
1
2 C426
2
3
3
4
4
5 L404 BLM15HD102SN1
5 EARSPK_R
6 R411 C428
6
7
7 L405 BLM15HD102SN1
8 R412 10
8 EARSPK_L
9 1005
9
10
10
11
11
12
12 C432 3.0V_DIG
13 13 C431
14 14
15 15
16 16 D+
17 R413
17 D-
R 41 5
1005
18 EAR_SWITCH
18 VBUS
1005
1005
19 19 C 4 33
20 20
NC 21
NC 22 R416 1005
NC 23 UARTA_RX_J 5
24 1 IN1 OUT1 UARTA_RX
NC
NC 25 TP400
ACC_DET_J 6
26 2 IN2 OUT2 ACC_DET
NC
6
NC 27 UARTA_TX_J 7
3 IN3 OUT3 UARTA_TX
8
4 IN4 OUT4
TA402 3.0V_DIG
D400 GND GND
2
10 9
R414
1005
F400 JACK_IN
R413
F4 0 0
R414
C2 0 2
C2 1 8
L2 0 0
R416
R415
C2 3 5
TA 4 0 2
I FC4 0 0
R4 0 7
R4 1 2
C4 3 3
R4 1 1
C237
R206
R205
9-10
No
Is the terminal of speaker
OK? check the specker
Yes
①
Check the No
SPK_P & SPK_N Resolder SPK_P (R400) & SPK_N
"HIGH" (R401)
Yes
②
No
Check the output circuit of
PAM400(Audio AMP) Change or resolder around PAM400
Yes
No
Is speaker OK? Change speaker
Yes
END
9-11
VBAT
C400
TA400
C5
B1
PVDD
VDD
PAM400
D4 D5 R400
RXIN- OUT- SPK_N
B4 B5 R401
RXIN+ OUT+ SPK_P
C402 D2 A1 R402
AMP_P INA1 HPR EARSPK_R
AMP_N C403 D1 A2 R403
1005
INA2 HPL EARSPK_L
EAR_L C404 C2 A4
1005 C405
INB1 C1N
EAR_R C1 A5
INB2 C1P
C406 10V 1005
1005
FM_LOUT
1005 C407 10V B2 1
FM_ROUT BIAS NC
1005 B3 2
SD A SDA NC C408
C3
SCL SCL
PGND
GND
VSS
1005
D3
A3
C4
C418
C409 C410 C411 C412 C413 C414
1005
C422
R401
R400
D50 1
R3 1 3
R5 0 5
V5 0 0
R4 0 2
R4 0 3
C4 1 8
C4 2 2
C4 0 8
C3 3 8
C3 3 2
C501
C502
D505
U3 0 2
C4 0 0
PAM400
C4 1 2
C4 1 1
C5 0 4
C5 0 3
R5 0 3
R5 0 4
C4 0 3
C4 0 2
C4 0 5
C4 0 4
C4 0 6
TA 4 0 0
C339 C340
C413
C4 1 0
C4 0 9
C4 0 7
C414
9-12
Yes
is it displayed on LCD?
Yes
Yes
END
3.2V_KEY_LIGHT
HDC500
VK500
2 2 1 1
4 3 R505 1
MIC_IN _P 4 3 MIC_IN_N KEY_ROW(0) 1
6 6 5 5
8 7 2 2
KEY_ROW (0) 8 7 PO N K EY KEY_COL(3)
10 10 9 9
KEY_COL(0) 3 3
12 12 11 11 R506
KEY_ROW (1) KEY_COL(1) KEY_ROW(2)
14 14 13 13
KEY_ROW (2) KEY_COL(2)
16 16 15 15 4 4
KEY_ROW (3) KEY_COL(3)
18 18 17 17
KEY_ROW (4) K EY_COL(4)
20 19
1005
1005
20 19
D501 D502
V500
V501
1 3 4 5 6
C500
D503
D504
D 500
VOLUME KEY
KEY CONNECTOR
9-13
Yes
Yes
Yes
END
9-14
Yes
①
No
Resolder C104
C104 ≥ 3.0V
and Check PMU part
Yes
②
ZD400, C423 is OK? No
Resolder ZD400, C423
(When U101 operate) and check U100
Yes
Check signal
related to U100
Yes
END
TP100
FM_IRQ
I2S_SSCK
23 22 21 20 19 18 17
NC
NC
GND
NC
GPO3|DCLK
GPO2|_INT
GPO1
1 16
NC DFS I2S_SSWS
R102
FM_ANT 2 15
FMI DOUT I2S_SSDO
3 U100 14
RFGND LOUT FM_LOUT
C102
4 13
LPI ROUT FM_ROUT
TP102
5 12
FM_RST RST GND
6 11
RCLK
SCLK
SEN VDD
SDIO
VIO
7 8 9 10
3.0V_DIG 3.0V_DIG
SCL
SDA
C103 C104
CLK32K
FM RADIO
9-15
RX ON
Cell Power : -60dBm
Yes ①
F100 Pin17≥ No Resolder F100, L106, L103,
-65dBm C100
Yes
Yes ②
Resolder F100
Yes
No
③
F100
pin 13 ≥ -70dBm Resolder L113, L115, L117
pin 5,6 ≥ -70dBm
Yes
Check UCP200
END
9-16
RX ON
Cell Power : -60dBm
①
Yes
Yes
③ Yes
Resolder F100
Yes
No
F100
pin 13 ≥ -70dBm Resolder L108, L110, L112
pin 5,6 ≥ -70dBm
Yes
Check UCP200
END
9-17
RX ON
Cell Power : -60dBm
①
Yes
Yes
③ Yes
Resolder F100
Yes
No
F100
pin 13 ≥ -70dBm Resolder L100 ,L102,L105
pin 5,6 ≥ -70dBm
Check UCP200
END
9-18
RX ON
Cell Power : -60dBm
Yes
①
No Resolder F100, L106, L103,
F100 Pin17≥ -65dBm
C100
Yes
Yes ②
Resolder F100
Yes
No
③
F100
pin 13 ≥ -70dBm Resolder L119, C105, C106
pin 5,6 ≥ -70dBm
Check UCP200
END
9-19
RFS100
3
L100 G
2 G G 4
G
G
C
A
PCSRX_B RFIN
1
2
3
4
RFC100
L 101 1
L102
R100 R101
L 104
L105
DCSRX_B C100
L108
L109
F100
ANT 17
L110
VC1
1 GSM1900_RX GSM1800|1900_TX 11 DPCS_TX
L111
L112 2 GSM1900_RX
3 C123
GSM1800_RX
DCSRX_A 4 GSM1800_RX
5 GSM900_RX GSM850|900_TX 13 GSM_TX
6 GSM900_RX
GSM900RX_B 7 GSM850_RX VC1 10
L 113 8 GSM850_RX VC2 16 VC2
L 114
GND
GND
GND
GND
GND
20 NC
19 NC C124
18
15
14
12
9
L115
L 116
L117
GSM900RX_A
C105
GSM850RX_B
L 118
L 119
L 120 C106
ANT / FEM
GSM850RX_A
9-20
SC104
L104 C100
L105 C124
L1 0 2
L106
L101 L100
L111
L112
L1 1 0
SC1 0 1
L1 0 3
RFS1 0 0
F1 0 0
L109 L108
L116
L117
L1 1 5
L114 L113
L120
C106
L1 1 9
C107
L118 C105
C1 2 3
TA100
TP107 TP108 C114
R1 0 0
C1 1 8
R1 0 7
L1 2 2
C101
C1 1 3
SC1 0 0
R1 0 1
R1 1 3
PAM100
C1 2 5
R1 0 6
SC1 0 2
L107
R103 C110
C1 0 9
L1 2 1
SC103
9-21
TX ON (5Level)
Yes
①
F100 Pin17≥ No
-65dBm Resolder F100, L106, L103,
C100
Yes
Check F100 No
F100 pin13 No Check ANT Switch
pin10 = H (2.6V),
≥ -30dBm Pin16 = L control circuit
Yes ②
Yes Change or Resolder F100
③
Yes
④
PAM100 pin5 Yes
No Check PAM100 pin
≥ -4dBm 1,2,3,20, VBAT OK?
Resolder or Change PAM100
No Check VBAT or PAM
Yes control signal
Check UCP200
END
9-22
TX ON (5Level)
Yes
①
F100 Pin17≥ No Resolder F100, L106, L103,
-65dBm C100
Yes
Yes ②
Change or Resolder F100
Yes
③
No
PAM100 pin15 Resolder or Change C113, C114,
≥ -30dBm L122
Yes
④
Check PAM100 pin 1,
PAM100 pin3
No 2,3,20, VBAT OK? No
≥ -4dBm Resolder or Change
PAM100
END
9-23
TX ON (5Level)
Yes
①
F100 Pin17≥ No Resolder F100, L106, L103,
-65dBm C100
Yes
Yes ②
Change or Resolder F100
Yes
③
No
PAM100 pin15 Resolder or Change C113, C114,
≥ -30dBm L122
Yes
④
Check PAM100 pin 1,
PAM100 pin3
No 2,3,20, VBAT OK? No
≥ -4dBm Resolder or Change
PAM100
END
9-24
RFS100
3
L100 G VBAT
2 G G4
G
G
C
A
PCSRX_B RFIN
1
2
3
4
RFC100
L101 1
L102
R100 R101
L104
L105 C110
DCSRX_B C100
L108
L109
R103 L122
F100 PA_LB
ANT 17
DPCS_TX
L110
VC1
1 GSM1900_RX GSM1800|1900_TX 11 DPCS_TX C114
C113
L112 2
L111
GSM1900_RX
3 C123
GSM1800_RX
DCSRX_A 4 GSM1800_RX
5 R113
GSM900_RX GSM850|900_TX 13 GSM_TX
6 R107
GSM900_RX PA_HB
GSM900RX_B 7 GSM850_RX VC1 10 AUXDAC
L113 8 GSM850_RX VC2 16 VC2
L114 C125 R106 PAM100
17
18
GND
GND
GND
GND
GND
20 NC
19 NC
C124 C118
VBATT1
VBATT2
9
18
15
14
12
L115 5 13
GSM_IN GSM_OUT
4 15
L116 DCS|PCS_IN DCS|PCS_OUT
L117
BAND_SEL TP107 1 3
BS VRAMP
GSM900RX_A TX_EN 2 19 TP108
EN VDET
20 VMODE
C105 MODE
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GSM850RX_B
6
7
8
9
10
11
12
14
16
21
L118
L119
L120 C106
GSM850RX_A
SC104
L104 C100
L105 C124
L1 0 2
L106
L101 L100
L111
L112
L1 1 0
SC1 0 1
L1 0 3
RFS1 0 0
F1 0 0
L109 L108
L116
L117
L1 1 5
L114 L113
L120
C106
L1 1 9
C107
L118 C105
C1 2 3
TA100
TP107 TP108 C114
R1 0 0
C1 1 8
R1 0 7
L1 2 2
C101
C1 1 3
SC1 0 0
R1 0 1
R1 1 3
PAM100
C1 2 5
R1 0 6
SC1 0 2
L107
R103 C110
C1 0 9
L1 2 1
SC103
9-25
Yes
No
Check BT function ON Enable BT function
Yes
Yes
No
Check 26KHz Clock on Check OSC100
BT100 (J5)
Yes
No
Check the assembled
status of ANT100 Resolder of change ANT100
Yes
No
Exchange Check UCP200
Yes
END
9-26
A N T1 0 0
C122
L125
L126
L127
C1 1 7
F1 0 1
C119
B T1 0 0
C506
C508
C1 2 0
BT_PWR_ON
UBRTS
BT_ RST
TP105 TP103
TP104
R1 1 0
R1 1 1
TP1 0 6
3 .0 V _ D IG
C 108 C111
1 .8 V _ M E M
3 .0 V _ D IG A N T100
L128
L129 1 2 3 4
C112 L123
C126
C 122
C 115 L 125
G1
G8
G2
A7
B7
A1
H9
A4
B2
B1
H1
H4
J1
J9
C 116
C 117
VDDC
VDDC
VDDIF
VDDLO
VDDO
VDDO
VDDR3V
VDDRF
VDDTF
VDDIFP
VDDPLL
VDDVCO
VDDXO
VDDO_USB
L126
B5 BT_WAKE F101
BT_WAKE|GPIO_0 BT_WAKE
TP 10 3 F8 B6 HOST_WAKE
P C M _C LK PCM_CLK|SCK HOST_WAKE|GPIO_1 HOST_WAKE
TP 10 4 E8 E9
PCM_IN PCM_IN BT_PRIORITY|TX_REZ|GPIO3
3.0V_DIG TP 10 5 D9 A6 4 2
P C M _O U T PCM_OUT WLAN_ACTIVITY|TX_CONFIRM|GPIO_2 IN OUT
TP 10 6 D8 F9
PCM_SYNC PCM_SYNC STATUS|GPIO_4
G9
XTAL_PD|GPIO5TX_PU_TDD C LK _R E Q GND1 GND2
A9 H8
SCL|TX_PU_TDD_N PA_CTL|GPIO6
A8 H7 1 3 L127
SDA|TX_PU_TDD G P IO 7
R 110 R111 C 119
J6 J8
VREG1 TM0 H U S B _D N
H6 BT100 J7
TM 1 H U S B _D P
H5 E1
TM 2 R F IO N
C1
R F IO P
C8 J4
UBRTS UART_CTS_N XTALN
UBRTS C9 J5
UBCTS UART_RTS_N XTALP B T _C L K
B9
UBTX UBTX UART_RXD
B8 J3
UBRX UART_TXD RES
D1
RFTUNE BT_RST
A3 B4 BT_RESET
VREG1 RST_N
A2 A5
VREG2 L P O IN CLK32K
B3 D4
BT_PWR VREG_CTL TST1
BT_PW R_ON J2 C 120
VCTRIFP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC
NC
C121 R112
C2
D2
D5
D6
H2
H3
E2
E4
E5
E6
F1
F2
F4
F5
F6
1
2
9-27
Motor
7-1
C115
C1 1 2
C1 2 1
R1 1 2
L1 2 3
C1 1 6
C1 2 6
L1 2 8
C1 1 1
C1 0 8
R408
BOTHHOLE500
L1 2 9
R404
TP2 0 4
TP2 0 3
TP20 6 TP207
TP216
TA4 0 1
TP2 0 5
L401
C419
TP2 0 9
TP2 1 7
UBTX
C4 2 0
TP219
L400
C417
R410 R405
R2 0 9
C2 1 5
C2 1 4
R2 0 8
C2 1 6
R2 0 7
C2 1 2
C2 3 3
TP2 2 1 L403 R406
C429
C4 3 0
TP2 1 3
TP215
TP225 L402
C427
TP200
C4 2 4
R409
UME2 0 0
TP208
TP2 1 0
R413
F4 0 0
R414
C2 0 2
L2 0 0
C2 1 8
UCP2 0 0
TP224 TP504
R416
TP2 1 4
R415
TP2 1 1
TP2 2 8
C2 3 5
C242
TA4 0 2
TP222
C2 4 0
R2 1 1
R2 1 3
R2 1 2
C2 3 9
R2 1 4
OSC200
TP2 1 8
R210
U2 0 0
I FC4 0 0
TP2 1 2
R215 C243
C241
R4 0 7
R4 1 2
C2 1 3
C2 0 9
C2 4 4
C4 3 3
R4 1 1
R218
R206
C3 2 5
C3 2 9
OSC300
L300
CD 3 0 0
R205
C326
C4 2 1
C4 1 5
C328
TP3 0 1
C322
C307 C416
TP3 0 4
TP303
C315
D503
D504
U3 0 0
C301 C313
R3 0 3
C317
C321 C303
C5 0 0
C300 C319
TP300
C327
TP2 2 6
C318 R300
C3 0 6
TP400
C309 R302
C3 2 3
R3 0 1
C3 0 5
C304
R3 1 1
R3 1 0
R3 0 9
R3 0 7
Q3 0 0
ZD30 0
D500
C3 0 8
R306
C3 4 2
C3 4 3
R305 BTC300
P501 TP500
8-1
L107
C509
F5 0 2 R1 0 0 R1 0 1
F5 0 0
C101
RFS1 0 0
VK500
S C1 0 2
CN5 0 0 L1 2 1
C110
L106
V5 0 1
RFC100
L1 2 2
C1 1 3 C1 0 9
C114
L1 0 3
R5 0 6
PAM100
V5 0 0 F1 0 0
SC104
SC103
TA100
C107
F501
R5 0 5
C124
C340
D5 0 1
U3 0 2
TP107 TP108
C339
R3 1 3
L1 0 2 L1 1 0 L1 1 5 L1 1 9
C3 3 2
TA500
C106
C105
L105
L100
L112
L108
L117
L113
C505
R1 0 6
C3 3 8 C1 1 8
R103
C5 0 3
H EA5 0 0
D505
R1 0 7
R1 1 3
R401
C502
R5 0 4
L104
L111
L116
L120
L101
L109
L114
L118
C1 2 5
C5 0 4 D5 0 6
C501
R400
R5 0 3
S C1 0 0
C4 0 0
C4 0 8
T A4 0 0
C2 0 6
8-2
C2 0 8
PAM400
C4 2 2
C4 0 2 C4 0 9
C2 0 5
C2 0 7
C4 1 8
C2 0 0
C2 0 3 C2 2 8
C4 0 3 C4 1 0
R4 0 3
C2 3 0
C4 0 6 C2 3 6
R4 0 2
C413
C414
C2 2 4
C4 1 1 C2 2 3 C2 2 5
C4 0 4
C4 0 7 C2 1 7 R2 0 0 C2 2 7
C4 1 2
C4 0 5 C2 2 6
C2 1 1 L2 0 1
C2 0 1
C231
C232
C2 0 4
C336
C337
C3 4 4
C3 4 1 R3 1 2
HDC501
R5 0 1
BB_RESET TRSTB
TMS
C2 1 9
U303
C3 3 3
R5 0 2
TP202 TP201
VR200
SIM300
R202
C3 3 4
C220
TDI
R2 0 3 C3 3 0
TP502
C331
R222
C335
TDO
RTCK TCK
U301
TP503
R2 0 4
R201
C234
C221
GND_200
C5 0 7
C324
HOST_WAKE
C506
C508
C1 2 0 R1 1 1
BT_WAKE
D400
R217
R216
BT_PWR_ON
R1 1 0 C1 0 3
L125
F1 0 1
L126
L127
C1 0 4
PCB Diagrams
C119
BT_ RST TP1 0 2
ZD400
BAT300
L405
L404
UBRTS
C4 2 6
TP104
BT1 0 0
C122
U1 0 0
C423
C428
TP105 TP103
C425
R1 0 2
TP1 0 6
C432
C431
C102
ANT1 0 0 C1 1 7
TP1 0 0