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EEnneerrggyy SSaavviinngg PPrroodduuccttss

DC to AC Inverter IGBT Demo Board

Devices: IRGB4062DPBF (600V/24A Trench IGBT) High Side IGBTs IRG4BC20SD-PBF (600V/10A S-type Planar IGBT) Low Side IGBTs IRS2106S (600V half bridge driver IC)

The purpose of a DC to AC inverter is to convert DC voltage to a pure sinusoidal output voltage in applications such as UPS, solar inverter and frequency converter.

This demo board is designed to operate without fan up to 500W.

200V DC Supply 20V DC 120V/ Supply 500W Load
200V
DC
Supply
20V
DC
120V/
Supply
500W
Load

Figure 1. Connection diagram.

Equipment required:

200V, 3A DC power supply 20V, 100 mA DC power supply 120V/500W load bank such as resistors, light bulbs or a portable heater

Connection should be made according to the diagram shown on Figure 1.

Theory of operation:

A full bridge topology is used to implement the DC to AC inverter. During positive output half cycle, Q1 is sine pulse width modulated (sine PWM) while Q4 is kept on.

During negative output half cycle, Q2 is sine pulse width modulated while Q3 is kept on. The switching frequency of the high side and low side IGBTs are 20 kHz and 60 Hz,

respectively.

capacitor C4 after inductor L1.

This switching technique produces 60 Hz AC sine wave across the output

WTC June 27, 2008

E E n n e e r r g g y y S S a

EEnneerrggyy SSaavviinngg PPrroodduuccttss

Q1 and Q2 are chosen to be ultrafast trench IGBTs, IRGB4062DPBF which offers balanced conduction and switching losses at 20 kHz. Q3 and Q4 are standard type (S- type) planar IGBT since these IGBTs only switch at 60 Hz. Low conduction loss IGBT is essential for Q3 and Q4 since conduction loss is the dominant factor while switching loss is not at 60 Hz.

Each leg of the H-Bridge is driven using a high voltage gate driver IC, IRS2106SPBF, with bootstrap power supply technique for the high side. Using IRS2106SPBF eliminates the requirement for an isolated power supply for the high side drive. This translates into increase efficiency and parts count reduction of the overall system.

Some benefits of the H bridge topology and switching technique on this demo board are :

1. High efficiency since Q1 and Q2 copack diodes are not subjected to the freewheeling

current and Q3 and Q4 have majority of conduction loss and very little switching loss.

2. No cross conduction possibility since switching is done on diagonal device pair only at

any time (Q1 and Q4 or Q2 and Q3).

3. Operate from single DC bus supply eliminating the need for a negative DC bus.

4. IGBTs are driven using high voltage gate driver IC with bootstrap technique. There is

no separate floating power supply required for the high side drive. Bootstrap capacitors for these
no separate floating power supply required for the high side drive. Bootstrap capacitors
for these drivers get refreshed every switching cycle (50 usec) when current freewheels
on the low side IGBTs copackage diodes.
Q1
Q2
R1
IRGB4062DPBF
IRGB4062DPBF
R2
R4
75K,1W
J1
10
10
L1
J2
1
R7
2
INDUCTOR1
2
C1
C4
1
CON2
100uf/450v
2.2uf/275VAC
75K,1W
CON2
LED1
Q3
Q4
LTL-16KE
IRG4BC20SD-PBF
IRG4BC20SD-PBF
R3
R5
10
10
C2
C3
C5
15V
U2
Comment: LM340T-5
5V
1
3
1
3
IN
OUT
Vin
Vout
J3
2.2uf
2.2uf
+
+ C6
+ C9
1
U1
C7
C8
10uf/16v
2
47uf/25v
NJM78M15FA
47uf/25v
0.1uf
0.1uf
CON2
MURS160
MURS160
D1
U4
D2
IR2106
5V
U3
IR2106
R12
10K
LIN1
C12
R8
R9
U5
XTAL1
HIN1
0.1uF
100
100
R10
R11
1
18
1
2
RA0/AN0
RB3/CCP1/P1A
100
100
2
17
RA1/AN1/LVDIN
RB2/P1B/INT2
3
16
10MHz
RA4/T0CKI
OSC1/CLKI/RA7
HIN2
C10
C11
4
15
MCLR/VPP/RA5
OSC2/CLKO/RA6
5
14
VSS/AVSS
VDD/AVDD
6
13
RA2/AN2/VREF-
RB7/PGD/T1OSI/P1D/KBI3
C13
0.1uf
0.1uf
7
12
RA3/AN3/VREF+
RB6/PGC/T1OSO/T1CKI/P1C/KBI2
0.1uF
8
11
RB0/AN4/INT0
RB5/PGM/KBI1
C14
C15
9
10
RB1/AN5/TX/CK/INT1
RB4/AN6/RX/DT/KBI0
15V
47uf/25v
47uf/25v
PIC18F1320-I/P
LIN2
DCBUS
1
8
VCC
VB
2
7
HIN1
HIN
HO
3
6
LIN1
LIN
VS
4
5
COM
LO
1
8
VCC
VB
2
7
HIN2
HIN
HO
3
6
LIN2
LIN
VS
4
5
COM
LO
2
GND
2
GND

Figure 2. Schematic of the demo board

WTC June 27, 2008

E E n n e e r r g g y y S S a

EEnneerrggyy SSaavviinngg PPrroodduuccttss

y S S a a v v i i n n g g P P r

Figure 3. Output waveforms of gate driver ICs and sinusoidal output voltage.

Operation:

Always start the system by applying power to the +20V power supply prior to applying +200V DC bus. With a 120V/500W resistive load connected, the output will be a nominal 120V/60 Hz AC sinusoidal voltage as shown in Figure 3. This figure also shows the output gate voltages across each IGBT showing 60 Hz commutation and 20 kHz sine PWM signals for low and high side devices, respectively.

WARNING The output voltage is taken from the legs of the full bridge inverter after the L-C filter. In order to obtain the same sinusoidal output voltage waveform shown in Figure 3, an appropriate high voltage differential voltage probe is necessary. If such probe is not available, measure each output using a ground referenced oscilloscope probe and subtract the resulting waveforms on the oscilloscope. Please consult with individual oscilloscope manual on how to do this measurement.

Power Loss Comparisons:

Using the technique described in this demo board achieves the lowest power dissipation on a typical full bridge solar inverter application. Figure 4 summarizes differences in power dissipation based on different switching technique and IGBT combinations.

WTC June 27, 2008

E E n n e e r r g g y y S S a

EEnneerrggyy SSaavviinngg PPrroodduuccttss

Reduction in Power Dissipation Using Combination of Trench and Standard Speed Planar IGBTs

40 W Planar IGBTs - (All 20 kHz) 35 W Planar Trench IGBTs (HS: 20kHz
40
W
Planar
IGBTs - (All 20 kHz)
35
W
Planar
Trench
IGBTs (HS: 20kHz + LS: 50Hz)
and S-type IGBTs (HS: 20kHz + LS: 60Hz)
30
W
25
W
20
W
15
W
10
W
5 W
4 A
6 A
8 A
10 A
12 A
14 A
Total Power Dissipation (Watts)

Output RMS current (Amps)

Figure 4. Power Dissipation Comparisons of Different Switching Technique and IGBT Combinations.

WTC June 27, 2008