Machine, Plant & Systems Monitor
I n a data acquisition system (DAS), the
data acquisition hardware is controlled by
a host computer which, depending on the
application, could be anything from an em-
bedded single-board computer to a net-
worked PC. Figure 1 shows the principal
functional units of a ‘complete’ DAS.
There are a wide variety of ways in which
communication between the PC and the
DAS hardware can be accomplished. For
laboratory and production floor applica-
tions, perhaps the most common interface
is by way of the host computer’s system
bus. The principal advantage of putting a
data acquisition (DA) card into the host’s
system bus is that it provides both a high
bandwidth and the ability to apply the
host’s computational resources to data re-
duction and analysis on a real-time basis.
Another popular interface method is to use
an external communications link to the
host computer. RS-232 serial communica-
tions, IEEE-488 general purpose I/O bus,
and the PC parallel (printer) port are all
mature, but still popular standards. Uni-
versal serial bus (USB) is starting to be-
come significant because it is shipping as
standard hardware on newer computers
and offers generally high performance.
Three major advantages are provided by
an external communications link. The first
is that the DAS hardware does not have to
reside inside the host computer, an electri-
cally noisy environment. The second ad-
vantage is that the DAS hardware can be
disconnected quickly and easily from the
host, simplifying maintenance and increas-
ing portability. The final advantage is that
if the DAS possesses enough on-board in-
telligence, it can run autonomously of the
host, and in the extreme case of a remote
data collector, need not even be connected
to the host to operate. The choice of what
type of interface the DAS should use is
complex, and is driven by issues such as
cost, performance, portability and ease of
Figure 1. A data acquisition system (DAS) comprises a host computer, control logic, a
data converter and a number of input channels.
Data acquisition system architecture
To implement an effective data acquisition system it is necessary to understand how its
constitutive components operate and how they interact. Although simple data acquisi-
tion systems may sometimes be implemented with just a simple low-cost data acquisi-
tion computer card, it is often the case that an effective system requires additional
hardware. This article, by Edward Ramsden of Cherry Electrical Products, Pleasant
Prairie, Wisconsin, USA, describes these functional units and explains how they work.
maintenance. Table 1 lists some of the
available options and a their relative ad-
vantages and disadvantages.
Control logic
For the most simple in-host DA cards, con-
trol logic may consist of just enough cir-
cuitry to send commands to the analogue/
digital (A/D) converter and read the results.
More sophisticated DA cards add functions
that increase the ability of the device to
behave autonomously from the host. One
such function is the ability of a card to
periodically acquire data and stream it to
the host computer’s memory without host
intervention. The features that are needed
to do this are a pacer clock and a direct
memory access (DMA) controller. The
pacer clock directs the analogue-to-digital
converter (ADC) to perform conversions
at uniform intervals, and often allows for
the control of multiple input channels. A
DMA controller allows the DA card to
send data directly to the host’s memory
during idle bus cycles. This allows for both
high data transfer rates, and frees the host
processor from having to manage each
communication.
In some cases, particularly those requiring
extremely high sampling rates (greater than
10 Msa/s), the host computer’s bus may
not provide adequate bandwidth for real-
time operation. In situations such as these,
analogue-to-digital conversion results are
10
stored in local high-speed memory on the
DA card, and then read by the host proc-
essor when the sampling run is done. Lo-
cal memory is also used extensively in ex-
ternal DASs where the DAS-host band-
width may be relatively low compared with
the peak sampling rate. Specialised DAS
systems may also contain on-board digital
signal processors (DSPs) as well as logic
for capturing and processing specialised
inputs, such as video signals from video
cameras.
Data conversion
Although there are numerous techniques
for performing analogue-to-digital conver-
sion, the most popular on present-day gen-
eral-purpose DA cards are successive ap-
proximation, and flash conversion.
Figure 2 shows the key components of a
successive approximation converter. Con-
version of a signal from the analogue to
the digital domains requires a number of
discrete and sequential operations to be
performed. A ‘conversion’ is first triggered
by a signal fed into the ‘start’ input. The
first step in the subsequent conversion cy-
cle is that the input is sampled and held
stable, by means of the sample-and-hold
amplifier at the input. This step is particu-
larly important because if the signal seen
by the converter core varies during the
conversion cycle it can cause grossly erro-
neous results. Throughout the conversion
cycle this sampled voltage is compared
with a reference voltage generated by a
DAC. The DAC derives its output voltage
based on a binary code received from the
successive approximation register (SAR).
After the initial sampling, the most signifi-
cant bit of the SAR is set high. This causes
the DAC to output a voltage that is half of
its full-scale range. The comparator deter-
mines if the input voltage is greater than
the DAC voltage. If this is the case, the
SAR register holds the bit high; if not, the
SAR register drops the bit low. On subse-
quent cycles, the SAR and control logic
repeats this sequence with the next most
significant bits, all the while retaining the
values of the previous ones. After ‘N’ such
cycles the SAR contains a binary value
corresponding to the input voltage, at
which point the control logic signals that
the conversion is complete and the data is valid.
 May/June 1999
Interface Advantages Drawbacks Bandwidth Remarks has been activated. Because all the com-
/bus (Mb/sec) parisons are performed at once, this type
ISA/EISA Fast-very fast Obsolescent, 1 (8-bit ISA) ISA was the original PC bus of converter can be made very fast. The
Many cards Configuration 33 (EISA) major disadvantage of the flash ADC is its
available issues complexity. Both the number of compara-
PCI Very fast Fewer cards 133 De facto standard PC BUS tors and amount of logic required increase
Plug-and-play available than ISA as 2N with the number of bits of resolu-
RS-232 Commonly Very slow 0.001-0.01 Old, slow, and cranky, tion which are required. For this reason,
available Limited range but still the digital Lingua most flash ADCs tend not to exceed 8 or
(< than 50 ft) Franca; everything speaks 10 bits of resolution.
RS-232
RS-485 Faster than
RS-232, Good
Expensive 0.01-1 Can be used as basis
for mini-network Simultaneous sampling
range (1000 ft) of DAS systems Although DASs with very high conversion
IEEE-488 Fast Expensive 0.1-1 More commonly found on rates may require the use of a separate
measurement instruments ADC for each input channel, the more typi-
than on DAS systems cal case is to share a single ADC among a
USB Fast Few DAS systems 0.2-1.5 Likely to supercede RS-232 number of channels using a multiplexer. A
Available are available...yet. and parallel port multiplexer is a switch, usually electronic,
Parallel Fast Limited range 0.1-1 Especially useful for DASs that selects one input channel from among
Port Available which are run from laptop many, and connects it to the ADC.
IEEE-1284 computers
While multiplexing multiple input chan-
Table 1. Comparison of DAS-to-host system interfaces. nels into a single ADC reduces the cost of
a DA card, it also means that measure-
The major drawback of successive ap- ments of multiple channels cannot be per-
proximation ADCs is their requirement of formed simultaneously. In cases where this
performing ‘N’ sequential analogue com- is required, a feature called simultaneous
parisons to perform a conversion. In ap- sampling is available on many DA cards.
plications requiring maximum conversion On a card with simultaneous sampling,
speed, such as video signal capture, the each input channel is provided with an
flash ADC architecture is commonly em- analogue sample-and-hold amplifier. Upon
ployed. Figure 3 shows a block diagram receiving a ‘hold’ command from the con-
of an 8-bit flash ADC. In this type of con- trol logic, each sample-and-hold amplifier
verter, a reference voltage is divided along will maintain an output value correspond-
a chain of reference resistors to provide ing to whatever was present on its input at
sub-reference voltages equivalent to the Figure 3. The flash analogue-to-digital the time the command was issued. The
transitions between each output code; for converter performs conversions quickly multiplexer and ADC can then perform
an 8 bit converter there would be 255 taps by testing the input against all possible sequential conversions on each channel. To
along the resistor chain. The input signal thresholds simultaneously. the end-user, the acquired data appears as
is simultaneously compared to each of if it were sampled simultaneously with a
these sub-references by an independent The outputs of all the comparators are then dedicated converter for each input chan-
comparator. The result of this mass com- fed into logic referred to as a priority en- nel.
parison is that the outputs of every com- coder. This device takes the 255 compara-
parator for which the input signal exceeds tor results and outputs an 8-bit code cor-
its sub-reference is turned on. responding to the ‘highest’ comparator that Input buffering
While most DASs are intended to monitor
real-world signals, the vast majority of DA
cards, especially low-cost ones, assume that
the real-world consists of noiseless volt-
age sources with a range of +/- 10 V. To
properly cope with signals resulting from
sensors, laboratory experiments, and the
factory floor requires circuitry which spe-
cially designed for that application. Fig-
ure 4 shows a generic interface for volt-
age-type signals. This circuit illustrates four
functions:
• radio frequency interference (RFI)
rejection;
• electrostatic discharge (ESD) and
transient protection;
• anti-aliasing; and
• selectable gain.
In today’s communications-intensive
Figure 2. The successive approximation analogue-to-digital converter requires a world, electronic equipment has to be de-
number of iterations in which it makes ‘guesses’ to produce a correct result. signed from the outset to be able to oper-
11
 Machine, Plant & Systems Monitor

Figure 4. A good input buffer needs to both protect the input channel and remove as much unwanted input signal as possible.
Variable gain allows the channel to easily interface with a variety of transducers.
ate reliably in the presence of a wide range sponses up into the hundreds of megahertz, velop 30 kV or higher discharges from
of radio frequency interference (RFI) and will rectify these RF signals into DC. normal activities. When you also consider
sources. While it may be obvious that RFI RF injected into low-frequency electronic transients developed from nearby lighting
can interfere with electronics that operate systems usually manifests itself as offset strikes and the power distribution system,
at radio frequencies, it can also have ef- and gain errors of mysterious origin. it becomes clear that electronic systems not
fects on devices that process low-frequency ESD and transient protection are addi- designed specifically to survive these events
and near DC signals, such as most DA tional features needed to cope with a less- will have painfully short life-spans. This
cards. The main problem in these cases is than-ideal world. In dry environments, becomes even more true in really nasty
that the individual transistors incorporated such as much of North America in the win- environments, such as a factory produc-
in even low-frequency circuits have re- ter, it is not uncommon to be able to de- tion floor.
An anti-aliasing filter is a feature that rarely
appears on DA cards, mostly because its
required properties are so dependent on
the application for which the card is used.
An anti-aliasing filter is used to remove
high-frequency components of an incom-
ing signal. Unlike the case of the RFI filter,
the signals removed by the anti-aliasing fil-
ter will not result in malfunctions of the
DA card circuitry, but can result in signifi-
cant measurement errors. The whole prob-
lem of aliasing arises because an ADC takes
snapshots of the signal at discrete moments
in time. When these snapshots are taken
at a frequency that is high compared to
that of the signal of interest, it is possible
to reconstruct an accurate representation
of the original signal from the acquired
data, as depicted in Figure 5a. When the
(a) sampling rate is too low, however, the sam-
pled data set will not give a good repre-
sentation of the original signal, and may
even result in a grossly inaccurate repre-
sentation, as shown in Figure 5b.
For a given input signal, with a maximum
frequency component of ‘f’, a theoretical
minimum sampling rate of ‘2f’ is required
to be able to accurately reconstruct that
signal. This sampling rate is referred to as
the Nyquist rate. To adequately sample a
signal, one must either increase the sam-
pling rate beyond the Nyquist rate, or re-
move all incoming signal components
greater than the maximum allowed by a
given sampling rate. Note, however, the
emphasis on both theoretical and mini-
(b) mum; it is usually a good idea in practice
to both limit the bandwidth of the incom-
Figure 5. When a signal is sampled sufficiently often, a good replica can be reconstructed ing signal, and to sample significantly faster
from the acquired data (a). Sampling at too low a frequency (b) can give misleading than the Nyquist rate.
results.
12
 May/June 1999
Finally, since real-world signals come in all
sizes (magnitudes), some means of control-
ling gain is useful. The input channels of a
DA card may have a programmable gain
amplifier or attenuator, allowing the user
to change the full-scale range of the input
channel. Adjustable gain is a common fea-
ture on all but the least expensive DA
cards.
Transducer interfaces
While the generic input buffer described
above will allow a DAS to deal with a va-
riety of real-world voltage input signals,
the signals derived from transducers may
require some specialised interfaces before
they become usable by a generic A/D card.
This section will describe interfaces for two
of the more commonly encountered trans-
ducers.
Strain gauge
A strain gauge is a bridge formed from
four thin-film metal resistors, arranged
so that when the strain gauge is mechani-
cally deformed the resistors vary as a func-
tion of the deformation. Figure 6 shows
a basic interface circuit for a this type
of transducer. The DAS must provide
Figure 7. Parasitic thermocouple junctions interfere with temperature measurements. Although correction can be done in software,
specialized hardware is available to interface between thermocouples and data acquisition systems.
a high-accuracy voltage reference signal,
often called the excitation, to bias the
bridge. The bridge then provides a differ-
ential voltage signal in response to defor-
mation.
Because the difference voltage is typically
very small, on the order of a few millivolts,
and is riding on a much larger common
mode signal, feeding the two inputs directly
into a pair of DA card input channels will
result in low-quality measurements. It is
preferable to first subtract off the common
mode voltage and amplify the difference
signal to match the input range of the DA
card. This can be accomplished with the
use of an instrumentation amplifier, whose
output is then sampled by a single DA card
channel.
Thermocouple
Thermocouples (Figure 7) also provide
small differential signals that generally
must be amplified before being processed
by an ADC. Unlike a strain gauge, a ther-
mocouple is self-powered and does not
require a bias voltage source, relying on a
junction of two dissimilar metals to de-
velop a voltage. The temperature at the
junction can be inferred from the voltage
developed.
13
Figure 6. A strain gauge
produces a small
differential signal riding
on a DC offset. An
instrumentation
amplifier can be used to
make this signal more
palatable to a data
acquisition card.
The challenge in interfacing to a thermo-
couple is that there are also unwanted ther-
mocouple junctions at the points where the
thermocouple wires are attached to the
DAS. To accurately develop a temperature
measurement from the voltage measured
by the DAS, it is necessary to monitor the
temperature at the point of wire attach-
ment, and compensate the readings for this
temperature. While it is possible to do all
the necessary corrections in software in the
host, thermocouples are sufficiently ubiq-
uitous so as to justify special single-chip
amplification and processing circuits to
handle all the details of calibration and
correction.
Conclusion
To design an effective data acquisition sys-
tem, it is important to use hardware that
supports the application requirements.
This article has attempted to give a broad
overview of how a typical DAS works and
it has described the various functional com-
ponents.
Edward Ramsden, Cherry Electrical Prod-
ucts, 11200 88th Avenue, PO Box 581913,
Pleasant Prairie, WI 53158, USA; tel: +1-
414-942-6500; fax: +1-414-942-6566.