PTF080901

LDMOS RF Power Field Effect Transistor

90 W, 869–960 MHz

Description Features
The PTF080901 is a 90 W, internally matched GOLDMOS FET intended • Broadband internal matching
for EDGE and CDMA applications in the 860 to 960 MHz band. Full gold • Typical EDGE performance
metallization ensures excellent device lifetime and reliability. - Average output power = 45 W
- Gain = 18 dB
- Efficiency = 40%
EDGE Modulation Spectrum Performance • Typical CW performance
VDD = 28 V, IDQ = 700 mA, f = 959.8 MHz - Output power at P–1dB = 120 W
0 55
- Gain = 17 dB
- Efficiency = 60%
-10 Efficiency 50
Modulation Spectrum (dB)

Drain Efficiency (%) • Integrated ESD protection: Human Body

-20 45 Model, Class 1 (minimum)
-30 40 • Excellent thermal stability
-40 35 • Low HCI drift
-50 30 • Capable of handling 10:1 VSWR @ 28 V,
400 kHz
-60 25 90 W (CW) output power
-70 20
-80 600 kHz 15 PTF080901E
-90 10 Package 30248
36 38 40 42 44 46 48 50
Output Power (dBm)
PTF080901F
Package 31248
ESD: Electrostatic discharge sensitive device—observe handling precautions!

RF Characteristics at TCASE = 25°C unless otherwise indicated

EDGE Measurements (not subject to production test—verified by design/characterization in Infineon test fixture)
VDD = 28 V, IDQ = 700 mA, P OUT = 45 W, f = 959.8 MHz

Characteristic Symbol Min Typ Max Unit

Error Vector Magnitude EVM (RMS) — 2.5 — %
Modulation Spectrum @ 400 kHz ACPR — –62 — dBc
Modulation Spectrum @ 600 kHz ACPR — –74 — dBc
Gain Gps — 18 — dB
Drain Efficiency ηD — 40 — %

Two–Tone Measurements (tested in Infineon test fixture)

VDD = 28 V, IDQ = 650 mA, POUT = 90 W PEP, f = 960 MHz, tone spacing = 1 MHz

Characteristic Symbol Min Typ Max Unit

Gain Gps 17 18 — dB
Drain Efficiency ηD 40 42 — %
Intermodulation Distortion IMD — –32 –29 dBc

Data Sheet 1 2004-04-05

 PTF080901

DC Characteristics at TCASE = 25°C unless otherwise indicated

Characteristic Conditions Symbol Min Typ Max Unit

Drain–Source Breakdown Voltage VGS = 0 V, IDS = 10 µA V(BR)DSS 65 — — V

Drain Leakage Current VDS = 28 V, V GS = 0 V IDSS — — 1.0 µA

On–State Resistance VGS = 10 V, V DS = 0.1 V RDS(on) — 0.1 — V

Operating Gate Voltage VDS = 28 V, IDQ = 650 mA VGS 2.5 3.2 4 V

Gate Leakage Current VGS = 10 V, V DS = 0 V IGSS — — 1.0 µA

Maximum Ratings

Parameter Symbol Value Unit

Drain–Source Voltage VDSS 65 V

Gate–Source Voltage VGS –0.5 to +12 V

Junction Temperature TJ 200 °C

Total Device Dissipation PD 335 W

Above 25°C derate by 1.9 W/°C
Storage Temperature Range TSTG –40 to +150 °C

Thermal Resistance (TCASE = 70°C) RθJC 0.52 °C/W

Typical Performance (measurements taken in production test fixture)

Modulation Spectrum EDGE EVM Performance

P OUT = 40 W, f = 959.8 MHz V DD = 28 V, IDQ = 700 mA, f = 959.8 MHz

2.1 -20 9 90
8 80
Modulation Spectrum (dBc)

1.9 -30
EVM RMS (average %) .

EVM
EVM RMS (average %) .

7 70
Drain Efficiency (%)

1.7 -40
6 60
1.5 -50
400 KHz 5 50
1.3 -60 Efficiency
4 40
1.1 -70
3 30
0.9 600 KHz -80 2 20
0.7 -90 1 EVM 10
0.5 -100 0 0
0.47 0.57 0.67 0.77 0.87 0.97 36 38 40 42 44 46 48 50
Quiescent Current (A) Output Power (dBm)

All published data at TCASE = 25°C unless otherwise indicated.

Data Sheet 2 2004-04-05
 PTF080901

Typical Performance (cont.)

Intermodulation Distortion vs. Output Power Typical POUT, Gain & Efficiency (at P-1dB)
(as measured in a broadband circuit) vs. Frequency
VDD = 28 V, IDQ = 650 mA, f1 = 959 MHz, f2 = 960 MHz
V DD = 28 V, IDQ = 650 mA
0 18 80

-10

Efficiency (%), POUT (dBm)

-20 17 Gain 70

-30 3rd Order

Gain (dB)
IMD (dBc)

-40 16 Efficiency 60

-50
5th
-60 15 50
Output Pow er
-70 7th

-80 14 40
43 45 47 49 51 860 880 900 920 940 960

Output Power (dBm), PEP Frequency (MHz)

IM3 vs. Output Power at Selected Biases Broadband Performance

V DD = 28 V, f1 = 959, f2 = 960 MHz V DD = 28 V, IDQ = 650 mA, POUT = 45 W

-20 60 0
-25
Gain (dB), Efficiency (%)

50 -3
-30 480 mA
Return Loss (dB)

Efficiency
-35
IMD (dBc)

40 -6
-40
650 mA
-45 30 Return Loss -9

-50 820 mA
20 -12
-55 Gain
-60 10 -15
39 41 43 45 47 49 51 860 880 900 920 940 960
Output Power (dBm), PEP Frequency (MHz)

All published data at TCASE = 25°C unless otherwise indicated.

Data Sheet 3 2004-04-05

 PTF080901

Typical Performance (cont.)

Power Sweep Gain & Efficiency vs. Output Power

VDD = 28 V, f = 960 MHz V DD = 28 V, IDQ = 650 mA, f = 960 MHz

19.0 20 70

18.5 19 Gain 60
IDQ = 820 mA

Drain Efficiency (%)

Power Gain (dB)

18 50

Gain (dB)
18.0
17 40
17.5 IDQ = 650 mA
16 30

17.0 IDQ = 480 mA

15 20
Efficiency
16.5 14 10
37 39 41 43 45 47 49 51 53 40 43 46 49 52
Output Power (dBm)
Output Power (dBm)

Output Power (at 1 dB Compression)

IS-95 CDMA Performance
vs. Supply Voltage
V DD = 28 V, IDQ = 700 mA, f = 880 MHz
IDQ = 650 mA, f = 960 MHz
52.0 60 -40
Adjacent Channel Power
50 -45
Output Power (dBm)

51.5
Drain Efficiency (%)

40 ACP FC – 0.75 MHz -50

Ratio (dBc)

51.0
30 -55
Efficiency
20 -60
50.5
10 ACPR FC + 1.98 MHz -65

50.0
0 -70
24 26 28 30 32
40 41 42 43 44 45
Supply Voltage (V)
Output Power (dBm), Avg.

All published data at TCASE = 25°C unless otherwise indicated.

Data Sheet 4 2004-04-05

 PTF080901

Typical Performance (cont.)

Three–Carrier CDMA 2000 Performance Bias Voltage vs. Temperature

VDD = 28 V, IDQ = 700 mA, f = 880 MHz Voltage normalized to typical gate voltage.
Series show current.
50 -44 1.03 1.50 A
ACP Up 3.00 A
45 -47 1.02

Normalized Bias Voltage

ACP Low
4.50 A
Drain Efficiency (%)

Adjacent Channel
Power Ratio (dBc)
40 ALT Up -50 1.01
6.00 A
35 -53 1.00 7.50 A
9.00 A
30 -56 0.99
Efficiency
25 -59 0.98

20 -62 0.97

15 -65 0.96
39 40 41 42 43 44 45 -20 0 20 40 60 80 100

Output Power (dBm), Avg. Case Temperature (ºC)

Broadband Circuit Impedance

NE

Z0 = 50 Ω
D GE

D
TOW AR

Z Source Z Load 0.1

- W AVE LE NG THS

G
Z Load Z Source
0. 0

S 980 MHz 980 MHz

0.1

0.2
TOW ARD L OA D -

Frequency Z Source Ω Z Load Ω 860 MHz 860 MHz

MHz R jX R jX
860 2.50 –1.09 1.98 –1.08
N GTHS

920 2.67 –0.43 1.99 –0.32

0 .1
940 2.79 –0.35 1.87 –0.21
EL E

960 2.94 0.12 1.85 0.27

WAV

980 2.91 0.37 1.79 0.53

---

All published data at TCASE = 25°C unless otherwise indicated.

Data Sheet 5 2004-04-05

 PTF080901

Test Circuit

VDD
QQ1
LM7805
R7 C1
3.3 kV 10 µF, 35 V

+
C21 R5
0.001 µ F C23 10 kV C2
Q1 0.1 µF
R3 BCP56 0.001 µF 50 V
1.2 kV
R6
C22 22 kV
0.001 µF
R4 R1
1.3 kV 10 V
R2 L1
5.1 kV
C3
33 pF
C7 C8 +C9 C10
+ C11
33pF 1µF 10µF 0.1µF 10µF
35V 50V 35V

l4 l7
C12
2.2pF
DUT
C15
33pF
RF_IN l1 l2 l3 l5 l6 l9 l10 l11 RF_OUT
C4
33pF C5 C6 C13 C14
4.3pF 6.2pF 1.4pF 0.5pF

l8

L2

C16 C17 + C18 C19 + C20

33pF 1µF 10µF 0.1µF 10µF
35V 50V 35V

080901_sch

Test Circuit Schematic for 960 MHz

Circuit Assembly Information

DUT PTF080901 LDMOS Transistor
PCB 0.76 mm. [.030”] thick, εr = 4.5 2 oz. copper Rogers TMM4

Microstrip Electrical Characteristics at 960 MHz Dimensions: L x W (mm.) Dimensions: L x W (in.)

l1 0.075 λ, 50 Ω 12.83 x 1.35 0.505 x 0.053
l2 0.101 λ, 50 Ω 17.27 x 1.35 0.680 x 0.053
l3 0.053 λ, 50 Ω 9.14 x 1.35 0.360 x 0.053
l4 0.289 λ, 73.66 Ω 50.80 x 0.75 2.000 x 0.030
l5 0.061 λ, 7.48 Ω 9.27 x 16.26 0.365 x 0.640
l6 0.097 λ, 7.93 Ω 14.73 x 15.24 0.580 x 0.600
l7, l8 0.132 λ, 52.47 Ω 22.61 x 1.27 0.890 x 0.050
l9 0.105 λ, 7.93 Ω 16.13 x 15.24 0.635 x 0.600
l10 0.134 λ, 38.02 Ω 22.35 x 2.16 0.880 x 0.085
l11 0.029 λ, 50 Ω 4.95 x 1.37 0.195 x 0.053

Data Sheet 6 2004-04-05

 PTF080901

Test Circuit (cont.)

VGS
C11
R7 R5 C23 C21

3 5V
10
C1

+
QQ1
VDD
35V
LM
+
10
R6 C22
C2 R4 C7 L1
R1 R2

+
C8

3 5V
10
R3
1 00

5 12

C3 Q1 C10
C9

C12 C14 C15

RF_IN RF_OUT
C4
C5

C18
C6 C13
C19

3 5V
10
C17
L2 VDD

+
C16

+ 10
35 V
C20

080901_assy

Reference Circuit1 (not to scale)

Component Description Manufacturer P/N or Comment

C1, C9, C11, C18, Capacitor, 10 µF, 35 V Digi-Key Tantalum TE Series SMD
C20 PCS6106TR-ND
C2, C10, C19 Capacitor, 0.1 µF, 50 V Digi-Key P4525-ND
C3, C4, C7, C15, Capacitor, 33 pF ATC 100B 330
C16
C5 Capacitor, 4.3 pF ATC 100B 4R3
C6 Capacitor, 6.2 pF ATC 100B 6R2
C8, C17 Capacitor, 1 µ, 50 V Digi-Key 19528-ND
C12 Capacitor, 2.2 pF ATC 100B 2R2
C13 Capacitor, 1.4 pF ATC 100B 1R4
C14 Capacitor, 0.5 pF ATC 100B 0R5
C21, C22, C23 Capacitor, 0.001 µF, 50 V, 0603 Digi-Key PCC1772CT-ND
L1, L2 Ferrite, 6 mm Philips 53/3/4.6-452
Q1 Transistor Infineon BCP56
QQ1 Voltage Regulator National Semiconductor LM7805
R1 Resistor, 10 ohms, 1/4 W, 1206 Digi-Key P10ECT-ND
R2 Resistor, 5.1 k-ohms, 1/4 W, 1206 Digi-Key P5.1KECT-ND
R3 Resistor, 1.2 k-ohms, 1/10 W, 0603 Digi-Key P1.2KGCT-ND
R4 Resistor, 1.3 k-ohms, 1/10 W, 0603 Digi-Key P1.3KGCT-ND
R5 Resistor, Variable, 10 k-ohms, 1/4 W Digi-Key 3224W-103ETR-ND
R6 Resistor, 22 k-ohms, 1/10 W, 0603 Digi-Key P22KGCT-ND
R7 Resistor, 3.3 k-ohms, 1/4 W, 1206 Digi-Key P3.3KECT-ND

1Gerber files for this circuit are available on request.

Data Sheet 7 2004-04-05

 PTF080901

Ordering Information
Type Package Outline Package Description Marking
PTF080901E 30248 Thermally enhanced, flange mount PTF080901E
PTF080901F 31248 Thermally enhanced, earless PTF080901F

Package Outline Specifications

Package 30248

(45° X 2.72
C
L
[.107])

2X 4.83±0.51
D [.190±.020]

S
9.78
[.385] LID 9.40 +0.10
-0.15 C
+.004 L
[.370 -.006 ]
19.43 ±0.51
[.765±.020]

2X R1.63
G [.064]
4X R1.52
[.060]
2X 12.70
[.500]
27.94
[1.100]
1.02
[.040] 19.81±0.20 SPH 1.57
[.780±.008] [.062]

3.76±0.38
[.142±.015]
0.0381 [.0015] -A-
34.04
[1.340]

0.51
[.020] P K G _248_0

Notes: Unless otherwise specified

1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. Pins: D = drain, S = source, G = gate
4. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]

Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/products

Data Sheet 8 2004-04-05

 PTF080901

Package Outline Specifications

Package 31248

( 45° X 2.72 C
[.107]) L

4.83±0.51
[.190±.020] D

LID 9.40+0.10
-0.15 19.43±0.51
[.370+.004 [.765±.020]
-.006] CL
9.78
[.385]

2X 12.70
[.500]

0.51
19.81±0.20 [.020]
[.780±.008]
SPH 1.58
[.062] 1.02
[.040]

0.0381 [.0015] -A-

S
20.57
3.61±0.38 [.810]
[.142±.015]
P K G _248_1

Notes: Unless otherwise specified

1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. Pins: D = drain, S = source, G = gate
4. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]

Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/rfpower

Data Sheet 9 2004-04-05

PTF080901
Confidential - Limited Internal
Revision History: 2004-04-05 Data Sheet
Previous Version: 2004-01-02, Data Sheet
Page Subjects (major changes since last revision)
1,8,9 Add information about PTF080901F, new package outline diagrams
6,7 Circuit information updated.

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Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send your proposal (including a reference to this document) to:
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To request other information, contact us at:
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GOLDMOS® is a registered trademark of Infineon Technologies AG.

Edition 2004-04-05
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2003.
All Rights Reserved.

Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.

Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon
Technologies Office (www.infineon.com/rfpower).

Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support
device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it
is reasonable to assume that the health of the user or other persons may be endangered.

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