Paging on the x86 architecture

A presentation by Pipeline
What is paging?

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Paging is a major part of a virtual memory implementation
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Memory is divided into fixed-size blocks called page frames.
These page frames are filled with the pages that
applications use
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An area of memory starting directly on a page frame and
having all the same permissions is called a region
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Each application has its own “working set” of pages
Whats the benefit?

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Applications can use a technique called “ memory mapping”
where they can allocate their own pages through the OS. They
can also map files to memory using this. On POSIX systems this
is done with an mmap syscall
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Hard drives can act as extra memory through the use of swap
space. Pages are loaded in and out of memory to a swap
file/partition. This process is expensive but luckily rarely used.
The replacement stratergy the OS uses can have a large impact
on performance when swapping is needed
X86 support for paging
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X86 supports paging in protected and long mode. Here we will concentrate
on long mode
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All virtual addresses go through the CPUs MMU (Memory Management Unit)
which converts them to physical addresses
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Virtual addresses are actually only 48bits wide (as of right now) – we dont
need to address more than that at the moment so using all 64bits would
complicate things for no good reason
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Virtual addresses have to be in canonical form – the most significant 16bits
have to be the same as the 17th (similar to sign extension). On linux if a non-
canonical address is used a “Bus Error” is shown in the terminal
Details
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X86 uses a multi-level page table which is used to translate a virtual address to a physical one
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The layers are as follows (still on long mode): Page Map Level 4 (PML4 – entries are called PML4E), Page
Directory Pointer Table (PDP - PDPE), Page Directory (PD - PDE), and lastly the Page Table (PT – PTE)
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A pointer to PML4 is stored in the cr3 control register. When a context switch is done by the OS this
register is switched
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Parts of the virtual address are used as indices into the tables; the first 16bits is the sign extension, then
9bits each are indices into the tables, then the rest is an index into the page
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Page sizes can vary based on how many layers you use; with the minimum of 2 layers pages are 1GiB.
With 3 layers they are 2MiB, and with the max 4 layers they are 4KiB
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How many layers you use is determined by a flag in the page table entries
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This might seem like a lot of overhead but the MMU has a TLB (Translation Lookaside Buffer) which acts
as a cache for these convertions. If locality is used well then the CPU cache helps speed up things aswell
Extra: procfs

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Linux and many other unix-like operating systems that
presents information about running processes in an easy to
understand and process way
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You can look at the memory map of a process by going to
this directory /proc/[PID]/maps