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Good Question: Why we need not have Starter in 3 phase transformer?

Because electrical inertia is negligible compared to mechanical inertia. In DC machine emf induced is
function of speed which is 0 at starting condition hence emf is 0, so current drawn will be very high, so
starter is installed .in transformer emf induced is function of rate of change flux which comes almost
instantly with negligible inertia due to nature of ac supply and which acts as starting current limiter so we
don't need starters in transformers.

Good Question: Why the core of high frequency transformers are made of ferrite or air cored...
Reasons 1)-In electronic circuits transformers are used for impedance matching for maximum power
transfer, so we don't require ferromagnetic materials to produce high flux densities in core at the minimum
expanse of magnetizing current and here flux densities required is much less bcs of low power n/w, so we
can use ferrite magnetic materials or soft ferrites which offers DC resistivity approx 10 times more than iron
consequently eddy current loss problem preventing penetration of magnetic flux into material is much less
severe than in iron. so ferrites can be used for up to microwave frequencies bcs it offers magnetic properties
for coupling of primary and secondary for signal transfer electromagnetically (bcs of presence of magnetic
domains in the crystalline structure) with having conductivity like a semiconductor. 2) Bcs in
communication ckts signals has to be transferred through T/F which MUST be having linear B-H
relationship so that there must not any signal distortion should occur inside T/F, so air cored or ferrites are
used. 3) They are also having extremely low dielectric losses

Good Question: How many flux lines has to be linked to get 1V induced voltage in any machine?
No. of lines to be linked to induce 1V is 10 to the power of 8 lines.

Good Question: We tend to neglect inductance of DC machines but why do consider it in drives
problems and analysis?
We consider constant load conditions (Current Constant OR Armature current i.e., Conductor Current inside
Armature as constant) in DC machines, but where as in Drives, it cannot be taken as constant. Due to power
Electronic circuitry, load current will keep changing and even it may go to discontinuity in current.

Good Question: Why we normally prefer Core Type transformer only as Distribution Transformer?
As DT subjected to load variations for higher energy efficiency we prefer core type T/F as volume of iron
required is less in core type compared to shell type.
we know shell type transformers are economical for LV and high current applications and core type for HV
and low current applications, which is a contradiction to the above qstn...anyone explain..
Bcs Distribution T/F should supply core losses irrespective of load throughout the day; the volume of the
core should be as less as possible....So we prefer core type T/F.

Flip-flop:
A flip-flop is a bistable device, i.e. it has two states. Its output remains either high or low. The high
state is 1 called SET and the low state is 0 called RESET. The JK flip flop is the most versatile flip-flop, and
the most commonly used flip flop when discrete devices are used to implement arbitrary state machines.
Like the RS flip-flop, it has two data inputs, J and K, and a clock input. It has no undefined states or race
condition, however. It is always edge triggered; normally on the falling edge. The JK flip-flop has the
following characteristics: i) If one input (J or K) is at logic 0, and the other is at logic 1, then the output is set
or reset (by J and K respectively), just like the RS flip-flop, but on the (falling) clock edge. ii) If both inputs
are 0, then it remains in the same state as it was before the clock pulse occurred; again like the RS flip flop.
iii) If both inputs are high, however the flip-flop changes state whenever the (falling) edge of a clock pulse
occurs; i.e., the clock pulse toggles the flip-flops. There are two basic types of JK flip-flops. The first type is
basically an RS flip-flop with its outputs and AND together with J and K respectively. This type of JK flip-
flop has no special name. Note that the connection between the outputs and the inputs to the AND gates
determines the input conditions to R and S when J = K = 1. This connection is what causes the toggling, and
eliminates the invalid condition which occurs in the RS flip flop. The second type of JK flip-flops is called a
master-slave flip flop. This consists of two RS flip flops arranged so that when the clock pulse enables the
first, or master latch, it disables the second, or slave latch. When the clock changes state again (i.e., on its
falling edge) the output of the master latch is transferred to the slave latch. Again, toggling is accomplished
by the connection of the output with the input AND gates. The JK flip-flop is a very versatile device, and is
probably the most commonly used form of flip-flop in digital electronic and control circuits. The fact that it
has two inputs often means that it is simpler to design the control logic required to ensure that it changes
state properly in a circuit. Source:

Saw tooth Waveform:


When plotted as voltage (V) as a function of phase (θ), a triangle wave looks similar to the figure to
the right. The waveform repeats every 2π radians (360°), and is symmetrical about the voltage axis (when no
DC offset is present). Voltage and current exhibiting cyclic behavior is referred to as alternating; i.e.,
alternating current (AC). One full cycle is shown here. The basic equation for a triangle wave is as follows:

, for 0 ≤ θ < π/2


There are a number of ways in which the amplitude of a triangle wave is referenced, usually as peak
voltage (Vpk or Vp), peak-to-peak voltage (Vpp or Vp-p or Vpeak peak or Vpk-pk), average voltage (Vav or Vavg),
and root-mean-square voltage (Vrms). Peak voltage and peak-to-peak voltage are apparent by looking at the
above plot. Root-mean-square and average voltage are not so apparent.

Root-Mean-Square Voltage (Vrms):

As the name implies, Vrms is calculated by taking the square root of the mean average of the square of
the voltage in an appropriately chosen interval. In the case of symmetrical waveforms like the triangle wave,
a quarter cycle faithfully represents all four quarter cycles of the waveform. Therefore, it is acceptable to
choose the first quarter cycle, which goes from 0 radians (0°) through π/2 radians (90°).

Vrms is the value indicated by the vast majority of AC voltmeters. It is the value that, when applied
across a resistance, produces that same amount of heat that a direct current (DC) voltage of the same
magnitude would produce. For example, 1 V applied across a 1 Ω resistor produces 1 W of heat. A 1
Vrms triangle wave applied across a 1 Ω resistor also produces 1 W of heat. That 1 Vrms triangle wave has a
peak voltage of √3 V (≈1.732 V), and a peak-to-peak voltage of 2√3 V (≈3.464 V).

Since finding a full derivation of the formulas for root-mean-square (Vrms) voltage is difficult, it is done here
for you.
So, ≈ 0.577 Vpeak

= 0.5773, = 1.732

Average Voltage (Vavg):

As the name implies, Vavg is calculated by taking the average of the voltage in an appropriately
chosen interval. In the case of symmetrical waveforms like the triangle wave, a quarter cycle faithfully
represents all four quarter cycles of the waveform. Therefore, it is acceptable to choose the first quarter
cycle, which goes from 0 radians (0°) through π/2 radians (90°).

As with the Vrms formula, a full derivation for the Vavg formula is given here as well.

Vavg = Vpeak /2 ≈ 0.5 .Vpeak

Effect of Phase Lag Compensation:


1. Gain crossover frequency increases.
2. Bandwidth decreases.
3. Phase margin will be increase.
4. Response will be slower before due to decreasing bandwidth, the rise time and the settling time become
larger.
Advantages of Phase Lag Compensation:
Let us discuss some of the advantages of phase lag compensation -
1. Phase lag network allows low frequencies and high frequencies are attenuated.
2. Due to the presence of phase lag compensation the steady state accuracy increases.
Effect of Phase Lead Compensation:
1. The velocity constant K increases.
2. The slope of the magnitude plot reduces at the gain crossover frequency so that relative stability improves
& error decrease due to error is directly proportional to the slope.
3. Phase margin increases.
4. Response becomes faster.

Advantages of Phase Lead Compensation:


Let us discuss some of the advantages of the phase lead compensation-
1. Due to the presence of phase lead network the speed of the system increases because it shifts gain
crossover frequency to a higher value.
2. Due to the presence of phase lead compensation maximum overshoot of the system decreases.

Good morning Sir/madam.

First of all thank you so much for providing this opportunity. At the same time it was great pleasure
to introduce myself in front of you.

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I did my +2 and schooling in my hometown.

At most of my leisure time to spend on Gardening, listening to music, and traveling new places. And
I am very happy to say about my strengths. I have a good leadership qualities at effective time management.
And I am a good learner as well as quick writer. Initiate to solve the problems.

Coming to my family background Consist of five members. My father, he is an agriculturist and my


mother, she is home maker. And I have a two younger sisters.

And finally my Goal is want to create special Identity at myself in your company.

Gain The factor by which power or voltage is increased in an amplifier or other electronic device,
usually expressed as a logarithm.

Gain is a proportional value that shows the relationship between the magnitudes of the input to the
magnitude of the output signal at steady state. Many systems contain a method by which the gain can be
altered, providing more or less "power" to the system.

Sag means the deepest point of the conductor.

Sag is defined as follows: 'Sag, under any system of conductor loading, is the distance measured in the
direction of the resultant load, between the conductor and the midpoint of a straight line joining adjacent
supports'. So, draw an imaginary line between two adjacent supports (towers or poles) and, from the midway
point, draw a vertical line to where it intersects the conductor, and that vertical line represents the sag.

In power engineering, the power-flow study, or load-flow study, is a numerical analysis of the flow of
electric power in an interconnected system.

Classification of Buses

Load Buses: In these buses no generators are connected and hence the generated real power PGi and
reactive power QGi are taken as zero. The load drawn by these buses are defined by real power -PLi and
reactive power -QLi in which the negative sign accommodates for the power flowing out of the bus. This is
why these buses are sometimes referred to as P-Q bus. The objective of the load flow is to find the bus
voltage magnitude |Vi| and its load angle δi.
Voltage Controlled Buses: These are the buses where generators are connected. Therefore the
power generation in such buses is controlled through a prime mover while the terminal voltage is controlled
through the generator excitation. Keeping the input power constant through turbine-governor control and
keeping the bus voltage constant using automatic voltage regulator, we can specify constant PGi and | Vi |for
these buses. This is why such buses are also referred to as P-V buses. It is to be noted that the reactive power
supplied by the generator QGi depends on the system configuration and cannot be specified in advance.
Furthermore we have to find the unknown angle δi of the bus voltage.

Slack or Swing Bus: Usually this bus is numbered 1 for the load flow studies. This bus sets the
angular reference for all the other buses. Since it is the angle difference between two voltage sources that
dictates the real and reactive power flow between them, the particular angle of the slack bus is not important.
However it sets the reference against which angles of all the other bus voltages are measured. For this reason
the angle of this bus is usually chosen as 0° . Furthermore it is assumed that the magnitude of the voltage of
this bus is known.

Steady State Stability studies are restricted to small and gradual changes in the system operating
conditions. In this we basically concentrate on restricting the bus voltages close to their nominal values. We
also ensure that phase angles between two buses are not too large and check for the overloading of the power
equipment and transmission lines. These checks are usually done using power flow studies.

Transient Stability involves the study of the power system following a major disturbance.
Following a large disturbance the synchronous alternator the machine power (load) angle changes due to
sudden acceleration of the rotor shaft. The objective of the transient stability study is to ascertain whether the
load angle returns to a steady value following the clearance of the disturbance.

The ability of a power system to maintain stability under continuous small disturbances is
investigated under the name of Dynamic Stability (also known as small-signal stability). These small
disturbances occur due random fluctuations in loads and generation levels. In an interconnected power
system, these random variations can lead catastrophic failure as this may force the rotor angle to increase
steadily.

In this chapter we shall discuss the transient stability aspect of a power system.

Guass – Seidel Method:


Guass seidel method is one of the common methods employed for solving power flow equations.

Advantages:

 Simplicity in technique
 Small computer memory requirement
 Less computational time per iteration

Disadvantages:

 Slow rate of convergence resulting in larger number of iterations


 Increase in the number of iterations with increase in the number of buses

Newton Raphson Method:


Newton Raphson method is the sophisticated and important method for solving power flow studies
particularly for the complex power systems. Newton Raphson method is based on Taylor’s series and partial
derivatives.
Advantages:

 Newton Raphson method needs less number of iterations to reach convergence, takes less
computation time
 More accurate and not sensitive to the factors such like slack bus selection, regulation transformers
etc. and the number of iterations required in this method is almost independent of system size.

Disadvantages:

 More calculations involved in each iteration and require large computation time per iteration and
large computer memory.
 Difficult solution technique (programming is difficult).
 Primitive n/w is a set of unconnected elements which provides information regarding the
characteristics of individual elements only.
 A graph shows the geometrical interconnection of the elements of a n/w.
 A sub graph is any subset of elements of a graph.
 A path is a sub graph of connected elements with not more than two elements connected to any one
node.
 A graph is connected if and only if there is a path b/n every pairs of nodes. If each element of the
connected graph is assigned a direction it is called oriented graph.
 Tree is a sub graph connecting all the nodes of the oriented graph. Tree is a connected sub graph.
 A cut set is the minimum set of elements in the graph, which when removed, divide a connected
graph into two connected sub graph.

Lightning Arrester
The insulation requirements of switch gears are determined by transient voltages, over-voltages,
surges or transients. Transients are voltage waves of magnitude higher than desirable value and these persist
for a short duration and occur due to several causes, some of them are as follows:
i. Lightning
ii. Sudden changes in circuit condition
iii. Switching
iv. Resonance
v. Arching grounds
vi. Faults
vii. Traveling waves etc

Representative values of a lightning stroke:


Voltage - 2 x 108 volts.
Current - 2 x 104 Amps
Duration - 10-5 seconds.
Power - 8 x 105 kW

Zinc Oxide arrester consists of ZnO poly crystalline elements. The elements are housed in a hollow
full length of porcelain insulator. The elements exhibit high non-linear voltage current characteristics.
During normal voltages lightning arresters does not conduct and acts as an insulator drawing a very little
leakage current. When a surge wave traveling along the overhead line comes to the arrester, the surges are
absorbed by Zinc oxide elements regain its impedance (i.e. pre-breakdown condition) and ready for
subsequent surge suppression.
High non-linearity in V-I characteristics:
The non linear index a defined as I = KVa is 30 to 40 for ZnO based elements while the same is < 5 in the
case of SiC elements.

Absence of series/ spark gaps:


ZnO arresters do not constitute series gaps due to high non – linear while the series gaps are essential in the
case of SiC arresters.

Types of Lightning Arrester


The following types are protective – against Lightning surges.
1. Rod Gap
2. Horn Gap
3. Explosion Gap or Protective tube
4. Surge Absorber
5. Lightning arrester or Surge Diverters

1.9.1 Station Type Arresters (Gapless)


Each station type arresters contains one or more units. These units are modular in constructions so
that they can be assembled one on the other depending upon the overall rating. This individual unit will have
a separate name plate indicating rating and other details, if the arrester contains more than one unit. The
units are connected in series and mounted vertically. The terminal of line units is connected to the line (bus-
bar or feeder etc.). The lowest terminal is connected to earth.

The construction of Zinc Oxide gapless arrester is ZnO poly crystalline elements. The elements are
housed in a hollow porcelain insulator and hermetically sealed. The number and size of ZnO elements vary
depending upon the system voltage and energy class requirements.

ZnO arrester have three regions


i. Pre-break down
ii. Break down/ non linear zone
iii. Upturn constitutes V-I curve

The non-linear characteristics of zinc oxide block is as shown in figure 1.8


A - Bottom linear part (Ohmic region)
B - Knee point (Breakdown region)
C - Non- linear part/ region
D - Upper linear part (Up linear region)
O - Working point (Continuously applied voltage)
In above figure X axis is in logarithmic scale. This special characteristic is the heart of protection
technology. Functionally the ZnO arrester acts as a near insulator drawing very little current prior to
reaching breakdown or threshold voltage and act as a conductor thereafter.

The rated voltage of Zinc Oxide element is proportional to the height. The energy level increases with the
increase in area of the Zinc oxide block. Hence, the minimum diameters for different energy class are as
below:

Clipping circuits (also known as limiters, amplitude selectors, or slicers), are used to remove the part of a
signal that is above or below some defined reference level.

Clamping circuits, also known as dc restorers or clamped capacitors, shift an input signal by an amount
defined by an independent voltage source.
Cascode amplifier:
The cascode amplifier is combination of common-emitter and common-base amplifier.
A cascode amplifier has a high gain, moderately high input impedance, high output impedance, and a high
bandwidth.

Darlington Amplifier:
It consists of two emitter followers in cascaded mode. The overall gain is close to unity. The main
advantage of Darlington amplifier is very large increase in input impedance and an equal decrease in output
impedance.
_ Common emitter amplifier is most popular BJT amplifier due to high power gain.
_ Ideal amplifier should have high input impedance, low output impedance, high voltage and current gain.
_ Single Stage amplifier is not able to provide enough gain, power and fulfill all the requirement of an ideal
amplifier need multistage amplifier

Crystal-Controlled Oscillators:
- The most stable and accurate type of feedback oscillator uses a piezoelectric crystal in the feedback loop
to control the frequency.

The Piezoelectric Effect:


- Quartz is one type of crystalline substance found in nature that exhibits a property called the piezoelectric
effect.
- When a changing mechanical stress is applied across the crystal to cause it to vibrate, a voltage develops at
the frequency of mechanical vibration.
- Conversely, when an AC voltage is applied across the crystal, it vibrates at the frequency of the applied
voltage.
- The greatest vibration occurs at the crystal’s natural resonant frequency, which is determined by the
physical dimensions and by the way the crystal is cut.
- Crystals used in electronic applications typically consist of a quartz wafer as shown in Figure 22(a) and (b).
- A schematic symbol for a crystal is shown in Figure 22(c), and an equivalent RLC circuit for the crystal
appears in Figure 22(d).

As you can see, the crystal’s equivalent circuit is a series-parallel circuit and can operate in either series
resonance or parallel resonance.
- At the series resonant frequency, the inductive reactance is cancelled by the reactance of.
- The remaining series resistor, determines the impedance of the crystal.
- Parallel resonance occurs when the inductive reactance and the reactance of the parallel capacitance, are
equal.
- The parallel resonant frequency is usually at least 1 kHz higher than the series resonant frequency.
- A great advantage of the crystal is that it exhibits a very high (s with values of several thousand are
typical).
- An oscillator that uses a crystal as a series resonant tank circuit is shown in Figure 23(a).
- The impedance of the crystal is minimum at the series resonant frequency, thus providing maximum
feedback.
- The crystal tuning capacitor, Cc is used to “fine tune” the oscillator frequency.
b
Armature phase a

Salient pole synchronous b f

Generator phasor diagram Field a


Phase b
Salient pole rotor c'

Phase c

1 2

Salient pole machine Synchronous reactance


• The air-gap reluctance along the field
poles, which is called the d axis or direct • Synchronous inductances (and
axis, is small (since the air-gap length is Reactance’s) will be different for each axis,
small) larger for the d axis and smaller for the q
• The air-gap reluctance midway between axis
the poles, which is called the q axis or • Two different synchronous reactance’s:
quadrature axis, is larger (since the air- Xd> X q
gap length is larger)

3 4

Phasor diagram (steady state) Phasor diagram (steady state)


Iq Eaf
 q axis q axis
j XqI Eaf
 Va q
Iq
j XqI q
Id
Ia j XdI d
Va j XdI d Xd≥ X q
The d axis is lined up with the
Id Ia
rotor and rotates with it. The q
axis is perpendicular to the d The following step by step
d axis
axis (and also rotates with the procedure assumes that we
rotor). d axis know Vaand I aand pf
5 6

1
 

DQ Model Phasor Diagram Phasor diagram (steady state)


• Steady-state for salient-pole generator, V isa
phase angle reference: q axis
Eaf
q axis j XqI q
Iq
 Step 2: Compute
j XqI  Va j XdI d Idand I q
 a
Ia
Id
 Va
Step 1: Locate q axis,
Ia d axis Step 3: Compute excitation voltage
then d axis lags by 90 °
d axis (electrical degrees)
Eaf =V a+ R I a+jX Id +jX
d I q q

7 8

Phasor diagram (transient) DQ Model Phasor Diagram


• Steady-state for salient-pole generator, I isa
q axis phase angle reference:
Eaf
Eq’ q axis
j XqI q
Iq

j (Xd-Xd’) I d j XqI
Va j Xd’ Id a

Id Ia  Step 1: Locate q
Va
 axis, then d axis
Eaf  iF(field current)
Ia lags by 90 °
d axis d axis
Eq’   F (field flux linkage)
Note: various textbooks differ on whether q lags or leads d
9 10

Phasor diagram (steady state) Phasor diagram (steady state)


q axis
Eaf Iq Eaf q axis
j XqI q
Iq V j XqI
j XdI Id 
a q
 d Step 2: Compute I d Ia j XdI
Va d
 and I q
Ia
Id d axis
Step 3: Compute excitation voltage
Eaf =V a+ R I a+jX Id +jX
d I q q
d axis
11 12

2


Synchronous Motor Synchronous Motor

-j XdI d
-j XqI
Id q
Va -j XqI Ia Va
Id -j XqI
q
-j XdI d
Ia a
d axis Iq -j XqI a
Iq E
af q axis Eaf
d axis q axis

13 14

Memory Basics
• RAM: Random Access Memory
– Historically defined as memory array with individual bit access refers to memory with both Read and
Write capabilities
• ROM: Read Only Memory
– No capabilities for “online” memory Write operations Write typically requires high voltages or erasing by
UV light
• Volatility of Memory
– Volatile memory loses data over time or when power is removed
• RAM is volatile
Non volatile memory stores date even when power is removed
– ROM is non-volatile

• Static vs. Dynamic Memory


– Static: holds data as long as power is applied (SRAM)
– Dynamic: will lose data unless refreshed periodically (DRAM)
• SRAM: Static Random Access Memory
– Static: holds data as long as power is applied
– Volatile: cannot hold data if power is removed
– 3 Operation States: hold, write, read
– Basic 6T (6 transistor) SRAM Cell
• Bistable (cross-coupled) INVs for storage
• Access transistors MAL & MAR
• Word line, WL, controls access
– WL = 0 (hold) = 1 (read/write)
• DRAM: Dynamic Random Access Memory
– Dynamic: must be refreshed periodically
– Volatile: loses data when power is removed
– 1T DRAM Cell
• Single access transistor; storage capacitor
ECE 331, Prof. A. Mason Memory Overview.2
• Control input: word line (WL); data I/O: bit line
• DRAM to SRAM Comparison
3
– DRAM is smaller & less expensive per bit
– SRAM is faster
– DRAM requires more peripheral circuitry
Operation as a Voltage-Controlled Oscillator (VCO)
- A 555 timer can be set up to operate as a VCO by using the same external connections as for Astable
operation, with the exception that a variable control voltage is applied to the CONT input (pin 5).

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