Beruflich Dokumente
Kultur Dokumente
D D
2011-01-19
REV : XXX
B
DY :None Installed B
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 1 of 102
5 4 3 2 1
5 4 3 2 1
USB BD
##OnMainBoard
Block Diagram SYSTEM DC/DC
RT8208B
INPUTS
48
OUTPUTS
CPU DC/DC
NCP6131
INPUTS
42~44
OUTPUTS
POWER BD
48.4IH03.0SA
(UMA/Optimus co-lay) DCBATOUT 0D85V_S0 DCBATOUT
SYSTEM DC/DC
VCC_CORE
VRAM UP6111CQHC 45
1GB/512MB INPUTS OUTPUTS
D
Finger Printer BD 88,89,90,91
4
Project code : 91.4PA01.001 DCBATOUT 1D05V_VTT
D
48.4IH04.0SA
DDR3
PCB P/N : 10290 SYSTEM DC/DC
UP6183AQAG 41
800MHz Intel CPU Revision : -SC INPUTS OUTPUTS
IO BD
48.4IH02.0SA 5V_AUX_S5
3D3V_AUX_S5
Sandy Bridge DDRIII 1066/1333/1666 Channel A DDRIII Slot 0 DCBATOUT 5V_S5
3D3V_S5
AV BD NVIDIA PCIe x 16 1066/1333/1666 14
(Discrete only) SYSTEM DC/DC
DDRIII 1066/1333/1666 Channel B DDRIII Slot 1 UP6111C 46
N12P-GE/GV DDRIII: 1066/1333/1666 MHz
1066/1333/1666 15 INPUTS OUTPUTS
1D5V_S3
4,5,6,7,8,9,10 DCBATOUT
83.84,85,86,87 DDR_VREF_S3
SYSTEM DC/DC
HDMI FDI x 4 x 2 NCP5911 44
C 51 (UMA only) DMI x 4 C
INPUTS OUTPUTS
HDMI DCBATOUT VCC_GFXCORE
LCD
49
LVDS PCIE x 1
GLAN RJ45 VGA
RTL8111E CONN 59 RT8208B 92
RGB CRT
Intel 31
INPUTS OUTPUTS
CRT 50
BD
PCH PCIE x 1/USB2.0 x 1 Mini-Card
DCBATOUT VGA_CORE
LDO
SPI
ODD 46
RT9026
LPC Bus
56
Internal DMIC Azalia
INPUTS OUTPUTS
CODEC
I/O BD
5V_S5 0D75V_S0
HP1 Realtek Flash ROM LPC debug port
RTC8111E 4MB 60 71
MIC IN G1454
PCB LAYER
29 L1:Top L5:VCC
L2:GND L6:Signal
KBC SMBus L3:Signal L7:GND
A
NUVOTON L4:Signal L8:Signal
A
BOM
NPCE795 27
2CH SPEAKER Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Touch Int. Thermal Block Diagram
G-Sensor Fan
PAD KB EMC2103-2-AP 28
Size
A3
Document Number Rev
79 69 69 2528 LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 2 of 102
5 4 3 2 1
A
PCH Strapping Huron River Schematic Checklist Rev.0_7
B C
Processor Strapping D
Huron River Schematic Checklist Rev.0_7
E
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with CFG[2] PCI-Express Static 1: Normal Operation.
8.2-kȍ Lane Reversal 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ... 1
- 10-kȍ weak pull-up resistor.
INIT3_3V# Weak internal pull-up. Leave as "No Connect".
Disabled - No Physical Display Port attached to
GNT3#/GPIO55 GNT[3:0]# functionality is not available on Mobile. CFG[4] 1: Embedded DisplayPort.
4 GNT2#/GPIO53
GNT1#/GPIO51
Mobile: Used as GPIO only
Pull-up resistors are not required on these signals.
Enabled - An external Display Port device is
0: connectd to the EMBEDDED display Port
0
4
If pull-ups are used, they should be tied to the Vcc3_3power rail.
CFG[6:5] PCI-Express 11 : x16 - Device 1 functions 1 and 2 disabled
Enable Danbury: Connect to Vcc3_3 with 8.2-k? weak pull-up resistor. Port Bifurcation 10 : x8, x8 - Device 1 function 1 enabled ;
SPI_MOSI
Straps function 2 disabled 11
Disable Danbury:Left floating, no pull-down required. 01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
Enable Danbury: Connect to +NVRAM_VCCQ with 8.2-kohm enabled
weak pull-up resistor [CRB has it pulled up
NV_ALE with 1-kohm no-stuff resistor] CFG[7] PEG DEFER TRAINING 1: PEG Train immediately following xxRESETB de assertion
1
0: PEG Wait for BIOS for training
Disable Danbury:Leave floating (internal pull-down)
NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features. Voltage Rails
HAD_DOCK_EN# High (1) - Security measure defined in the Flash Descriptor will be enabled. POWER PLANE VOLTAGE DESCRIPTION
ACTIVE IN
/GPIO[33] Platform design should provide appropriate pull-up or pull-down depending on 5V_S0 5V
3 the desired settings. If a jumper option is used to tie this signal to GND as
required by the functional strap, the signal should be pulled low through a weak
3D3V_S0
1D8V_S0
3.3V
1.8V
3
1D5V_S0 1.5V
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. 1D05V_VTT 1.05V
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal 0D85V_S0 0.95 - 0.85V
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for 0D75V_S0 0.75V
VCC_CORE 0.35V to 1.5V S0
strapping functions. VCC_GFXCORE 0.4 to 1.25V
1D8V_VGA_S0 1.8V CPU Core Rail
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. 3D3V_VGA_S0 3.3V Graphics Core Rail
1V_VGA_S0 1V
HDA_SYNC Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no 5V_USBX_S3 5V
GPIO15 1D5V_S3 1.5V S3
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher DDR_VREF_S3 0.75V
suite with confidentiality
Note : This is an un-muxed signal.
BT+ 6V-14.1V AC Brick Mode only
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. DCBATOUT 6V-14.1V
Sampled at rising edge of RSMRST#. 5V_S5 5V All S states
CRB has a 1-kohm pull-up on this signal to +3.3VA rail. 5V_AUX_S5 5V
3D3V_S5 3.3V
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down 3D3V_AUX_S5 3.3V
GPIO8 using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of 3D3V_LAN_S5 3.3V WOL_EN Legacy WOL
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
2 Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states
2
GPIO27
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter Powered by Li Coin Cell in G3
3D3V_AUX_S5 3.3V G3, Sx and +V3ALW in Sx
circuits for analog rails.
USB Table
Pair Device
SMBus ADDRESSES
PCIE Routing 0 Touch Panel / 3G SIM
1 USB Ext. port 1 (HS) I2 C / SMBus Addresses
HURON RIVER ORB
2 Fingerprint Device Ref Des Address Hex Bus
LANE1 Mini Card2(WWAN)
3 BLUETOOTH
EC SMBus 1 BAT_SCL/BAT_SDA
LANE2 Onboard LAN SATA Table 4 Mini Card2 (WWAN) Battery BAT_SCL/BAT_SDA
CHARGER BAT_SCL/BAT_SDA
LANE3 Card Reader 5 CARD READER
SATA EC SMBus 2 SML1_CLK/SML1_DATA
6 X PCH
Pair Device SML1_CLK/SML1_DATA
LANE4 Mini Card1(WLAN) 7 X eDP SML1_CLK/SML1_DATA
1 LANE5 USB3.0 0 HDD1 8 USB Ext. port 4 / E-SATA /USB CHARGER
BOM
1
1 HDD2 9 USB Ext. port 2 PCH SMBus
Wistron Corporation
PCH_SMBDATA/PCH_SMBCLK 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LANE6 Intel GBE LAN 2 N/A 10 USB Ext. port 3 SO-DIMMA (SPD) PCH_SMBDATA/PCH_SMBCLK Taipei Hsien 221, Taiwan, R.O.C.
SO-DIMMB (SPD) PCH_SMBDATA/PCH_SMBCLK
Digital Pot PCH_SMBDATA/PCH_SMBCLK Title
LANE7 Dock 3 N/A 11 Mini Card1 (WLAN) G-Sensor PCH_SMBDATA/PCH_SMBCLK
4 ODD 12 CAMERA MINI PCH_SMBDATA/PCH_SMBCLK Table of Content
Size Document Number Rev
LANE8 New Card 5 ESATA 13 New Card A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 3 of 102
A B C D E
5
SSID = CPU 4 3 2 1
Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
1D05V_VTT
CPU1A 1 OF 9
J22 PEG_IRCOMP_R R401 1 2 24D9R2F-L-GP
PEG_ICOMPI
Note:
19 DMI_TXN[3:0] DMI_TXN0 B27
SANDY PEG_ICOMPO
J21
H22
DMI_RX#0 PEG_RCOMPO
D Intel DMI supports both Lane
Reversal and polarity inversion
DMI_TXN1
DMI_TXN2
DMI_TXN3
B25
A25
B24
DMI_RX#1
DMI_RX#2
K33 PEG_RXN15
PEG_RXN[0..15]
PEG_RXN[0..15] 83
D
DMI_RX#3 PEG_RX#0 PEG_RXN14
but only at PCH side. This is 19 DMI_TXP[3:0] PEG_RX#1
M35
DMI_TXP0 B28 L34 PEG_RXN13
enabled via a soft strap. DMI_TXP1 DMI_RX0 PEG_RX#2 PEG_RXN12
B26 J35
DMI_RX1 PEG_RX#3
DMI
DMI_TXP2 A24 J32 PEG_RXN11
DMI_TXP3 DMI_RX2 PEG_RX#4 PEG_RXN10
B23 H34
DMI_RX3 PEG_RX#5 PEG_RXN9
H31
19 DMI_RXN[3:0] DMI_RXN0 PEG_RX#6 PEG_RXN8
G21 G33
DMI_RXN1 DMI_TX#0 PEG_RX#7 PEG_RXN7
E22 G30
DMI_RXN2 DMI_TX#1 PEG_RX#8 PEG_RXN6
F21 F35
DMI_RXN3 DMI_TX#2 PEG_RX#9 PEG_RXN5
D21 E34
DMI_TX#3 PEG_RX#10 PEG_RXN4
E32
19 DMI_RXP[3:0] DMI_RXP0 PEG_RX#11 PEG_RXN3
G22 D33
DMI_RXP1 DMI_TX0 PEG_RX#12 PEG_RXN2
D22 D31
DMI_TX1 PEG_RX#13
Intel(R) FDI
Intel FDI supports both Lane F18 G31
FDI_TXN4 FDI0_TX#3 PEG_RX6 PEG_RXP8
B21 F33
Reversal and polarity inversion FDI_TXN5 FDI1_TX#0 PEG_RX7 PEG_RXP7
C20 F30
FDI_TXN6 FDI1_TX#1 PEG_RX8 PEG_RXP6
but only at PCH side. This is D18
FDI1_TX#2 PEG_RX9
E35
FDI_TXN7 PEG_RXP5
C enabled via a soft strap. E17
FDI1_TX#3 PEG_RX10
PEG_RX11
E33
F32
D34
PEG_RXP4
PEG_RXP3
NOTE.
If PEG is not implemented, the RX&TX pairs can be left as No Connect
C
19 FDI_TXP[7:0] FDI_TXP0 PEG_RX12 PEG_RXP2
A22 E31
FDI_TXP1 FDI0_TX0 PEG_RX13 PEG_RXP1
G19 C33
FDI_TXP2 FDI0_TX1 PEG_RX14 PEG_RXP0 PEG_TXN[0..15]
E20 B32 PEG Static Lane Reversal
FDI_TXP3 FDI0_TX2 PEG_RX15 PEG_TXN[0..15] 83
G18
FDI_TXP4 FDI0_TX3 PEG_C_TXN15 C401 SCD1U10V2KX-5GP PEG_TXN15
B20
FDI1_TX0 PEG_TX#0
M29 OPS
2 1
FDI_TXP5 C19 M32 PEG_C_TXN14 OPS
2 1 C402 SCD1U10V2KX-5GP PEG_TXN14
FDI_TXP6 FDI1_TX1 PEG_TX#1 PEG_C_TXN13 C403 SCD1U10V2KX-5GP PEG_TXN13
D19
FDI1_TX2 PEG_TX#2
M31 OPS
2 1
FDI_TXP7 F17 L32 PEG_C_TXN12 OPS
2 1 C404 SCD1U10V2KX-5GP PEG_TXN12
FDI1_TX3 PEG_TX#3 PEG_C_TXN11 C405 SCD1U10V2KX-5GP PEG_TXN11
PEG_TX#4
L29 OPS
2 1
J18 K31 PEG_C_TXN10 OPS
2 1 C406 SCD1U10V2KX-5GP PEG_TXN10
19 FDI_FSYNC0 FDI0_FSYNC PEG_TX#5
Note: J17 K28 PEG_C_TXN9 OPS
2 1 C407 SCD1U10V2KX-5GP PEG_TXN9
19 FDI_FSYNC1 FDI1_FSYNC PEG_TX#6 PEG_C_TXN8 PEG_TXN8
J30 OPS
2 1 C408 SCD1U10V2KX-5GP
Lane reversal does not apply to PEG_TX#7 PEG_C_TXN7 C409 SCD1U10V2KX-5GP PEG_TXN7
19 FDI_INT H20
FDI_INT PEG_TX#8
J28 OPS
2 1
FDI sideband signals. H29 PEG_C_TXN6 OPS
2 1 C410 SCD1U10V2KX-5GP PEG_TXN6
PEG_TX#9 PEG_C_TXN5 C411 SCD1U10V2KX-5GP PEG_TXN5
19 FDI_LSYNC0 J19
FDI0_LSYNC PEG_TX#10
G27 OPS
2 1
H17 E29 PEG_C_TXN4 OPS
2 1 C412 SCD1U10V2KX-5GP PEG_TXN4
19 FDI_LSYNC1 FDI1_LSYNC PEG_TX#11
F27 PEG_C_TXN3 OPS
2 1 C413 SCD1U10V2KX-5GP PEG_TXN3
PEG_TX#12 PEG_C_TXN2 C414 SCD1U10V2KX-5GP PEG_TXN2
PEG_TX#13
D28 OPS
2 1
1D05V_VTT F26 PEG_C_TXN1 OPS
2 1 C415 SCD1U10V2KX-5GP PEG_TXN1
PEG_TX#14 PEG_C_TXN0 C416 SCD1U10V2KX-5GP PEG_TXN0
PEG_TX#15
E25 OPS
2 1
R402 1 2 24D9R2F-L-GP DP_COMP A18 PEG_TXP[0..15]
EDP_COMPIO PEG_C_TXP15 C417 SCD1U10V2KX-5GP PEG_TXP15 PEG_TXP[0..15] 83
A17
EDP_ICOMPO PEG_TX0
M28 OPS
2 1
R403 1 2 eDP_HPD B16 M33 PEG_C_TXP14 OPS
2 1 C418 SCD1U10V2KX-5GP PEG_TXP14
Do Not Stuff EDP_HPD PEG_TX1 PEG_C_TXP13 C419 SCD1U10V2KX-5GP PEG_TXP13
PEG_TX2
M30 OPS
2 1
DY L31 PEG_C_TXP12 OPS
2 1 C420 SCD1U10V2KX-5GP PEG_TXP12
PEG_TX3 PEG_C_TXP11 C421 SCD1U10V2KX-5GP PEG_TXP11
C15
EDP_AUX PEG_TX4
L28 OPS
2 1
D15 K30 PEG_C_TXP10 OPS
2 1 C422 SCD1U10V2KX-5GP PEG_TXP10
B Signal Routing Guideline:
EDP_ICOMPO keep W/S=12/15 mils and routing
EDP_AUX#
eDP PEG_TX5
PEG_TX6
PEG_TX7
K27
J29
PEG_C_TXP9
PEG_C_TXP8
OPS
2
OPS
2
1
1
C423
C424
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PEG_TXP9
PEG_TXP8
B
C17 J27 PEG_C_TXP7 OPS
2 1 C425 SCD1U10V2KX-5GP PEG_TXP7
length less than 500 mils. EDP_TX0 PEG_TX8 PEG_C_TXP6 C426 SCD1U10V2KX-5GP PEG_TXP6
F16
EDP_TX1 PEG_TX9
H28 OPS
2 1
EDP_COMPIO keep W/S=4/15 mils and routing C16 G28 PEG_C_TXP5 OPS
2 1 C427 SCD1U10V2KX-5GP PEG_TXP5
EDP_TX2 PEG_TX10 PEG_C_TXP4 C428 SCD1U10V2KX-5GP PEG_TXP4
length less than 500 mils. G15
EDP_TX3 PEG_TX11
E28 OPS
2 1
F28 PEG_C_TXP3 OPS
2 1 C429 SCD1U10V2KX-5GP PEG_TXP3
PEG_TX12 PEG_C_TXP2 C430 SCD1U10V2KX-5GP PEG_TXP2
C18
EDP_TX#0 PEG_TX13
D27 OPS
2 1
E16 E26 PEG_C_TXP1 OPS
2 1 C431 SCD1U10V2KX-5GP PEG_TXP1
EDP_TX#1 PEG_TX14 PEG_C_TXP0 C432 SCD1U10V2KX-5GP PEG_TXP0
D16
EDP_TX#2 PEG_TX15
D25 OPS
2 1
NOTE. F15
EDP_TX#3
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
62.10055.321
A Wistron Corporation
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (PCIE/DMI/FDI)
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 4 of 102
5 4 3 2 1
5
SSID = CPU 4 3 2 Disabling Guidelines:
If motherboard only supports external graphics:
1
CPU1B 2 OF 9
Connect DPLL_REF_SSCLK on Processor to GND through
SANDY 1K +/- 5% resistor.
Connect DPLL_REF_SSCLK# on Processor to VCCP
A28
MISC
CLOCKS
BCLK CLK_EXP_P 20 through 1K +/- 5% resistorpower (~15 mW) may be
18 H_SNB_IVB# C26 A27 CLK_EXP_N 20
1D05V_VTT SNB_IVB# BCLK#
wasted.
RN502
R501 1 SKTOCC#_R AN34 CLK_DP_N_R 1 4
Do Not Stuff TP501 SKTOCC# 1D05V_VTT
1 2 H_PROCHOT# A16 CLK_DP_P_R CLK_DP_P_R 2 3
CLK_DP_P_R 20
1
DPLL_REF_SSCLK CLK_DP_N_R
A15 CLK_DP_N_R 20
62R2J-GP C502 DPLL_REF_SSCLK#
Do Not Stuff
D SC47P50V2JN-3GP
DY D
2
1 H_CATERR# AL33
Do Not Stuff TP502 CATERR#
THERMAL
1R502 2
AN33 R8 4K99R2F-L-GP SM_DRAMRST# 37
22,27 H_PECI PECI SM_DRAMRST#
DDR3
MISC
R513
27,42 H_PROCHOT# 1 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0R506 1 2 140R2F-GP 20100722 SA confirm.
PROCHOT# SM_RCOMP0 SM_RCOMP_1R507 1
A5 2 25D5R2F-GP
56R2J-4-GP SM_RCOMP1 SM_RCOMP_2R508 1
A4 2 200R2F-L-GP
SM_RCOMP2
Connect EC to PROCHOT# through inverting OD buffer.
22,36 H_THERMTRIP# AN32
THERMTRIP#
Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.
PWR MANAGEMENT
TCK
3D3V_S0
XDP_PREQ#
XDP_PREQ# 11
XDP_PRDY# XDP_DBRESET# 1 2
XDP_PRDY# 11
R516 1KR2J-1-GP
20100722 follow Astro add buffer XDP_BPM0 XDP_BPM0 11
XDP_BPM1
XDP_BPM1 11
XDP_BPM2 XDP_BPM2 11
XDP_BPM3
3D3V_S0 1D05V_VTT XDP_BPM3 11
XDP_BPM4
B DY
XDP_BPM5
XDP_BPM6
XDP_BPM4
XDP_BPM5
XDP_BPM6
11
11
11
B
DY XDP_BPM7
XDP_BPM7 11
1
1
Do Not Stuff
C503
DY R512 XDP_TDO XDP_TDO 11
Do Not Stuff XDP_TDI XDP_TDI 11
2
U501 XDP_TRST#
XDP_TRST# 11
XDP_TCLK
XDP_TCLK 11
2
1 5 XDP_TMS
NC#1 VCC XDP_TMS 11
,18,27,31,35,36,65,66,71,83,97 PLT_RST# 2
A BUFO_CPU_RST# BUF_CPU_RST# XDP_DBRESET#
3 4 1 R510 2 XDP_DBRESET# 11,19
GND Y
1K5R2F-2-GP
1
Do Not Stuff
R509
R517 750R2F-GP
1 2
2
0R2J-2-GP
A BOM
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (THERMAL/CLOCK/PM )
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 5 of 102
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1C 3 OF 9 CPU1D 4 OF 9
SANDY
AB6
SANDY AE2
M_A_DQ[63:0] SA_CLK0 M_A_DIM0_CLK_DDR0 14 M_B_DQ[63:0] SB_CLK0 M_B_DIM0_CLK_DDR0 15
14 M_A_DQ[63:0] AA6 AD2
M_A_DQ0 SA_CLK#0 M_A_DIM0_CLK_DDR#0 14 15 M_B_DQ[63:0] M_B_DQ0 SB_CLK#0 M_B_DIM0_CLK_DDR#0 15
C5 V9 C9 R9
M_A_DQ1 SA_DQ0 SA_CKE0 M_A_DIM0_CKE0 14 M_B_DQ1 SB_DQ0 SB_CKE0 M_B_DIM0_CKE0 15
D D5 A7 D
M_A_DQ2 SA_DQ1 M_B_DQ2 SB_DQ1
D3 D10
M_A_DQ3 SA_DQ2 M_B_DQ3 SB_DQ2
D2 C8
M_A_DQ4 SA_DQ3 M_B_DQ4 SB_DQ3
D6 AA5 A9 AE1
M_A_DQ5 SA_DQ4 SA_CLK1 M_A_DIM0_CLK_DDR1 14 M_B_DQ5 SB_DQ4 SB_CLK1 M_B_DIM0_CLK_DDR1 15
C6 AB5 A8 AD1
M_A_DQ6 SA_DQ5 SA_CLK#1 M_A_DIM0_CLK_DDR#1 14 M_B_DQ6 SB_DQ5 SB_CLK#1 M_B_DIM0_CLK_DDR#1 15
C2 V10 D9 R10
M_A_DQ7 SA_DQ6 SA_CKE1 M_A_DIM0_CKE1 14 M_B_DQ7 SB_DQ6 SB_CKE1 M_B_DIM0_CKE1 15
C3 D8
M_A_DQ8 SA_DQ7 M_B_DQ8 SB_DQ7
F10 G4
M_A_DQ9 SA_DQ8 M_B_DQ9 SB_DQ8
F8 F4
M_A_DQ10 SA_DQ9 M_B_DQ10 SB_DQ9
G10 AB4 F1 AB2
M_A_DQ11 SA_DQ10 SA_CLK2 M_B_DQ11 SB_DQ10 SB_CLK2
G9 AA4 G1 AA2
M_A_DQ12 SA_DQ11 SA_CLK#2 M_B_DQ12 SB_DQ11 SB_CLK#2
F9 W9 G5 T9
M_A_DQ13 SA_DQ12 SA_CKE2 M_B_DQ13 SB_DQ12 SB_CKE2
F7 F5
M_A_DQ14 SA_DQ13 M_B_DQ14 SB_DQ13
G8 F2
M_A_DQ15 SA_DQ14 M_B_DQ15 SB_DQ14
G7 G2
M_A_DQ16 SA_DQ15 M_B_DQ16 SB_DQ15
K4 AB3 J7 AA1
M_A_DQ17 SA_DQ16 SA_CLK3 M_B_DQ17 SB_DQ16 SB_CLK3
K5 AA3 J8 AB1
M_A_DQ18 SA_DQ17 SA_CLK#3 M_B_DQ18 SB_DQ17 SB_CLK#3
K1 W10 K10 T10
M_A_DQ19 SA_DQ18 SA_CKE3 M_B_DQ19 SB_DQ18 SB_CKE3
J1 K9
M_A_DQ20 SA_DQ19 M_B_DQ20 SB_DQ19
J5 J9
M_A_DQ21 SA_DQ20 M_B_DQ21 SB_DQ20
J4 J10
M_A_DQ22 SA_DQ21 M_B_DQ22 SB_DQ21
J2 AK3 K8 AD3
M_A_DQ23 SA_DQ22 SA_CS#0 M_A_DIM0_CS#0 14 M_B_DQ23 SB_DQ22 SB_CS#0 M_B_DIM0_CS#0 15
K2 AL3 K7 AE3
M_A_DQ24 SA_DQ23 SA_CS#1 M_A_DIM0_CS#1 14 M_B_DQ24 SB_DQ23 SB_CS#1 M_B_DIM0_CS#1 15
M8 AG1 M5 AD6
M_A_DQ25 SA_DQ24 SA_CS#2 M_B_DQ25 SB_DQ24 SB_CS#2
N10 AH1 N4 AE6
M_A_DQ26 SA_DQ25 SA_CS#3 M_B_DQ26 SB_DQ25 SB_CS#3
N8 N2
M_A_DQ27 SA_DQ26 M_B_DQ27 SB_DQ26
N7 N1
M_A_DQ28 SA_DQ27 M_B_DQ28 SB_DQ27
M10 M4
M_A_DQ29 SA_DQ28 M_B_DQ29 SB_DQ28
M9 AH3 N5 AE4
SA_DQ29 SA_ODT0 M_A_DIM0_ODT0 14 SB_DQ29 SB_ODT0 M_B_DIM0_ODT0 15
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (DDR)
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 6 of 102
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1E 5 OF 9
L7
RSVD#L7
AG7
CFG0 RSVD#AG7
AK28 SANDY AE7
11 CFG0 CFG0 RSVD#AE7
AK29 AK2
CFG2 CFG1 RSVD#AK2
AL26 W8
CFG2 RSVD#W8
AL27
CFG4 CFG3
AK26
CFG5 CFG4
AL29 AT26
CFG6 CFG5 RSVD#AT26
AL30 AM33
CFG7 CFG6 RSVD#AM33
AM31 AJ27
CFG7 RSVD#AJ27
AM32
CFG8
AM30
CFG9
AM28
CFG10
D AM26 D
CFG11
AN28
CFG12
AN31 T8
CFG13 RSVD#T8
AN26 J16
CFG14 RSVD#J16
AM27 H16
CFG15 RSVD#H16
AK31 G16
CFG16 RSVD#G16
AN29
CFG17
AR35
RSVD#AR35
AJ31 AT34
RSVD#AJ31 RSVD#AT34
AH31 AT33
RSVD#AH31 RSVD#AT33
SB_0923'10 AJ33
RSVD#AJ33 RSVD#AP35
AP35
AH33 AR34
RSVD#AH33 RSVD#AR34
AJ26
M3 - Processor Generated SO-DIMM VREF_DQ RSVD#AJ26
RESERVED
B4:VREF_DQ CHA
R708 1
DY RSVD#B34
B34
14,37 M_VREF_DQ_DIMM0 DY 2 Do Not Stuff M_VREF_DQ_DIMM0_C B4 A33
R709 1 RSVD#B4 RSVD#A33
15 M_VREF_DQ_DIMM1 2 Do Not Stuff M_VREF_CA_DIMM0_C D1 A34
RSVD#D1 RSVD#A34
B35
RSVD#B35
D1:VREF_DQ CHB RSVD#C35
C35
1
1
F25
R711 R712 RSVD#F25
F24
RSVD#F24
F23
1KR2F-3-GP 1KR2F-3-GP RSVD#F23
D24 AJ32
R707 1 RSVD#D24 RSVD#AJ32
14 M_VREF_CA_DIMM0 DY 2 Do Not Stuff G25 AK32
2
J20
RSVD#J20
B18 AT2
R710 1 RSVD#B18 RSVD#AT2
DY 2 Do Not Stuff H_VCCP_SEL A19 AT1
RSVD#A19 RSVD#AT1
AR1
RSVD#AR1
20100725 J15
RSVD#J15
CFG2
B B
1
0:Lane Reversed
CFG4
CFG5
Do Not Stuff
A A
CFG7
BOM
1
Title
CPU (RESERVED)
Size Document Number Rev
A2
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 7 of 102
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1F POWER 6 OF 9
VCCIO Output Decoupling Recommendation:
2 x 330 uF (3 x 330 uF for 2012 capable designs)
5 x 22 uF & 5 x 0805 no-stuff at Bottom
VCC_CORE SANDY 7 x 22 uF & 2 x 0805 no-stuff at Top
PROCESSOR CORE POWER 1D05V_VTT
53A AG35
AG34
VCC
AH13
VCC_CORE VCC VCCIO
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AG33 AH10
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
VCC VCCIO
C805
C806
C807
C808
C809
C810
C838
C839
C840
C841
D AG32 AG10 D
VCC VCCIO
1
AG31 AC10
VCC VCCIO
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AG30 Y10
VCC VCCIO
C801
C802
C803
C804
C811
AG29 U10
2
VCC VCCIO
1
1
AG28
VCC VCCIO
P10 DY DY
AG27
VCC VCCIO
L10 DY DY
AG26 J14
2
2
VCC VCCIO
AF35 J13
VCC VCCIO
AF34 J12
VCC VCCIO
AF33 J11
VCC VCCIO
AF32 H14
VCC VCCIO
AF31 H12
VCC VCCIO
AF30 H11
VCC VCCIO
AF29 G14
VCC VCCIO
AF28
VCC VCCIO
G13 No-stuff sites outside the socket may be removed.
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C817
C818
C819
C820
AF26 F14
VCC VCCIO
1
1 AD35
VCC VCCIO
F13
AD34 F12
VCC VCCIO
AD33 F11
2
VCC VCCIO
AD32 E14
VCC VCCIO 1D05V_VTT
AD31 E12
VCC VCCIO
AD30
VCC
AD29 E11
VCC VCCIO
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AD28 D14
Do Not Stuff
Do Not Stuff
VCC VCCIO
C812
C813
C814
C829
C830
C842
C843
C844
C845
AD27 D13
VCC VCCIO
1
AD26 D12
VCC VCCIO
AC35 D11
VCC VCCIO
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AC34 C14
2
VCC VCCIO
C816
C821
C822
C823
C824
C825
C826
C827
AC33
VCC VCCIO
C13 DY DY
1
1
AC32 C12
VCC VCCIO
C AC31 C11 C
VCC VCCIO
AC30 B14
2
2 VCC VCCIO
AC29 B12
VCC VCCIO
AC28 A14
VCC VCCIO
AC27 A13
VCC VCCIO
AC26 A12
VCC VCCIO
AA35 A11
VCC VCCIO
AA34
VCC
AA33 J23
VCC VCCIO
AA32
VCC
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AA31
VCC
C837
C836
C835
C834
C833
C832
C831
C828
AA30
VCC R804 need to close to CPU
1
AA29
VCC
AA28
VCC 1D05V_VTT
AA27
2
VCC
AA26
VCC
CORE SUPPLY
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC R804
Y30 H_CPU_SVIDDAT 1 2 130R2F-1-GP
VCC
Y29
VCC
Y28
VCC
VCC Output Decoupling Recommendation: Y27
VCC
S-HS_20100610 V1.0
4 x 470 uF at Bottom Socket Edge Y26
VCC
V35
VCC
SVID
8 x 22 uF at Top Socket Cavity V34 AJ29 H_CPU_SVIDALRT# R803 1 2 43R2J-GP
VCC VIDALERT# VR_SVID_ALERT# 42
8 x 22 uF at Top Socket Edge V33
VCC VIDSCLK
AJ30 H_CPU_SVIDCLK
H_CPU_SVIDCLK 42
8 x 22 uF at Bottom Socket Cavity V32 AJ28 H_CPU_SVIDDAT
VCC VIDSOUT H_CPU_SVIDDAT 42
V31
VCC
B V30 B
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC VCC_CORE
R35
VCC
R34
VCC
R33
VCC R801, R802 need to close to CPU
1
R32
VCC R801
R31
VCC 100R2F-L1-GP-U
R30
VCC
R29
VCC
SENSE LINES
R28
2
VCC
R27 AJ35 VCCSENSE 42
VCC VCC_SENSE
R26 AJ34 VSSSENSE 42
VCC VSS_SENSE
P35
VCC
1
P34
VCC R802
P33
VCC 100R2F-L1-GP-U
P32 B10 VCCIO_SENSE 45
VCC VCCIO_SENSE
P31 A10 VSSIO_SENSE 45
VCC VSSIO_SENSE
P30
2
VCC
A P29 A
VCC
P28 BOM
VCC
P27
VCC
P26
VCC
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (VCC_CORE)
Size Document Number Rev
Custom
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 8 of 102
5 4 3 2 1
5 4 3 2 1
1
VCC_GFXCORE
CPU1G 7 OF 9 R906
100R2F-L1-GP-U
PROCESSOR VAXG: 24A
SENSE
LINES
AT24 AK35 VCC_AXG_SENSE 42
2
VAXG VAXG_SENSE VCC_AXG_SENSE
D AT23 AK34 D
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VAXG VSSAXG_SENSE VSS_AXG_SENSE 42
Do Not Stuff
Do Not Stuff
VSS_AXG_SENSE
C901
C902
C903
C904
C905
C906
AT21 SANDY
1
VAXG
AT20
VAXG
AT18 Refer to the latest Huron River Mainstream PDG
1
VAXG
DY AT17 (Doc# 436735) for more details on S3 power
2
VAXG R907
DY AR24
VAXG reduction implementation.
AR23 100R2F-L1-GP-U
VAXG
AR21
VAXG +V_SM_VREF_CNT should have 10 mil trace width
AR20
2
VREF
VAXG
AR18
VAXG
AR17
VAXG +V_SM_VREF_CNT
AP24 AL1
VAXG SM_VREF +V_SM_VREF_CNT 37
AP23
VAXG
AP21
VAXG
AP20
VAXG S-HR_20100609 V1.0
AP18
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VAXG
C907
C908
C918
C919
C920
C921
AP17
1
1
VAXG
AN24
VAXG
Routing Guideline:
AN23 Power from DDR_VREF_S3 and +V_SM_VREF_CNT
VAXG
AN21
2
2
VAXG should have 10 mils trace width. 1D5V_DDR_S0
AN20
GRAPHICS
VAXG
AM24 AF7
VAXG VDDQ
AM23 AF4
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VAXG VDDQ
Do Not Stuff
Do Not Stuff
C909
C910
C911
C912
C913
C914
AM21 AF1
1
VAXG VDDQ
AM20 AC7
VAXG VDDQ
AM18 AC4
VAXG VDDQ
AM17 AC1
2
C VAXG VDDQ C
AL24
VAXG VDDQ
Y7 DY DY
AL23 Y4
VAXG VDDQ
AL21 Y1
VAXG VDDQ
AL20 U7
VAXG VDDQ
AL18 U4
VAXG VDDQ
AL17
VAXG VDDQ
U1 VDDQ Output Decoupling Recommendation:
AK24 P7 1 x 330 uF
VAXG VDDQ 0D85V_S0
AK23 P4
VAXG VDDQ 6 x 10 uF
AK21 P1
VAXG VDDQ
AK20
VAXG
AK18
VAXG PROCESSOR VCCSA: 6A
AK17
VAXG
AJ24
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VAXG
Do Not Stuff
C916
C915
C917
AJ23
1
VAXG
AJ21
VAXG TC903
AJ20
VAXG DY
AJ18 ST330U2VDM-4-GP
2
VAXG
AJ17
VAXG
AH24
SA RAIL
VAXG
AH23
VAXG
AH21
VAXG VCCSA
M27 VCCSA Output Decoupling Recommendation:
AH20 M26 1 x 330 uF
VAXG VCCSA
Disabling Guidelines for External Graphics Designs: AH18
VAXG VCCSA
L26
AH17 J26 2 x 10 uF at Bottom Socket Cavity
Can connect to GND if motherboard only supports external VAXG VCCSA
VCCSA
J25 1 x 10 uF at Bottom Socket Edge
graphics and if GFX VR is not stuffed. J24 0D85V_S0
VCCSA
Can be left floating (Gfx VR keeps VAXG rail from floating) VCCSA
H26
if the VR is stuffed H25
1
VCCSA
1.8V RAIL
B B
R902 Notice:pull-high 100k or 10k
1D8V_S0 100R2F-L1-GP-U
2
B6 H23 VCCSA_SENSE
MISC
VCCPLL VCCSA_SENSE VCCSA_SENSE 48
A6
SC1U10V2KX-1GP
SC10U6D3V5KX-1GP
VCCPLL
Do Not Stuff
C923
C922
C924
A2
1
VCCPLL
TC902 C22 H_FC_C22
FC_C22 VCCSA_SEL H_FC_C22 48
C24
ST330U2VDM-4-GP
2
VCCSA_VID1 VCCSA_SEL 48
DY
2
1
RN901
SRN1KJ-7-GP
20100721 standard schematic update
3
4
VCCPLL Output Decoupling Recommendation:
1 x 330 uF
2 x 1 uF
1 x 10 uF
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (VCC_GFXCORE)
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 9 of 102
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1H 8 OF 9 CPU1I 9 OF 9
AT35 AJ22
VSS VSS
AT32 AJ19
VSS VSS
AT29 AJ16 T35 SANDY F22
VSS VSS VSS VSS
AT27 AJ13 T34 F19
VSS VSS VSS VSS
AT25 AJ10 T33 E30
VSS VSS VSS VSS
AT22 AJ7 T32 E27
VSS VSS VSS VSS
D AT19 AJ4 T31 E24 D
VSS VSS VSS VSS
AT16 AJ3 T30 E21
VSS VSS VSS VSS
AT13
AT10
VSS SANDY VSS
AJ2
AJ1
T29
T28
VSS VSS
E18
E15
VSS VSS VSS VSS
AT7 AH35 T27 E13
VSS VSS VSS VSS
AT4 AH34 T26 E10
VSS VSS VSS VSS
AT3 AH32 P9 E9
VSS VSS VSS VSS
AR25 AH30 P8 E8
VSS VSS VSS VSS
AR22 AH29 P6 E7
VSS VSS VSS VSS
AR19 AH28 P5 E6
VSS VSS VSS VSS
AR16 AH26 P3 E5
VSS VSS VSS VSS
AR13 AH25 P2 E4
VSS VSS VSS VSS
AR10 AH22 N35 E3
VSS VSS VSS VSS
AR7 AH19 N34 E2
VSS VSS VSS VSS
AR4 AH16 N33 E1
VSS VSS VSS VSS
AR2 AH7 N32 D35
VSS VSS VSS VSS
AP34 AH4 N31 D32
VSS VSS VSS VSS
AP31 AG9 N30 D29
VSS VSS VSS VSS
AP28 AG8 N29 D26
VSS VSS VSS VSS
AP25 AG4 N28 D20
VSS VSS VSS VSS
AP22 AF6 N27 D17
VSS VSS VSS VSS
AP19 AF5 N26 C34
VSS VSS VSS VSS
AP16 AF3 M34 C31
VSS VSS VSS VSS
AP13 AF2 L33 C28
VSS VSS VSS VSS
AP10 AE35 L30 C27
VSS VSS VSS VSS
AP7 AE34 L27 C25
VSS VSS VSS VSS
AP4 AE33 L9 C23
VSS VSS VSS VSS
AP1 AE32 L8 C10
VSS VSS VSS VSS
AN30 AE31 L6 C1
C VSS VSS VSS VSS C
AN27 AE30 L5 B22
VSS VSS VSS VSS
AN25 AE29 L4 B19
AN22
AN19
VSS
VSS
VSS
VSS VSS
VSS
VSS
AE28
AE27
L3
L2
VSS
VSS
VSS
VSS VSS
VSS
VSS
B17
B15
AN16 AE26 L1 B13
VSS VSS VSS VSS
AN13 AE9 K35 B11
VSS VSS VSS VSS
AN10 AD7 K32 B9
VSS VSS VSS VSS
AN7 AC9 K29 B8
VSS VSS VSS VSS
AN4 AC8 K26 B7
VSS VSS VSS VSS
AM29 AC6 J34 B5
VSS VSS VSS VSS
AM25 AC5 J31 B3
VSS VSS VSS VSS
AM22 AC3 H33 B2
VSS VSS VSS VSS
AM19 AC2 H30 A35
VSS VSS VSS VSS
AM16 AB35 H27 A32
VSS VSS VSS VSS
AM13 AB34 H24 A29
VSS VSS VSS VSS
AM10 AB33 H21 A26
VSS VSS VSS VSS
AM7 AB32 H18 A23
VSS VSS VSS VSS
AM4 AB31 H15 A20
VSS VSS VSS VSS
AM3 AB30 H13 A3
VSS VSS VSS VSS
AM2 AB29 H10
VSS VSS VSS
AM1 AB28 H9
VSS VSS VSS
AL34 AB27 H8
VSS VSS VSS
AL31 AB26 H7
VSS VSS VSS
AL28 Y9 H6
VSS VSS VSS
AL25 Y8 H5
VSS VSS VSS
AL22 Y6 H4
VSS VSS VSS
AL19 Y5 H3
VSS VSS VSS
AL16 Y3 H2
VSS VSS VSS
AL13 Y2 H1
B VSS VSS VSS B
AL10 W35 G35
VSS VSS VSS
AL7 W34 G32
VSS VSS VSS
AL4 W33 G29
VSS VSS VSS
AL2 W32 G26
VSS VSS VSS
AK33 W31 G23
VSS VSS VSS
AK30 W30 G20
VSS VSS VSS
AK27 W29 G17
VSS VSS VSS
AK25 W28 G11
VSS VSS VSS
AK22 W27 F34
VSS VSS VSS
AK19 W26 F31
VSS VSS VSS
AK16 U9 F29
VSS VSS VSS
AK13 U8
VSS VSS
AK10 U6
VSS VSS
AK7 U5
VSS VSS
AK4 U3
VSS VSS
AJ25 U2
VSS VSS
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (VSS)
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 10 of 102
5 4 3 2 1
5 4 3 2 1
RN1102
C 1 4 C
CLK_XDP_ITP_P 7
2 3
DY CLK_XDP_ITP_N 7
Do Not Stuff
C1101
DY
2
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
XDP
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 11 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 12 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 13 of 102
5 4 3 2 1
5 4 3 2 1
DM2
SSID = MEMORY M_A_A0 98
A0 NP1
NP1
M_A_A1 97 NP2
M_A_A2 A1 NP2
M_A_A[15:0] 6 96
M_A_A3 A2
95 110 M_A_RAS# 6
DDR_VREF_S3 M_A_A4 A3 RAS#
92 113 M_A_WE# 6
M_A_A5 A4 WE#
91 115 M_A_CAS# 6
M_A_A6 A5 CAS# SA0_DIM0
2 90
A6 Note:
M_A_A7 86 114 M_A_DIM0_CS#0 6
R1405 M_A_A8 89
A7 CS0#
121 M_A_DIM0_CS#1 6 SA1_DIM0 If SA0 DIM0 = 0, SA1_DIM0 = 0
M_A_A9 A8 CS1#
Do Not Stuff
M_A_A10
85
A9 SO-DIMMA SPD Address is 0xA0
107 73 M_A_DIM0_CKE0 6
M_A_A11 A10/AP CKE0 SO-DIMMA TS Address is 0x30
84 74 M_A_DIM0_CKE1 6
1
A11 CKE1
1
D M_A_A12 83 D
M_VREF_CA_DIMM0 M_A_A13 A12 R1401 R1402
119 101 M_A_DIM0_CLK_DDR0 6
M_A_A14 A13 CK0 10KR2J-3-GP 10KR2J-3-GP If SA0 DIM0 = 1, SA1_DIM0 = 0
80 103 M_A_DIM0_CLK_DDR#0 6
M_A_A15 A14 CK0#
78 SO-DIMMA SPD Address is 0xA2
A15
1
1
79 102 M_A_DIM0_CLK_DDR1 6
2
6 M_A_BS2 A16/BA2 CK1
C1423 C1425 C1424 SO-DIMMA TS Address is 0x32
DY CK1#
104 M_A_DIM0_CLK_DDR#1 6
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
109
Do Not Stuff
2
2 6 M_A_BS0 BA0
6 M_A_BS1 108 11
BA1 DM0
6 M_A_DQ[63:0] 28
M_A_DQ0 DM1
5 46
M_A_DQ1 DQ0 DM2
7 63
M_A_DQ2 DQ1 DM3
15 136
M_A_DQ3 DQ2 DM4
17 153
M_A_DQ4 DQ3 DM5
4 170
M_A_DQ5 DQ4 DM6
6 187
M_A_DQ6 DQ5 DM7
16
DDR_VREF_S3 M_A_DQ7 DQ6
18 200 PCH_SMBDATA 15,20,65,66
M_A_DQ8 DQ7 SDA
21 202
M_A_DQ9 23
DQ8
DQ9
SCL PCH_SMBCLK 15,20,65,66 Thermal EVENT
2
DQ14 SA0
1
M_A_DQ15 36 201 SA1_DIM0 C1401 C1402
M_VREF_DQ_DIMM0 M_A_DQ16 DQ15 SA1
39
DQ16 DY
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP
M_A_DQ17 41 77
2
M_A_DQ18 DQ17 NC#1
51 122
DQ18 NC#2
1
SCD1U10V2KX-5GP
M_A_DQ21 42 75
Do Not Stuff
2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_A_DQ30
SC10U10V5ZY-1GP
68 100
Do Not Stuff
Do Not Stuff
Do Not Stuff
DQ30 VDD10
C1403
C1404
C1405
C1406
C1407
C1408
C1409
C1410
M_A_DQ31 70 105
DQ31 VDD11
1
M_A_DQ32 129 106 TC1401
Do Not Stuff
M_A_DQ33 DQ32 VDD12
M_A_DQ34
131
141
DQ33 VDD13
111
112
DY DY DY
2
M_A_DQ35 DQ34 VDD14
143 117
M_A_DQ36 DQ35 VDD15
130 118
M_A_DQ37 DQ36 VDD16
132
DQ37 VDD17
123 DY
M_A_DQ38 140 124
M_A_DQ39 DQ38 VDD18
142
M_A_DQ40 DQ39
147 2
M_A_DQ41 DQ40 VSS
149 3
DQ41 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_A_DQ42 157 8
DQ42 VSS
C1414
C1415
C1416
C1417
M_A_DQ43 159 9
DQ43 VSS
1
M_A_DQ44 146 13 Layout Note:
M_A_DQ45 DQ44 VSS
0D75V_S0 Place these caps 148
DQ45 VSS
14
Place these Caps near
M_A_DQ46 158 19
2
close to VTT1 and M_A_DQ47 160
DQ46 VSS
20 SO-DIMMA.
M_A_DQ48 DQ47 VSS
VTT2. M_A_DQ49
163
DQ48 VSS
25
165 26
M_A_DQ50 DQ49 VSS
175 31
DQ50 VSS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_A_DQ51 177 32
Do Not Stuff
Do Not Stuff
DQ51 VSS
C1419
C1420
C1421
C1422
M_A_DQ52 164 37
DQ52 VSS
1
B M_A_DQ53 166 38 B
C1418 M_A_DQ54 DQ53 VSS
174 43
DY DY DY M_A_DQ55 176
DQ54 VSS
44
Do Not Stuff
2
15,37 DDR3_DRAMRST# 30
RESET#
VSS
VSS
189
190 Wistron Corporation
195 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS Taipei Hsien 221, Taiwan, R.O.C.
196
VSS
0D75V_S0 203 205
VTT1 VSS Title
204 206
VTT2 VSS
DDR3-SODIMM1
Size Document Number Rev
H =4mm DDR3-204P-108-GP Custom
62.10017.X41 Main(62.10017.X41) LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 14 of 102
5 4 3 2 1
2nd = 62.10024.E01
5 4 3 2 1
M_B_A0 98 NP1
M_B_A1 A0 NP1
97 NP2
M_B_A2 A1 NP2
M_B_A[15:0] 6 96
M_B_A3 A2
95 110 M_B_RAS# 6
M_B_A4 A3 RAS#
92 113 M_B_WE# 6
M_B_A5 A4 WE#
91 115 M_B_CAS# 6
M_B_A6 A5 CAS#
90
M_B_A7 A6 3D3V_S0
86 114 M_B_DIM0_CS#0 6
M_B_A8 A7 CS0#
89 121 M_B_DIM0_CS#1 6
M_B_A9 A8 CS1#
85
M_B_A10 A9
107 73 M_B_DIM0_CKE0 6
A10/AP CKE0
1
D M_B_A11 84 74 M_B_DIM0_CKE1 6 D
M_B_A12 A11 CKE1 R1501
83
M_B_A13 A12 10KR2J-3-GP
119 101 M_B_DIM0_CLK_DDR0 6
M_B_A14 A13 CK0
M_B_A15
80
A14 CK0#
103 M_B_DIM0_CLK_DDR#0 6 Note:
78
2
79
A15
102 M_B_DIM0_CLK_DDR1 6
SO-DIMMB SPD Address is 0xA4
6 M_B_BS2 A16/BA2 CK1 SA1_DIM1
CK1#
104 M_B_DIM0_CLK_DDR#1 6 SO-DIMMB TS Address is 0x34
6 M_B_BS0 109
BA0 SA0_DIM1
6 M_B_BS1 108 11
BA1 DM0
6 M_B_DQ[63:0] 28
DDR_VREF_S3 M_B_DQ0 DM1
5
DQ0 DM2
46 SO-DIMMB is placed farther from
1
M_B_DQ1 7 63
M_B_DQ2 15
DQ1 DM3
136 R1502 the Processor than SO-DIMMA
M_B_DQ3 DQ2 DM4 10KR2J-3-GP
17 153
DQ3 DM5
2
M_B_DQ4 4 170
R1504 M_B_DQ5 DQ4 DM6
6 187
2
M_B_DQ6 DQ5 DM7
Do Not Stuff 16
M_B_DQ7 DQ6
18 200 PCH_SMBDATA 14,20,65,66
M_B_DQ8 DQ7 SDA
21 202 PCH_SMBCLK 14,20,65,66
1
M_B_DQ13 24
DQ13 DY
1
C1523 C1524 C1522 M_B_DQ14 SA0_DIM1
DY 34
DQ14 SA0
197
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DQ15 SA1
SCD1U10V2KX-5GP
M_B_DQ16 39
Do Not Stuff
2
2
M_B_DQ17 DQ16
41 77
M_B_DQ18 DQ17 NC#1
51 122
M_B_DQ19 DQ18 NC#2 1D5V_S3
53 125
M_B_DQ20 DQ19 NC#/TEST
40
M_B_DQ21 DQ20
C 42 75 C
M_B_DQ22 DQ21 VDD1
50 76
M_B_DQ23 DQ22 VDD2
52 81
DDR_VREF_S3 M_B_DQ24 DQ23 VDD3
57 82
M_B_DQ25 DQ24 VDD4
59 87
M_B_DQ26 DQ25 VDD5
67 88
M_B_DQ27 DQ26 VDD6
69 93
DQ27 VDD7
2
M_B_DQ28 56 94
R1503 M_B_DQ29 DQ28 VDD8
58 99
M_B_DQ30 DQ29 VDD9
Do Not Stuff 68 100
M_B_DQ31 DQ30 VDD10
70 105
M_B_DQ32 DQ31 VDD11
129 106
1
SCD1U10V2KX-5GP
M_B_DQ40 DQ39
M_B_DQ41
147
DQ40 VSS
2 SODIMM B DECOUPLING
149 3
M_B_DQ42 DQ41 VSS
157 8
M_B_DQ43 DQ42 VSS
159 9
DQ43 VSS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_B_DQ44
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
146 13
Do Not Stuff
DQ44 VSS
C1503
C1504
C1505
C1506
C1507
C1508
C1509
C1510
M_B_DQ45 148 14
DQ45 VSS
1
M_B_DQ46 158 19
M_B_DQ47 DQ46 VSS
M_B_DQ48
160
163
DQ47 VSS
20
25
DY
2
M_B_DQ49 DQ48 VSS
165 26
M_B_DQ50 DQ49 VSS
175 31
M_B_DQ51 DQ50 VSS
177 32
M_B_DQ52 DQ51 VSS
B 164 37 B
M_B_DQ53 DQ52 VSS
166 38
M_B_DQ54 DQ53 VSS
174 43
M_B_DQ55 DQ54 VSS
Place these caps 176
DQ55 VSS
44
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_B_DQ56 181 48
0D75V_S0 close to VTT1 and DQ56 VSS
C1511
C1512
C1513
C1514
M_B_DQ57 183 49
DQ57 VSS
1
M_B_DQ58 Layout Note:
VTT2. M_B_DQ59
191
DQ58 VSS
54
193 55
M_B_DQ60 180
DQ59 VSS
60 Place these Caps near
2
M_B_DQ61 DQ60 VSS
182
DQ61 VSS
61 SO-DIMMB.
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C1518
C1519
C1520
C1521
M_B_DQ62 192 65
Do Not Stuff
Do Not Stuff
DQ62 VSS
1
M_B_DQ63 194 66
DQ63 VSS
DY DY M_B_DQS#0 10
VSS
71
72
2
D D
C (Blanking) C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR3-SODIMM2
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 16 of 102
5 4 3 2 1
5 4 3 2 1
D D
3D3V_S0
RN1701 4 OF 10 3D3V_S0
PCH1D
1 4 L_CTRL_DATA 27 L_BKLT_EN J47 AP43
L_CTRL_CLK L_BKLTEN Cougar SDVO_TVCLKINN
2 3 49 LVDS_VDD_EN M45 AP45
L_VDD_EN SDVO_TVCLKINP
4
3
SRN2K2J-1-GP L_BKLTCTL SDVO_STALLN
L_DDC_DATA(PAGE17): LVDS_DDC_CLK_R SDVO_STALLP
AM40
49 LVDS_DDC_CLK_R T40 RN1706 DDI Port B Detect:(SDVO_CTRL_ DATA)
This signal is on the LVDS interface. LVDS_DDC_DATA_R K47 L_DDC_CLK
49 LVDS_DDC_DATA_R AP39 SRN2K2J-1-GP 1: Port B detected
L_DDC_DATA SDVO_INTN
This signal needs to be left NC if eDP is AP40
RN1702 L_CTRL_CLK T45
SDVO_INTP 0: Port B not detected
L_BKLT_EN used for the local flat panel display L_CTRL_DATA L_CTRL_CLK
1 4 P39
1
2
LVDS_VDD_EN L_CTRL_DATA
2 3
LVDS_IBG AF37 P38
LVD_IBG SDVO_CTRLCLK PCH_HDMI_CLK 51
SRN100KJ-6-GP Do Not Stuff TP1701 1 LVDS_VBG AF36 M39
LVD_VBG SDVO_CTRLDATA PCH_HDMI_DATA 51
1
AE48
R1701 LVD_VREFH
AE47 AT49
2K37R2F-GP LVD_VREFL DDPB_AUXN
AT47
DDPB_AUXP
AT40
DDPB_HPD HDMI_PCH_DET 51
Place near PCH AK39
LVDS
49 LVDSA_CLK#
2
LVDSA_CLK# DDBP_DATA2# C1701 SCD1U10V2KX-5GP
49 LVDSA_CLK AK40 AV42 1 2 HDMI_DATA2_R# 51
LVDSA_CLK DDPB_0N DDBP_DATA2 C1702 SCD1U10V2KX-5GP
AV40 1 2 HDMI_DATA2_R 51
DDPB_0P DDBP_DATA1# C1703 SCD1U10V2KX-5GP
49 LVDSA_DATA0# AN48 AV45 1 2 HDMI_DATA1_R# 51
C LVDSA_DATA#0 DDPB_1N DDBP_DATA1 C1704 SCD1U10V2KX-5GP C
CRT
DDPD_AUXN
T39 AT43
50 CRT_DDC_CLK CRT_DDC_CLK DDPD_AUXP
M40 BH41
5
6
7
8
DAC_IREF_R DDPD_2N
T43 BE42
DAC_IREF DDPD_2P
T42 BJ42
1
CRT_IRTN DDPD_3N
BG42
R1702 DDPD_3P
1KR2D-1-GP COUGAR-GP-U2-NF
2
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH (LVDS/CRT/DDI)
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 17 of 102
5 4 3 2 1
5 4 3 2 1
1
RSVD#AV7
BG26 AU3
BJ26
TP1
TP2
Point RSVD#AU3
RSVD#BG4
BG4 CRB : 2.2K
BH25 R1808
BJ16
BG16
TP3
TP4 RSVD#AT10
AT10
BC8
CEKLT: 1K 2K2R2J-2-GP
2
TP5 RSVD#BC8
D RN1801 AH38 D
INT_PIRQA# TP6 NV_CLE
1 10 3D3V_S0 AH37 AU2 1 R1809 2 H_SNB_IVB# 5
INT_PIRQE# INT_PIRQH# TP7 RSVD#AU2
2 9 AK43 AT4
INT_PIRQC# INT_PIRQG# TP8 RSVD#AT4 1KR2J-1-GP
3 8 AK45 AT3
INT_PIRQB# INT_PIRQD# TP9 RSVD#AT3
4 7 C18 AT1
INT_PIRQF# TP10 RSVD#AT1
3D3V_S0 5 6 N30
TP11 RSVD#AY3
AY3 DMI & FDI Termination Voltage
H3 AT5
TP12 RSVD#AT5
SRN8K2J-2-GP-U AH12 AV3 Set to Vss when LOW
NVRAM
TP13 RSVD#AV3
AM4
TP14 RSVD#AV1
AV1 NV_CLE
AM5 BB1 Set to Vcc when HIGH
TP15 RSVD#BB1
Y13 BA3
TP16 RSVD#BA3
K24 BB5
TP17 RSVD#BB5
L24 BB3
TP18 RSVD#BB3
AB46 BB7
TP19 RSVD#BB7
AB45 BE8
RSVD
R1801 PCI_GNT3# TP20 RSVD#BE8
2 1 Do Not Stuff BD4
DY RSVD#BD4
BF6
RSVD#BF6
B21 AV5 NV_ALE +V_NVRAM_VCCQ
TP21 RSVD#AV5 NV_CLE
M20 AY1
TP22 DF_TVS
AY16
1
TP23 NV_RCOMP TP1803 Do Not Stuff
A16 swap override Strap/Top-Block BG46
TP24 RSVD#AV10
AV10 1 Danbury Technology:
Swap Override jumper Disabled when Low. R1810
AT8 Do Not Stuff
RSVD#AT8 Enable when High. DY
PCI_GNT#3 Low = A16 swap BE28 AY5
2
TP25 RSVD#AY5
override/Top-Block RN1803 BC30 BA2
DGPU_HOLD_RST# TP26 RSVD#BA2 NV_ALE
Swap Override enabled 1 4 BE32
DGPU_PWR_EN# TP27
2 3 BJ32 AT12 USB Ext. port 1 (HS)
C High = Default TP28 RSVD#AT12 C
BC28 BF3
TP29 RSVD#BF3
SRN10KJ-5-GP BE30
TP30 External debug port use on Huron river platform
BF32
BG32
AV26
TP31
TP32
TP33
USBP0N
USBP0P
C24
A24
USB Table
BB26 C25 USB_PN1 62
TP34 USBP1N
AU28
TP35 USBP1P
B25 USB_PP1 62 Pair Device
AY30 C26 USB_PN2 64
TP36 USBP2N
AU26
TP37 USBP2P
A26 USB_PP2 64 0 X
1 2R1802 BBS_BIT1 AY26 K28
DY Do Not Stuff AV28
TP38 USBP3N
H28
USB_PN3
USB_PP3
63
63 1 USB Ext. port 1 (Left Side)
BBS_BIT0 TP39 USBP3P
1 2R1803 AW30 E28
DY Do Not Stuff BBS_BIT0 21 TP40 USBP4N
D28
USB_PN4
USB_PP4
66
66 2 Fingerprint
3D3V_S0 USBP4P
C28 USB_PN5 82
USBP5N
USBP5P
A28 USB_PP5 82 3 BLUETOOTH
C29
USBP6N
2
USBP6P
B29 4 Mini Card2 (WWAN)
BOOT BIOS Strap INT_PIRQA# K40 N28
R1814 INT_PIRQB# PIRQA# USBP7N
DY K38 M28 5 CARD READER
PCI
INT_PIRQC# PIRQB# USBP7P
GNT1#/GPIO51 SATA1GP/GPIO19 BOOT BIOS Location Do Not Stuff H38
PIRQC# USBP8N
L30 USB_PN8 57
INT_PIRQD# G38 K30 USB_PP8 57 6 X
PIRQD# USBP8P
0 0 LPC G30 USB_PN9 82
1
USBP9N
C46 E30 7 X
USB
83 DGPU_HOLD_RST# REQ1#/GPIO50 USBP9P USB_PP9 82
0 1 Reserved Do Not Stuff TP1805 1 DGPU_SELECT# C44 C30 USB_PN10 82
DGPU_PWR_EN# REQ2#/GPIO52 USBP10N E-SATA /USB Ext. port 4
93 DGPU_PWR_EN# E40
REQ3#/GPIO54 USBP10P
A30 USB_PP10 82 8
1 0 Reserved USBP11N
L32 USB_PN11 65
BBS_BIT1 D47 K32 USB_PP11 65 9 USB Ext. port 2(CardReader BD)
GNT1#/GPIO51 USBP11P
1 1 SPI(Default) Do Not Stuff TP1804 1 DGPU_PWM_SELECT# E42 G32 USB_PN12 49
Do Not Stuff TP1801 PCI_GNT3# GNT2#/GPIO53 USBP12N
B
1 F46
GNT3#/GPIO55 USBP12P
E32 USB_PP12 49 10 USB Ext. port 3(RJ45_BD) B
C32
Do Not Stuff USBP13N
SC_1026'10 USBP13P
A32 11 Mini Card1 (WLAN)
78 dGPU_LED 1 R1818 2 INT_PIRQE# G42
INT_PIRQF# PIRQE#/GPIO2
27,56 SATA_ODD_DA# 1 R1813 2 G40 12 CAMERA
USB30_SMI# 0R2J-2-GP
INT_PIRQG# PIRQF#/GPIO3 USB_RBIAS
35 USB30_SMI# 1 2 C42 C33 1 2
Do Not Stuff 1 R1815 2INT_PIRQH# PIRQG#/GPIO4 USBRBIAS# R1811
49 DCR_EN# D44
PIRQH#/GPIO5 13 X
Do Not Stuff 22D6R2F-L1-GP
R1817 B33
USBRBIAS
Do Not Stuff TP1802 1 PCI_PME# K10
PCI_PLTRST#
PME#
USB_OC#0_1
SW programing USB_OC#12_13 for USB 9
SC_1025'10 C6
PLTRST# OC0#/GPIO59
A14 USB_OC#0_1 62
K20 USB_OC#2_3
OC1#/GPIO40 USB_OC#4_5
B17
R1804 CLK_PCI_LPC_R OC2#/GPIO41 USB_OC#6_7
65,71 CLK_PCI_LPC 1 2 22R2J-2-GP H49 C16
R1805 CLK_PCI_FB_R CLKOUT_PCI0 OC3#/GPIO42 USB_OC#8_9
20 CLK_PCI_FB 1 2 22R2J-2-GP H43 L16 USB_OC#8_9 62
R1806 CLK_PCI_KBC_R CLKOUT_PCI1 OC4#/GPIO43 USB_OC#10_11
27 CLK_PCI_KBC 1 2 22R2J-2-GP J48 A16 USB_OC#10_11 61
CLKOUT_PCI2 OC5#/GPIO9 USB_OC#12_13
K42 D14 USB_OC#12_13 61
CLKOUT_PCI3 OC6#/GPIO10 PCH_GPIO14
H40 C14
2
2
COUGAR-GP-U2-NF
DY DY
1
1
Do Not Stuff
Do Not Stuff
R1820
U1801 0R2J-2-GP
1
5
B LZ57_6L
1
VCC PCI_PLTRST#
A
2 OC[3:0]# for Device 29 (Ports 0-7) -1_1209'10
4
,27,31,35,36,65,66,71,83,97 PLT_RST# Y DY 3
KBC CLK EMI OC[7:4]# for Device 26 (Ports 8-13)
1
GND
A BOM A
Do Not Stuff DY C1802
Do Not Stuff Do Not Stuff RN1802
2
3D3V_S5 5 6 USB_OC#0_1
C1801 Title
DY
2
BC24 BJ14
4 DMI_RXN0
BE20
DMI0RXN Cougar FDI_RXN0
AY14
FDI_TXN0 4
4 DMI_RXN1 DMI1RXN FDI_RXN1 FDI_TXN1 4
4 DMI_RXN2 BG18
BG20
DMI2RXN Point FDI_RXN2
BE14
BH13
FDI_TXN2 4
4 DMI_RXN3 DMI3RXN FDI_RXN3 FDI_TXN3 4
D Signal Routing Guideline: FDI_RXN4
BC12 FDI_TXN4 4 D
DMI_ZCOMP keep W=4 mils and 4 DMI_RXP0 BE24 BJ12 FDI_TXN5 4
DMI0RXP FDI_RXN5
4 DMI_RXP1 BC20 BG10 FDI_TXN6 4
routing length less than 500 DMI1RXP FDI_RXN6
4 DMI_RXP2 BJ18 BG9 FDI_TXN7 4
DMI2RXP FDI_RXN7
mils. 4 DMI_RXP3 BJ20
DMI3RXP
DMI_IRCOMP keep W=4 mils and BG14 FDI_TXP0 4
FDI_RXP0
4 DMI_TXN0 AW24 BB14 FDI_TXP1 4
routing length less than 500 DMI0TXN FDI_RXP1
4 DMI_TXN1 AW20 BF14 FDI_TXP2 4
DMI1TXN FDI_RXP2
mils. 4 DMI_TXN2 BB18
DMI2TXN FDI_RXP3
BG13 FDI_TXP3 4
AV18 BE12
DMI
FDI
4 DMI_TXN3 DMI3TXN FDI_RXP4 FDI_TXP4 4
BG12 FDI_TXP5 4
FDI_RXP5
4 DMI_TXP0 AY24 BJ10 FDI_TXP6 4
DMI0TXP FDI_RXP6
4 DMI_TXP1 AY20 BH9 FDI_TXP7 4
DMI1TXP FDI_RXP7
4 DMI_TXP2 AY18
DMI2TXP
4 DMI_TXP3 AU18
DMI3TXP
AW16 FDI_INT 4
FDI_INT
1D05V_VTT BJ24 AV12
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4 For platforms not supporting Deep S4/S5
R1901 2 49D9R2F-GP DMI_COMP_R
1 BG25
DMI_IRCOMP FDI_FSYNC1
BC10 FDI_FSYNC1 4 1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
R1902 1 2 750R2F-GP RBIAS_CPY BH21
DMI2RBIAS FDI_LSYNC0
AV14 FDI_LSYNC0 4 2.DPWROK and RSMRST# will rise at the same time (connected on board)
FDI_LSYNC1
BB10 FDI_LSYNC1 4 3.SLP_SUS# and SUSACK# are left as ‘no connect’
4.SUSWARN# used as SUSPWRDNACK/GPIO30
1 DY 2 R1926 SYS_PWROK
Do Not Stuff A18 DSWODVREN
PWROK DSWVRMEN
1 2 R1904
5,11 XDP_DBRESET#
DY
1R1925 2Do Not Stuff SYS_RESET# K3 B9 PCIE_WAKE# 31,35,65,66
SYS_RESET# WAKE#
3D3V_S0 1 2 R1905
10KR2J-3-GP P12 N3
11,36,37 SYS_PWROK SYS_PWROK CLKRUN#/GPIO32 PM_CLKRUN# 27
1R1923 2
Do Not Stuff
27,36 S0_PWR_GOOD 1 2R1924 PWROK DY L22 G8 PM_SUS_STAT# 1 TP1901 Do Not Stuff
0R2J-2-GP PWROK SUS_STAT#/GPIO61
1R1906 2 0R2J-2-GP
36,37,45,46,47 RUNPWROK 1 R1907 2 MEPWROK L10 N14 SUS_CLK 1 R1913 2 PCH_SUSCLK_KBC 27
Do Not Stuff APWROK SUSCLK/GPIO62
DSWODVREN - On Die DSW VR Enable
DY Do Not Stuff
B13 D10 PM_SLP_S5# 1
5,37 PM_DRAM_PWRGD DRAMPWROK SLP_S5#/GPIO63 HIGH Enabled (DEFAULT)
TP1902 Do Not Stuff
S0_PWR_GOOD after PM_SLP_S3# delay 200 ms PM_RSMRST# C21 H4 SLP_S4#_R 1 R1914 2 LOW Disabled
RSMRST# SLP_S4# PM_SLP_S4# 27,46
Do Not Stuff
K16 F4 SLP_S3#_R 1 R1915 2
20,27 SUS_PWR_ACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PM_SLP_S3# 27,36,37,47,92 RTC_AUX_S5
Do Not Stuff
11,27,97 PM_PWRBTN# E20 G10 PM_SLP_A# 1
PWRBTN# SLP_A# TP1903Do Not Stuff R1917 1 2 330KR2J-L1-GP
COUGAR-GP-U2-NF
3D3V_S0
RN1901
8 1 PCIE_CLK_LAN_RQ1# 3D3V_AUX_S5
PCIE_CLK_LAN_RQ1# 20,31
7 2 AC_PRESENT
R1909
6 3 PM_RI#
5 4 2 1
100KR2J-1-GP
SRN10KJ-6-GP
PCIE_WAKE#
2
CRB : 1K R1916
Q1901 R1912
2 R1921 1 10KR2J-3-GP PCIE_WAKE# 10KR2J-3-GP
CEKLT: 10K 4 3 PM_RSMRST# 1 2 RSMRST#_KBC 27
1KR2J-1-GP
DY2
1
10KR2J-3-GP
PCH (DM I/FDI/PM)
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 19 of 102
5 4 3 2 1
5 4 3 2 1
3D3V_S5
3D3V_S5
SSID = PCH SMB_CLK 4 1 RN2003
1
SMB_DATA 3 2 SRN2K2J-1-GP
R2004
10KR2J-3-GP SML0_DATA 3 2 RN2004
20100705_Standard PCH1B 2 OF 10 SML0_CLK 4 1 SRN2K2J-1-GP
2
PEG_CLKREQ#_R SML1_CLK 3 RN2005
BG34
BJ34
PERN1 Cougar E12 EC_SWI# SML1_DATA
2
1 4 SRN2K2J-1-GP
EC_SWI# 27
1
PERP1 SMBALERT#/GPIO11
AV32
PETN1 Point SMB_CLK DY R2005
D
AU32
PETP1 W-WAN SMBCLK
H14
Do Not Stuff D
BE34 C9 SMB_DATA
65 PCIE_RXN2
BF34
PERN2 SMBDATA 20100729 follow CRB change to 1K
2
65 PCIE_RXP2 PERP2
C2001 1 2 SCD1U10V2KX-5GP PCIE_TXN2_C BB32 R2009
65 PCIE_TXN2 C2002 1 2 SCD1U10V2KX-5GP PCIE_TXP2_C AY32
PETN2 WLAN DRAMRST_CNTRL_PCH 1 2
SMBUS
65 PCIE_TXP2 PETP2 DRAMRST_CNTRL_PCH 1KR2J-1-GP
A12
SML0ALERT#/GPIO60 DRAMRST_CNTRL_PCH 37 3D3V_S0
BG36
PERN3 SML0_CLK SRN2K2J-1-GP
BJ36 C8 SML0_CLK 11
PERP3 SML0CLK
AV34 Card Reader 1 4
PETN3 SML0_DATA
AU34 G12 SML0_DATA 11 2 3
PETP3 SML0DATA
BF36 RN2007
31 PCIE_RXN4 PERN4
31 PCIE_RXP4 BE36 2nd = 84.DM601.03F
C2005 PCIE_TXN4_C PERP4 PCH_GPIO74
1 2 SCD1U10V2KX-5GP AY34 LAN C13
31 PCIE_TXN4 C2006 PCIE_TXP4_C PETN4 SML1ALERT#/PCHHOT#/GPIO74 84.2N702.A3F
1 2 SCD1U10V2KX-5GP BB34
31 PCIE_TXP4 PETP4 SML1_CLK
E14 2N7002KDW-GP
PCI-E*
SML1CLK/GPIO58 SML1_CLK 27
35 PCIE_RXN5 BG37
PERN5 SML1_DATA SMB_DATA
35 PCIE_RXP5 BH37 M16 SML1_DATA 27 6 1 PCH_SMBDATA 14,15,65,66
C2009 PCIE_TXN5_C PERP5 SML1DATA/GPIO75
1 2 SCD1U10V2KX-5GP AY36 USB3.0
35 PCIE_TXN5 C2010 PCIE_TXP5_C PETN5
1 2 SCD1U10V2KX-5GP BB36 5 2
35 PCIE_TXP5 PETP5
USB3.0
USB3.0 BJ38 4 3
PERN6
BG38
Controller
PERP6 CL_CLK
AU36 Intel GBE LAN M7 1 Q2001
PETN6 CL_CLK1 TP2001 Do Not Stuff
AV36
PETP6
Link
PCH_SMBCLK 14,15,65,66
BG40 T11 CL_DATA 1
PERN7 CL_DATA1 TP2002 Do Not Stuff SMB_CLK
BJ40
PERP7
AY40 Dock
C PETN7 CL_RST# 1 C
BB40 P10
PETP7 CL_RST1# TP2003 Do Not Stuff XTAL25_IN 1 DY 2
BE38 R2008 Do Not Stuff
PERN8 R2008 and C2008 CO-LAY
20100705_Standard
BC38
AW38
PERP8 NEW CARD -1_1214'10
PETN8 C2008
AY38
PETP8 XTAL25_IN 2 1
M10 PEG_CLKREQ#_R 1 R2003 2 PEG_CLKREQ# 83
2
PEG_A_CLKRQ#/GPIO47 Do Not Stuff
Y40
CLKOUT_PCIE0N
::$1&/.
Y39 R2006 X2001 SC12P50V2JN-3GP
CLKOUT_PCIE0P 1M1R2J-GP
AB37 CLK_PCIE_VGA# 83 XTAL-25MHZ-102-GP
CLOCKS
CLK_PCIE_WWAN_REQ# CLKOUT_PEG_A_N
J2 AB38 CLK_PCIE_VGA 83 82.30020.851C2007
1
PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P
1
XTAL25_OUT 2nd = 82.30020.791
2 1
1
PCIE_CLK_RQ2# CLKIN_DMI_N CLK_BUF_EXP_P
V10 BE18
PCIECLKRQ2#/GPIO20 CLKIN_DMI_P R2012 R2013 SG(PX) : 0 0
UMA Optimus(Muxless) : 1 0
10KR2J-3-GP
10KR2J-3-GP
/$1&/. 31 CLK_PCIE_LAN# Y37 BJ30 CLK_BUF_CPYCLK_N 2 3
CLKOUT_PCIE3N CLKIN_GND1_N CLK_BUF_CPYCLK_P
31 CLK_PCIE_LAN Y36 BG30 1 4
2
CLKOUT_PCIE3P CLKIN_GND1_P RN2008 SRN10KJ-5-GP UMA_DIS#
B UMA_DIS# 22 B
A8 DGPU_PRSNT#
19,31 PCIE_CLK_LAN_RQ1# PCIECLKRQ3#/GPIO25
G24 CLK_BUF_DOT96_N
1
CLKIN_DOT_96N CLK_BUF_DOT96_P
E24
CLKIN_DOT_96P R2010 R2011
Y43
35 CLK_PCIE_USB3# CLKOUT_PCIE4N
86%&/. Y45 R2017 DY OPS
10KR2J-3-GP
35 CLK_PCIE_USB3 CLKOUT_PCIE4P
Do Not Stuff
AK7 CLK_BUF_CKSSCD_N CLK_BUF_REF14 1 2
USB3_PEGB_CLKREQ# CLKIN_SATA_N CLK_BUF_CKSSCD_P
35 USB3_PEGB_CLKREQ# L12 AK5
2
PCIECLKRQ4#/GPIO26 CLKIN_SATA_P 10KR2J-3-GP
PCIECLKRQ1# and PCIECLKRQ2# V38 K43 JTAG_TCK 1 R2017 RN9407 RN9408 RN9406 1 R2014 2 EC_SWI#
CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64 TP2004 Do Not Stuff
V37 need very close to PCH
support S0 power only CLKOUT_PCIE7P CLK_48_USB30 1
FLEX CLOCKS
1
RN2104 C2103 High - Enable internal VRs
1 2 RTC_X2 SC1U6D3V2KX-GP
R2101 10MR2J-L-GP
Low - Enable external VRs
2
D D
X2101 PCH1A 1 OF 10 LPC_AD[0..3]
LPC_AD[0..3] 27,65,71
1 4 RTC_X1 A20 C38 LPC_AD0
RTCX1 Cougar FWH0/LAD0
SC6P50V2CN-1GP
SC6P50V2CN-1GP
A38 LPC_AD1
FWH1/LAD1
LPC
RTC_X2 C20 Point B37 LPC_AD2
1
1
RTCX2 FWH2/LAD2 LPC_AD3
C37
C2101 2 C2102 RTC_RST# FWH3/LAD3
3 D20
RTCRST#
D36 LPC_FRAME# 27,65,71
2
2
1M1R2J-GP SRTC_RST# FWH4/LFRAME#
G2101 G22
1
C2104 R2104 SRTCRST#
E36
LDRQ0#
RTC
SC1U6D3V2KX-GP 2 1 SM_INTRUDER# K22 K36
INTRUDER# LDRQ1#/GPIO23 APS_LED 78
X-32D768KHZ-34GPU Do Not Stuff
2
1 2 PCH_INTVRMEN C17 V5
RTC_AUX_S5 INT_SERIRQ 27
1
INTVRMEN SERIRQ
R2105
RN2101 330KR2F-L-GP AM3 SATA_RXN0_C 56
HDA_SYNC HDA_BITCLK SATA0RXN
1 4 N34 AM1
29 HDA_CODEC_SYNC HDA_SDOUT HDA_BCLK SATA0RXP SATA_TXN0_C C2105 1 2 SCD01U16V2KX-3GP
SATA_RXP0_C 56
HDD1
SATA 6G
2 3 AP7 SATA_TXN0 56
29 HDA_CODEC_SDOUT HDA_SYNC SATA0TXN SATA_TXP0_C C2106 1
L34 AP5 2 SATA_TXP0 56
SRN33J-5-GP-U HDA_SYNC SATA0TXP SCD01U16V2KX-3GP
T10 AM10
SRN33J-5-GP-U 29 HDA_SPKR SPKR SATA1RXN
SATA1RXP
AM8 LA57
SATA_RXN1_C 66
SATA_RXP1_C 66
SATA
2 3 HDA_RST# HDA_RST# K34 AP11 SATA_TXN1_C C2111 1 2 SCD01U16V2KX-3GP SATA_TXN1 66
29 HDA_CODEC_RST#
29 HDA_CODEC_BITCLK
1 4 HDA_BITCLK HDA_RST# SATA1TXN
SATA1TXP
AP10 SATA_TXP1_C C2112 1 2
SCD01U16V2KX-3GP
SATA_TXP1 66 SSD
RN2102 LA57
29 HDA_SDIN0 E34 AD7
HDA_SDIN0 SATA2RXN
AD5
SATA2RXP
G34 AH5
C HDA_SDIN1 SATA2TXN C
C34
SATA2TXP
AH4 Move Cap close to Connector.
HDA_SDIN2
IHDA
AB8
SATA3RXN
A34 AB10
HDA_SDIN3 SATA3RXP
AF3
SATA3TXN
AF1
HDA_SDOUT SATA3TXP
Flash Descriptor Security Overide A36
HDA_SDO
SATA
27 ME_UNLOCK 1 R2107 2 1KR2J-1-GP Y7 SATA_RXN4_C 56
SATA4RXN
Low = Default Y5
+3VS_+1.5VS_HDA_IO
HDA_SDOUT High = Enable 78 TP_LED# 1 2PCH_GPIO33 C36
HDA_DOCK_EN#/GPIO33
SATA4RXP
SATA4TXN
AD3 SATA_TXN4_C C2109 1 2 SCD01U16V2KX-3GP
SATA_RXP4_C 56
SATA_TXN4 56
ODD
R2111 Do Not Stuff AD1 SATA_TXP4_C C2110 1 2 SCD01U16V2KX-3GP
SATA4TXP SATA_TXP4 56
Do Not Stuff TP2106 1 PCH_GPIO13 N32
HDA_DOCK_RST#/GPIO13
Y3
DY 1 R2102 2Do Not Stuff HDA_SDOUT SATA5RXN
Y1
SATA_RXN5_C 57
SATA5RXP
SATA5TXN
AB3 SATA_TXN5_C C2107 1 2 SCD01U16V2KX-3GP
SATA_RXP5_C 57
SATA_TXN5 57
ESATA
Do Not Stuff TP2101 1 PCH_JTAG_TCK_BUF J3 AB1 SATA_TXP5_C C2108 1 2 SCD01U16V2KX-3GP SATA_TXP5 57
JTAG_TCK SATA5TXP
NO REBOOT STRAP Do Not Stuff TP2102 1 PCH_JTAG_TMS H7 Y11 1D05V_VTT
3D3V_S0 JTAG_TMS SATAICOMPO
JTAG
No Reboot Strap Do Not Stuff TP2103 1 PCH_JTAG_TDI K5 Y10 SATA_COMP R2112 1 2 37D4R2F-GP
JTAG_TDI SATAICOMPI
DY1 R2106 2Do Not Stuff HDA_SPKR Low = Default Do Not Stuff TP2104 1 PCH_JTAG_TDO H1 1D05V_VTT
JTAG_TDO
HDA_SPKR High = No Reboot SATA3RCOMPO
AB12
SPI
1 R2122 2 Do Not Stuff SC_1025'2010 P3 SATA_LED# 68,78
R2110 SATALED#
DY
27,60 SPI_SI_R 2 1 PCH_SPI_SI V4 V14 SATA_DET#0 22
33R2J-2-GP SPI_MOSI SATA0GP/GPIO21
SA 0902'10
27,60 SPI_SO_R U3 P1 BBS_BIT0 BBS_BIT0 18
SPI_MISO SATA1GP/GPIO19
This signal has a weak internal pull down.
On Die PLL VR is supplied by 1.5V when COUGAR-GP-U2-NF
sampled high, 1.8 V when sampled low.
Needs to be pulled High for Huron River platform.
co-operate with R2310
20100629 SA
3D3V_S0
PLL ODVR VOLTAGE 3D3V_S5
DY RN2207
Low = 1.8V (Default) SATA_LED# 1 8
HDA_SYNC High = 1.5V PCH_JTAG_TMS 1R2118 2 Do Not Stuff 2 7
DY INT_SERIRQ 3 6
PCH_JTAG_TDI 1R2119 2 Do Not Stuff 4 5
20,65 CLK_PCIE_WLAN_REQ#
PCH_JTAG_TDO 1R2120 2 Do Not Stuff SRN10KJ-6-GP
DY
PCH_JTAG_TMS
DY
A 1 R2115 2 Do Not Stuff BOM A
PCH_JTAG_TDI
DY
1 R2116 2 Do Not Stuff
PCH_JTAG_TDO
DY
1 R2117 2 Do Not Stuff Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
PCH_JTAG_TCK_BUF
1 R2121 2
4K7R2J-2-GP Title
PCH (SPI/RTC/LPC/SATA/IHDA)
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 21 of 102
5 4 3 2 1
5 4 3 2 1
3D3V_S0
SSID = PCH
INTERNAL GFX EXTERNAL GFX
Note:
R2202 1 2 200KR2F-L-GP SATA_ODD_PRSNT# For PCH debug with XDP, need to NO STUFF R2218
PCH1F 6 OF 10 R2205 DY 10K
1
RN2203 TACH3/GPIO7 TACH7/GPIO71
ICC_EN# C10 R2205
GPIO27 has a weak[20K] internal pull up. GPIO8 Do Not Stuff
PCH_GPIO12 C4
To enable on-die PLL Voltage regurator, LAN_PHY_PWR_CTRL/GPIO12 DY
should not place external pull down.
2
PCH_GPIO15 GFX_CRB_DET
G2
GPIO15 A20GATE
P4 H_A20GATE 27 SB 0923'10
1
AU16 H_PECI_R 1 R2203 2
CPU/MISC
3D3V_S0 3D3V_S0 PECI H_PECI 5,27
56 SATA_ODD_PRSNT# 1 R2213 2 PCH_GPIO16
Do Not Stuff
U2
SATA4GP/GPIO16 DY Do Not Stuff R2206
100KR2J-1-GP
P5 H_RCIN# 27
RCIN#
GPIO
2
2
R2226 R2224 TACH0/GPIO17 PROCPWRGD
DY
Do Not Stuff 10KR2J-3-GP 49 Color_Engine# 1 R2221 2 PCH_GPIO22 T5 AY10 PCH_THERMTRIP_R R2204 1 2 390R2J-1-GP H_THERMTRIP# 5,36
Do Not Stuff SCLOCK/GPIO22 THRMTRIP#
Do Not Stuff TP2202 1 PCH_GPIO24 E8 T14 INIT3_3V# 1 TP2201 Do Not Stuff
1
NC_FP_DET# GPIO27
R2223 R2225 PLL_ODVR_EN
DY
DY P8
GPIO28 Do Not Stuff
DY Do Not Stuff Do Not Stuff
PSW_CLR# TS_VSS
AH8
K1
1
STP_PCI#/GPIO34
AK11 TS Signal Disable Guideline: 20100729 follow Annie CRB
1
2
TS_VSS
Do Not Stuff
DMI_OVRVLTG V8 should not float on the motherboard. They should
SATA2GP/GPIO36
RN2201 LA57 AK10 TS_VSS 1 R2219 2
2
1
EC_SMI# SLOAD/GPIO38
4 5
GFX_CRB_DET M3
SRN10KJ-6-GP 20100725 SDATAOUT0/GPIO39
RN2103 PCH_GPIO48 V13 BG2
PSW_CLR# SDATAOUT1/GPIO48 NCTF_VSS#BG2
1 8
PCH_GPIO48 2 7 1 PCH_TEMP_ALERT# V3 BG48 3D3V_S0
MFG_MODE Do Not Stuff TP2205 SATA5GP/GPIO49 NCTF_VSS#BG48
3 6
4 5 USB3_PWR_ON D6 BH3
21 SATA_DET#0 35 USB3_PWR_ON
1
GPIO57 NCTF_VSS#BH3
FDI TERMINATION VOLTAGE OVERRIDE
SRN10KJ-6-GP BH47 R2207
NCTF_VSS#BH47 Do Not Stuff
S_GPIO
RN2202 A4
NCTF_VSS#A4 NCTF_VSS#BJ4
BJ4 DY
1 4 GPIO37 LOW - Tx, Rx terminated to same voltage
2
PCH_GPIO22 2 3 A44 BJ44 FDI_OVRVLTG (FDI_OVRVLTG) (DC Coupling Model DEFAULT)
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
NCTF_VSS#A44 NCTF_VSS#BJ44
1
SRN10KJ-5-GP A45 BJ45
NCTF_VSS#A45 NCTF_VSS#BJ45 R2208
NCTF
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
A46 BJ46 10KR2J-3-GP
2
NCTF_VSS#A5 NCTF_VSS#BJ5
A6
NCTF_VSS#A6 NCTF_VSS#BJ6
BJ6 DMI TERMINATION VOLTAGE OVERRIDE
RN2205
PCH_GPIO24 1 8 B3 C2
NCTF_VSS#B3 NCTF_VSS#C2
20 PEG_B_CLKRQ# 2 7
PCH_GPIO12 3 6 B47 C48 3D3V_S0 GPIO36 LOW - Tx, Rx terminated to same voltage
B USB3_PWR_ON NCTF_VSS#B47 NCTF_VSS#C48 B
4 5 (DMI_OVRVLTG) (DC Coupling Model DEFAULT)
BD1 D1
1
SRN10KJ-6-GP NCTF_VSS#BD1 NCTF_VSS#D1
D1,D49,E1,E49,F1,F49
BD49 D49 R2209
PLL_ODVR_EN NCTF_VSS#BD49 NCTF_VSS#D49 Do Not Stuff
2 R2227 1
BE1
NCTF_VSS#BE1 NCTF_VSS#E1
E1 DY Integrated Clock Enable functionality is achieved
10KR2J-3-GP
via soft-strap. The default is integrated clock
2
PCH_GPIO15 1 R2201 2 BE49 E49 DMI_OVRVLTG
1KR2J-1-GP NCTF_VSS#BE49 NCTF_VSS#E49 enable.
1
BF1 F1
NCTF_VSS#BF1 NCTF_VSS#F1 R2210
BF49 F49 10KR2J-3-GP
NCTF_VSS#BF49 NCTF_VSS#F49
Integrated Clock Chip Enable
2
COUGAR-GP-U2-NF
ICC_EN# HIGH (R2211 DY)- DISABLED [DEFAULT]
ICC_EN#1 R2211 2
R2214 R2216 1KR2J-1-GP via soft-strap. The default is integrated clock
2G 1G enable.
10KR2J-3-GP
10KR2J-3-GP
[VRAM_SIZE1:VRAM_SIZE2]
2
R2215 R2217 20K 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT Taipei Hsien 221, Taiwan, R.O.C.
10KR2J-3-GP
10KR2J-3-GP
SSID = PCH 6A
3D3V_S0
1D05V_VTT
PCH1G POWER 7 OF 10 (0.1uF/0.01uF x1)
3D3V_DAC_S0
(10uF x1_0603)
1.3A Cougar L2301
AA23 U48 +VCCA_DAC_1_2 1 2 1 R2312 2
SCD01U16V2KX-3GP
AC23
VCCCORE Point VCCADAC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
D D
SC10U6D3V5KX-1GP
1
VCCCORE
CRT
C2301
C2302
C2303
C2304
(1uFx3) AD21 C2313 C2314 C2315 HCB1608KF-181-GP Do Not Stuff
1
(10uFx1_0603) VCCCORE
AD23 U47
SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
VCCCORE VSSADAC
VCC CORE
AF21 SB_0927'10
2
VCCCORE
AF23
2
VCCCORE 3D3V_S0
AG21
VCCCORE R2304
AG23
VCCCORE +3VS_VCCA_LVDS
0.001A
AG24 AK36 1 2
VCCCORE VCCALVDS
AG26
VCCCORE
AG27 AK37 1 R2303 2 Do Not Stuff
VCCCORE VSSALVDS
AG29
VCCCORE DY Do Not Stuff
AJ23
LVDS
VCCCORE 1D8V_S0
AJ26 AM37
VCCCORE VCCTX_LVDS
AJ27
VCCCORE +1.8VS_VCCTX_LVDS
0.06A
AJ29 AM38 1 R2305 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
VCCCORE VCCTX_LVDS 0R0805-PAD
AJ31
2
VCCCORE
C2316
C2317
AP36
1
1D05V_VTT VCCTX_LVDS R2309 C2318 (0.01uF x2) 3.3V CRT LDO
AP37 DY Do Not Stuff (22uF x1)
SC10U6D3V5KX-1GP
VCCTX_LVDS
AN19
2
VCCIO 5V_S0 3D3V_DAC_S0
1
U2301
Do Not Stuff TP2301 1 VCCAPLLEXP BJ22
1D05V_VTT (10uF x1) VCCAPLLEXP
1 5
VIN VOUT
2.925A(Total current of VCCIO) V33 2
HVCMOS
VCC3_3 GND
AN16 3 4
VCCIO 3D3V_S0 EN NC#4
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
1
(1uF x4) (0.1uFx1)
C2305
C2306
C2307
C2308
C2309
AN17 DY DY Do Not Stuff
1
1
VCCIO C2311 C2312
VCC3_3
V34 DY
C Do Not Stuff C
2
1
Do Not Stuff
Do Not Stuff
AN21
2nd = 74.09198.G7F
2
2
VCCIO C2319
20100629 added AN26 SCD1U10V2KX-5GP 1D5V_S0_1D8V_S0
2
VCCIO
AN27 AT16
1D05V_VTT VCCIO VCCVRM C2325
L2302 1D05V_VTT
DY AP21 SCD1U10V2KX-5GP 1 2
VCCIO
SA 0901'10 SB_0927'10
1 2 VCCAPLLEXP AP23 AT20 +1.05VS_VCC_DMI 1 R2306 2
Do Not Stuff VCCIO VCCDMI (1uF
Do Not Stuff x1)
DMI
1
Do Not Stuff
C2324
AP24
VCCIO
1
VCCIO C2320
DY AP26 AB36 SC1U6D3V2KX-GP
2
VCCIO VCCCLKDMI
2
AT24 1D05V_VTT
VCCIO
+1.05VS_VCC_DMI_CCI
0.02A
0.266A (Totally VCC3_3 current) 1 R2307 2
AN33 Do Not Stuff
1
VCCIO (1uFx1)
3D3V_S0 AN34 AG16 C2321 (10uFx1)
VCCIO VCCDFTERM SC1U6D3V2KX-GP
2
NAND / SPI
(0.1uF x1) BH29 AG17
1
VCC3_3 VCCDFTERM
C2310
0.159A(Totally current of VCCVRM) SCD1U10V2KX-5GP AJ16
2
1
1 VCCFDIPLL BG6 C2322
VCCAFDIPLL
Do Not Stuff SCD1U10V2KX-5GP
TP2302 SCD1U10V2KX-5GP (0.1uFx1)
SA 0901'10 20100722 modify
2
1D05V_VTT AP17
VCCIO
FDI
V1
VCCSPI
2 R2313 1 3D3V_S5
+1.05VS_VCC_DMI 0R2J-2-GP
AU20
VCCDMI 0.02A VCCSPI
0.042A (Totally current of VCCDMI) 2 R2314 1
DY Do Not Stuff
3D3V_S0
1
COUGAR-GP-U2-NF (1uFx1) The same BIOS SPI ROM power
C2323
SC1U6D3V2KX-GP
2
VCCVRM(Internal PLL and VRMs):
A.1.5V for Mobile
B.1.8 V for Desktop
co-operate with R2103
1D8V_S0 1D5V_S0_1D8V_S0
A 1 2 BOM A
DY
1D5V_S0 R2311 Do Not Stuff
1 2 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R2310 0R3J-0-U-GP Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH (POWER1)
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 23 of 102
5 4 3 2 1
5 4 3 2 1
SSID = PCH
3D3V_AUX_S5
PCH1J POWER 10 OF 10 1D05V_VTT
1
Do Not Stuff
DCPSUSBYP Point
C2438
2 C2439
1 0.002A R2403 P26
1
Do Not Stuff Do Not Stuff +VCCPDSW VCCIO C2423
3D3V_S5 1 2 T16
Do Not Stuff VCCDSW3_3 SC1U6D3V2KX-GP
DY P28
2
+VCCSUS1 C2441 VCCIO
1 2 (0.1uFx1)
1D05V_VTT 2 Do Not Stuff Do Not Stuff TP2405 1 DCPSUSBYP V12 T27
DCPSUSBYP VCCIO 3D3V_S5 5V_S5
R2417 VCCACLK DY
D 2 1 T29 D
Do Not Stuff +V3.3S_VCC_CLKF33 VCCIO 3D3V_S5
DY T38
2
+VCCAPLL_CPY_PCH_C 1 VCC3_3
1 2 2+VCCAPLL_CPY_PCH
L2404 0.097A (Totally current of VCCSUS3_3)
R2419 DY Do Not Stuff T23 D2401
Do Not Stuff C2440 Do Not Stuff TP2404 +VCCAPLL_CPY_PCH VCCSUS3_3 (0.1uFx1)
DY 1 BH23 CH751H-40PT-GP
1
VCCAPLLDMI2 C2424
VCCSUS3_3
T24 2nd = 83.R2004.B8F 83.R0304.A8F
DY 1D05V_VTT (10uFx1) AL29 SCD1U10V2KX-5GP R2408
1
VCCIO
Do Not Stuff
V23 1 2
USB
2
2
R2420 DCPSUS VCCSUS3_3
2 1
Do Not Stuff
DY Do Not Stuff TP2402 1 +VCCSUS1 AL24 V24 3D3V_S5 10R2J-2-GP (0.1uFx1)
1
1
DCPSUS VCCSUS3_3
DY
C2442 P24 C2426
Do Not Stuff VCCSUS3_3 (0.1uFx1) SCD1U10V2KX-5GP
2
2
1
AA19
VCCASW C2425
T26 1D05V_VTT
VCCIO SCD1U10V2KX-5GP
AA21
2
VCCASW
20100625 V1.2 0.001A
AA24 M26 +5VA_PCH_VCC5REFSUS
3D3V_S0 VCCASW V5REF_SUS
3D3V_S0 5V_S0
2
Do Not Stuff (1uFx1) VCCASW +V3.3A_VCCPSUS
1.01A (Total current of VCCASW) VCCSUS3_3
AN24
R2416 L2401
AA29
VCCASW DYC2437
Do Not Stuff
D2402
CH751H-40PT-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2
2+V3.3S_VCC_CLKF33_C +V3.3S_VCC_CLKF33
C2406
C2407
C2408
1 1 2 C2403 C2404 AA31 2nd = 83.R2004.B8F 83.R0304.A8F
1
1R2F-GP IND-10UH-218-GP C2401 VCCASW R2407
0.001A
1
1
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C2402 VCCASW V5REF (1uFx1)
SC10U6D3V5KX-1GP
2
C SC1U10V2KX-1GP AC27 10R2J-2-GP C
2
1
VCCASW 3D3V_S5
N20
PCI/GPIO/LPC
VCCSUS3_3 R2410 C2427
AC29
VCCASW +V3.3A_VCCPSUS SC1U10V2KX-1GP
N22 1 2
2
VCCSUS3_3 Do Not Stuff (1uFx1)
AC31
1
VCCASW
P20
(22uFx2_0603) VCCSUS3_3 C2428
AD29
VCCASW SC1U6D3V2KX-GP
P22
2
VCCSUS3_3
AD31
1D05V_VTT VCCASW
0.08A (1uFx1)
(220uFx1)
(1uFx3)
3D3V_S0
W21 AA16
L2402 VCCASW VCC3_3
1 2 +1.05VS_VCCA_A_DPL W23 W16
IND-10UH-218-GP VCCASW VCC3_3 (0.1uFx2)
1
1
W24 T34
C2409 VCCASW VCC3_3 C2430 C2431
SC1U6D3V2KX-GP W26 SCD1U10V2KX-5GP SCD1U10V2KX-5GP
2
2
VCCASW
W29 3D3V_S0
VCCASW
0.08A (1uFx1)
L2403 (220uFx1) W31 AJ2
+1.05VS_VCCA_B_DPL VCCASW VCC3_3 (0.1uFx1)
1 2
1
IND-10UH-218-GP W33
1
VCCASW C2429
AF13
C2410 VCCIO SCD1U10V2KX-5GP
2
SC1U6D3V2KX-GP +VCCRTCEXT N16
2
DCPRTC 1D05V_VTT
0.16A (Totally current of VCCVRM AH13
1
VCCIO
C2411 (0.1uFx1) 1D5V_S0_1D8V_S0 Y49 AH14
B
SCD1U10V2KX-5GP C2443 VCCVRM VCCIO (1uFx1) B
2
1
1 SCD1U10V2KX-5GP
2
SA 0901'10 AF14 C2432 3D3V_S5
+1.05VS_VCCA_A_DPL VCCIO SC1U6D3V2KX-GP U2401 1D5V_S5
BD47
SATA
2
VCCADPLLA 1D05V_VTT
AK1
+1.05VS_VCCA_B_DPL VCCAPLLSATA R2411
BF47 1 5
VCCADPLLB +V1.05S_VCCAPLL_SATA3 VIN VOUT
1
AF11 1D5V_S0_1D8V_S0 C2434 DY 2
(10uFx1)
2
3
GND
4 DY C2405
1
1D05V_VTT 1D05V_VTT +VCCDIFFCLKN +VCCDIFFCLK VCCVRM Do Not Stuff EN NC#4 C2416
AF17
R2406 (1uFx1) VCCIO
0.055A AF33
VCCDIFFCLKN DY DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
1 R2404 2 +VCCDIFFCLK 1 2 AF34 AC16 Do Not Stuff
2
1
Do Not Stuff (1uFx1) Do Not Stuff VCCDIFFCLKN VCCIO C2436
AG34 1A DY DY
1
VCCDIFFCLKN 1D05V_VTT
0.095A VCCIO
AC17
Do Not Stuff
C2412 C2414
2
SC1U6D3V2KX-GP SC1U6D3V2KX-GP +V1.05S_SSCVCC AG33 AD17
2
1
C2415
1D05V_VTT (0.1uFx1) 2 1 +VCCSST V16 C2435
DCPSST 1D05V_VTT SC1U6D3V2KX-GP
2
1 R2405 2 +V1.05S_SSCVCC +3VS_+1.5VS_HDA_IO
Do Not Stuff Do Not Stuff TP2406 1 DCPSUS T17 T21
1
BJ8 1 DY 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2419
(4.7uFx1_0603) VCCASW
A C2417 BOM A
SC4D7U6D3V3KX-GP 0.01A
2
RTC
A22 P32
HDA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
C2420
C2421
C2422
(0.1uFx2)
1
(1uFx1) Title
PCH (POWER2)
2
COUGAR-GP-U2-NF Title
PCH (VSS)
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 25 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 26 of 102
5 4 3 2 1
20100707
5 4 3D3V_AUX_KBC
3 2 3D3V_S0
1
SSID = KBC
1
-1'20101129 3D3V_AUX_KBC R2718
G Sensor ID:
100KR2J-1-GP
3D3V_AUX_KBC PCB_Version_BOM Ctrl R2724
High: ST
2
1
3D3V_S0 47KR2F-GP GSENSOR_ID
R2702 65W/120W
R2707
10KR2F-2-ML-GP
Low:ADI
R2707 R2701
2
1 2 VBAT
1
Do Not Stuff PCB_VER_AD
2
1
1
ADT_TYPE R2710
65W Stuff DY
1
C2702 C2703 -1'20101129 DY
SCD1U10V2KX-5GP DY Do Not Stuff R2726
Do Not Stuff
2
2
100KR2F-L1-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Do Not Stuff
C2704
90W DY Stuff
C2705
C2706
C2707
C2708
C2710
1
2
C2701 C2709 R2701
DY 65W_90W#
2
SC2D2U10V3KX-1GP 90W/120W 10KR2F-2-ML-GP
120W Stuff Stuff
2
2
SC2D2U10V3KX-1GP
115
102
19
46
76
88
C2711
DY
2
U2701A 1 OF 2
Do Not Stuff
1 2 DISCRETE#
VCC
VCC
VCC
VCC
VCC
AVCC
VDD
R2712
High: UMA / Low: Discrete AC_IN_KBC
3D3V_AUX_S5
40 AD_IA 1 2 AC_IN 40 SA 0824'10
104 7 PLT_RST#_EC
1 R2735 2 PLT_RST# 5,11,18,31,35,36,65,66,71,83,97
1
VREF LRESET#
D D
C2714 1 Do Not Stuff Do Not Stuff
DY 2 97
LCLK
2
3 LPC_FRAME#_1 2 R2730
CLK_PCI_KBC 18
1 33R2J-2-GP
LPC_FRAME# 21,65,71 SC_1025'2010 Do Not Stuff R2704
PCB_VER_AD 98 GPIO90/AD0 LFRAME# 1 LPC_AD3 330KR2J-L1-GP
ADT_TYPE GPIO91/AD1 LAD3 LPC_AD2
99 128 LPC_AD[0..3] 21,65,71
1
MODEL_ID_AD 100 GPIO92/AD2 LAD2 127 LPC_AD1
2
GPIO93/AD3 LAD1 126 LPC_AD0_1 2 R2729 1 33R2J-2-GP LPC_AD0 R2706
49 CAMERA_EN 101
LAD0
125 INT_SERIRQ 21 SC_1025'2010 DY Do Not Stuff
105 GPIO94/DA0 SERIRQ 8
79 GSENSE_TST GPIO95/DA1 GPIO11/CLKRUN# PM_CLKRUN# 19
106 9 PANEL_BLEN 1 R2775 2 2 1 KBC_PWRBTN_EC#
66 3G_EN 68,97 KBC_PWRBTN#
2
CPU_Current GPIO96/DA2 GPIO65/SMI# ECSCI#_KBC L_BKLT_EN 17
29 Do Not Stuff
1
ECSCI#/GPIO54 124 VGA_SW#_1 1 R2774 2 R2703
VGA_SW# 68
1
GPIO10/LPCPD# ECSWI#_KBC Do Not Stuff G2701 470R2J-2-GP
79 123
Do Not Stuff
C2717
19,20 SUS_PWR_ACK
1
2
Do Not Stuff TP2709 1 CHG_USB_DET# 108 GPIO4 KBRST#/GPIO86 3D3V_AUX_KBC 3D3V_AUX_S5
DY Do Not Stuff
2
KBC_PWRBTN_EC# 93 GPIO5 SATA_ODD_DA# 31 53 KCOL0 100KR2J-1-GP
GPIO6 18,56 SATA_ODD_DA# GPIO56/TA1 KBSOUT0/JENK#
79 GSENSE_Y 94 27 BLON_OUT 49 11,19,97 PM_PWRBTN# 117 52 KCOL1 1 R2725 2
2
1
F_SDI/F_SDIO1 87 EC_SPI_DO_C 2 1 33R2J-2-GP KBSIN4 59 KROW5
KBC_VCORF F_SDIO/F_SDIO0 SPI_SI_R 21,60 KBSIN5
44 R2722
5,22 H_PECI
R2721 1 2 43R2J-GP PECI 13 60 KROW6 R2714
VCORF PECI KBSIN6 SRN4K7J-8-GP 10KR2J-3-GP
1D05V_VTT 1 R2720 2 EC_VTT 12 61 KROW7
1
1
Do Not Stuff VTT KBSIN7 RN2703
NOTE:
AGND
C2712 C2716 BAT_IN# 4 1
GND
GND
GND
GND
GND
GND
2
SC1U10V3ZY-6GP NPCE795PA0DX-GP-U 3 2
2
2
to the NPCE791L.
SCD1U16V2KX-3GP
Need very close to EC KBC_NOVO_BTN#
NPCE795PA0DX-GP-U SRN100KJ-6-GP
18
45
78
89
116
5
103
2 EC_AGND
NOTE: RN2705
S5_ENABLE 8 1
Connect GND and AGND planes via either
ECRST# 7 2
R2711 0R resistor or one point layout connection. LID_CLOSE# 6 3
2ND = 71.00795.A0G Do Not Stuff 5 4
Prevent BIOS data loss solution SRN10KJ-6-GP
1
3D3V_AUX_S5
R2715 ECRST#
C 1 2 3D3V_S0
1
Do Not Stuff RN2702
R2705 HDMI_IN# 4 1
DY 10KR2J-3-GP
3D3V_AUX_S5 PCIE_RST# 3 2
1
D2701 EC_GPIO47 High Active U2702
E
R2723
20 EC_SWI# 1 C2715 SRN10KJ-5-GP
2
2 1 PURE_HW_SHUTDOWN#_B B MMBT3906-4-GP 1 DY
Q2702 28,36,86 PURE_HW_SHUTDOWN#
2
ECSWI#_KBC GND E51_RxD
3 3 1 2
PROCHOT_EC G Q2701 DY PURE_HW_SHUTDOWN# 2 VCC DY R2708 Do Not Stuff
Do Not Stuff
C
10KR2J-3-GP RESET#
2
D H_PROCHOT#_EC
1 R2733 2 H_PROCHOT# 5,42
1
BLUETOOTH_EN 4 1
2N7002K-2-GP
3 2
2
R2716 84.2N702.J31
1 2 2ND = 84.2N702.031 SRN10KJ-5-GP
Do Not Stuff
D2704
AD_OFF 2 R2770 1 1
22 EC_SCI#
DY 3 ECSCI#_KBC
1KR2J-1-GP
2
BAS16-6-GP
83.00016.K11
2ND = 83.00016.F11
1
SMBC_THERM 3 2
SMBD_THERM 4 1 R2727 MODEL_ID_AD(Pin100) Pull-Low Register Pull-High Register Voltage
3D3V_S0
AD_DETECT 100KR2F-L1-GP
38 AD_DETECT
Q2703
SRN10KJ-5-GP
4 3 V/B 57 UMA 100.0 K 64.9 K 2.001 V
2
SMBC_THERM 28,78,86
5 2 MODEL_ID_AD
V/B 57 OPTIMUS 100.0 K 76.8 K 1.867 V
1
SML1_DATA 6 1 SMBD_THERM 28,78,86
R2728
DMN66D0LDW-7-GP 100KR2F-L1-GP Z 57 UMA 100.0 K 100.0 K 1.650 V
3D3V_S0 84.DMN66.03F
2ND = 84.27002.F3F
2
Z 57 OPTIMUS 100.0 K 143.0 K(64.14335.L0L) 1.32 V
B B
A A
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
5 4 3 2 1
3 1
1
E
D B C2803 D
1
B C2800 SC2200P50V2KX-2GP
2
SC390P50V2KX-GP Q9
E
H_THERMDC
2
C
MMBT3904WT1G-GP
Q6
MMBT3904WT1G-GP
CPU backside or inside the socket
CPU TEMP:
2200p close to smsc2103 chip H_THERMDA and H_THERMDC routing 10mil trace width
REMOTE2-
2 and spacing. Locate Capacity near Thermal diode.
E
1
B
C2801 C2802
Do Not Stuff SC2200P50V2KX-2GP
2
2
C
DY
Q42 REMOTE2+
MMBT3904WT1G-GP 5V_S0
between CPU, VGA and DIMM on bottom side Close to connector
1 AFTP1133
D2801
2
Do Not Stuff C2806
1
SC4D7U6D3V3KX-GP
Do Not Stuff
2ND = 83.R5003.H8H R2806
3rd = 83.5R003.08F DY 10KR2J-3-GP
2
3D3V_S0
2
1
C C
6
R2800
6K8R2J-GP
4
FAN_TACH 3
2
SHDN_SEL 2
3D3V_S0 SHDN --> 2N3904 ON External diode FAN_PWM R427 1 2 FAN_PWM_C 1 20.F0765.004
Do Not Stuff ACES-CON4-4-GP
FAN1
1
1
4 WIRE PWM Fan Control circuit SC_1025'10
5
R260 RN49 DY
SC1KP50V2KX-1GP
Do Not Stuff
68R2-GP
EC2801
2 3 3D3V_S0
2
C2804 1 4 1 AFTP1134
U31
2
2103_VDD
EC2802
1 2 SRN10KJ-5-GP
3 4 2103_4 1 TP65 Do Not Stuff 2ND = 20.F1426.004
SCD1U10V2KX-4GP VDD GPIO1 2103_5 TP67 Do Not Stuff
5 1 D2802
H_THERMDA GPIO2
2
H_THERMDC DP1 FAN_TACH_R FAN_TACH
1 10 1 2
REMOTE2+ DN1 TACH FAN_PWM
16 11
REMOTE2- DP2/DN3 PWM
15
ND2/DP3 TRIP_SET R2805 1 CH551H-30PT-GP
14 2 2K05R2F-GP
THERM_SYS_SHDN# TRIP_SET SHDN_SEL 2ND = 83.5R003.08F
SA 0905
SC 1203 7 13 T8 = 105
THERM_SCI# THERM_SCI#_R SYS_SHDN# SHDN_SEL
1 1 2 6 3rd = 83.R5003.G8F
TP66 R272 Do Not Stuff ALERT#
Do Not Stuff 9 12 83.R5003.C8F FAN_TACH 1 AFTP1128
27,78,86 SMBC_THERM SMCLK GND FAN_PWM_C
8 17 1 AFTP1131
27,78,86 SMBD_THERM SMDATA GND
B B
EMC2103-2-AP-GP
pin6, ALERT# OD
pin7, SYS_SHDN# OD
3D3V_AUX_S5
3D3V_S0
3
1
D2803 2ND = 84.2N702.031 R2802
Do Not Stuff
84.2N702.J31 100KR2J-1-GP
Do Not Stuff DY 2N7002K-2-GP
2ND = 83.BAT54.D81
2
3rd = 83.BAT54.S81 S THERM_SYS_SHDN#
1
R2803
27,36,86 PURE_HW_SHUTDOWN# D 1 DY 2 3D3V_S0
Do Not Stuff
1
DY C2805 Q2802
DY
Do Not Stuff
Do Not Stuff
2
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
2
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
R299
DY Do Not Stuff
2
5V_S0 AUD_5VA 5V_S0 5VA_OP_S0
R2933
1
R644
1 2 2 1
Do Not Stuff
C718 C714
1
0R2J-2-GP
1
SC4D7U10V5ZY-3GP
Place next to pin 1 C727 C381
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
D D
SC1U10V2KX-1GP
2
75R2J-1-GP R645
AUD_PORTA_R 2 1
82 AUD_PORTA_R ALC_AGND MIC1_VREF MIC1_VREF 82
75R2J-1-GP R646
AUD_PORTA_L 2 1 ACL_VREF
82 AUD_PORTA_L
CBNSC2D2U10V3ZY-1GP
5K1R2F-2-GP R616 C725 C724 Place close Place close
HP_OUT_R_AUD
HP_OUT_L_AUD
AUD_SENSE_PORT_A 2 1 AUD_5VA to Pin 25 to Pin 38
82 AUD_SENSE_PORT_A
1
SC2D2U10V3ZY-1GP
L_LINE_IN_C ALC_AGND Place close G94
C715 C728 to Pin 27 Do Not Stuff
SENSEB
CPVEE2
1
R_LINE_IN_C C723 C722 21 HDA_SPKR R604 1 2 KBC_BEEP_R 1 2 AUD_PC_BEEP 1 2
1
SC10U6D3V3MX-GP
10KR2J-3-GP C700
1
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-5GP
CBP
2
SCD1U10V2KX-4GP ALC_AGND
2
R597 R586
36
35
34
33
32
31
30
29
28
27
26
25
1 2
2
U69 27 KBC_BEEP 10KR2J-3-GP C706 4K7R2J-2-GP
ALC_AGND
ALC_AGND SC100P50V2JN-3GP
LOUT1-L/PORT-D-L
SENSE-B
HPOUT-L/PORT-I-L
CPVEE
CBP
MIC1-VREFO
AVSS1
AVDD1
LOUT1-R/PORT-D-R
HPOUT-R/PORT-I-R
CBN
VREF
2
-1'20101129
37 MONO-OUT LINE1-R/PORT-C-R 24
38 23
SB 0923'10
AUD_5VA AVDD2 LINE1-L/PORT-C-L
39 22 AUD_PORTC_R C713 1 2 SC4D7U6D3V3KX-GP AUD_PORTC_R_C 5V_S0 5V_S5
LOUT2-L/PORT-A-L MIC1-R/PORT-B-R AUD_PORTC_R_C 82
R619
ALC_AGND 20KR2F-L-GP
2 1JDREF 40 21 AUD_PORTC_L C712 1 2 SC4D7U6D3V3KX-GP AUD_PORTC_L_C AUD_PORTC_L_C 82 DY
JDREF MIC1-L/PORT-B-L
1
10KR2J-3-GP
Do Not Stuff
41 20 1KR2J-1-GP R584 R295 R298
LOUT2-R/PORT-A-R LINE2-VREFO R2929
27 AMP_MUTE# 1 2 Q21
C MIC2-VREFO Do Not Stuff C
ALC_AGND 42 AVSS2 MIC2-VREFO 19 1 2
LZ57 AUD_SD# G
2
43 18 SC2D2U16V3KX-GPLZ57 1 2
NC#43 ALC272 LINE1-VREFO
AUD_MIC2_L_C
C2924 SRN1KJ-7-GP
21 HDA_CODEC_RST#
R591 DY D 1451_SD
44 DMIC-CLK3/4 MIC2-R/PORT-F-R 17 2 1 AUD_MIC2_L_2 Do Not Stuff
1
Do Not Stuff
3 2 S
45 16 AUD_MIC2_R_C 2 1 AUD_MIC2_R_2 4 1 INT_MIC2_R 78 R286
SPDIFO2 MIC2-L/PORT-F-L C2925
2N7002K-2-GP DY
46 15 LZ57 SC2D2U16V3KX-GP
GPIO0/DMIC-DATA1/2
GPIO1/DMIC-DATA3/4
2
47
EAPD LINE2-L/PORT-E-L
14 2ND = 84.2N702.031
R607 20KR2J-L2-GP
48 13 AUD_SENSE_PORT 1 2 AUD_SENSE_PORT_C
SDATA-OUT
DVDD-IO
RESET#
SYNC
DVSS
DVSS
AUD_3VD 1D5V_S0
R254 42K2R2F-L-GP
ALC272-GR-GP LA57
1
10
11
12
2
1 2
AUD_3VD R2932 R2931
71.AL272.00G R293
51KR2F-L-GP
AUD_SDATAIN
1
DVDD-IO LZ57
LA57 R279 42K2R2F-L-GP SCD47U6D3V2KX-GPC369
SCD47U6D3V2KX-GPC369 R259 20KR2F-L-GP
1
1 2 R_LINE_IN_C1 2R_LINE_IN_R
1 2 R_LINE_IN
C701 C697 SB_0928'10 R297
1
1
SC10U6D3V3MX-GP
LZ57
LA57 R262 42K2R2F-L-GP R289
1 2
LZ57 47KR2F-GP
B RIN+ AUD_SPK_R+_L B
1 R294 2
78 AUD_DMIC_1_2 R291 42K2R2F-L-GP
HDA_CODEC_RST# 21 LA57 1 2
2 5 BYPASS 1 2
C698 SC4D7U10V5ZY-3GP 1 VCC BYPASS 1451_SD
2C380 11 14 SC10U6D3V5KX-4GP
SC10P50V2JN-4GP VCC SHUTDOWN
2
20KR2F-L-GP
C368 R257 R_LINE_IN 7 1 AUD_SPK_L-_L AUD_SPK_L-_L 58
SCD47U6D3V2KX-GP1 RIN- LVO1
SB version 2RIN+_R 1 2 RIN+ 8 4 AUD_SPK_L+_L AUD_SPK_L+_L 58
L_LINE_IN 15 RIN+ LVO2 AUD_SPK_R-_L
12 AUD_SPK_R-_L 58
C433 LIN+ LIN- RVO1 AUD_SPK_R+_L
16 9 AUD_SPK_R+_L 58
LIN+ RVO2
20100720_AUD SCD47U6D3V2KX-GP 1 2LIN+_R 1 2R292
13 17
NC#13 GND
1
R2927
R2926 Do Not Stuff
33KR2F-GP DY G1454R41U-GP
2
2
HDA_CODEC_SYNC_C HDA_CODEC_SDOUT_C
BOM
1
A A
C2928 DY;main(84.2N702.E31)
Q2902 Q2903
SC33P50V2JN-3GP C2929
G Do Not Stuff G Wistron Corporation
2
5 4 3 2 1
5 4 3 2 1
D D
blanking
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 30 of 102
5 4 3 2 1
5 4 3 2 1
1
LAN_XTAL0
LAN_XTAL1
2 1 LAN_XTAL1 LAN_EESK 1 R3127 2
LAN_EESK
SPEED_100# 82
Do Not Stuff R3136
XTAL-25MHZ-102-GP 1KR2J-1-GP
GPO
LAN_EEDO 1 R3129 2
R3123 SPEED_1000# 82
D 2ND = 82.30020.791 Do Not Stuff D
2
1 R3130 2 1 2 LAN_RSET RTL_ISOLATE#
LAN_ACT_LED# 82
1
82.30020.851
1MR3J-L-GP
2K49R2F-GP R3119
15KR2J-1-GP
1
C3103 1 C3148
48
47
46
45
44
43
42
41
40
39
38
37
2
SC12P50V2JN-3GP SC12P50V2JN-3GP U9304
2
49 3D3V_LAN_VDDSREG 3D3V_LAN_S5
AVDD33
AVDD33
AVDD10
CKXTAL2
CKXTAL1
AVDD33
DVDD10
LED0
DVDD33
LED1/EESK
RSET
GPO/SMBALERT
GND
SB_1004'10
82 MDI0+ 1 36 1D05V_LAN_REGOUT
MDIP0 REGOUT High:Link up
82 MDI0- 2 35
MDIN0 VDDREG Low:Link down
1D05V_LAN_S5 3 34
AVDD10 VDDREG LAN_ENSWREG GPO
82 MDI1+ 4 33 1 R3125 2 3D3V_LAN_S5 1 R3120 2 1KR2J-1-GP
MDIP1 ENSWREG LAN_EEDI
82 MDI1- 5 32
Pin-XTAL2 is External Clock Input MDIN1 EEDI/SDA LAN_EEDO R3102 0ohm PAD For Enable Switch Regulator.
0R2J-2-GP R3122 10KR2J-3-GP
1D05V_LAN_S5 6 31
AVDD10 LED3/EEDO LAN_EECS R3103 0ohm Res For Disable Switch Regulator. LAN_EECS
Pin. 82 MDI2+ 7 30 1 2
2
MDIP2 EECS/SCL R3126 10KR2J-3-GP
R3121 is need when using external 82 MDI2- 8 29 1D05V_LAN_S5
MDIN2 DVDD10 R3124 LAN_EEDI
1D05V_LAN_S5 9 28 PCIE_WAKE# 19,35,65,66 1 2
clock source. AVDD10 LANWAKE# R3128 10KR2J-3-GP
82 MDI3+ 10
MDIP3 DVDD33
27
RTL_ISOLATE#
3D3V_LAN_S5 DY Do Not Stuff SMB_LAN_DATA 1
82 MDI3- 11 26 2
MDIN3 ISOLATE#
3D3V_LAN_S5 12 25 PLT_RST# 5,11,18,27,35,36,65,66,71,83,97
1
AVDD33 PERST# The SM DATA with 10K ohm pull GND.
REFCLK_N
REFCLK_P
SMBDATA
CLKREQ#
SMBCLK
DVDD10
EVDD10
C C
HSON
HSOP
HSIN
HSIP
Make sure PCIE_Wake# & PCIE_CLK_LAN_RQ1#connected to 10K
GND
RTL8111E-VB-GR-GP
resistor pull high close to PCH side
13
14
15
16
17
18
19
20
21
22
23
24
1D05V_LAN_S5 10/100(UMA): 71.08105.A03
SMB_LAN_DATA 3D3V_LAN_S5
1 R3121 2LAN_CLKREQ# R3135
19,20 PCIE_CLK_LAN_RQ1# Do Not Stuff
20 PCIE_TXP4 1 DY 2
20 PCIE_TXN4
20 CLK_PCIE_LAN 3D3V_S5 Do Not Stuff
20 CLK_PCIE_LAN#
1D05V_LAN_EVDD10 -1 0114 S D
SCD1U10V2KX-4GP
1 2 PCIE_RXP4_C Q3103
1
20 PCIE_RXP4 C3145 SCD1U10V2KX-4GP C3151
1
C3152 R3133
AO3419L-GP
G
1
1 2 PCIE_RXN4_C 100KR2J-1-GP C3150
2
20 PCIE_RXN4
SC1U10V2KX-1GP
C3147 SCD1U10V2KX-4GP
SC1U10V2KX-1GP
2
2
20100706 LAN_PWR_ON_T
C3153
SCD22U10V2KX-1GP
1
1D05V_LAN_S5
Layout Note: Close to U3101 pin C3106 ~ C3112 R3132
10KR2J-3-GP
1D05V_LAN_REGOUT 1 2 1 R3131 2 1D05V_LAN_EVDD10
B B
L1 Do Not Stuff
2
IND-4D7UH-192-GP
1
LAN_PWR_ON_C
C3128
C3146 C3129 C3130 C3131 C3132 C3133 C3134 C3138 C3139 C3149
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
Layout Note: Close to U3101
pin C3113&C3114
D
20100804 C3113 value modify to 1uF
capacitor Q3104
2N7002A-7-GP
3D3V_LAN_S5 3D3V_LAN_VDDSREG G 84.2N702.E31
27 LAN_PWR_ON
2ND = 84.2N702.J31
1 R3134 2
S
Do Not Stuff
SB_0923'10
1
C3137
C3135 C3140 C3141 C3142 C3143 C3144 C3136
BOM
SCD1U25V3KX-GP
SC4D7U6D3V3KX-GP
A A
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
4 4
3
(Blanking) 3
2 2
BOM
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 33 of 102
A B C D E
5 4 3 2 1
D D
(Blanking)
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 34 of 102
5 4 3 2 1
5 4 3 2 1
1D05V_VTT 1V_USB30
R3529 3D3V_S5
2 1
10mA
1
DY Do Not Stuff
R3519 1V_USB30 U3502
R3530 Do Not Stuff DY 3D3V_USB30 BLM15BD121SN1D-GP VCC3_A_USB
2 1 5V_S5 +1.05V POWER RAIL C4 N12 L3501
DY Do Not Stuff 3A C5
VDD10 GND
N11 1 2
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
VDD10 GND
C6 D6
1
R3519_2 VDD10 GND
C3534
C3503 C3525 C3524 C3526 C3504 C3505 C3506 C7
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U10V5ZY-1GP
1
VDD10
U3501 C8 A1
C3512 VDD10 GND
C9 A2 USB3.0
SC10U10V5ZY-1GP
2
1
SC1U10V2KX-1GP VDD10 GND C3501 C3507 C3502 C3508 C3509 C3510 C3511 D
D D5 A3
2
1V_USB30 VDD10 GND
5 D8 A4
VIN#5 VDD10 GND
6 4 D9 A5
2
VCNTL VOUT#4 VDD10 GND
USB3.0 7 3 E3 A7
22 USB3_PWR_ON
2
R3501
1RT9018_EN
0R2J-2-GP
8
POK
EN
VOUT#3
FB
2
R3502
Decoupling cap location E4
VDD10
VDD10
GND
GND
A9
9 1 E11 A11
1
VIN#9 GND -- Halfway between L8 and K11, to take care of L8, K11 and K12. VDD10 GND Close to pins - ideally about one caps
E12 A13
11K8R2F-GP
USB3.0
1
USB3.0 USB3.0 USB3.0 USB3.0 USB3.0 VDD10 GND
-- Halfway
USB3.0 between K11 and H11, to take care of K11, K12 and H11. USB3.0 H3 A14 for every two or three pins
1
C3513 VDD10 GND
RT
U3501_2
-- Near D10, to take care of E11, E12, D9, D8, C9, C8 and C7. H4 B3
C3531APL5930KAI-TRG-GP USB3.0 -- Near D5, to take care of C7, C6, C5, C4, D5, E4 and E3. H11
VDD10 GND
B4
SC10U10V5ZY-1GP
2
VDD10 GND USB3.0 USB3.0 USB3.0 USB3.0 USB3.0 USB3.0 USB3.0
74.05930.03D -- Halfway between H4 and L5, to take care of H4, H3 and L5. K11 B5
SC10U10V5ZY-1GP
2
2
VDD10 GND
K12 B7
2nd = 74.G9731.03D USB3.0
VDD10 GND
Vo = 0.8 * ( 1 + ( RT / RB ) ) 3D3V_USB30
L5
L8
VDD10 GND
B9
B11
1
VDD10 GND
B13
USB3.0 R3503 +3.3V POWER RAIL D10
GND
B14
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
USB3.0 30K9R2F-GP F3
VDD33 GND
C1
0.1A
1
VDD33 GND
RB C3528 C3527 C3529
F13
VDD33 GND
C2
USB3.0 F14 C3
2
VDD33 GND
1.If need support USB3.0 wake up from S3, then U3501 G3 C10
2
VDD33 GND 3D3V_S5 3D3V_USB30
VIN should be connected to 1D5V_S3 power rail. G4 C11
VDD33 GND
2.If not support USB3.0 wake up function, then short USB3.0 L9
VDD33 GND
C12
L10 C13 R3516
G3501,G3502,R3516. VDD33 GND
L13 D3 2 1
VDD33 GND 0R3J-0-U-GP
3.If need support USB3.0 wake up from S3,S4,S5, then L14
VDD33 GND
D4
U3501 VIN should be connected to 3D3V_S5 power rail. N4 D11
VDD33 GND
N5 D12 USB3.0
R3514 USB3.0VCC3_A_USB
USB3.0 USB3.0 VDD33 GND
N6 D13
USB30_PERST# VDD33 GND
5,11,18,27,31,36,65,66,71,83,97 PLT_RST# 2 1 P3 D14
C 100R2J-2-GP VDD33 GND C
E1
1
GND
For USB3.0 analog ricuit D7 AVDD33 GND
E2
USB3.0 DY C3530
For USB2.0 analog ricuit P13 AVDD33 GND
E13
E14
2
Do Not Stuff GND
F4
GND
20 CLK_PCIE_USB3 B2 F6
3D3V_USB30 PECLKP GND
20 CLK_PCIE_USB3# B1 F7
C3514 SCD1U10V2KX-4GP PECLKN GND
F8
PCIE_RXN5_C GND
1 2 D1 F9
20 PCIE_RXN5 C3515 1 PCIE_RXP5_C PETXN GND
2 D2 F11
20 PCIE_RXP5 SCD1U10V2KX-4GP PETXP GND
F12
GND
20 PCIE_TXN5 USB3.0 F1 G1
1
PERXN GND
F2 G2
1
SPISCK GND
G12
GND 3D3V_USB30
USB3.0 USB3.0 USB3.0 62 USB20_DM0 N10
U2DM1 GND
G13
USB3.0 USB30_AUXDET N8 H6
USB30_PSEL U2DM2 GND
H7
USB30_CSEL 24MHZ_IN GND
N14 H8
USB30_PONRST# 24MHZ_OUT XT1 GND
SA 0830'10 M14
XT2 GND
H9
H12
4
3
SPISI GND
N1 J3
SC1U10V2KX-1GP
OCI2B GND
J9
2
1
2
USB30_AUXDET GND
J2 J11
1K6R2F-GP 2 R3513_RP12 AUXDET GND
SA 0830'10 1
RREF GND
J12
USB3.0 R3513 K3 USB3.0
USB30_PSEL GND RN5902_2
USB3.0 J1 K4
PSEL GND
18 USB30_SMI# 1 R3522 2 USB30_SMI#_C H1 L1
RN5902_1
SMI GND
USB3.0 R3515 DY Do Not Stuff L2
2ND = 84.2N702.031 10KR2J-3-GP P10
GND
L3
47KR2J-2-GP
62 USB20_DP0
1
84.2N702.J31 3D3V_USB30 U2DP1 GND
2 1 3D3V_USB30 SA 0830'10 P8
U2DP2 GND
L4
2N7002K-2-GP L6
20 USB3_PEGB_CLKREQ# USB30_CSEL GND
P6 L7
USB3_PEGB_CLKREQ#_C USB30_PONRST# CSEL GND R3512
S P5 L11
PONRST# GND
USB3.0 L12 U9306
2
3D3V_USB30 GND
D 19,31,65,66 PCIE_WAKE# K1 M3
1
2
1
GND WP# SCK SPISI C3519
Q3503 C14 M7 4 5
R3518 GND GND GND SI
K13 M8
SCD1U10V2KX-5GP
USB30_OC#0 USB30_SMI# GND GND
1 2 K14 M9
4
3
2
0R2J-2-GP GND GND
J13 M10 AT25F512B-SSH-T-GP
USB30_SMIB#_C P4 GND GND
1 R3527 2 M11
SMI# GND
USB3.0 DY Do Not Stuff
USB3.0 M12
USB3.0; main(84.2N702.E31) 62 USB30_ON0 J14
GND
M13 72.25512.F01
PPON1 GND
H14
PPON2 GND
N3 SA 0823'10
XTAL 24MHZ 18PF30PPM HCX-5FA GND
N7
USEUSB3.0
64K EEPROM
SC15P50V2JN-2-GP C3520 1 2 USB30_TXDP0_0 B10 N9
A C3516 +/-30ppm R3528
62 USB30_TXDP0
62 USB30_RXDP0 SCD1U10V2KX-4GP B12
U3TXDP1
U3RXDP1
GND
GND
N13 BOM A
1 2 24MHZ_IN 1 DY 2 B6 P1 USB3.0
USB3.0 U3TXDP2 GND
B8 P2
2
1 R3614 2 SYS_PWROK
Power Sequence
28,42 IMVP_PWRGD
0R2J-2-GP
DY 3D3V_S5
3D3V_S5
DY U3608
U3603 1
19,37,45,46,47 RUNPWROK B
28,42 IMVP_PWRGD 1 R3609 2 IMVP_PWRGD_R 1 5
Do Not Stuff B VCC
5 2
VCC 19,27,37,47,92 PM_SLP_S3# A
19,27 S0_PWR_GOOD 1 R3610 2 S0_PWR_GOOD_R 2 4 PWR_1D05V_EN 45
Do Not Stuff A SYS_PWROK_R Y
DY 4 1 R3613 2 SYS_PWROK 11,19,37 3
Y GND
DY 3
GND DY Do Not Stuff
Do Not Stuff
D Do Not Stuff D
1
2ND = 73.7SZ08.DAH
1
C3612 DY
C3613
2ND = 73.7SZ08.DAH
DY
2
Do Not Stuff
Do Not Stuff
2
Do Not Stuff
Do Not Stuff
SSID = Reset.Suspend
5V_S0 5V_S5
Run Power 1 S
U3604
D 8
C3607 2 S D 7
S D 6
RUN_ENABLE
1 DY2 3
G D 5
DCBATOUT Q3604
2nd = 84.00610.C31 Do Not Stuff
4
NDS0610-NL-GP AO4468-GP
84.04468.037
1 R3619
2 Z_12V S D 2nd = 84.08882.037
10KR2J-3-GP
K
1
1
1
84.S0610.B31 R3620 R3621 D3602
G
C3606 MMPZ5239BPT-GP 3D3V_S0
330KR2J-L1-GP 3D3V_S5
10KR2J-3-GP
C C
U3607
SCD22U25V3KX-GP
2ND = 83.9R103.F3F
2
2 R3618
1 Z_12V_G3 1 S D 8
A
330KR2J-L1-GP 83.9R103.D3F 2 S D 7
1
3 S D 6
R3617 4 G D 5
100KR2J-1-GP
R3612
AO4468-GP
3D3V_AUX_S5 1 2 Z_12V_D4 84.04468.037
Z_12V_G3_1 2
2nd = 84.08882.037
10KR2J-3-GP
Q3603 Q3605
G 4 3
. .
19,27,37,47,92 PM_SLP_S3# 1D5V_S0 1D5V_S3
20100721 V1.5
U3605
D PM_SLP_S3 5 2
.
.
.
PM_SLP_S3# 19,27,37,47,92
1 S D 8
S 6 1 2 S D 7
3 S D 6
4 G D 5
2N7002E-1-GP 2N7002KDW-GP
84.2N702.D31 84.2N702.A3F
1
SIR460DP-T1-GE3-GP
2ND = 84.2N702.J31 2nd = 84.DM601.03F C3611 84.00460.037
SCD01U50V2KX-1GP 2nd = 84.08039.037
2
1D5V_S0
SIR460, SO-8 MAX Current 3000 mA
VGS=10V, Qg=16.8nC Design Current 2100 mA
Rdson=4.7m ohm Total= 11.39A
3D3V_S5
B 1 R3608 2 PS_S3CNTRL B
PS_S3CNTRL 37
100KR2J-1-GP 1D5V_S3 1D5V_DDR_S0
1D5V_S0
D
. Q3606 Do Not Stuff
2N7002E-1-GP 1 R3623 2 1 R3631 2
Do Not Stuff Do Not Stuff
. DY
. .
. 1 R3624 2
Do Not Stuff
1 R3625 2
DY Do Not Stuff
S
1 R3633 2
Do Not Stuff
1 R3634 2
19,27,37,47,92 PM_SLP_S3#
84.2N702.D31
2ND = 84.2N702.J31
20100728
SB 0923'10
56R2J-4-GP
E
C3602
SCD1U10V2KX-5GP
R3616
2
5,11,18,27,31,35,65,66,71,83,97 PLT_RST# 2 1
4K7R2J-2-GP
1
A R3632 A
2K2R2J-2-GP 2ND = 83.00016.F11
83.00016.K11
BAS16-6-GP
2
3 BOM
PURE_HW_SHUTDOWN# 27,28,86
41 3V_5V_EN 1
D3601
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
Do Not Stuff
2KR2F-3-GP R3603
DY Title
Close to DIMM
S3 Power Reduction Circuit SM_DRAMPWROK
1D5V_DDR_S0
0D75V_S0
Close to CPU
2
1
D S3 Power Reduction Circuit Processor VREF_DQ Implementation D
R3707 R3704
Do Not Stuff Do Not Stuff
1 DY 2
DY
2
1
Q3708
1D5V_DDR_S0_PR
R3703
S 22R2J-2-GP
+V_SM_VREF_CNT 9
0D75V_S0_PR
1 R3708 2 +V_SM_VREF D
2
7,14 M_VREF_DQ_DIMM0 Do Not Stuff 84.2N702.J31 R3705
Q3707 G 100KR2J-1-GP
2ND =
DY; main(84.2N702.E31)
G
. .
1
36 PS_S3CNTRL 2N7002K-2-GP
D PS_S3CNTRL_1.5S
.
.
.
D
D
1
1
S Do Not Stuff . Q3702
R3721 R3717 . Q3701 Do Not Stuff
DY 2N7002E-1-GP .
Do Not Stuff
. .
. .
.
Do Not Stuff 0R2J-2-GP . .
2
RUN_ENABLE DY; main(84.2N702.E31)
S
2ND = 84.2N702.J31
S
PM_SLP_S3# 19,27,36,47,92
20100725 modify PS_S3CNTRL
36 PS_S3CNTRL
C C
36 PS_S3CNTRL
D 0D75V_EN Close to CPU
.
.
.
5V_S5
1.05VTT_PWRGD 45,48
S S3 Power Reduction Circuit SM_DRAMPWROK
3D3V_S0 1D5V_S3
1
2
R3714 Do Not Stuff
DY Do Not Stuff 1
1
Do Not Stuff R3710
R3712 0R2J-2-GP R3706
2ND = 84.2N702.J31 Do Not Stuff 1KR2J-1-GP
Q3705 DY
2
1D5V_DDR_S0
1
1.5V_RUN_CPU_EN# G
. .
2
R3711 R3709
Q3706
D 0D75V_EN_L 2 1
DY1 2
Do Not Stuff
.
.
.
C
1
Do Not Stuff
DY Do Not Stuff C3705
SM_DRAMRST#_D
.
.
.
.
Do Not Stuff DY Do Not Stuff D 1 R3718 2
Do Not Stuff DDR3_DRAMRST# 14,15
2
1
.
B
3rd = 84.03904.L06 G
B
C3702
2N7002E-1-GP SC100P50V2JN-3GP
2
84.2N702.D31
Close to CPU DRAMRST_CNTRL_PCH 20
S3 Power Reduction Circuit SM_DRAMPWROK
2ND = 84.2N702.J31
3D3V_S5
C3703
3D3V_S5 1D5V_DDR_S0 2 1DRAMRST_CNTRL_PCH
1
200R2F-L-GP
R3702
U3701 200R2F-L-GP
2
5,19 PM_DRAM_PWRGD 1 5
IN B VCC
2
3 4 VDDPWRGOOD_R 1 R3719 2
SCD1U10V2KX-5GP
A
DY BOM A
1
D
D D
AFTP3803 AFTP3806
AFTP3805 AFTP3802
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
AD+
1
DCIN1 AD_JK
NP1 PU3801
1 1 S D 8
2 S D 7
K
2 3 S D 6
1
3 PD3801 AD+_2 4 G D 5
1
4 AFTP3804 PR3803 PC3801
5 1 SCD1U50V3ZY-1-GP
P6SBMJ24APT-GP P1403EV8-GP
2
NP2 200KR2F-L-GP 83.P6SBM.AAG 84.P1403.B37
A
Do Not Stuff 2ND = 83.P6SMB.CAG PR3801 PC3802
1
ACES-CON5-14-GP 200KR2F-L-GP SC1U50V5ZY-1-GP
2
AD_DETECT 27 PQ3802
2
20.F1701.005 R2
E
AD_OFF#_JK B
2
R1
2ND = 20.F1708.005 C
1
PC3803 PR3804
1
34K8R2F-1-GP PDTA124EU-1-GP
PQ3801 PR3802
2
SCD1U50V3ZY-1-GP
C C 100KR2J-1-GP C
84.00124.K1K
1
B R1
27 AD_OFF
E 2ND =
2
R2
PDTC124EU-1-GP
84.00124.H1K
2ND = 84.00124.X1K
B B
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DCIN_JACK
Size Document Number Rev
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 38 of 102
5 4 3 2 1
5 4 3 2 1
D D
BATTERY CONNECTOR
BT+
1
PC3901 PC3902
SCD1U50V3KX-GP SC2200P50V2KX-2GP
2
1 PR3901 2
40 BATT_SENSE
C Do Not Stuff C
BAT1
8
1
PRN3901 BT+ 2
1 8
2 7 BATA_SCL_1 3
27,40 BAT_SCL BATA_SDA_1
27,40 BAT_SDA 3 6 4 20.81347.007
4 5 BAT_IN#_1 5
27 BAT_IN#
6 BAT_Z = 20.81332.007
SRN33J-7-GP PL3901 PL3902 PL3903 7
PC3904 9
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
PC3905 PC3903
1
ALP-CON7-22-GP
1
DY DY DY
K
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
83.5R603.D3F
2
SC1000P50V3JN-GP-U
PD3901
2
2ND = 83.5R603.K3F MMPZ5232BPT-GP-U SC_1027'10
2
3rd = 83.5R603.Q3F 1 AFTP3905
A
B B
BAT_IN#
BAT_SDA
BAT_SCL
AFTP3901 1 BAT_IN#_1
AFTP3902 1 BATA_SDA_1
AFTP3903 1 BATA_SCL_1
AFTP3904 1 BT+
1 2 1 2 1 2
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BATT_CONN
Size Document Number Rev
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 39 of 102
5 4 3 2 1
5 4 3 2 1
PU4001
NEAR 65w
187k
(64.18735.6DL) 49.9k 80w 137k 49.9k
121k BT+
8 D S 1 76.8k DCBATOUT
D S 90w
7
6 D S
2
3 (64.12135.6DL) 49.9k 120w (64.76825.6DL) 49.9k
1
5 D G 4 PR4004
PR4002 PU4002
P1403EV8-GP 100KR2J-1-GP AD+_TO_SYS 1 2 1 S D 8
D 84.P1403.B37 2 S D 7 D
D01R3721F-GP-U AD+ 3 S D 6
2
4 G D 5
AD+_G_2
K
STOP_CHG# P1403EV8-GP
1
84.P1403.B37 PD4002
20100518 WAYNE connects to KBC
2
A
1
PG4001 PG4002 3D3V_AUX_S5
1
Do Not Stuff
Do Not Stuff
AD+_G_1 PD4001 PR4005
1
2
1SS400GPT-GP BQ24745_VREF 470KR2J-2-GP
83.00400.C1F PR4009
2nd = 83.1S400.B2F 10KR2F-2-GP
2
1
R1
PR4007
1
121KR2F-L-GP
BOM_CTRL
1
1
27 STOP_CHG#
SC1U10V3KX-3GP
DC_IN_D PQ4001
2
2N7002KDW-GP PC4001
SC1U25V5KX-1GP SC_1026'10
84.2N702.A3F
2
PC4002 DCBATOUT
R2
6
1
PR4008 79.10712.L02
PR4006 PC4024 SCD1U50V3KX-GP PC4003 PC4004
316KR3F-2-GP 49K9R2F-L-GP SCD1U50V3KX-GP
2
CHG_AGND SCD1U50V3KX-GP
1
BQ24745_ACOK PU4003 CHG_AGND
CHG_AGND CHG_AGND PC4025 PC4006
2
1
SE100U25VM-L1-GP
-1_1213'10 SCD1U25V2ZY-1GP
ICREF
5
6
7
8
C BQ24745_DCIN 22 28 PC4023 PC4005 C
D
D
D
D
DCIN CSSP SC10U25V6KX-2GP
83.R0203.08F
2
BQ24745_ACIN 2 2nd = 83.1R003.I8F SC1U10V3KX-3GP PU4004 SC10U25V6KX-2GP
ACIN BQ24745_CSSN PR4012
P2003BEA-GP
27 PC4009
CSSN BQ24745_ICOUT 1
3D3V_AUX_S5 11 26 2STOP_CHG# PD4003
VDDSMB ICOUT
G
0R0402-PAD K A 1 2 4
S
S
S
25 BQ24745_BST CH520S-30PT-GP
3
2
1
1
5
6
7
8
CHG_AGND LGATE
D
D
D
D
PG4003 PG4004 PC4019 PC4020 PC4021 PC4022
1
Do Not Stuff
Do Not Stuff
14 19 PU4005 PC4018
CHG_AGND NC#14 PGND P2003BEA-GP DY
18 DY
SC10U25V6KX-2GP
SC10U25V6KX-2GP
2
2
Do Not Stuff
Do Not Stuff
CSOP
SCD1U50V3KX-GP
G
4
2
S
S
S
PR4013 CHG_AGND 17 PC4016
BQ24745_IINP CSON
1 2 8 2 1
3
2
1
27 AD_IA Do Not Stuff SC150P50V2JN-3GP VICM
SC_1028'10
PC4010 PR4014
1 2 BQ24745_FBO_RC 1 2BQ24745_FBO 74.24745.073 SCD1U50V3KX-GP
B B
PR4015 4K7R2J-2-GP
1 2 6
200KR2F-L-GP BQ24745_EAI FBO
5 16
1
CE
2 1BQ24745_EAO_RC2 1 12 15 BATT_SENSE
GND
1
29
PC4013
1
SC56P50V2JN-2GP PC4015
2 SCD1U25V2ZY-1GP
PR4018
1 2
CHG_AGND
Do Not Stuff
CHG_AGND
CHG_AGND
BQ24745_VREF 2ND = 84.2N702.031
PRN4001 84.2N702.J31
1 8 AC_IN 2N7002K-2-GP
CHG_ON# AC_IN 27
2 7
3 6 S
4 5 BQ24745_CHG_ON
3D3V_AUX_S5
BQ24745_CHG_ON D
A BOM A
SRN100KJ-8-GP-U DY G CHG_ON#
1
C4001 CHG_ON# 27
Do Not Stuff PQ4002 AC_IN to KBC Wistron Corporation
2
Title
Charger_BQ24745
Size Document Number Rev
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 40 of 102
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_5v3p3v
1
1 2 Do Not Stuff
PG4112
1
Do Not Stuff PC4105 DY PR4104 PR4103 1 2
PG4102 97K6R2F-GP 97K6R2F-GP
Do Not Stuff Do Not Stuff PC4106 DY 1 2
2
PG4108
1 2 Do Not Stuff Do Not Stuff
2
PG4118
1 2 Do Not Stuff
2
PG4113
Do Not Stuff 1 2
PG4103
Do Not Stuff 1 2
PG4109
1 2 Do Not Stuff
PG4120
1 2 Do Not Stuff
PG4114
Do Not Stuff 1 2
PG4104
Do Not Stuff 1 2
PG4110
1 2 Do Not Stuff
PG4123
1 2 Do Not Stuff
Do Not Stuff 1 2
PG4105
Do Not Stuff
1 2 Do Not Stuff
PG4122
Do Not Stuff 1 2
PG4106
1 2 DCBATOUT Do Not Stuff
PWR_3D3V_DCBATOUT PWR_5V_DCBATOUT
Do Not Stuff PC4101
PC4113
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
1
1
SC_1028'10
2
1
5
6
7
8
1
P2003BEA-GP EC4102
D
D
D
D
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
PU4104 D
2
Do Not Stuff
16
Do Not Stuff
2
2
DY PU4103 P2003BEA-GP
SC_1028'10 DY
VIN
G
4 4
G
S
S
S
SCD1U25V3KX-GP
1 S
2 S
3 S
3
2
1
S G 2 1PWR_3D3V_BOOT1
1 2 PWR_3D3V_BOOT29 22 PWR_5V_BOOT1 1 2PWR_5V_BOOT1_1 1 2
PR4105 2D2R3J-2-GP VBST2 VBST1 0R3J-0-U-GP
C 3D3V_PWR SCD1U25V3KX-GP PWR_3D3V_UGATE2 10 21 PWR_5V_UGATE1 5V_PWR C
PL4101 DRVH2 DRVH1 PL4102
1 2 PWR_3D3V_PHASE2 11 20 PWR_5V_PHASE1 1 2
IND-3D3UH-116-GP LL2 LL1 IND-3D3UH-116-GP
68.3R31A.10V PWR_3D3V_LGATE2 12 PWR_5V_LGATE1 68.3R31A.10V
D DRVL2 DRVL1
19
1
PU4102
D
D 8
D 7
D 6
D 5
5
6
7
8
PTC4101 P2003BEA-GP
D
D
D
D
SE220U6D3VM-21-GP
SCD1U10V2KX-4GP
VO2 VO1
1
1
PC4119
Do Not Stuff
Do Not Stuff
PU4105
SCD1U10V2KX-4GP
PWR_3D3V_FB2 5 2 PWR_5V_FB1 PTC4102
VFB2 VFB1
SE220U6D3VM-21-GP
P2003BEA-GP
2
G
4 4
G
2
2
S
S
S
1 2 PWR_5V3D3V__EN0 13 23
1 S
2 S
3 S
3
2
1
PWR_3D3V_ENTRIP26 PWR_5V_ENTRIP1 SC_1028'10
SC_1028'10
S G PWR_5V3D3V_VREF TRIP2 TRIP1
1
3 15
VREF GND
Matsuki cap 220uF
1
PC4122
PWR_5V3D3V_TONSEL
4 25
6.3V, ESR=17mohm TONSEL GND
SCD22U10V2KX-1GP
2
diode integrated VREG3 diode integrated
VREG5
PR4113
Do Not Stuff
1
1
TPS51123RGER-GP
8
17
1
PR4112 5V_PWR_2 PR4114
1
PR4111 Do Not Stuff 3D3V_PWR_2 Do Not Stuff
DY PG4119 DY
PWR_5V3D3V_VREG3
6K65R2F-GP PR4115
1 2 33KR2F-GP
2
1 2
1 2
PWR_3D3V_FB2_R 3V_5V_EN 36 PWR_5V_FB1_R
PC4124 Do Not Stuff
2
DYDo Not Stuff PC4128 DY
Do Not Stuff
2
2
1
1
3D3V_S5
PR4116 PC4125 PR4119
1
1
SC4D7U6D3V5KX-3GP
2
Do Not Stuff
PR4118 0R2J-2-GP 1 PR4122 2
2
5V_PWR_2 DYDo1Not Stuff
2
Do Not Stuff 3V_5V_POK 19
Close to VFB Pin (pin5)
2 PR4120
1
PWR_5V3D3V_VREF DY Do Not Stuff
3D3V_PWR_2 2 PR4121 1
PU4106
Vz=5.1V PD4105
1
Do Not Stuff
DY PR4125 4 3 PWR_5V3D3V__EN0 TONSEL CH1 CH2
Do Not Stuff
1
SB_0923'10
A A
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC/DC 3D3V5V
Size Document Number Rev
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 41 of 102
5 4 3 2 1
5 4 3 2 1
PWR_CPUCORE_DOUT_R
1 2PWR_CPUCORE_TRBST_R
PWR_CPUCORE_CSCOMP_R
PR4242
10R2J-2-GP
PWR_CPUCORE_COMP_R
Place close to
1 2 VCC_CORE Inductor
PC4218 1 2
SC3300P50V2KX-1GP PWR_CPUCORE_DOUT 1 2 1 2 PC4222 1 2 PC4223 PR4258
PWR_CPUCORE_TRBST 1 2 PWR_CPUCORE_TRBST_C
1 2 SC100P50V2JN-3GP SC22P50V2JN-4GP NTC-220K-5-GP PR4257
PR4249 165KR2F-L-GP
1
PR4243 PR4244 24D9R2F-L-GP PC4224 PR4256 1 2 1 2
24K9R2F-L-GP PC4219 1K21R2F-2-GP 1 2 1 2 1 2 75KR2J-GP
PC4226
FOR
PR4255
3PHASE
SC2200P50V2KX-2GP
2
SC3300P50V2KX-1GP PR4250 PR4251 1 2 1 2 QC CPU only CSP2 43
D 1KR2F-3-GP 3K01R2F-3-GP PWR_CPUCORE_COMP SC470P50V2KX-3GP 133KR3F-GP D
PR4253
PWR_CPUCORE_CSCOMP 1 2 PC4225 1 2 CSP3 43 *QC/DC DC=64.14335.55L
8 VSSSENSE 1 PR4231 2 SC1200P50V2KX-1GP 133KR3F-GP
PWR_CPUCORE_FB
8 VCCSENSE
PR4212 133KR3F-GP
2
Do Not Stuff 2 1 SA 0902'10
PC4216 PR4254 10R2J-2-GP CSN1 43
SCD1U25V2KX-GP
23K7R2F-GP
SC1KP50V2KX-1GP 21KR2F-GP
PWR_CPUCORE_TRBST
PWR_CPUCORE_DOUT
PR4213
2
PWR_CPUCORE_VSN
*QC/DC DC=64.12425.6DL PWR_CPUCORE_CSREF 2 1
PWR_CPUCORE_IOUT
PWR_CPUCORE_ILIM1
1
10R2J-2-GP CSN3 43
Place close to
2
PC4205
PR4245 PR4264
1
VCC_CORE hot spot 8K25R2F-1-GP NTC-100K-11-GP 1 2 PC4203 PR4214
SC1KP50V2KX-1GP 2 1 QC CPU only
1
CSN2 43
PR4216
10R2J-2-GP
2
PG4201
FOR 3PHASE
2
PWR_CPUCORE_VSP
Do Not Stuff *QC/DC DC=64.24925.6DL
PR4203
75R2F-2-GP
53
52
51
50
49
48
47
46
45
44
43
42
41
40
1 2 PU4201
1D05V_VTT
FOR 3PHASE
GND
DIFFOUT
VSN
TRBST
FB
COMP
ILIM
DROOP
CSCOMP
CSSUM
IOUT
CSREF
NC#41
NC#40
1 PR4266 2 H_PROCHOT_R#
5,27 H_PROCHOT#
1D05V_VTT
Do Not Stuff 1 39 CSN2_R 2 PR4248 1 0R2J-2-GP
VSP CSN2 CSN2 43
PC4214 QC CPU only
2 1 PWR_CPUCORE_TSN 2 38 PWR_CPUCORE_CSP2
1 2
TSENSE CSP2
1
PC4220 SCD047U25V2KX-GP
75R2J-1-GP
56R2F-1-GP
130R2F-1-GP
PR4234
PR4235
8 H_CPU_SVIDCLK 0R2J-2-GPDC
PC4213 CPU only
1 2
PR4236 VR_SVID_ALERT# 6 34 PWR_CPUCORE_CSP1 1 2
10KR2F-2-GP ALERT# CSP1 CSP1 43
SCD047U25V2KX-GP PR4226
2
1
10KR2F-2-GP
1
PR4204
PR4207
10KR2F-2-GP
SC1U16V3KX-5GP PR4210
PR4205
5V_PWR 1 2 1 2 PWR_CPUCORE_ROSC
11 29 PWR_CPUCORE_IMAX
2 1
2R3J-GP 10KR2F-2-GP ROSC IMAX
73K2R2F-GP *QC/DC DC=64.41225.6DL
PR4201
2
1 2 VRMP 12 28
2
PC4202 VRMP PWMA/IMAXA PWR_CPUCORE_PWMA 44
1
SCD01U50V2KX-1GP
DCBATOUT 1 2 13 27 2 1 PR4211
TSENSEA VBOOTA 25K5R2F-GP
CSCOMPA
DIFFOUTA
DROOPA
CSSUMA
TRBSTA
PR4209
PWR_CPUCORE_VBTA
PR4208
COMPA
IOUTA
CSNA
VSNA
CSPA
VSPA
1KR2F-3-GP 10KR2F-2-GP
ILIMA
2
1
FBA
SCD1U25V2KX-GP
2PWR_CPUCORE_ILIMA
2PWR_CPUCORE_VSNA 14
2PWR_CPUCORE_VSPA 15
16
17
18
19
20
21
22
23
24
25
26
1PWR_CPUCORE_TRBSTA
DY
PC4221
PWR_CPUCORE_CSPA
PWR_CPUCORE_COMPA
PWR_CPUCORE_DOUTA
PWR_CPUCORE_TSNA
PWR_CPUCORE_FBA
PC4211 PR4229
1 2 0R2J-2-GP
1
PC4217 1 2
1
CSNA 44
1
PR4215
SCD047U25V2KX-GP
1 2
15K8R2F-GP
2
CSPA 44
PR4239
PR4238
2
CSPA 44
+IN -IN
1
PR4261 Do Not Stuff
DY
Do Not Stuff
1 2PR4217_R
1 2 75KR2J-GP PR4262 PR4232
DY
1
9 VCC_AXG_SENSE 165KR2F-L-GP 0R2J-2-GP Do Not Stuff
1
1 2 PR4270 DY DY
1 2 Do Not Stuff PC4230
2
PR4263 PC4229 Do Not Stuff
2
PR4218 NTC-220K-5-GP
2
1KR2F-3-GP 1 2 PC4207 PWR_CPUCORE_IOUT
SC39P50V2JN-1GP Place close to
1 2PR4219_R
1 2 VCC_GFXCORE Inductor
PR4219 PC4208
3K01R2F-3-GP SC2200P50V2KX-2GP
A A
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC/DC CPU CORE1 _NCP6131
Size Document Number Rev
LZ57 -1
Date: Thursday, March 31, 2011 Sheet 42 of 102
5 4 3 2 1
5 4 3 2 1
PWR_DCBATOUT_CPUCORE
DCBATOUT
PWR_DCBATOUT_CPUCORE
PG4320 DCBATOUT PWR_DCBATOUT_CPUCORE
PG4322
1 2 PC4303 PC4304 PC4305
1
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2
SC4D7U25V5KX-GP
6
5
2
1
Do Not Stuff
PG4317
D
D
D
D
Do Not Stuff PU4313
PG4319
2
1 2 IRF6721SPBF-GP-U
1 2 84.06721.030
Do Not Stuff
PG4321
GAP-CLOSE-PWR-3-GP
PG4318
S
D 1 2 D
1 2
3
Do Not Stuff
PG4324 VCC_CORE
Do Not Stuff PR4312
PG4323 PWR_VCORE1_HG 1
1 2 2 VCORE1_HG PL4301
1 2 Do Not Stuff
Do Not Stuff PWR_VCORE1_PH 1 2
PG4325
Do Not Stuff PR4313
1 2 PWR_VCORE1_LG 1 2 VCORE1_LG
Do Not Stuff L-D36UH-1-GP PTC4303 PTC4304
7
6
2
1
1
Do Not Stuff
D
D
D
D
Do Not Stuff
PU4312
SE330U2VDM-L-GP
2
2
IRF6725MTRPBF-GP-U
2
1
SE330U2VDM-L-GP
PTC4301 PTC4308 84.06725.030 PG4311 PG4312
79.10712.L02 Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
2
1
SE100U25VM-L1-GP
G
S
S
5
4
3
PC4301
1 2PWR_VCORE1_BT1_R
2
PR4302 SCD22U25V3KX-GP
2D2R3-1-U-GP 1 TP71
42 CSP142 CSN1
PWR_VCORE1_BT1 1 8 PWR_VCORE1_HG
C BST DRVH PWR_VCORE1_PH PC4311 C
2 7
42 PWR_CPUCORE_PWM1
42,44 PWR_CPUCORE_DRON 1 2PWR_VCORE1_EN 3
PWM
EN
SW
GND
6 FOR 3PHASE 1 2PWR_VCORE2_BT2_R
1
FLAG
2
PWR_VCORE1_LG
5V_PWR PR4301 2K74R2F-GP 4
VCC DRVL
5 DC CPU only
PR4305 SCD22U25V3KX-GP
5V_PWR 1 2
0R2J-2-GP 2D2R3-1-U-GP QC CPU only
1
PR4306
PC4302
9
NCP5911MNTBG-GP QC CPU onlyPU4311
SC1U10V2KX-1GP
2
PWR_VCORE2_BT2 1 8 PWR_VCORE2_HG
BST DRVH PWR_VCORE2_PH
42 PWR_CPUCORE_PWM2 2 7
PWM SW
42,44 PWR_CPUCORE_DRON 1 2PWR_VCORE2_EN 3 6
EN GND
FLAG
PWR_VCORE2_LG
5V_PWR PR4307 2K74R2F-GP 4
VCC DRVL
5
PC4306
1 2 PWR_VCORE3_BT3_R QC CPU only
1
1
QC CPU only
9
PR4303 SCD22U25V3KX-GP PC4312 NCP5911MNTBG-GP
2D2R3-1-U-GP SC1U10V2KX-1GP
2
PU4306 QC CPU only
PWR_VCORE3_BT3 1 8 PWR_VCORE3_HG
BST DRVH PWR_VCORE3_PH PWR_DCBATOUT_CPUCORE
42 PWR_CPUCORE_PWM3 2 7
PWM SW
42,44 PWR_CPUCORE_DRON 1 2PWR_VCORE3_EN 3 6
EN GND
FLAG
6
5
2
1
1
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
PC4307
SC4D7U25V5KX-GP
D
D
D
D
SC1U10V2KX-1GP PU4310
2
IRF6721SPBF-GP-U
2
B B
PWR_DCBATOUT_CPUCORE 84.06721.030 QC CPU only
S
4
3
PC4308 PC4309 PC4310 VCC_CORE
1
1
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
PR4310
SC4D7U25V5KX-GP
6
5
2
1
PWR_VCORE2_HG 1 2 VCORE2_HG
PL4303
D
D
D
D
IRF6721SPBF-GP-U PWR_VCORE2_PH 1 2
84.06721.030 L-D36UH-1-GP
PWR_VCORE2_LG 1 PR4311 2 VCORE2_LG QC CPU only
Do Not Stuff
7
6
2
1
G
1
D
D
D
D
PU4309
4
2
VCC_CORE IRF6725MTRPBF-GP-U QC CPU only
Do Not Stuff
Do Not Stuff
SE330U2VDM-L-GP
PR4309 84.06725.030
2
PWR_VCORE3_HG1 2 VCORE3_HG
PL4302
Do Not Stuff QC CPU only
1
G
S
S
PWR_VCORE3_PH 1 2
5
4
3
L-D36UH-1-GP PTC4305 PTC4306 PTC4307
7
6
2
1
1
D
D
D
D
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
IRF6725MTRPBF-GP-U 1
Do Not Stuff
2
Do Not Stuff
84.06725.030 TP70
A BOM CSN2 42 A
Do
42 Not Stuff CSP2
1
1
G
S
S
Wistron Corporation
5
4
3
D D
PWR_DCBATOUT_CPUCORE
1
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
6
5
2
1
D
D
D
D
PU4401
2
IRF6721SPBF-GP-U
84.06721.030
S
4
3
VCC_GFXCORE
PR4403
VREG_SWA_HG 1 2 SWA_HG
PL4401
Do Not Stuff
C VREG_SWA 1 2 C
PR4404
VREG_SWA_LG 1 2 SWA_LG
Do Not Stuff L-D36UH-1-GP
7
6
2
1
1
PTC4402 PTC4403
D
D
D
D
PU4403
IRF6725MTRPBF-GP-U
ST330U2VDM-4-GP
ST330U2VDM-4-GP
2
2
84.06725.030
Do Not Stuff
Do Not Stuff
PG4407
PG4408
G
S
S
1
5
4
3
1
TP73
42 CSPA 42 CSNA
PR4401 SCD22U25V3KX-GP
2D2R3-1-U-GP
PU4405
B VREG_GFX_BOOT VREG_SWA_HG B
1 8
BST DRVH VREG_SWA
42 PWR_CPUCORE_PWMA 2 7
PWM SW
42,43 PWR_CPUCORE_DRON 2 PR4402 1VREG_GFX_EN 3 6
EN GND
FLAG
4 5 VREG_SWA_LG
5V_PWR VCC DRVL
0R2J-2-GP
1
PC4405 NCP5911MNTBG-GP
SC1U10V2KX-1GP
2
BOM
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC/DC CPU CORE3 _NCP6131
Size Document Number Rev
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 44 of 102
5 4 3 2 1
5 4 3 2 1
DCBATOUT PWR_1D05V_DCBATOUT
PG4501
1 2
Do Not Stuff
PG4502
1 2
Do Not Stuff
PG4503
1 2
Do Not Stuff
PG4504
D D
1 2
Do Not Stuff
PWR_1D05V_DCBATOUT
1
PTC4501
79.10712.L02
2
SE100U25VM-L1-GP
1
SC_1028'10 PC4504 EC4501
SC4D7U25V5KX-GP
Do Not Stuff
TPS51218 for 1D05V
2
5
6
7
8
D
D
D
D
PU4502 DY
P0903BK-GP-U
3D3V_S0
G
4
S
S
S
PR4512 Id=14.3A
1 2
Qg=9.2~14nC
3
2
1
10KR2J-3-GP Rdson=11~14mohm Mag. 0.56uH 10*10*4
Iomax=16A
37,48 1.05VTT_PWRGD PU4501 DCR=1.6~1.8mohm OCP>24A
PR4505 PC4503 Idc=25A, Isat=40A
SC_1028'10 PR4501 1 11 2D2R3J-2-GP SCD1U25V3KX-GP 1D05V_VTT
PWR_1D05V_TRIP PGOOD GND PWR_1D05V_BOOT 1
1 2 2 10 2 PWR_1D05V_BOOT_R
2 1
TRIP VBST
19,36,37,46,47 RUNPWROK 1 PR4502 2 86K6R2F-GP PWR_1D05V_EN 3 9 PWR_1D05V_UGATE PL4501
PWR_1D05V_VFB EN DRVH PWR_1D05V_PHASE
4 8 1 2
Do Not Stuff PWR_1D05V_CCM VFB SW
C 5 7 5V_S5 C
CCM V5IN
1
6 PWR_1D05V_LGATE IND-D56UH-27-GP
DRVL
1
1
PR4504 PC4501 10R2F-L-GP PC4509
5
6
7
8
470KR2F-GP TPS51218DSCR-GP-U1
36 PWR_1D05V_EN
D
D
D
D
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SC1U10V2KX-1GP
SCD1U25V3KX-GP
PU4503
2
2
SIR460DP-T1-GE3-GP
VTT_SENSE_L
1
SC1KP50V2KX-1GP
PC4505
1
S
S
S
PR4507
G
2
10KR2F-2-GP
4
3
2
1
2
Id=26.5A SC_1028'10
PWR_1D05V_VFB
Qg=40.6~61nC,
Rdson=2.6~3.2mohm
1
PR4508
20KR2F-L-GP -1_1213'10
2
VSS_SENSE_L
1
PR4509
10R2F-L-GP
2
B B
VTT_SENSE_L 1
PR4510 DYDo2 Not Stuff VCCIO_SENSE 8
1
PC4510
DY Do Not Stuff
2
VSS_SENSE_L 1
PR4511 DYDo2 Not Stuff VSSIO_SENSE 8
Vout=0.704V*(R1+R2)/R2
BOM
A
Wistron Corporation A
Title
TPS51218_1D05V
Size Document Number Rev
-1
Date: Tuesday, March 29, 2011 Sheet 45 of 102
5 4 3 2 1
5 4 3 2 1
DCBATOUT PWR_1D5V_DCBATOUT
20100723 Jay modify
PG4601 PWR_1D5V_DCBATOUT
1 2
1
Do Not Stuff PC4605 PC4606 PC4607 PC4608 PC4609 Do Not Stuff Do Not Stuff
PG4603 PG4606 PG4614
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2 1 2 1 2
2
5
6
7
8
D
D
D
D
Do Not Stuff Do Not Stuff Do Not Stuff
PG4604 3D3V_S0 PG4607 PG4615
D
PU4602 D
PR4607
1 2 1 2 1 2
P0903BK-GP-U
1 2
Do Not Stuff Do Not Stuff Do Not Stuff
G
4 PG4608 PG4616
S
S
S
10KR2J-3-GP Id=14.3A
1 2 1 2
Qg=9.2~14nC
3
2
1
DY 19,36,37,45,47 RUNPWROK Iomax=16A Do Not Stuff Do Not Stuff
Rdson=11~14mohm PG4609 PG4617
1
PR4601 1 11 2D2R3J-2-GP SCD1U25V3KX-GP Idc=25A, Isat=40A 1D5V_PWR Do Not Stuff Do Not Stuff
PGOOD GND PG4610 PG4618
1 2 PWR_1D5V_TRIP 2 10 PWR_1D5V_BOOT 1 2PWR_1D5V_BOOT_R 2 1
82K5R2F-GP PWR_1D5V_EN TRIP VBST PWR_1D5V_UGATE PL4601
19,27 PM_SLP_S4# 1 2 3 9 1 2 1 2
PWR_1D5V_VFB EN DRVH PWR_1D5V_PHASE
4 8 1 2
PR4602 PWR_1D5V_CCM VFB SW Do Not Stuff Do Not Stuff
5 7 5V_S5 PG4611 PG4619
Do Not Stuff CCM V5IN PWR_1D5V_LGATE IND-D56UH-27-GP PTC4603
6
DRVL
1
-1_1208'10 PC4603 PC4610 1 2 1 2
SC1U16V3KX-5GP
DY PR4605 PC4601
5
6
7
8
SE330U2VDM-L-GP
470KR2F-GP TPS51218DSCR-GP-U1 PR4608 Do Not Stuff Do Not Stuff
Do Not Stuff
PG4612 PG4620
2
D
D
D
D
SC1U10V2KX-1GP
PU4603 11K5R2F-GP
1 2 1 2
SIR460DP-T1-GE3-GP
2
GAP-CLOSE-PWR-3-GP Do Not Stuff
PWR_1D5V_VFB
1
S
S
S
G
SE330U2VDM-L-GP
4
3
2
1
1
PTC4602
2
PR4609
SC_1028'10 10KR2F-2-GP
C C
2
Id=26.5A
Qg=40.6~61nC,
Rdson=2.6~3.2mohm
Vout=0.704V*(R1+R2)/R2
B B
0D75V_PWR 0D75V_S0
PG4621
PU4604 1 2
-1_1208'10 0R0402-PAD
10 1 Do Not Stuff
VIN VDDQSNS
19,27 PM_SLP_S4# 1 PR4610 2 PWR_0D75V_S5 9 2 PG4622
S5 VLDOIN
8 3 1 2
GND VTT
37 0D75V_EN 1 PR4611 2 PWR_0D75V_S3 7 4
DDR_VREF_S3 S3 PGND Do Not Stuff
DDR_VREF_S3 6 5
Do Not Stuff VTTREF VTTSNS
GND
1
Do Not Stuff
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
5 4 3 2 1
3D3V_S5
2
PR4701
Do Not Stuff
DY RT8015B for 1D8V_S0
1
19,36,37,45,46 RUNPWROK 1 PR4708 2 PWR_1D8V_GD
Do Not Stuff
Mag.7*7*3 Iomax=3A
3D3V_S0
PU4701 DCR=28~30mohm, Irating=6A
RT8015BGQW-GP Isat=13.5A
1D8V_S0
6 5 PG4701
PVDD PGND PL4701
7 4 PWR_1D8V_LX 2 1 1D8V_PWR 1 2
VDD LX#4 IND-3D3UH-57GP
1
1
PC4709 PC4707 PC4708
PG4702
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PWR_1D8V_FB 9 2 PR4707
2
FB GND
SC100P50V2JN-3GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C 20KR2F-L-GP 1 2 C
2
PWR_1D8V_COMP 10 1 PWR_1D8V_RT
GND
COMP SHDN/RT Do Not Stuff
2
1
PG4703
PR4703 PWR_1D8V_FB
11
1 2
820KR2F-GP
1
20100706 Do Not Stuff
2
PR4706
PR4702
PC4703 16KR2F-GP
1 2PWR_1D8V_COMP_R
1 2
2
SC1500P50V2KX-2GP
14KR2F-GP
PC4704
1 2
SC47P50V2JN-3GP Vo=0.8*(1+(R1/R2))
S D
PQ4701
AO7401-GP
G
B Do Not Stuff B
PC4710
1
Do Not Stuff
DY
2
A A
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
1D8V_RT9025
Size Document Number Rev
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 47 of 102
5 4 3 2 1
5 4 3 2 1
DCBATOUT PWR_VCCSA_DCBATOUT
PG4801
1 2
Do Not Stuff
PG4802
1 2
Do Not Stuff
PG4803
1
Do Not Stuff
2 RT8208A for VCCSA
D D
PWR_VCCSA_DCBATOUT
1
PC4803 PC4804 PC4805 PC4806
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SCD1U25V3KX-GP
5V_S5
2
1
1
PC4801
PR4802
SC1U10V2KX-1GP
PR4801
2
Freq=300KHz D
5
6
7
8
2D2R3J-2-GP 1 2
D
D
D
D
PU4802
P2003BEA-GP
S-HR_20100614 V1.1 249KR2F-GP
2
G
4
1
S
S
S
PC4802
G S Iomax=6A
SC1U10V2KX-1GP
3
2
1
OCP>9A
2
PC4807 DCR=14~15mohm
2
1
42 D85V_PWRGD PWR_VCCSA_CS 10 3 PWR_VCCSA_FB PC4808
Do Not Stuff CS FB
14 PWR_VCCSA_G1 1 PR4807 2 H_FC_C22 9
PTC4801 Do Not Stuff
PG4806
G1
SE390U2D5VM-7GP
SCD1U25V3KX-GP
PWR_VCCSA_D1 0R2J-2-GP
5 D
2
D1
1
5
6
7
8
PR4805 PWR_VCCSA_EN 15 6 PWR_VCCSA_D0 1 2
EM/DEM D0
D
D
D
D
PU4803
SC_1028'10 23K2R2F-GP 17 1 VCCSA_PWR Do Not Stuff
GND VOUT PG4807
P2003BEA-GP
1 2
2
RT8208BGQW-GP
G
4
S
S
S
Do Not Stuff
PG4808
G S Matsuki cap 390uF
3
2
1
SC_1028'10 2.5V, ESR=10mohm 1 2
Do Not Stuff
PG4809
PWR_VCCSA_FB_R
Rdson=14.5~17.5mohm
2
DY 1
Do Not Stuff
VCCSA_PWR 1 2
DY Do Not Stuff
2
1
PC4809
PR4808
1
Do Not Stuff PC4810 1 PR4810 2
10KR2F-2-GP VCCSA_SENSE 9
DY
Do Not Stuff
Do Not Stuff
2
B B
2
Vout=0.75*(1+R1/R2)
PWR_VCCSA_FB
VCCSA_SEL VCCSA_PWR
1
L 0.9V
PR4811 PR4812 PR4813
Do Not Stuff 76K8R2F-GP 143KR2F-L-1-GP
H 0.8V DY
2
PWR_VCCSA_D1
PWR_VCCSA_D0
A A
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RT8208B_VCCSA
Size Document Number Rev
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 48 of 102
5 4 3 2 1
SSID = VIDEO LVDSA_DATA1_R 5
RN9402
4 LVDSA_DATA1 17
CAMERA POWER
LVDSA_DATA1_R# 6 3 LVDSA_DATA1# 17
LVDSA_DATA0_R 7 2 LVDSA_DATA0 17
LVDSA_DATA0_R# 8 1 LVDSA_DATA0# 17 3D3V_CAMERA_S0
SRN0J-7-GP R4905
LVDS CONNECTOR 1 2
Do Not Stuff DY
DCBATOUT_LCD RN9403 Q4902
LCD1 LVDSA_CLK_R 5 4 3D3V_S0 AO3419L-GP
LVDSA_CLK 17
48 LVDSA_CLK_R# 6 3 LVDSA_CLK# 17
LVDSA_DATA2_R 7 2 S D
LVDSA_DATA2 17
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
41 50 LVDSA_DATA2_R# 8 1 LVDSA_DATA2# 17
1
1 C4911 C4906
1
SCD1U10V2KX-4GP
SRN0J-7-GP R4907 C4903
G
2 100KR2J-1-GP
2
3
2
4 33R2J-2-GP
2
5 BLON_OUT_C 3D3V_S0 CAM_ON_T
42 6 LCD_BRIGHTNESS 2 R4902 1 LBKLT_CTL
7 DCR_EN#_C
8 3D3V_CAMERA_S0
D
2
1
9 USB_CAMERA# 1 R4908 2Do Not Stuff
USB_CAMERA USB_PN12 18
10 1 2 Q4901
USB_PP12 18
11 R4909 Do Not Stuff SRN2K2J-1-GP 2N7002A-7-GP
12 RN9404 27 CAMERA_EN G 84.2N702.E31
43 13 2ND = 84.2N702.D31
14 For Camera GND
3
4
15 RN9405 SB 1016 change to 84.2N702.E31
S
16 LVDS_DDC_CLK 2 3 LVDS_DDC_CLK_R 17
17 LVDS_DDC_DATA 1 4 LVDS_DDC_DATA_R 17
18
19 SRN0J-6-GP
44 20
21
22 LCD_CBL_DET#_C 1 TP4902Do Not Stuff
23 LVDSA_CLK_R
24 LVDSA_CLK_R#
25 LCD_DET_G 1 TP4903Do Not Stuff For EMI request
SB 0923'10
26 LVDSA_DATA2_R Close to LVDS connector
45 27 LVDSA_DATA2_R#
28
29 LVDSA_DATA1_R LCD_BRIGHTNESS
30 LVDSA_DATA1_R# Color_Engine#
31
32 LVDSA_DATA0_R
33 LVDSA_DATA0_R# LVDSA_CLK_R#
46 34 LVDS_DDC_DATA LVDSA_CLK_R
35 LVDS_DDC_CLK
1
36 Color_Engine#_C 1 2 EC4904 EC4905 EC4901 EC4902
Color_Engine# 22
37 1KR2J-1-GP DY DY
3D3V_S0 DY
Do Not Stuff
Do Not Stuff
38 R4913 LCDVDD
2
39 SB_0927'10 DY
Do Not Stuff
Do Not Stuff
40
SCD1U10V2KX-5GP
C4901
47 51
1
C4902
49
SC1U6D3V2KX-GP
SSID = VIDEO
2
IPEX-CONN40-2R-GP-U
R4903
20.F1093.040
1 2 BLON_OUT_C
27 BLON_OUT
2
1KR2J-1-GP
1
R4911
DCBATOUT_LCD DCBATOUT C4910
100KR2J-1-GP
SC100P50V2JN-3GP
2
F4901
1
2 1
1
POLYSW-1D1A24V-GP-U LCDVDD
C4904 C4905 3D3V_S0
Main:69.50007.A41
SC1KP50V2KX-1GP
SCD1U50V3KX-GP
2
U4901
Second:69.50007.A31
Color_Engine#_C LCDVDD_EN
Layout 40 mil
1 5
EN IN#5
2
GND
3 4
2
OUT IN#4
1
R4914 C4907
Close Connector
SC4D7U6D3V3KX-GP
R4910 C4909 C4908 G5285T11U-GP
DY Do Not Stuff
SC4D7U6D3V3KX-GP
100KR2J-1-GP 74.05285.07F
2
DY
1
2
Do Not Stuff
2
2nd = 74.09724.09F
Panel BL brightness/Power En/BL En
R4904 SRN0J-6-GP
2 LBKLT_CTL
DY 1 3D3V_S0 17 L_BKLT_CTRL
4
3
1
2 LCDVDD_EN
17 LVDS_VDD_EN
Do Not Stuff RN9401
BOM
DCR_EN#_C 2 R4901 1 DCR_EN# 18
33R2J-2-GP
SC100P50V2JN-3GP
1
C9401
Wistron Corporation
1
DY Title
2
LCD Connector
Size Document Number Rev
20100706 A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 49 of 102
5 4 3 2 1
1
D CRT_R 1 6 500mA D
SCD01U16V2KX-3GP
2
CRT_VSYNC_CON VSYNC GND
CRT_HSYNC_CON 13 HSYNC GND 17 1 AFTP185 3rd = 83.R5003.G8F
5V_CRT_DDC
2
1
4
3
D-SUB-15-78-GP RN5002
SRN2K2J-1-GP RN5003
3D3V_S0_DDC SRN10KJ-5-GP
CRT_DDCDATA_CON 1 AFTP178 20.20882.015
CRT_DDCCLK_CON 1 AFTP179
Q5001
3
4
CRT_R 1 AFTP180
1
2
CRT_G 1 AFTP181 CRT_Z = 20.20894.015 17 CRT_DDC_DATA 4 3 CRT_DDCDATA_CON
CRT_B 1 AFTP182
CRT_VSYNC_CON 1 AFTP183 5 2
CRT_HSYNC_CON 1 AFTP184
6 1
C C
2N7002KDW -GP
17 CRT_DDC_CLK
84.2N702.A3F
5V_S0 CRT_DDCCLK_CON
2nd = 84.DM601.03F
CRT Hsync & Vsync level shift
1
C5007
SCD1U10V2KX-5GP
2
U5001
1 1OE# VCC 8
17 CRT_HSYNC 2 7 R5002
1A 2OE#
CRT_VSYNC_CON 2 1CRT_VSYNC1_2 3 2Y 1Y 6 CRT_HSYNC1_21 2 CRT_HSYNC_CON
10R2J-2-GP R5001 4 5 10R2J-2-GP CRT_VSYNC 17
GND 2A
CRT_DDCDATA_CON
74AHCT2G125DP-GP
1
B C5008 CRT_HSYNC_CON B
1
C5009 CRT_VSYNC_CON
Do Not Stuff
1
SC_1026'10 C5010CRT_DDCCLK_CON
2
Do Not Stuff
&575*% DY
1
L5001
Do Not Stuff
1 2 CRT_R C5011
17 CRT_RED
BLM15BA330SN1D-GP DY
Do Not Stuff
L5002 DY
17 CRT_GREEN 1 2 CRT_G
DY
BLM15BA330SN1D-GP
L5003
17 CRT_BLUE 1 2 CRT_B
BLM15BA330SN1D-GP BOM
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
8
7
6
5
1
C5004
C5005
C5006
Do Not Stuff
Do Not Stuff
Title
CRT Connector
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 50 of 102
5 4 3 2 1
5 4 3 2 1
5
6 HDMI_DATA1_R_C#
Close to HDMI Connector 7 HDMI_DATA0_R_C
8
SRN0J-6-GP RN5103 9 HDMI_DATA0_R_C#
1 4 HDMI_CLK_R_C# 10 HDMI_CLK_R_C
17 HDMI_CLK_R# HDMI_CLK_R_C
2 3 11
17 HDMI_CLK_R HDMI_CLK_R_C# AFTP200
12
2 3 HDMI_DATA0_R_C 13
17 HDMI_DATA0_R HDMI_DATA0_R_C# 5V_S0
1 4 14
17 HDMI_DATA0_R# SRN0J-6-GP RN5108 DDC_CLK_HDMI
15
1
SRN0J-6-GP
1 4RN5104 HDMI_DATA1_R_C# 16 DDC_DATA_HDMI
17 HDMI_DATA1_R# HDMI_DATA1_R_C F5101
2 3 17
17 HDMI_DATA1_R RN5107 5V_HDMI
18 2 1
SC1000P50V3JN-GP-U
HDMI_DATA2_R_C# HPD_HDMI_CON
EC925
SRN0J-6-GP
1 4 19
17 HDMI_DATA2_R# HDMI_DATA2_R_C
2 3
1
17 HDMI_DATA2_R
EC3906
21 1 C5101 FUSE-1D1A6V-4GP-U
69.50007.691
SCD1U10V2KX-5GP
SKT-HDMI19P-79-GP AFTP201 2nd = 69.50007.771
2
R5105 1 2Do Not Stuff
SC1U10V2KX-1GP
22.10296.281 DY
SRN680-U-GP
SRN680-U-GP
8
7
6
5
5
6
7
8
2nd = 22.10296.291
RN5101
RN5102
HDMI_Z = 22.10296.491
SC_1027'10
1
2
3
4
4
3
2
1
C C
HDMI_PLL_GND
D
Q5103
HDMI DDC Passive Level Shifter
.
2N7002E-1-GP
.
3D3V_S0
. .
. 84.2N702.D31 5V_S0
2ND = 84.2N702.J31
G
S
1
1
R5104 D5100
Do Not Stuff
DY CH461FPT-GP-U
2
3
HDMI_CLK_R_C R5110 1 2240R2F-1-GP HDMI_CLK_R_C#
5V_S0_LS1
SC_1025'10
SC_1029'10
3D3V_S0
1
1
R5112 R5111
20100727 follow intel design guide 330R2F-GP
330R2F-GP
20100727 modify, KBC isn't use.
2
2
3D3V_S0 Q5104
1 6 DDC_DATA_HDMI
17 PCH_HDMI_DATA
2 5
1
3D3V_S0
R5101 3 4
1MR2J-1-GP
1
DMN66D0LDW-7-GP
G
DY R5102 DDC_CLK_HDMI
2
Do Not Stuff
2nd = 84.27002.F3F
S D HPD_HDMI_CON
17 HDMI_PCH_DET
2
17 PCH_HDMI_CLK
HDMI_OE# 1 R5103 2 HDMI_IN# 27 84.DMN66.03F
Do Not Stuff
Q5102
1
D
2N7002A-7-GP R5106
A BOM A
. Q5101 20KR2J-L2-GP
84.2N702.E31
DY; main(84.2N702.E31)
.
Do Not Stuff
Wistron Corporation
2
Title
HPD_HDMI_CON
HDMI Level Shifter/Connector
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 51 of 102
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
A A
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
eDP
Size Document Number Rev
A0
LZ57 -1
Date: Tuesday , March 29, 2011 Sheet 52 of 102
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
S-VIDEO
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 53 of 102
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 54 of 102
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
D
ITP Connector D
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ITP
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 55 of 102
5 4 3 2 1
SSID = SATA
SATA HDD Connector
3D3V_S0
HDD1
1
23 DY R1927
NP1 Do Not Stuff
1
2
SATA_TXP0 2 SATA_ODD_DA#_C
21 SATA_TXP0
20100731 21 SATA_TXN0 SATA_TXN0 3
ODD_PWRGT#
4
SATA_RXN0_C C5603 1 2 SCD01U16V2KX-3GP SATA_RXN0 5
21 SATA_RXN0_C
21 SATA_RXP0_C SATA_RXP0_C C5602 1 2 SCD01U16V2KX-3GP SATA_RXP0 6
7
R5608 8
1 2 Do Not Stuff 3D3V_S0_HDD 9
3D3V_S0
DY 10
4
11
12 Q5002
R5607
13
14
DY Do Not Stuff
Do Not Stuff
5V_S0 1 2 0R5J-5-GP 5V_S0_HDD 15
3
16 2nd = 84.DM601.03F
1
20100706 C5605 C5606 17
18
19 SATA_ODD_DA#
SCD1U10V2KX-5GP
SC10U10V5ZY-1GP
2
2
20
21 SATA_ODD_PWRGT
1
C5604 C5601
DY DY 22
NP2
24
2
SC_1025'10
Do Not Stuff
Do Not Stuff
TYCO-CON22-1-GP-U2
20101019 reserve for isolate MD/DA signal between PCH and ODD
20.F1011.022
2nd = 20.F1698.022
22 SATA_ODD_PWRGT
G547F1P81U-GP
5V_S0
ODD1 4 5
EN/EN# OC# ODD_PWR_5V
3 6 100 mil
ODD_PWR_5V_IN IN#3 OUT#6
9 NP2 1 R5606 2 2 7
GND NP2 IN#2 OUT#7
8 NP1 1 8
1
GND NP1 Do Not Stuff GND OUT#8
P6
1
GND SATA_RX4-_C C5607 1 20100706
P5 S5 2SCD01U16V2KX-3GP SATA_RXN4_C 21 TC5604
GND B- SATA_RX4+_C C5608 1 U5601
S7 S6 2SCD01U16V2KX-3GP SATA_RXP4_C 21 TC5603
SC10U10V5ZY-1GP
2
GND B+ SATA_TXN4
S4 S3 SATA_TXN4 21 74.00547.C79
SC10U10V5ZY-1GP
2
GND A- SATA_TXP4
S1 S2 SATA_TXP4 21
Do Not Stuff GND A+ 2ND =
SATA_ODD_DA# 1 R5605 2SATA_ODD_DA#_C P4 P3 ODD_PWR_5V
18,27 SATA_ODD_DA#
22 SATA_ODD_PRSNT# SATA_ODD_PRSNT# P1
MD +5V
P2 ƵƌƌĞŶƚůŝŵŝƚ
DP +5V
ĐƚŝǀĞ,ŝŐŚ
SKT-SATA7P-6P-12-GP-U2
ƚLJƉсхϮ
1
R5604 62.10065.521
DY Do Not Stuff
2
3D3V_S0
RN5601 BOM
SATA_ODD_PWRGT 4 1
SATA_ODD_DA# 3 2
HDD/ODD
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 56 of 102
5 4 3 2 1
5V_USB0_S3
ESATA1
USB_PP8_C U3 U1
USB_PN8_C D+ VBUS
U2
D-
U4 DY DY
1
GND C5703
D S1 D
SATA_TXP5 GND TC5701 C5704 C5706
21 SATA_TXP5 S2 S4
SATA_TXN5 A+ GND
S3 S7
SE220U6D3VM-21-GP
SCD1U10V2KX-4GP
21 SATA_TXN5
2
Do Not Stuff
Do Not Stuff
A- GND
12
GND
13
C5705 1 SCD01U16V2KX-3GP SATA_RXP5 GND
21 SATA_RXP5_C 2 S6 14
C5701 1 SCD01U16V2KX-3GP SATA_RXN5 B+ GND
21 SATA_RXN5_C 2 S5
B- GND
15 SB_0925'10
SKT-USB15-GP
22.10290.151 1
AFTP153
ESATA_Z = 22.10321.X11
5V_USB0_S3
18 USB_PP8 1 R5701 USB_PP8_C
2 0R0402-PAD
D5701
1 4
DY
C USB_PN8_C 1 AFTP147 C
USB_PP8_C 1 AFTP148
USB_PP8_C 2 3 USB_PN8_C SATA_TXN5 1 AFTP146
SATA_TXP5 1 AFTP149
Do Not Stuff SATA_RXN5 1 AFTP152
R5702 SATA_RXP5 1 AFTP151
18 USB_PN8 1 USB_PN8_C
2 0R0402-PAD 5V_USB0_S3 1 AFTP150
B B
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
E-SATA/LUSB
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 57 of 102
5 4 3 2 1
5 4 3 2 1
D D
SA 0903'10
SPK1
4
29 AUD_SPK_L-_L 2
1
29 AUD_SPK_L+_L 3
AUD_SPK_L-_L 1 AFTP138
AUD_SPK_L+_L 1 AFTP137
Place these EMI components MLX-CON2-7-GP-U AUD_SPK_R-_L 1 AFTP129
AUD_SPK_R+_L AFTP140
close to speaker connector. 20.F0693.002 1
2
EC5801 EC5802
SC100P50V2JN-3GP SC100P50V2JN-3GP
1
Only needed if speaker
connector is physically far from
audio codec. When in doubt, it's
always a good idea to have
population option.
SPK2
29 AUD_SPK_R-_L 4
B B
2
29 AUD_SPK_R+_L 1
3
MLX-CON2-7-GP-U
2
EC5803 EC5804
20.F0693.002
SC100P50V2JN-3GP SC100P50V2JN-3GP
1
BOM
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
MIC/SPEAKER/AUDIO JACK
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 58 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserved
B B
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 59 of 102
5 4 3 2 1
5 4 3 2 1
SSID = Flash.ROM
3D3V_SPI
1
C6002
D C6001 D
8
7
6
5
2
Do Not Stuff
RN6001
DY
SCD1U10V2KX-5GP
SRN4K7J-10-GP
1
2
3
4
SPI_HOLD_0#
3D3V_SPI 20100629 SA
3D3V_SPI DY
U6001 2 R6011 1 3D3V_S0
Do Not Stuff
21,27 SPI_CS0#_R 1 8 2 R6010 1 3D3V_S5
SPI_SO CS# VCC 0R2J-2-GP
21,27 SPI_SO_R 1 2 2 7
R6001 33R2J-2-GP SPI_WP# SO/SIO1 HOLD#
3
WP# SCLK
6 SPI_CLK_R 21,27 the same page 23 VCCSPI power
4 5 SPI_SI_R 21,27
GND SI/SIO0
1
DY
1
EC6002 MX25L3206EM2I-12G-GP
Do Not Stuff EC6003 DY DY EC6001
Do Not Stuff
Do Not Stuff
C C
B B
3D3V_AUX_S5
20.F0735.003
RTC_AUX_S5 Q6001
SSID = RBATT 2
+RTC_VCC
ACES-CON3-1-GP-U1
3 4
1 RTC_PWR 1 R6002
2 1
2
1KR2J-1-GP
C6003 CH715FPT-GP 2
SC1U6D3V2KX-GP 3
1
83.R0304.B81
2nd = 83.00040.E81 BOM
Width=20mils 5
A A
Title
Flash/RTC
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 60 of 102
5 4 3 2 1
5 4 3 2 1
SSID = USB
RJ45_USB Board USB Power
D D
5V_RUSB3_S0
5V_S5
U6103
at least 80 mil
at least 80 mil 1 8
GND VOUT#8
2 7
VIN VOUT#7
3 6
1
VIN VOUT#6
SC4D7U10V5ZY-3GP
4 5 USB_OC#10_11 18 C6108
1
C6107 27,62 USB_PWR_EN# EN# OC#
DY
Do Not Stuff
2
UP7534BRA8-15-GP
2
2nd = 74.00547.A79
74.07534.079
C C
5V_RUSB2_S0
5V_S5
U6102
at least 80 mil 1
2
GND
VIN
VOUT#8
VOUT#7
8
7
at least 80 mil
I/O Board USB Power
3 6
1
VIN VOUT#6
SC4D7U10V5ZY-3GP
4 5 USB_OC#12_13 18 C6109
1
2
B B
UP7534BRA8-15-GP
2
2nd = 74.00547.A79
74.07534.079
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
USB Power SW
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 61 of 102
5 4 3 2 1
5 4 3 2 1
1
100 mil 1 8 U6202_OC1# R6213 USB2.0 100 mil
R6211 GND OC1# 0R3J-0-U-GP
USB3.0; main(84.2N702.E31) 2
IN OUT1
7
10KR2J-3-GP U6202_EN1# 3 6
Q6201 EN1/EN1# OUT2
4 5
1
C6205 EN2/EN2# OC2# USB_OC#8_9 18 C6202 C6206
S
2
SC1U10V3ZY-6GP 5V_USB0_S3 TC6202
SC10U10V5ZY-1GP
.
.
.
.
D G546A2P1UF-GP
SCD1U16V2KX-3GP
SE220U6D3VM-21-GP
D D
2
74.00546.A7D at least 80 mil
.
35 USB30_ON0 G
LOW ACTIVE TYPE!!
1
2ND = 84.2N702.E31 C6204
1
2N7002K-2-GP R6215
84.2N702.J31
DY
Do Not Stuff
R6209 USB2.0 DY
Do Not Stuff
2 1
27,61 USB_PWR_EN# 0R2J-2-GP
2
27,61 USB_PWR_EN#
R6201
USB20_DM0_C 1 2 USB20_DM0 35 U6204
5V_LUSB1_S0
0R3J-0-U-GP
USB3.0 USB30_RXDN0_C 1 8
C USB3.0 DY C
R6202
USB20_DP0_C 1 2 USB20_DP0 35 USB30_TXDP0_C 4 5 USB1_DP
0R3J-0-U-GP
USB3.0 Do Not Stuff
SA 0827'10
USB1
8 CHASSIS
6 CHASSIS
USB3.0 SKT-USB8-81-GP
SRN0J-6-GP
USB_PN1_C 2 3
USB_PP1_C 1 4 USB2.0
1 R6208 2 USB_PN1_C RN6201
B 18 USB_PN1 B
0R2J-2-GP 22.10339.291
USB2.0
USB_Z = 22.10321.X71
USB30_RXDN0_C
1 TP68 Do Not Stuff
USB30_RXDP0_C
1 TP72 Do Not Stuff
USB30_TXDN0_C
1 TP74 Do Not Stuff
USB30_TXDP0_C
1 TP75 Do Not Stuff
5V_LUSB1_S0
D5708
1 4
AFTP159 1 USB_PN1_C
AFTP162 1 USB_PP1_C
DY AFTP164 1 USB1_DN
AFTP165 1 USB1_DP
USB_PP1_C 2 3 USB_PN1_C
Do Not Stuff
USB30_RXDN0_C 1 AFTP167
USB30_RXDP0_C 1 AFTP168
USB30_TXDN0_C 1 AFTP169
A <Variant Name>
BOM A
USB30_TXDP0_C 1 AFTP170
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SSID = User.Interface
Bluetooth Module conn.
D D
Bluetooth Module
3D3V_BT_S0
U6301 3D3V_S0
C6302
1 R6301 23D3V_BT 1 OUT IN 5 1 2
2 GND
Do Not Stuff 3 4 SC4D7U6D3V3KX-GP
NC#3 EN
1
BLUETOOTH_EN 27
C EC6302 C
G5240B1T1U-GP
Do Not Stuff
BT1
7
ACES-CON6-1-GP-U1
Do Not Stuff
TP6302 1 BLUETOOTH_EN 20.F0772.006
AFTP161 1 3D3V_BT_S0
AFTP157 1 USB_PP3
AFTP158 1 USB_PN3 2ND = 20.F1804.006
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Bluetooth
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 63 of 102
5 4 3 2 1
5 4 3 2 1
5V_S0 3V_FP_S0
U6401
D D
1 VIN DY VOUT 5
2 GND
3 EN/EN# NC#4 4
1
DY
1
C6402
DY Do Not Stuff
2
2
C6403 Do Not Stuff Do Not Stuff
C C
R6406 LA57
1 2
5V_S0 0R2J-2-GP
R6403 DY
1 2 3V_FP_S0
20.K0320.006
1
B 1 B
2
3
18 USB_PP2 1 R6401 2 Do Not Stuff Biometric_USBPP 4
18 USB_PN2 1 R6402 2 Do Not Stuff Biometric_USBPN 5
6
1 8
AFTP40
ACES-CON6-13-GP
1
R6404
0R2J-2-GP
2
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RESERVED
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 64 of 102
5 4 3 2 1
5 4 3 2 1
SSID = Wireless
D D
WLAN1
53
41
C6502 C6503 C6504 0626 PV2 42
43
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
SCD1U16V2KX-3GP
2
+1D5V_MINI_WLAN
DY 50
51 +5V_MINI_DEBUG 1
R6503
2
5V_S5 5V_S5
52 Do Not Stuff
NP2
1
54
C6501 C6505 C6506 C6507
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
2
PTWO-CONN52A-8-GP
20.F1518.052
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
MINICARD(WLAN)/ITP CONN
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 65 of 102
5 4 3 2 1
5 4 3 2 1
SSID = Wireless
Mini Card Connector(WWAN)
3D3V_S0
Place near MINI Card CONN
1D5V_S0
+3V_MINI_WWAN WWAN1
1
D 53 D
1
ST220U6D3VDM-15GP R6610
TC6601
SC33P50V2JN-3GP
PCIE_WAKE# 19,31,35,65
1
Do Not Stuff
C6603
C6604
LA57 DY DY
2
LA57 C6601 C6602 2
2
3
2
2
SCD047U16V2KX-1-GP
SCD047U16V2KX-1-GP
+3V_MINI_WWAN 4
UIM_PWR 5
6
7
8
9
UIM_DATA 10
67 UIM_DATA 11
UIM_CLK 12
67 UIM_CLK
Place near Pin 24 13
+1D5V_MINI_WWAN UIM_RESET 14
+3V_MINI_WWAN 67 UIM_RESET 15
UIM_VPP 16
SC33P50V2JN-3GP
67 UIM_VPP
1
1
C6607
2
SCD047U16V2KX-1-GP
LA57 19
3G_EN 20
27 3G_EN
21
PLT_RST# 22 LA57
5,11,18,27,31,35,36,65,71,83,97 PLT_RST#
23 SATA_RXP1 C6613 1 SATA_RXP1_C
2 SCD01U16V2KX-3GP
C
SATA_RXP1_C 21 C
3D3V_S0 24
+1D5V_MINI_WWAN 25 SATA_RXN1 C6614 1 2 SATA_RXN1_C
SATA_RXN1_C 21
26 LA57 SCD01U16V2KX-3GP
27
SC33P50V2JN-3GP
28
1
C6610
29
LA57 C6609 PCH_SMBCLK 30
14,15,20,65 PCH_SMBCLK SATA_TXN1
LA57 31 SATA_TXN1 21
2
2
SCD047U16V2KX-1-GP
PCH_SMBDATA 32
14,15,20,65 PCH_SMBDATA
33 SATA_TXP1
SATA_TXP1 21
34
35
USB_PN4 Do Not Stuff 2 R6603 1USB_P4- 36
18 USB_PN4
Do Not Stuff 2 1USB_P4+ 37
USB_PP4 R6601 38
18 USB_PP4
39 +3V_MINI_WWAN
40
41
Do Not Stuff TP6603 1 3G_LED# 42
43
44
45
46
47
+1D5V_MINI_WWAN 48
49
50
51
52
B B
NP2
54
PTWO-CONN52A-8-GP
LA57 20.F1518.052
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
WWAN Connector
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 66 of 102
5 4 3 2 1
5 4 3 2 1
SIM_PWR
R1
1 2
DY Do Not Stuff
UIM_PWR Q2
D LA57 D
SIM_PWR LA57 S D
C376
SCD1U10V2KX-4GP
1 2 LA57 C5 C8
1
SCD1U10V2KX-4GP AO3419L-GP LA57
1
SC4D7U6D3V3KX-GP R7 LA57 LA57
2
SIM1 3D3V_S0 100KR2J-1-GP C3
2
SC4D7U10V5ZY-3GP
2
1 SIM_ON_T
1
VCC UIM_RESET
2 UIM_RESET 66
RST UIM_CLK R6608
3 UIM_CLK 66
CLK
5 10KR2J-3-GP
D
GND UIM_VPP
6
VPP
7 UIM_DATA UIM_VPP 66 LA57 LA57 Q9306
2
I/O UIM_DATA 66
8
GND UIM_CD
9 G
GND UIM_CD 2N7002A-7-GP
10
CD
NP1
NP1
NP2
S
NP2
CARD-PUSH-7P-1-GP-U1
LA57
2nd = 84.2N702.J31 1015 SB : add this
20.I0073.001
C C
84.2N702.E31
B B
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SIM_CARD
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 67 of 102
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
D D
AFTP45
1
3D3V_S0
1
SW3
1
2 OPS R6812
100KR2J-1-GP
3
2
4 VGA_SW# 27
5
6
1
7 DY
OPS 8 C6803 1
NP1 Do Not Stuff AFTP17
2
NP2
SW-SLIDE61-GP-U
62.40018.351
C C
5V_S5
Power button LED(White)
1
10KR2J-3-GP
LZ57 R6820
2
-1_1209'10
LZ57
PWR_5V
Q6800
4 3
27,78 PWRLED
R6814 5 2 ACES-CON8-15-GP
5V_S5 1 2 6 1 9
1 1
910R2F-1-GP 2N7002KDW-GP
84.2N702.A3F 2 AFTP27
B 27,78 NUM_LED B
2nd = 84.DM601.03F 27,78 CAP_LED
3
LZ57 27,97 KBC_PWRBTN# 1 R6808 2 KBC_PWRBTN#_R 4
27 KBC_NOVO_BTN# 1 R6811 100R2J-2-GP
2 KBC_NOVO_BTN#_R 5
2 1 PWRLED_C 100R2J-2-GP 6
27,78 PWRLED SATA_LED#_R
2 1 7
R6822 21,78 SATA_LED# 3D3V__PWRBTN1
LA57 8
0R2J-2-GP LZ57 R6609
0R2J-2-GP 10
1
3D3V_S0 EC6805 EC6804 DY
1
EC6806 EC6801 EC6802 EC6803 EC6807 PWRBTN1
Do Not Stuff
SW1
2
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SC1KP50V2KX-1GP
AFTP14 DY AFTP24
2
Do Not Stuff
4
1 R6810
100KR2J-1-GP
20.K0315.008
DY
1
2 DY DY
2
3 WIRELESS_SW# 27
5 DY 2ND = 20.K0381.008
1
SW-SLIDE3-3-GP 1 LZ57
DY C6802 AFTP15
Do Not Stuff
62.40018.491 3D3V_S0 2 1 1 2 5V_S0
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5V_S0 5V_S0
AFTP105
SA 0914
1
1
SCD1U10V2KX-4GP
Do Not Stuff
D C6901 C6902 D
Internal KeyBoard Connector
1
2
DY
RN6901
2
SRN10KJ-5-GP -1'20101129
TPAD1
4
3
AFTP119 1 8
6
SRN33J-5-GP-U 5
AFTP103 TPCLK 2 3 TP_CLK 4
27 TPCLK
27 TPDATA TPDATA 1 4 TP_DATA 3
2
1
ACES-CON30-1-GP RN6902
TP_LR_1
SB 1015 Swap data and clk
TP_LR_2
32 1
TP_LR_3
30 L6905
1
TP_DATA
R6904
29 AFTP72 1 7
MATRIX_ID1 TP_CLK
R4921
28 1 AFTP73 1 LZ57
2
SC1KP50V2KX-1GP
27 MATRIX_ID0 1 AFTP188 AFTP118 1 TP_LR_3 LZ57
1
KCOL17 AFTP187 AFTP117 TP_LR_2 L6903 ACES-CON6-13-GP
26 1 1
1
25 KCOL16 1 AFTP77 AFTP102 1 TP_LR_1
20.K0320.006
0R2J-2-GP
0R2J-2-GP
2
24 KCOL15 1 AFTP78 AFTP74 1 TP_R R4924
2
SC1KP50V2KX-1GP
23 KCOL10 1 AFTP79 AFTP75 1 TP_L 0R2J-2-GP 2ND = 20.K0382.006
22 KCOL11 1 AFTP80 LZ57
TP_L
21 KCOL14 1 AFTP81
2
20 KCOL13 1 AFTP82 TP_DATA
1
19 KCOL12 1 AFTP83
18 KCOL3 1 AFTP84 TP_CLK R4923
C 17 KCOL6 1 AFTP85 LA57 C
0R2J-2-GP
KCOL8
TP_R
16 1 AFTP86
15 KCOL7 1 AFTP87
CHECK
TP_R 2
TPAD2
1
14 KCOL4 1 AFTP88
13 KCOL2 1 AFTP89 L6901 L6902 6
12 KROW0 1 AFTP90 MLVS0402M04-GP MLVS0402M04-GP
2
11 KCOL1 1 AFTP91 4
10 KCOL5 1 AFTP92 R4925 TP_L 3
9 KROW3 1 AFTP93 LA57 TP_R 2
2
8 KROW2 1 AFTP94 0R2J-2-GP
7 KCOL0 1 AFTP101 1
1
6 KROW5 1 AFTP100 SC_1102'10
5 KROW4 1 AFTP99 LA57 5
KCOL9
TP_L
4 1 AFTP98
3 KROW6 1 AFTP97
KROW7 AFTP96 ETY-CON4-34-GP
2 1
AFTP95
1 KROW1 1
31 AFTP76 20.K0465.004
KB1
KROW[0..7] 27
20.K0320.030
KCOL[0..17] 27
B TP_SW_L TP_SW_R B
6
SW-TACT4-14-GP SW-TACT4-14-GP
3 4 2 1 TP_L 3 4 2 1 TP_R
1
TPS3 TPS4
6
R6902 R6901
3 4 3 4 100R2J-2-GP 100R2J-2-GP
1 1 2 1 1 2
AFTP107
LZ57/LB57 AFTP108
LZ57/LB57
AFTP113 AFTP114 AFTP111 AFTP112
5
1 1 2 1 1 2
5
SW-TACT4-14-GP SW-TACT4-14-GP
TP_SW_L 1 AFTP109
For LB57
62.40009.D71 62.40009.D71 TP_SW_R AFTP110
20100701
1
LB57 LB57 SC_1027'10
LZ57
LZ57 62.40009.D71 62.40009.D71
For LZ57
20100903
BOM
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
5 4 3 2 1
D D
3D3V_AUX_S5
1
Do Not Stuff
R7004
AFTP106
2
3D3V_LID 1
C 3D3V_LID C
1
C7002
1
SCD1U10V2KX-5GP
2
AFTP120
S-5712ACDL1-M3T1U-GP
1 VSS
2 VDD
27 LID_CLOSE# LID_CLOSE# 1 R7002 2 LID_CLOSE#_1 3
100R2J-2-GP OUT
1
LID_CLOSE#_1
C7001
DY Do Not Stuff
HALL1
2
74.05712.0BB
B B
1
AFTP104
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Hall Sensor
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 70 of 102
5 4 3 2 1
5 4 3 2 1
D D
C 3D3V_S0 C
DB1
1
21,27,65 LPC_AD0 2
21,27,65 LPC_AD1 3
21,27,65 LPC_AD2 4 DY
21,27,65 LPC_AD3 5
21,27,65 LPC_FRAME# 6
5,11,18,27,31,35,36,65,66,83,97 PLT_RST# 7
8
18,65 CLK_PCI_LPC 9
10
11
12
Do Not Stuff
Do Not Stuff
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Dubug connector
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 71 of 102
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 72 of 102
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 73 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
New Card
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 75 of 102
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 76 of 102
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 77 of 102
5 4 3 2 1
5 4 3 2 1
3D3V_S0 5V_S0
LED Bord CONN.
LZ57 LZ57 LZ57 POWER LED LA57 LA57 LA57 POWER LED
1
R4926 R4927 LEDB1 LED9 LED1
LA57
-1'1203 Q6812 Q6801
Do Not Stuff Do Not Stuff 11 C PWR#_Q K A PWR#_R 1 R6816 2 5V_S5 C PWR_LED#_C K A PWR_LED#_R 1 2 3D3V_S5
1 B R1 LZ57 B R1 R6801 22R2J-2-GP
DY LAB57 DY LAB57 27,68 PWRLED
E LED-W-56-GP WHITE 560R2F-GP 27,68 PWRLED
E LED-W-56-GP WHITE
2
AFTP31 1 LEDB1_PWR_3D3V_5V 2 R2 R2 1 2 5V_S5
3 DRC5143Z0L-GP DRC5143Z0L-GP 0R2J-2-GP R4929
27,68 NUM_LED
4 84.05143.011 83.00191.J70 84.05143.011 83.00191.J70 LA57
5
27,68 CAP_LED
D 21 APS_LED
6 LA57 LA57 LA57 CHARGER LED D
7 LZ57 LZ57
21,68 SATA_LED#
8 LZ57 CHARGER LED Q6802 LED2 LA57
9 Q6807 LED7 C DC_BATFULL#_C K A DC_BATFULL#_C_1 1 2 3D3V_S5
DY DY AFTP30 1 10 C DC_BATFULL#_Q K A DC_BATFULL#_R 1 R6821 2 5V_S5 B R1 R6802 22R2J-2-GP
R1 27 DC_BATFULL LED-W-56-GP
1 12 B LZ57 E 1 2 5V_S5
1
27 DC_BATFULL
SCD1U10V2KX-4GP
EC6810 EC6811 EC6809 EC6812 EC6816 E LED-W-56-GP 750R2F-GP R2 WHITE 0R2J-2-GP R4930
DY DY ACES-CON10-18-GP R2 WHITE DRC5143Z0L-GP LA57
83.00191.J70
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DRC5143Z0L-GP 84.05143.011
20.K0315.010
2
2
84.05143.011 83.00191.J70 LA57 CHARGER LED ORG
LZ57 CHARGER LED ORG LA57
5V_S0 LA57 LZ57 LZ57 ORG
3D3V_S0 LA57 ORG Q6803 LED6
Q6808 LED10 C CHARGE_LED#_C K A CHARGE_LED#_C_1 1 2 3D3V_S5
C CHARGE_LED#_Q K A CHARGE_LED#_R 1 R6819 2 3D3V_S5 B R1 R6803 39R2J-L-GP
R1 27 CHARGE_LED LED-O-16-GP-U
B LZ57 E
LA57
2
AFTP35 1 AVBD1_PWR_3D3V_5V 2
3
27 AV_INT 4 LA57 LA57
LA57 WIRELESS_LED
5
27,28,86 SMBC_THERM
27,28,86 SMBD_THERM 6 LZ57 LZ57 LZ57 WIRELESS_LED R6807 Q6804 LED3
7 C WIRELESS_LED#_C K A WIRELESS_LED#_R_C 1 2 3D3V_S0
R6818
8 Q6813 LED8 1 2 W_LED_C B R1 R6804 22R2J-2-GP
R6817 27 WIRELESS_LED
C WIRELESS_LED#_Q K A WIRELESS_LED#_R 1 2 5V_S0 E LED-W-56-GP
1 10 1 2 W_LED B R1 R2 WHITE LA57
27 WIRELESS_LED LED-W-56-GP Do Not Stuff DRC5143Z0L-GP
E 1 2 5V_S0
83.00191.J70
1
680R3F-GP
SCD1U10V2KX-4GP
EC7814 EC7815 EC7813 EC7817 AFTP39 ACES-CON8-19-GP R2 WHITE 84.05143.011 0R2J-2-GP R4931
Do Not Stuff DRC5143Z0L-GP LA57
83.00191.J70
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
84.05143.011
2
LZ57
C LZ57 C
20.K0320.008
OPS/LZ57 OPS/LZ57
LZ57 VGA LED
R6813
Q6809 LED5
NUM_LED 1 AFTP26 C dGPU_LED#_Q K A dGPU_LED#_R 1 2 3D3V_S0
CAP_LED 1 AFTP33 B R1
APS_LED AFTP25 18 dGPU_LED 180R2F-1-GP
1 E LED-Y-71-GP LAB57 OPS
SATA_LED# 1 AFTP32 R2 WHITE
DRC5143Z0L-GP
84.05143.011
83.00270.E70 1 R6824 2 5V_S0
AV_INT 1 AFTP38
SMBC_THERM 1 AFTP37 910R2F-GP
SMBD_THERM 1 AFTP36 SC_1027'10 LZ57 OPS
LZ57 => Analog Mic => Add analog circuit. LZ57 Touch Pad LED PNP Active Low
DTA143EKAT146JD-GP R7814
DY/LZ57
LA57 => Digital Mic
R2
E TP_LED#_R 1 2 3D3V_S0
B 470R2F-GP
21 TP_LED# R1
C TP_LED#_QA K
Q7810
LZ57 LED12 LED-W-56-GP
DY
83.00191.J70
need check 3D3V_S0 Q3607
ACES-CON4-17-GP-U G
20100707
.
B R7815 B
AFTP144 LZ57
1 6 D 2 1 5V_S0
.
.
.
.
LA57
4 S 820R2F-GP
29 AUD_DMIC_CLK 1 R4918 2 0R2J-2-GP AUD_DMIC_CLK_L 3
29 AUD_DMIC_1_2 1 2 AUD_DMIC_1_2_C 2 2N7002E-1-GP
0R2J-2-GP R4919
1
LA57 1 84.2N702.D31
SCD1U10V2KX-4GP
L5801 L5802 5 2ND = 84.2N702.J31
1
R4916
1 2 AUD_DMIC_CLK_L
29 INT_MIC2_R 0R2J-2-GP
R4917
1
LZ57 1 2AUD_DMIC_1_2_C
EC5809 0R2J-2-GP
LZ57
Do Not Stuff
LZ57 DY
2
A A
R4920
1 2 <Core Design>
BOM
0R2J-2-GP ALC_AGND
add analog circuit@20100708
need check Wistron Corporation
ALC_AGND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SC_1102'10 LEDB/LED
Size Document Number Rev
Custom
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 78 of 102
5 4 3 2 1
5 4 3 2 1
D
G-Sensor D
3D3V_S5
LA57
SC10U6D3V5KX-1GP
SCD1U10V2KX-4GP
C
E
Q7901 LA57 LA57
1
PDTA114EE-3-GP-U
R2
LA57 C7901 C7902
R1
2
B
GSENSE_ON#
27 GSENSE_ON# ALC_AGND
1
Do Not Stuff
R7902 GSENSE_Z_R R7905 1 2 Do Not Stuff GSENSE_Z TP7901
DY Do Not Stuff DY
1
1
2
DY C7903 C7906
Do Not Stuff Do Not Stuff
14
15
2
C U7901 DY C
RES
VDD
GSENSE_TST 2 ALC_AGND
27 GSENSE_TST ST
3 8
GND VOUTZ GSENSE_Y_R R7906 1 GSENSE_Y
2 56KR2J-L1-GP GSENSE_Y 27
5 10
1
1
GND VOUTY
6 LA57
R7903 GND C7904 C7907
7
GND VOUTX
12 LA57 LA57
LA57 100KR2J-1-GP R7904 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
Do Not Stuff 1
NC#1
11
2
NC#11 ALC_AGND
4
NC#4
13
ALC_AGND NC#13 GSENSE_X_R R7907 1 GSENSE_X
2 56KR2J-L1-GP GSENSE_X 27
9 16
1
NC#9 NC#16
C7905
LA57 C7908
LA57 LA57
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
LIS34ALTR-GP
ALC_AGND
LA57
B
ADXL322 B
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
G-Sensor
Size Document Number Rev
Custom
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 79 of 102
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 80 of 102
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 81 of 102
5 4 3 2 1
5 4 3 2 1
RJ45_USB CONN.
5V_RUSB3_S0 ACES-CON28-3-GP
SA 0819'10 30
AFTP1153 28
27
1 26
3D3V_LAN_S5 25
D 24 D
23
22
AFTP1155 1 21
20
31 SPEED_100# 19
18
SCD1U10V2KX-4GP
31 SPEED_1000#
1
EC8201 17
SCD1U10V2KX-4GP
31 LAN_ACT_LED#
1
EC8202 16
15
2
18 USB_PN10
18 USB_PP10 14
2
13
31 MDI3- 12
31 MDI3+ 11
10
31 MDI2- 9
31 MDI2+ 8
AFTP1141 1SPEED_1000# 7
AFTP1142 1SPEED_100# 31 MDI1- 6
AFTP1132 1LAN_ACT_LED# 31 MDI1+ 5
AFTP1130 1USB_PN10 4
AFTP1129 1USB_PP10 31 MDI0- 3
AFTP1143 1 MDI3+ 31 MDI0+ 2
AFTP1145 1 MDI3-
AFTP1144 1 MDI2+ 1
AFTP1146 1 MDI2- AFTP1154 1 29
AFTP1147 1 MDI1+
AFTP1148 1 MDI1- RJ45_USB3
AFTP1149 1 MDI0+
C AFTP1150 1 MDI0-
20.K0315.028 C
2ND = 20.K0392.028
5V_RUSB2_S0
IO1
AFTP1156
32
18 USB_PP5 15 16 1
14 17 3D3V_S0
18 USB_PN5
AFTP115 13 18
B B
18 USB_PP9 12 19
18 USB_PN9 11 20 1 AFTP1165
10 21
1
ALC_AGND 9 22
29 AUD_PORTA_R 8 23
29 AUD_PORTA_L 7 24 AFTP1136 1AUD_PORTA_R
29 AUD_PORTC_R_C 6 25 AFTP1135 1AUD_PORTA_L
5 26 AFTP1137 1AUD_PORTC_R_C
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
29 AUD_PORTC_L_C
1
ALC_AGND 4 27 EC8203 EC8204 AFTP1157 1 AUD_PORTC_L_C
29 AUD_SENSE_PORT_C 3 28 AFTP1159 1 AUD_SENSE_PORT_C
1
2 29 AFTP1158 1 AUD_SENSE_PORT_A
2
29 AUD_SENSE_PORT_A
AFTP1160 1 MIC1_VREF
29 MIC1_VREF 1 30 AFTP1162 1 USB_PP9
AFTP116 31 1 AFTP1166 AFTP1163 1 USB_PN9
AFTP1161 1 USB_PP5
AFTP1164 1 USB_PN5
ACES-CONN30C-1-GP
20.F1296.030
G95
Do Not Stuff
1 2
A BOM A
ALC_AGND
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
IO Board Connector
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 82 of 102
5 4 3 2 1
A B C D E
1D05V_VGA_S0
SC10U6D3V5KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
OPS OPS OPS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
OPS OPS OPS
X7R X7R
1
C8333 C8334 C8335 C8336 C8337 C8338
2
1.05V +/- 3%
VGA1A 1 OF 16 2,200mA
4 4
4 PEG_TXP[0..15] PEG_RXP[0..15] 4
PCI_EXPRESS
AK16
(See NV DG)
PEX_IOVDD AK17
4 PEG_TXN[0..15] PEG_RXN[0..15] 4 PEX_IOVDD
AK21
PEX_IOVDD AK24
3D3V_VGA_S0 PEX_IOVDD
PEX_IOVDD
AK27 X7R, Under GPU. 1D05V_VGA_S0
AG11
1
PEX_IOVDDQ
10KR2J-3-GP
Do Not Stuff
OPS AG12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V5KX-1GP
PEX_IOVDDQ
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
3D3V_VGA_S0 R8303 DY PEX_IOVDDQ
AG13
R8302 AG15 VGA1K 11 OF 16
PEX_IOVDDQ
AG16 X7R X7R
1
PEX_IOVDDQ
AG17 AA9 Y1
2
PEX_IOVDDQ C8344 C8339 C8340 C8341 C8342 C8343 NC#AA9 NC#Y1
AG18 AB9 Y2
2VGA1K_NC#
PEX_IOVDDQ AG22 W9 NC#AB9 NC#Y2 Y3
2
PEX_IOVDDQ NC#W9 NC#Y3
DY PEX_IOVDDQ
AG23 OPS Y9
NC#Y9 NC#AB3
AB3
R8301 1 2 VGA_RST# AM16 AG24 OPS OPS OPS OPS OPS AB2
27 PCIE_RST# PEX_RST# PEX_IOVDDQ NC#AB2
Do Not Stuff AB1
VGA_PEG_CLKREQ# NC#AB1
D S AR13 AG25 AC4
20 PEG_CLKREQ# PEX_CLKREQ# PEX_IOVDDQ NC#AC4
AG26 AC1
PEX_IOVDDQ R8310 NC#AC1
AJ14 AC2
Q8301 PEX_IOVDDQ 10KR2J-3-GP NC#AC2
AJ15 OPS AC3
2N7002A-7-GP PEX_IOVDDQ NC#AC3
AJ19 AE3
PEX_IOVDDQ NC#AE3
OPS AJ21 AA7 AE2
1
PEX_IOVDDQ NC#AA7 NC#AE2
AJ22 U6
R8305 PEX_IOVDDQ
PEX_IOVDDQ
AJ24 X7R, Under GPU. 3.3V +/- 5% AA6
NC#AA6
NC#U6
NC#W6
W6
20100621 NV suggestion 200R2F-L-GP
OPS
1 2PEX_TSTCLK_OUT AJ17
PEX_IOVDDQ
AJ25
AJ27
240mA NC#Y6
Y6
PEX_TSTCLK_OUT# PEX_TSTCLK_OUT PEX_IOVDDQ
2nd = 84.2N702.J31 AJ18
PEX_TSTCLK_OUT# PEX_IOVDDQ
AK18
AK20
(See NV DG) AF1
PEX_IOVDDQ NC#AF1
84.2N702.E31 20 CLK_PCIE_VGA
AR16 AK23
PEX_REFCLK PEX_IOVDDQ
20 CLK_PCIE_VGA#
AR17 AK26
PEX_REFCLK# PEX_IOVDDQ 3D3V_VGA_S0
AL16
PEG_RXP0 SCD1U10V2KX-5GP PEG_C_RXP0 AL17 PEX_IOVDDQ
OPS
2 1 C8301
PEX_TX0
PEG_RXN0 SCD1U10V2KX-5GP OPS
2 1 C8302 PEG_C_RXN0 AM17
1
PEX_TX0#
N12x-Series/N11M-GE2/N12M-GS/N12P GE W3
PEG_TXP0 R8320 1D05V_VGA_S0 NC#W3
AP17 W1
PEG_TXN0 PEX_RX0 NC#W1
AN17 0R2J-2-GP PEX_SVDD_3V3 R8320 R8318 W2
PEX_RX0# NC#W2
Y5
PEG_RXP1 SCD1U10V2KX-5GP PEG_C_RXP1 AM18 PEX_SVDD_3V3 NC#Y5
OPS
2 1 C8303 AG19 2 R8318 1
2
PEG_RXN1 SCD1U10V2KX-5GP PEG_C_RXN1 AM19 PEX_TX1 PEX_SVDD_3V3 Do Not Stuff
OPS
2 1 C8304 F7 N12P-GE Sutff DY
SCD01U25V2KX-3GP
PEX_TX1# NC#F7
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
PEG_TXP1
DY
AN19 OPS V4
PEG_TXN1 PEX_RX1 NC#V4
AP19 X7R X7R N12M DY Sutff W4
1
PEX_RX1# NC#W4
-1_1213'10 AE1
PEG_RXP2 SCD1U10V2KX-5GP PEG_C_RXP2 AL19 NC#AE1
OPS
2 1 C8305
PEX_TX2 NC#A2
A2 C8707
OPS C8345 C8346
PEG_RXN2 SCD1U10V2KX-5GP OPS
2 1 C8306 PEG_C_RXN2 AK19 A7 20100705_NV
3.3V +/- 5%
2
PEX_TX2# NC#A7 N12P-GE-A1-GP
AA4 OPS
3 PEG_TXP2 NC#AA4 3
PEG_TXN2
AR19
AR20
PEX_RX2 NC#AB4
AB4
AB7
120mA OPS
PEX_RX2# NC#AB7
PEG_RXP3 SCD1U10V2KX-5GP OPS
2 1 C8308 PEG_C_RXP3 AL20 NC#AC5
AC5
AD6
(See NV DG)
PEG_RXN3 SCD1U10V2KX-5GP PEG_C_RXN3 AM20 PEX_TX3 NC#AD6
OPS
2 1 C8307
PEX_TX3# NC#AF6
AF6 3D3V_VGA_S0
AG6
PEG_TXP3 AP20
PEX_RX3
NC#AG6
NC#AJ5
AJ5 X7R, Under GPU.
PEG_TXN3 AN20 AK15 VGA1J 10 OF 16
PEX_RX3# NC#AK15
AL7
PEG_RXP4 SCD1U10V2KX-5GP PEG_C_RXP4 AM21 NC#AL7
OPS
2 1 C8309
PEX_TX4 NC#B7
B7 P9
NC#P9 NC#N1
N1
PEG_RXN4 SCD1U10V2KX-5GP OPS
2 1 C8310 PEG_C_RXN4 AM22 C7 STRAP4 R9 P4
VGA1J_NC#
PEX_TX4# NC#C7
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
NC#R9 NC#P4
D5 T9 P1
SC1U10V2KX-1GP
NC#D5
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PEG_TXP4 NC#T9 NC#P1
AN22 D6 U9 P2
PEG_TXN4 PEX_RX4 NC#D6 STRAP3 NC#U9 NC#P2
AP22 D7 N12P-GV X7R X7R X7R P3
1
PEX_RX4# NC#D7 NC#P3
E5 T3
PEG_RXP5 SCD1U10V2KX-5GP PEG_C_RXP5 AL22 NC#E5 NV_PGOOD 1 NC#T3
OPS
2 1 C8311
PEX_TX5 NC#E7
E7 2 C8350 C8347 C8348 C8349 C8351
NC#T2
T2
PEG_RXN5 SCD1U10V2KX-5GP OPS
2 1 C8312 PEG_C_RXN5 AK22 F4 R8312 OPS T1
2
PEX_TX5# NC#F4 10KR2F-2-GP NC#T1
G5 OPS OPS OPS U4
PEG_TXP5 NC#G5 NC#U4
AR22
PEX_RX5 NC#H32
H32 N12P-GV OPS R8311
NC#U1
U1
PEG_TXN5 AR23 P6 MULTI_STRAP_REF2_GND 1 2 OPS 10KR2J-3-GP U2
PEX_RX5# NC#P6 R8313 NC#U2
U7 U5 U3
PEG_RXP6 SCD1U10V2KX-5GP PEG_C_RXP6 AL23 NC#U7 NC#U5 NC#U3
OPS
2 1 C8313 V6 40K2R2F-GP R6
1
PEG_RXN6 SCD1U10V2KX-5GP PEG_C_RXN6 AM23 PEX_TX6 NC#V6 NC#R6
OPS
2 1 C8314
PEX_TX6# NC#Y4
Y4 20100721_NV T5
NC#T5 NC#T6
T6
N6
PEG_TXP6 NC#N6
AP23 J10
PEG_TXN6 AN23
PEX_RX6
PEX_RX6#
VDD33
VDD33
J11 X7R, Under GPU.
J12 N5
PEG_RXP7 SCD1U10V2KX-5GP PEG_C_RXP7 AM24 VDD33 NC#N5
OPS
2 1 C8316
PEX_TX7 VDD33
J13
PEG_RXN7 SCD1U10V2KX-5GP OPS
2 1 C8315 PEG_C_RXN7 AM25 J9
PEX_TX7# VDD33
PEG_TXP7 AN25 LA46: Test point
PEG_TXN7 PEX_RX7
AP25 LKN3: connect to VGA core PWR IC
PEX_RX7#
P5
PEG_RXP8 SCD1U10V2KX-5GP PEG_C_RXP8 AL25 NC#P5
OPS
2 1 C8318
PEX_TX8 NC#N3
N3
PEG_RXN8 SCD1U10V2KX-5GP OPS
2 1 C8317 PEG_C_RXN8 AK25 L3
PEX_TX8# VGA_CORE NC#L3
N2
PEG_TXP8 NC#N2
AR25
PEG_TXN8 AR26
PEX_RX8 R8308 1 DY 2 Do Not Stuff
PEX_RX8#
PEG_RXP9 SCD1U10V2KX-5GP OPS
2 1 C8320 PEG_C_RXP9 AL26 D35 R4
PEG_RXN9 SCD1U10V2KX-5GP PEG_C_RXN9 AM26 PEX_TX9 VDD_SENSE#D35 VGACORE_VDD_SENSE 92 NC#R4
OPS
2 1 C8319
PEX_TX9# VDD_SENSE#P7
P7
VGACORE_VDD_SENSE 92 NC#T4
T4
AD20 N4
PEG_TXP9 VDD_SENSE#AD20 VGACORE_VDD_SENSE 92 NC#N4
AP26 AD19
PEG_TXN9 PEX_RX9 GND_SENSE#AD19 VGACORE_GND_SENSE 92
AN26 R7
PEX_RX9# GND_SENSE#R7 VGACORE_GND_SENSE 92
E35
PEG_RXP10 SCD1U10V2KX-5GP OPS
2 1 C8321 PEG_C_RXP10 AM27 GND_SENSE#E35 VGACORE_GND_SENSE 92 1.05V +/- 3% N12P-GE-A1-GP
1
PEG_RXN10 SCD1U10V2KX-5GP C8322 PEG_C_RXN10 AM28 PEX_TX10
OPS
2 1
PEX_TX10# DY 120mA OPS
PEG_TXP10
PEG_TXN10
AN28
AP28
PEX_RX10
R8309
Do Not Stuff
(See NV DG)
2 PEX_RX10# 1D05V_VGA_S0 2
2
PEG_RXP11 SCD1U10V2KX-5GP OPS
2 1 C8323 PEG_C_RXP11 AL28
PEG_RXN11 SCD1U10V2KX-5GP PEX_TX11 L8301
OPS
2 1 C8324 PEG_C_RXN11 AK28 OPS
PEX_TX11# VCC1R05VIDEO_PEX_PLLVDD
AG14 2 1
SC1U10V2KX-1GP
PEX_PLLVDD
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
PEG_TXP11 AR28
PEG_TXN11 PEX_RX11 BLM11A121S-GP
AR29
PEX_RX11# CHIP BEAD BLM18AG121SN1D
X7R
1
PEG_RXP12 SCD1U10V2KX-5GP OPS
2 1 C8325 PEG_C_RXP12 AK29
PEG_RXN12 SCD1U10V2KX-5GP C8326 PEG_C_RXN12 AL29 PEX_TX12
OPS
2 1
PEX_TX12#
C8352 C8353 C8354
2
PEG_TXP12 AP29 OPS OPS
PEG_TXN12 PEX_RX12
AN29 OPS
PEX_RX12#
PEG_RXP13 SCD1U10V2KX-5GP OPS
2 1 C8328 PEG_C_RXP13 AM29
PEG_RXN13 SCD1U10V2KX-5GP C8327 PEG_C_RXN13 AM30 PEX_TX13
OPS
2 1
PEX_TX13#
PEG_TXP13 AN31
PEG_TXN13 PEX_RX13
AP31
PEX_RX13# X7R, Under GPU.
PEG_RXP14 SCD1U10V2KX-5GP OPS
2 1 C8330 PEG_C_RXP14 AM31
PEG_RXN14 SCD1U10V2KX-5GP C8329 PEG_C_RXN14 AM32 PEX_TX14
OPS
2 1
PEX_TX14# 3D3V_VGA_S0
OPS
PEG_TXP14 AR31 AG20
PEG_TXN14 PEX_RX14 NC#AG20 R8304
AR32
PEX_RX14#
AG21 PEX_TERMP 1 2 2K49R2F-GP
PEG_RXP15 SCD1U10V2KX-5GP C8332 PEG_C_RXP15 AN32 PEX_TERMP
OPS
2 1
PEX_TX15
PEG_RXN15 SCD1U10V2KX-5GP OPS
2 1 C8331 PEG_C_RXN15 AP32 DY
1
PEX_TX15#
PEG_TXP15 AR34 R8306
PEG_TXN15 PEX_RX15
AP34 AP35 TESTMODE 1 2 10KR2J-3-GP R8314 R8316
PEX_RX15# TESTMODE 45K3R2F-L-GP 34K8R2F-1-GP
OPS DY
2
N12P-GE-A1-GP STRAP3
STRAP4
OPS
1
R8315 R8317
N12P-GV 5K1R2F-2-GP 10KR2F-2-GP
N12P-GV
2
dGPU reset SC_1026'10
R8307 1 DY 2 VGA_RST#
5,11,18,27,31,35,36,65,66,71,97 PLT_RST#
Do Not Stuff
20100721_NV will update
1 1
N12P-GV check
OPS
U8301 3D3V_VGA_S0
18 DGPU_HOLD_RST#
1
B
5
PLT_RST# VCC
2
A VGA_RST#
4
2
Y
3
GND R8319
74LVC1G08GW-1-GP 10KR2J-3-GP BOM
73.01G08.L04
OPS
2ND = 73.7SZ08.DAH
1
Wistron Corporation
20100621 NV suggestion 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
N12P-GE(1/6): PEG I/F
Size Document Number Rev
D -1
LZ57
Date: Tuesday, March 29, 2011 Sheet 83 of 102
A B C D E
A B C D E
VGA1G
LVDS Interface 7 OF 16
IFPCDE_PLLVDD_PWR VGA1H
IFPC
8 OF 16
IFPAB
AJ9
IFPC_PLLVDD
IFPC_RSET_AK7 AK7
IFPC_RSET
AN3
IFPC_AUX_I2CW _SDA#
1
Do Not Stuff
1.05V +/- 3% X7R IFPC_AUX_I2CW _SCL
AP2
1
AL8 R8402
IFPA_TXD0# C8402 Do Not Stuff
220mA IFPA_TXD0
AM8
DY AR2
2
IFPC_L3#
(See NV DG) DY AP1
2
IFPC_L3
1D05V_VGA_S0 AM9
IFPA_TXD1# IFPC_IOVDD_PWR
AM10 AM4
IFPA_TXD1 IFPC_L2#
L8401 AM3
IFPC_L2
4 4
1 2 IFPAB_PLLVDD AK9 AL10 AM5
IFPAB_PLLVDD IFPA_TXD2# IFPC_L1#
DY IFPA_TXD2
AK10
IFPC_L1
AL5
Do Not Stuff 1 2 IFPAB_RSET AJ11 AJ8
IFPAB_RSET IFPC_IOVDD
Do Not Stuff
Do Not Stuff
CHIP BEAD BLM18AG121SN1D Do Not Stuff AM6
IFPC_L0#
1
DY R8401 AL11 AM7
IFPA_TXD3# IFPC_L0
1
AK11
IFPA_TXD3 X7R, Under GPU.
1
C8401 C8403 R8411
DG requires X7R for 10KR2J-3-GP
2
1uF and 4.7uF as well. DY DY OPS AM12 R8410
2
IFPA_TXC# 10KR2J-3-GP
AM11 K2
IFPA_TXC GPIO1
3.3V +/- 5% Missed 1x 0.1uF OPS
2
N12P-GE-A1-GP
220mA AP8
(See NV DG) IFPB_TXD4#
AN8
OPS
1D8V_VGA_S0 180ohm@100MHz ESR=0.15
IFPB_TXD4
HDMI Interface
L8402 AG9 AN10
IFPA_IOVDD IFPB_TXD5#
AP10
IFPAB_IOVDD IFPB_TXD5
1 2 AG10
IFPB_IOVDD
Do Not Stuff AR10
IFPB_TXD6#
Do Not Stuff
Do Not Stuff
1
Do Not Stuff
IFPB_TXD7
DY DY DY OPS
2
AN13
IFPB_TXC#
AP13
IFPB_TXC VGA1E 5 OF 16
IFPCDE_PLLVDD_PWR IFPD
AC6
X7R, Under GPU. IFPD_PLLVDD
K1 IFPD_RSET AB6
GPIO0 IFPD_RSET
X7R IFPD_AUX_I2CX_SDA#
AN4
AP4
IFPD_AUX_I2CX_SCL
2
3 C8407 3
R8405
Do Not Stuff
N12P-GE-A1-GP DY Do Not Stuff AR4
2
IFPD_L3#
DY AR5
Under GPU. IFPD_L3
1
OPS IFPD_L2#
AP5
AN5
IFPD_L2
IFPD_IOVDD_PWR AN7
IFPD_L1#
AP7
IFPD_L1
AK8
IFPD_IOVDD
AR7
1.05V +/- 3% IFPD_L0#
AR8
1.05V +/- 3% IFPD_L0
285mA
1
285mA
(See NV DG)
(See NV DG) 1D05V_VGA_S0
R8412
10KR2J-3-GP GPIO19
L7
1D05V_VGA_S0 IFPD_IOVDD_PWR
OPS
2
IFPC_IOVDD_PWR
N12P-GE-A1-GP
220ohm@100MHz ESR=0.05
220ohm@100MHz ESR=0.05 L8404 OPS
L8403
1 2
1 2
Do Not Stuff
Do Not Stuff DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
X7R X7R X7R X7R
1
DY DY DY DY DY DY DY DY
VGA1I 9 OF 16
IFPEF
X7R, Under GPU.
2 X7R, Under GPU. 2
AD4
IFPCDE_PLLVDD_PWR IFPE_AUX_I2CY_SDA#
AE4
IFPE_AUX_I2CY_SCL
AE5
3.3V +/- 5% 1.05V +/- 3% AJ6
IFPE_L3#
AE6
IFPEF_PLLVDD IFPE_L3
440mA (220mA each, max 2 links) 285mA IFPF_REST_AL1 AL1 AF5
IFPEF_RSET IFPE_L2#
Do Not Stuff
(See NV DG) (See NV DG) IFPE_L2
AF4
3D3V_VGA_S0 1D05V_VGA_S0 X7R
1
IFPCDE_PLLVDD_PWR IFPE_IOVDD_PWR AG4
IFPE_L1#
1
C8416 AH4
220ohm@100MHz ESR=0.05 IFPE_L1
300ohm@100MHz ESR=0.25
2
L8406
DY R8406 AH5
L8405 IFPE_L0#
1 2 Do Not Stuff AH6
1 2 Under GPU. IFPE_L0
2
Do Not Stuff DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff DY L1
GPIO15
Do Not Stuff
Do Not Stuff
DY IFPE_IOVDD_PWR
X7R X7R
1
1
1
IFPE_IOVDD IFPF_AUX_I2CZ_SDA#
DY DY OPS AF3
2
IFPF_AUX_I2CZ_SCL
AD7
IFPF_IOVDD
AH3
IFPF_L3#
AH2
IFPF_L3
1
AH1
IFPF_L2#
AJ1
X7R, Under GPU. R8407 IFPF_L2
10KR2J-3-GP AJ2
IFPF_L1#
OPS AJ3
2
IFPF_L1
AL3
IFPF_L0#
AL2
IFPF_L0
1 1
K6
GPIO21
N12P-GE-A1-GP
BOM
OPS
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
N12P-Q1/Q3 (2/6): DIGITAL OUT
Size Document Number Rev
A2 -1
LZ57
Date: Tuesday, March 29, 2011 Sheet 84 of 102
A B C D E
A B C D E
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
FBA_D1 FBB_D3
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
N33 AA29 A14 T27
FBA_D1 FBVDDQ FBB_D3 FBVDDQ
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
FBA_D2 L33 AA31 X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R FBB_D4 C16 U27
1
FBA_D3 N34 FBA_D2 FBVDDQ AB27 FBB_D5 B16 FBB_D4 FBVDDQ U29
FBA_D4 N35 FBA_D3 FBVDDQ AB29 C8501 C8502 C8503 C8504 C8505 C8506 C8507 C8512 C8508 C8509 C8510 C8511 FBB_D6 A17 FBB_D5 FBVDDQ V27
FBA_D4 FBVDDQ FBB_D6 FBVDDQ
FBA_D5 P35 AC27 OPS FBB_D7 D16 V29
2
FBA_D6 FBA_D5 FBVDDQ FBB_D8 FBB_D7 FBVDDQ
P33
FBA_D6 FBVDDQ
AD27 OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS C13
FBB_D8 FBVDDQ
V34
FBA_D7 P34
FBA_D7 FBVDDQ
AE27 OPS FBB_D9 B11
FBB_D9 FBVDDQ
W27
FBA_D8 K35 AJ28 FBB_D10 C11 Y27
FBA_D9 K33 FBA_D8 FBVDDQ B18 FBB_D11 A11 FBB_D10 FBVDDQ
FBA_D10 FBA_D9 FBVDDQ FBB_D12 FBB_D11
K34 E21 C10
FBA_D11 H33 FBA_D10 FBVDDQ G17 FBB_D13 C8 FBB_D12
FBA_D12 FBA_D11 FBVDDQ FBB_D14 FBB_D13
G34 G18 B8
4 FBA_D13 G33 FBA_D12 FBVDDQ G22 FBB_D15 A8 FBB_D14 4
FBA_D14 E34 FBA_D13
FBA_D14
FBVDDQ
FBVDDQ
G8 X7R, Under GPU. X7R, Near GPU. FBB_D16 E8 FBB_D15
FBB_D16
FBA_D15 E33 G9 FBB_D17 F8
FBA_D16 G31 FBA_D15 FBVDDQ H29 FBB_D18 F10 FBB_D17
FBA_D17 FBA_D16 FBVDDQ FBB_D19 FBB_D18
F30 J14 F9
FBA_D18 G30 FBA_D17 FBVDDQ J15 FBB_D20 F12 FBB_D19
FBA_D19 G32 FBA_D18 FBVDDQ J16 FBB_D21 D8 FBB_D20
FBA_D20 FBA_D19 FBVDDQ FBB_D22 FBB_D21
K30 J17 D11
FBA_D21 K32 FBA_D20 FBVDDQ J20 FBB_D23 E11 FBB_D22
FBA_D22 FBA_D21 FBVDDQ FBB_D24 FBB_D23
H30 J21 D12
FBA_D23 K31 FBA_D22 FBVDDQ J22 FBB_D25 E13 FBB_D24
FBA_D24 L31 FBA_D23 FBVDDQ J23 FBB_D26 F13 FBB_D25
FBA_D25 FBA_D24 FBVDDQ FBB_D27 FBB_D26
L30 J24 F14
FBA_D26 M32 FBA_D25 FBVDDQ J29 FBB_D28 F15 FBB_D27
FBA_D27 FBA_D26 FBVDDQ FBB_D29 FBB_D28
N30 E16
FBA_D28 M30 FBA_D27 FBB_D30 F16 FBB_D29
FBA_D29 P31 FBA_D28 FBB_D31 F17 FBB_D30
FBA_D30 FBA_D29 FBB_D32 FBB_D31
R32 D29
FBA_D31 R30 FBA_D30 FBB_D33 F27 FBB_D32
FBA_D32 FBA_D31 FBB_D34 FBB_D33
AG30 F28
FBA_D33 AG32 FBA_D32 FBB_D35 E28 FBB_D34
FBA_D34 AH31 FBA_D33 FBB_D36 D26 FBB_D35
FBA_D35 FBA_D34 FBB_D37 FBB_D36
AF31 F25
FBA_D36 AF30 FBA_D35 FBB_D38 D24 FBB_D37
FBA_D37 FBA_D36 FBB_D39 FBB_D38
AE30 E25
FBA_D38 AC32 FBA_D37 FBB_D40 E32 FBB_D39
FBA_D39 AD30 FBA_D38 FBB_D41 F32 FBB_D40
FBA_D40 FBA_D39 FBB_D42 FBB_D41
AN33 D33
FBA_D41 AL31 FBA_D40 FBB_D43 E31 FBB_D42
FBA_D42 FBA_D41 FBB_D44 FBB_D43
AM33 C33
FBA_D43 AL33 FBA_D42 FBB_D45 F29 FBB_D44
FBA_D44 AK30 FBA_D43 FBB_D46 D30 FBB_D45
FBA_D45 FBA_D44 FBB_D47 FBB_D46
AK32 E29
FBA_D46 AJ30 FBA_D45 FBB_D48 B29 FBB_D47
FBA_D47 FBA_D46 FBB_D49 FBB_D48
AH30 C31
FBA_D48 AH33 FBA_D47 FBB_D50 C29 FBB_D49
FBA_D48 FBB_D50 20100702_Change to Mode E
FBA_D49 AH35 FBB_D51 B31
FBA_D50 FBA_D49 FBB_D52 FBB_D51
AH34
FBA_D50
20100702_Change to Mode E C32
FBB_D52 FBB_CMD0
F18
FBB_CMD0 90
FBA_D51 AH32 FBB_D53 B32 E19 FBB_CMD1 1
FBA_D51 FBB_D53 FBB_CMD1 TP8506 Do Not Stuff
FBA_D52 AJ33 U30 FBB_D54 B35 D18
FBA_D53 FBA_D52 FBA_CMD0 FBA_CMD0 88 FBB_D54 FBB_CMD2 FBB_CMD2 90
AL35 V30 FBA_CMD1 1 TP8504 Do Not Stuff
FBB_D55 B34 C17
FBA_D54 FBA_D53 FBA_CMD1 FBB_D56 FBB_D55 FBB_CMD3 FBB_CMD3 90
AM34 U31 A29 F19
FBA_D55 FBA_D54 FBA_CMD2 FBA_CMD2 88 FBB_D57 FBB_D56 FBB_CMD4 FBB_CMD4 90,91
AM35 V32 B28 C19
FBA_D56 FBA_D55 FBA_CMD3 FBA_CMD3 88 FBB_D58 FBB_D57 FBB_CMD5 FBB_CMD5 90,91
AF33 T35 A28 B17
FBA_D56 FBA_CMD4 FBA_CMD4 88,89 FBB_D58 FBB_CMD6 FBB_CMD6 90,91
FBA_D57 AE32 U33 FBB_D59 C28 E20
FBA_D58 FBA_D57 FBA_CMD5 FBA_CMD5 88,89 FBB_D60 FBB_D59 FBB_CMD7 FBB_CMD7 90,91
AF34 W32 C26 B19
FBA_D59 FBA_D58 FBA_CMD6 FBA_CMD6 88,89 FBB_D61 FBB_D60 FBB_CMD8 FBB_CMD8 90,91
AE35 W33 D25 D20
FBA_D60 FBA_D59 FBA_CMD7 FBA_CMD7 88,89 FBB_D62 FBB_D61 FBB_CMD9 FBB_CMD9 90,91
AE34 W31 B25 A19
FBA_D61 FBA_D60 FBA_CMD8 FBA_CMD8 88,89 FBB_D63 FBB_D62 FBB_CMD10 FBB_CMD10 90,91
AE33 W34 A25 D19
FBA_D61 FBA_CMD9 FBA_CMD9 88,89 FBB_D63 FBB_CMD11 FBB_CMD11 90,91
FBA_D62 AB32 U34 C20
FBA_D63 FBA_D62 FBA_CMD10 FBA_CMD10 88,89 FBB_CMD12 FBB_CMD12 90
AC35 U35 F20
FBA_D63 FBA_CMD11 FBA_CMD11 88,89 FBB_CMD13 FBB_CMD13 90,91
U32 A16 B20
FBA_CMD12 FBA_CMD12 88 90 FBB_DQM0 FBB_DQM0 FBB_CMD14 FBB_CMD14 91
T34 D10 G21
FBA_CMD13 FBA_CMD13 88,89 90 FBB_DQM1 FBB_DQM1 FBB_CMD15 FBB_CMD15 90,91
P32 T33 F11 F22
88 FBA_DQM0 FBA_DQM0 FBA_CMD14 FBA_CMD14 89 90 FBB_DQM2 FBB_DQM2 FBB_CMD16 FBB_CMD16 91
H34 W30 D15 F24 FBB_CMD17 1 TP8505 Do Not Stuff
88 FBA_DQM1 FBA_DQM1 FBA_CMD15 FBA_CMD15 88,89 90 FBB_DQM3 FBB_DQM3 FBB_CMD17
J30 AB30 D27 F23
88 FBA_DQM2 FBA_DQM2 FBA_CMD16 FBA_CMD16 89 91 FBB_DQM4 FBB_DQM4 FBB_CMD18 FBB_CMD18 91
P30 AA30 FBA_CMD17 1 TP8503 Do Not Stuff D34 C25
88 FBA_DQM3 FBA_DQM3 FBA_CMD17 91 FBB_DQM5 FBB_DQM5 FBB_CMD19 FBB_CMD19 91
AF32 AB31 A34 C23
3 89 FBA_DQM4 FBA_DQM4 FBA_CMD18 FBA_CMD18 89 91 FBB_DQM6 FBB_DQM6 FBB_CMD20 FBB_CMD20 90,91 3
AL32 AA32 D28 F21
89 FBA_DQM5 FBA_DQM5 FBA_CMD19 FBA_CMD19 89 91 FBB_DQM7 FBB_DQM7 FBB_CMD21 FBB_CMD21 90,91
AL34 AB33 E22
89 FBA_DQM6 FBA_DQM6 FBA_CMD20 FBA_CMD20 88,89 FBB_CMD22 FBB_CMD22 90,91
AF35 Y32 D21
89 FBA_DQM7 FBA_DQM7 FBA_CMD21 FBA_CMD21 88,89 FBB_CMD23 FBB_CMD23 90,91
Y33 C14 A23
FBA_CMD22 FBA_CMD22 88,89 90 FBB_DQS_WP0 FBB_DQS_WP0 FBB_CMD24 FBB_CMD24 90,91
AB34 A10 D22
FBA_CMD23 FBA_CMD23 88,89 90 FBB_DQS_WP1 FBB_DQS_WP1 FBB_CMD25 FBB_CMD25 90,91
L34 AB35 E10 B23
88 FBA_DQS_WP0 FBA_DQS_WP0 FBA_CMD24 FBA_CMD24 88,89 90 FBB_DQS_WP2 FBB_DQS_WP2 FBB_CMD26 FBB_CMD26 90,91
H35 Y35 D14 C22
88 FBA_DQS_WP1 FBA_DQS_WP1 FBA_CMD25 FBA_CMD25 88,89 90 FBB_DQS_WP3 FBB_DQS_WP3 FBB_CMD27 FBB_CMD27 90,91
J32 W35 E26 B22
88 FBA_DQS_WP2 FBA_DQS_WP2 FBA_CMD26 FBA_CMD26 88,89 91 FBB_DQS_WP4 FBB_DQS_WP4 FBB_CMD28 FBB_CMD28 90,91
N31 Y34 D32 A22
88 FBA_DQS_WP3 FBA_DQS_WP3 FBA_CMD27 FBA_CMD27 88,89 91 FBB_DQS_WP5 FBB_DQS_WP5 FBB_CMD29 FBB_CMD29 90,91
AE31 Y31 A32 A20
89 FBA_DQS_WP4 FBA_DQS_WP4 FBA_CMD28 FBA_CMD28 88,89 91 FBB_DQS_WP6 FBB_DQS_WP6 FBB_CMD30 FBB_CMD30 90,91
AJ32 Y30 B26 G20 FBB_CMD31 1 TP8502 Do Not Stuff
89 FBA_DQS_WP5 FBA_DQS_WP5 FBA_CMD29 FBA_CMD29 88,89 91 FBB_DQS_WP7 FBB_DQS_WP7 FBB_CMD31
AJ34 W29
89 FBA_DQS_WP6 FBA_DQS_WP6 FBA_CMD30 FBA_CMD30 88,89
AC33 Y29 FBA_CMD31 1 TP8501 Do Not Stuff
89 FBA_DQS_WP7 FBA_DQS_WP7 FBA_CMD31 B14
90 FBB_DQS_RN0 FBB_DQS_RN0
T32 B10
FBA_CLK0 FBA_CLK0 88 90 FBB_DQS_RN1 FBB_DQS_RN1
L35 T31 D9 E17
88 FBA_DQS_RN0 FBA_DQS_RN0 FBA_CLK0# -FBA_CLK0 88 90 FBB_DQS_RN2 FBB_DQS_RN2 FBB_CLK0 FBB_CLK0 90
G35 AC31 E14 D17
88 FBA_DQS_RN1 FBA_DQS_RN1 FBA_CLK1 FBA_CLK1 89 90 FBB_DQS_RN3 FBB_DQS_RN3 FBB_CLK0# -FBB_CLK0 90
H31 AC30 F26 D23
88 FBA_DQS_RN2 FBA_DQS_RN2 FBA_CLK1# -FBA_CLK1 89 91 FBB_DQS_RN4 FBB_DQS_RN4 FBB_CLK1 FBB_CLK1 91
N32 D31 E23
88 FBA_DQS_RN3 FBA_DQS_RN3 91 FBB_DQS_RN5 FBB_DQS_RN5 FBB_CLK1# -FBB_CLK1 91
AD32 A31
89 FBA_DQS_RN4 FBA_DQS_RN4 91 FBB_DQS_RN6 FBB_DQS_RN6
AJ31 A26 1D5V_VGA_S0
89 FBA_DQS_RN5 FBA_DQS_RN5 91 FBB_DQS_RN7 FBB_DQS_RN7
AJ35 1D5V_VGA_S0
89 FBA_DQS_RN6 FBA_DQS_RN6
AC34
89 FBA_DQS_RN7 FBA_DQS_RN7
P29 G14 G19 FBB_DEBUG0 R8520 1 DY 2
FBA_WCK0 FBB_WCK0 FBB_DEBUG0 FBB_DEBUG1
R29
FBA_WCK0#
G15
FBB_WCK0# FBB_DEBUG1
G16 R8521 1 DY 2 Do Not Stuff
L29 T30 FBA_DEBUG0 R8518 1 DY 2
1.05V +/- 3% G11 Do Not Stuff
FBA_WCK1 FBA_DEBUG0 FBA_DEBUG1 FBB_WCK1
M29
FBA_WCK1# FBA_DEBUG1
T29 R8519 1 DY 2 Do Not Stuff G12
FBB_WCK1#
AG29
AH29
FBA_WCK2
Do Not Stuff
200mA G27
G28
FBB_WCK2
FBA_WCK2# FBB_WCK2#
AD29
AE29
FBA_WCK3 (See NV DG) G24
G25
FBB_WCK3
FBA_WCK3# FBB_WCK3#
1D05V_VGA_S0
L8501 OPS
FB_DLLAVDD
AG27 FB_PLLVDD_16m il 1 2 1D5V_VGA_S0
AF27
FB_PLLAVDD BLM18KG300TN1D-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V3KX-1GP
SC10U6D3V3MX-GP
OPS OPS CHIP BEAD BLM18KG300TN1D MURATA OPS
X7R X7R OPS OPS R8501
1
FB_CAL_PU_GND 40D2R2F-GP
M27 FB_CAL_TERM_GND
FB_CAL_TERM_GND
J27
NC#J27
N12P-GE-A1-GP
N12P-GE-A1-GP
OPS X7R, Under GPU. OPS
1
60D4R2F-GP
40D2R2F-GP
OPS
OPS R8502
R8503
2
2 2
FBA_CLK1 FBA_CLK0
FBB_CLK1 FBB_CLK0
1
FBA_CMD3 FBB_CMD3
R8504 R8505 FBA_CMD16 FBB_CMD16
1
OPS 162R2F-GP OPS 162R2F-GP FBA_CMD20 FBB_CMD20
FBA_CMD0 FBB_CMD0 R8506 R8507
FBA_CMD19 FBB_CMD19 OPS 162R2F-GP OPS 162R2F-GP
2
-FBA_CLK1 -FBA_CLK0
2
-FBB_CLK1 -FBB_CLK0
1
1
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
20100702_Change to Mode E
1 1
BOM
Wistron Corporation
21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
Taipei Hs ien 221, Taiwan, R.O.C.
Title
N12P-Q1/Q3 (3/6): VRAM I/F
Size Docum ent Num ber Rev
A1 -1
LZ57
Date: Tues day, March 29, 2011 Sheet 85 of 102
A B C D E
A B C D E
3.3V +/- 5%
120mA
(See NV DG) 1.05V +/- 3%
300ohm@100MHz ESR=0.25ohm 3D3V_VGA_S0 150mA
L8602 (See NV DG)
3D3V_VGA_S0_DACA_VDD_16MIL 1 2
1D05V_VGA_S0 PLLVDD_PWR 20100714
L8601OPS
Do Not Stuff
1
DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
10KR2J-3-GP
X7R 1 2
1
R8629 C8601 C8602 C8603 BLM18KG300TN1D-GP
3D3V_VGA_S0
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY DY DY CHIP BEAD BLM18KG300TN1D MURATA
2
X7R X7R X7R X7R
1
Missed 3x 0.1uF
C8604 C8605 C8606 C8607 C8608
OPS SC22U6D3V5MX-2GP
2
OPS OPS OPS OPS
3
4
OPS VGA1N 14 OF 16
RN8601 XTAL_PLL
SRN2K2J-1-GP
4 X7R, Under GPU. OPS AE9
PLLVDD
4
AD9
VGA1D 4 OF 16 VID_PLLVDD
AF9
2
1
DACA SP_PLLVDD
AJ12 G1 VGA_CRT_DDCCLK 1 TP8609 Do Not Stuff
DACA_VDD I2CA_SCL G4 VGA_CRT_DDCDATA 1 TP8610 Do Not Stuff X7R, Under GPU. near GPU
DACA_VREF_AK12 AK12 I2CA_SDA
DACA_VREF
DACA_RSET_AK13 AK13 AM13 VGA_CRT_HSYNC 1 TP8611Do Not Stuff
DACA_RSET DACA_HSYNC VGA_CRT_VSYNC TP8612 Do Not Stuff VIDEO_CLK_XTAL_SS N12P_XTAL_OUTBUFF
AL13 1 D2 D1
DACA_VSYNC XTAL_SSIN XTAL_OUTBUFF
1
DY DY DY AM14 VGA_CRT_GREEN 1 TP8614 Do Not Stuff N12P-GE-A1-GP
1
C8609 R8601 R8603 DACA_GREEN R8605
Do Not Stuff Do Not Stuff Do Not Stuff AL14 VGA_CRT_BLUE 1 TP8615 Do Not Stuff OPS 10KR2J-3-GP
2
DACA_BLUE
OPS R8604 OPS
Should be placed near GFX
2
2
RN8602 DY
2
VGA_CRT_BLUE 1 8 R8606 1 2 Do Not Stuff 27MHZ_OUT
N12P-GE-A1-GP VGA_CRT_GREEN 2 7
1
VGA_CRT_RED 3 6
4 5
OPS OPS R8607
SRN75J-1-GP 100R2J-2-GP
OPS X8601
2
1 2 27MHZ_OUT_R
1
C8610 C8611
OPS
OPS SC15P50V2JN-2-GP OPS SC15P50V2JN-2-GP
2
Should be placed near GFX SB_1004'10
HARMORY 27MHz
3D3V_VGA_S0
12P 30PPM
HSX530G
4
3
RN8605
SRN2K2J-3-GP
OPS
OPS; main(84.2N702.A3F)
Q8601
1
2
DMN66D0LDW-7-GP VGA1F 6 OF 16
3 SMBD_Therm _NV RN8604 3
84.DMN66.03F DACB
2ND = 84.27002.F3F DACB_VDD_AG7 AG7 G3 I2CB_SCL_G3 4 1
DACB_VDD I2CB_SCL G2 I2CB_SDA_G2 3 2
AK6 I2CB_SDA
1
DACB_VREF
10KR2J-3-GP
SRN2K2J-1-GP
AH7 AM1
DACB_RSET DACB_HSYNC OPS
AM2
R8616 DACB_VSYNC
OPS
2
AK4
DACB_RED
AL4
DACB_GREEN
N12P-GE-A1-GP
I2CA=>CRT, I2CC=>LVDS.
1
2 10KR2J-3-GP
3
4
RN8606
OPS SRN2K2J-1-GP OPS
OPS
VGA1L 12 OF 16
Follow LA46 R8611
2
1
MISC1
B4 E2 SMBC_Therm _NV 84.2N702.D31
THERMDN I2CS_SCL E1 SMBD_Therm _NV 3D3V_VGA_S0
I2CS_SDA 2ND = 84.2N702.J31
E3 GPU_LVDS_CLK 2N7002E-1-GP
I2CC_SCL E4 GPU_LVDS_DATA
I2CC_SDA
2 R2813 1 3V_VGA_S0_R G
. .
B5 OPS 0R0402-PAD D
.
.
.
THERMDP PURE_HW_SHUTDOWN# 27,28,36
RN8603
1 4 -VIDEO_THERM_OVERT S
2 3
Q8602
TP8601
SRN10KJ-5-GP OPS; main(84.2N702.E31)
K3 VGA_LBKLT_CTL 1 TP8606 Do Not Stuff
Do Not Stuff GPIO2 H3 VGA_LCDVDD_EN 1 TP8616 Do Not Stuff
GPIO3 VGA_BLEN TP8617 Do Not Stuff
H2 1
GPIO4 H1
GPIO5 PWRCNTL_0 92
H4 PWRCNTL_1 92
1
JTAG_TRST# GPIO13
J6
R8620
10KR2J-3-GP
GPIO14
L2
VIDEO MEMORY
GPIO16
OPS L4 R8621 OPS
1
GPIO17 -VIDEO_THERM_OVERT
M4 2 1 3D3V_VGA_S0 OPS DY DY
15KR2F-GP
GPIO18 10KR2J-3-GP
L5 R8622 R8630 R8632 R8634
2 GPIO20
L6
-VIDEO_THERM_ALERT 1
10KR2J-3-GP
2
OPS
HYNIX SAMSUNG HYNIX Samsung 45K3R2F-L-GP Do Not Stuff 2
2
GPIO22 M6 STRAP0
GPIO23
GPIO24
M7 128Mx16 128Mx16 64Mx16 64Mx16 STRAP1
STRAP2
N12P-GE-A1-GP
0110 0111 0010 0011 OPS_BOM Ctrl/GE
1
OPS
DY
1
R8635
R8631 R8633 30KR2F-GP
Do Not Stuff
2
72.52G63.A0U 72.42164.D0U
2
GV = 64.51015.6DL
PD
R8627 64.34825.6DL 64.45325.6DL 64.15025.6DL 64.20025.6DL
3D3V_VGA_S0
TABLE
OPS_N12P-GV NVIDIA
1
*N12P-GE/GS/GV1 炷
炷GV=64.51015.6DL炸
炸
DY
10KR2F-2-GP
VGA1M R8626
Do Not Stuff
13 OF 16
J26
MISC2
C3
R8624 R8625 15KR2F-GP
LOGIC N12P-GE N12P-GV N12P-GV1 N12M-GE N11M-GE2 N11P-GS
J25 NC#J26 ROM_CS#
DEV ID: DEV ID: DEV ID: DEV ID: DEV ID: DEV ID:
2
NC#J25
ROM_SI
D3 ROM_SI_D3 OPS N12P-GE/GS/GV1
C4 ROM_SO_C4
ROM_SO
ROM_SCLK
D4 ROM_SLK_D4
0xDF5 TBD 0xDF7 0xA7A 0xA70 0xDF0
1
DY 0101 1010
15KR2F-GP
10KR2F-2-GP
Do Not Stuff
3D3V_VGA_S0
W5 STRAP0 R8627 R8617 R8618
STRAP0 STRAP1 3D3V_VGA_S0
W7
STRAP1
V7 STRAP2
STRAP2 PD R8635 TBD PD R8635 PD R8635 PU R8634 PD R8635
2
STRAP2
1
OPS_Hynix or Samsung_R?
OPS
R8628
F6 I2CH_SCL_F6 R8614 1OPS 2 2K2R2J-2-GP
30Kohm 45Kohm 5Kohm 15Kohm 5Kohm
10KR2J-3-GP I2CH_SCL
G6 I2CH_SDA_G6 R8615 1 2 2K2R2J-2-GP 64.30025.6DL 64.45325.6DL 64.51015.6DL 64.15025.6DL64.51015.6DL
2
I2CH_SDA
CEC_AB5 AB5
CEC OPS
A5
NC#A5
1 1
A4
BUFRST# C5
NC#C5 N12P-GE N12P-GV N12P-GV1 N12M-GE N11P-GS
STRAP_REF0_GND_N9 N9
STRAP_REF1_GND_M9 MULTI_STRAP_REF0_GND
M9
MULTI_STRAP_REF1_GND
ROM_SO Pull-Low Pull-high Pull-Low Pull-Low Pull-Low
AK14
GND
K9 Stuff R8617 R8625 R8617 R8617 R8617 LOGIC
1
GND
40K2R2F-GP
40K2R2F-GP
N12P-GE-A1-GP
OPS OPS
OPS
2
2
R8612
R8613
BOM
Wistron Corporation
21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
Taipei Hs ien 221, Taiwan, R.O.C.
Title
N12P-Q1/Q3 (4/6): GPIO
Size Docum ent Num ber Rev
A1 -1
LZ57
Date: Tues day, March 29, 2011 Sheet 86 of 102
A B C D E
A B C D E
VGA1O 15 OF 16
GND
AA11 E15
GND GND
AA12 E18
GND GND
AA13 E24
GND GND
AA14 E27
GND GND
AA15 E30
GND GND
AA16 E6
EDP 50A AA17
AA18
GND
GND
GND
GND
GND
GND
E9
F2
AA19 F31
(TDP 37W) AA2
AA20
AA21
GND
GND
GND
GND
GND
GND
F34
F5
J2
GND GND
4 VGA_CORE AA22 J31 4
GND GND
AA23 J34
GND GND
VGA_CORE AA24 J5
GND GND
AA25 L9
GND GND
AA34 M11
Under GPU VGA1P 16 OF 16 AA5
GND GND
M13
NVVDD GND GND
AB12 M15
GND GND
AB11 P21 AB14 M17
VDD VDD GND GND
AB13 P23 AB16 M19
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
VDD VDD GND GND
OPS OPS OPS OPS OPS OPS OPS AB15
VDD VDD
P25 AB18
GND GND
M2
X7R X7R X7R X7R X7R X7R X7R AB17
VDD VDD
R11 AB20
GND GND
M21
1
AB19 R12 AB22 M23
C8701 C8702 C8703 C8704 C8705 C8706 C8708 VDD VDD GND GND
AB21 R13 AB24 M25
VDD VDD GND GND
AB23 R14 AC9 M31
2
VDD VDD GND GND
AB25 R15 AD11 M34
VDD VDD GND GND
AC11 R16 AD13 M5
VDD VDD GND GND
AC12 R17 AD15 N11
VDD VDD GND GND
AC13 R18 AD17 N12
VDD VDD GND GND
AC14 R19 AD2 N13
VDD VDD GND GND
AC15 R20 AD21 N14
VDD VDD GND GND
AC16 R21 AD23 N15
VDD VDD GND GND
AC17 R22 AD25 N16
VDD VDD GND GND
AC18 R23 AD31 N17
Under GPU AC19
VDD VDD
R24 AD34
GND GND
N18
VDD VDD GND GND
AC20 R25 AD5 N19
VDD VDD GND GND
AC21 T12 AE11 N20
VDD VDD GND GND
AC22 T14 AE12 N21
SCD022U25V2KX-GP
SCD022U25V2KX-GP
SCD022U25V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SC1U6D3V3KX-1GP
SCD047U10V2KX-2GP
SCD047U10V2KX-2GP
SCD047U10V2KX-2GP
VDD VDD GND GND
AC23 T16 AE13 N22
VDD VDD GND GND
X7R X7R X7R X7R X7R X7R X7R X7R X7R AC24
VDD VDD
T18 AE14
GND GND
N23
1
OPS AC25
VDD VDD
T20 AE15
GND GND
N24
C8709 C8710 C8711 C8712 C8713 C8714 C8715 C8716 C8717 C8718 C8719 C8720 AD12 T22 AE16 N25
VDD VDD GND GND
AD14 T24 AE17 P12
2
VDD VDD GND GND
OPS OPS OPS AD16
VDD VDD
V11 AE18
GND GND
P14
OPS OPS OPS OPS OPS AD18
VDD VDD
V13 AE19
GND GND
P16
OPS OPS OPS AD22
VDD VDD
V15 AE20
GND GND
P18
AD24 V17 AE21 P20
VDD VDD GND GND
L11 V19 AE22 P22
VDD VDD GND GND
L12 V21 AE23 P24
VDD VDD GND GND
L13 V23 AE24 R2
VDD VDD GND GND
L14 V25 AE25 R31
NEAR GPU L15
VDD VDD
W11 AG2
GND GND
R34
VDD VDD GND GND
3 L16 W12 AG31 R5 3
VDD VDD GND GND
L17 W13 AG34 T11
VDD VDD GND GND
L18 W14 AG5 T13
SC10U6D3V3MX-GP
SC22U6D3V5MX-2GP
SC47U6D3V5MX-1-GP
SC10U6D3V5KX-4GP
SC4D7U6D3V3KX-GP
VDD VDD GND GND
L19 W15 AK2 T15
VDD VDD GND GND
X7R L20
VDD VDD
W16 AK31
GND GND
T17
1
L21 W17 AK34 T19
C8721 C8722 C8723 C8724 C8725 VDD VDD GND GND
L22 W18 AK5 T21
VDD VDD GND GND
L23 W19 AL12 T23
2
VDD VDD GND GND
L24 W20 AL15 T25
VDD VDD GND GND
L25 W21 AL18 U11
VDD VDD GND GND
OPS OPS OPS OPS OPS M12
VDD VDD
W22 AL21
GND GND
U12
M14 W23 AL24 U13
VDD VDD GND GND
M16 W24 AL27 U14
VDD VDD GND GND
M18 W25 AL30 U15
VDD VDD GND GND
M20 Y12 AL6 U16
VDD VDD GND GND
M22 Y14 AL9 U17
VDD VDD GND GND
M24 Y16 AN2 U18
VDD VDD GND GND
P11 Y18 AN34 U19
VDD VDD GND GND
P13 Y20 AP12 U20
VDD VDD GND GND
P15 Y22 AP15 U21
VDD VDD GND GND
P17 Y24 AP18 U22
VDD VDD GND GND
P19 AP21 U23
VDD GND GND
AP24 U24
N12P-GE-A1-GP GND GND
AP27 U25
GND GND
AP3 V12
GND GND
AP30 V14
OPS AP33
GND GND
V16
GND GND
AP6 V18
GND GND
AP9 V2
GND GND
B12 V20
GND GND
B15 V22
GND GND
B21 V24
GND GND
B24 V31
GND GND
B27 V5
GND GND
B3 V9
GND GND
B30 Y11
GND GND
B33 Y13
GND GND
B6 Y15
GND GND
B9 Y17
GND GND
C2 Y19
GND GND
C34 Y21
2 GND GND 2
E12 Y23
GND GND
Y25
GND
N12P-GE-A1-GP
OPS
1 1
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
N12P-Q1/Q3 (5/6): POWER
Size Document Number Rev
A2 -1
LZ57
Date: Tuesday, March 29, 2011 Sheet 87 of 102
A B C D E
A B C D E
1D5V_VGA_S0
1D5V_VGA_S0
VRAM2
VRAM1 FBA_D[63..0] 85,89
FBA_D[63..0] 85,89 FBA_D16
K8 E3
FBA_D3 VDD DQL0 FBA_D22
K8 E3 K2 F7
VDD DQL0 FBA_D2 VDD DQL1 FBA_D19
K2 F7 N1 F2
VDD DQL1 FBA_D5 VDD DQL2 FBA_D18
N1 F2 R9 F8
VDD DQL2 FBA_D1 VDD DQL3 FBA_D20
R9 F8 B2 H3
VDD DQL3 FBA_D4 VDD DQL4 FBA_D23
B2 H3 D9 H8
VDD DQL4 FBA_D0 VDD DQL5 FBA_D21
D9 H8 G7 G2
VDD DQL5 FBA_D6 VDD DQL6 FBA_D17
G7 G2 R1 H7
VDD DQL6 FBA_D7 VDD DQL7
R1 H7 N9
VDD DQL7 VDD FBA_D31
N9 D7
VDD FBA_D12 DQU0 FBA_D26
D7 A8 C3
DQU0 FBA_D10 VDDQ DQU1 FBA_D30
A8 C3 A1 C8
VDDQ DQU1 FBA_D14 VDDQ DQU2 FBA_D24
A1 C8 C1 C2
VDDQ DQU2 FBA_D8 VDDQ DQU3 FBA_D27
C1 C2 C9 A7
VDDQ DQU3 FBA_D13 VDDQ DQU4 FBA_D28
C9 A7 D2 A2
VDDQ DQU4 FBA_D9 VDDQ DQU5 FBA_D29
4 D2 A2 E9 B8 4
VDDQ DQU5 FBA_D15 VDDQ DQU6 FBA_D25
E9 B8 F1 A3
VDDQ DQU6 FBA_D11 VDDQ DQU7
F1 A3 H9
VDDQ DQU7 VDDQ
H9 H2 C7 FBA_DQS_WP3 85
VDDQ VDDQ DQSU
H2 C7 FBA_DQS_WP1 85 B7 FBA_DQS_RN3 85
VDDQ DQSU FBA_VREF_0 DQSU#
B7 FBA_DQS_RN1 85 H1
FBA_VREF_0 DQSU# VREFDQ
H1 M8 F3 FBA_DQS_WP2 85
VREFDQ VRAM_CH_A_ZQ_2 VREFCA DQSL
M8 F3 FBA_DQS_WP0 85 L8 G3 FBA_DQS_RN2 85
VRAM_CH_A_ZQ_1 VREFCA DQSL ZQ DQSL#
L8 G3 FBA_DQS_RN0 85
ZQ DQSL#
1
K1 FBA_CMD0 85
ODT
1
2
A2 CS# A3 RESET#
OPS 85,89 FBA_CMD6 N2 T2 FBA_CMD20 85,89 85,89 FBA_CMD22 P8
2
A3 RESET# A4
85,89 FBA_CMD22 P8 85,89 FBA_CMD26 P2
A4 A5
85,89 FBA_CMD26 P2 85,89 FBA_CMD5 R8 T7
A5 A6 NC#T7
85,89 FBA_CMD5 R8
A6 NC#T7
T7 20100702_Change to Mode E 85,89 FBA_CMD21 R2
A7 NC#L9
L9 20100702_Change to Mode E
85,89 FBA_CMD21 R2 L9 85,89 FBA_CMD8 T8 L1
A7 NC#L9 A8 NC#L1
85,89 FBA_CMD8 T8 L1 85,89 FBA_CMD4 R3 J9
A8 NC#L1 A9 NC#J9
85,89 FBA_CMD4 R3 J9 85,89 FBA_CMD25 L7 J1
A9 NC#J9 A10/AP NC#J1
85,89 FBA_CMD25 L7 J1 85,89 FBA_CMD23 R7
A10/AP NC#J1 A11
85,89 FBA_CMD23 R7 85,89 FBA_CMD9 N7
A11 A12/BC#
85,89 FBA_CMD9 N7 85 FBA_CMD12 T3 J8
A12/BC# A13 VSS
85 FBA_CMD12 T3 J8 85,89 FBA_CMD30 M7 M1
A13 VSS A15 VSS
85,89 FBA_CMD30 M7 M1 M9
A15 VSS 1D5V_VGA_S0 VSS
M9 J2
VSS VSS
J2 85,89 FBA_CMD29 M2 P9
VSS BA0 VSS
85,89 FBA_CMD29 M2 P9 85,89 FBA_CMD13 N8 G8
BA0 VSS BA1 VSS
1
85,89 FBA_CMD13 N8 G8 85,89 FBA_CMD27 M3 B3
BA1 VSS R8803 BA2 VSS
85,89 FBA_CMD27 M3 B3 T1
BA2 VSS 1K33R2F-GP VSS
VSS
T1 OPS VSS
A9
A9 85 FBA_CLK0 J7 T9
VSS CK VSS
J7 T9 K7 E1
2
85 FBA_CLK0 CK VSS 85 -FBA_CLK0 CK# VSS
85 -FBA_CLK0 K7 E1 P1
CK# VSS FBA_VREF_0 VSS
P1 85 FBA_CMD3 K9
VSS CKE
85 FBA_CMD3 K9 G1
CKE VSSQ
1
VSSQ
G1 OPS VSSQ
F9
1
F9 R8804 C8802 D3 E8
VSSQ 85 FBA_DQM3 DMU VSSQ
D3 E8 OPS 1K33R2F-GP E7 E2
85 FBA_DQM1 DMU VSSQ 85 FBA_DQM2 DML VSSQ
E7 E2 D8
2
85 FBA_DQM0 DML VSSQ VSSQ
3 D8 SCD01U50V2KX-1GP D1 3
2
VSSQ VSSQ
D1 85,89 FBA_CMD28 L3 B9
VSSQ WE# VSSQ
85,89 FBA_CMD28 L3 B9 85,89 FBA_CMD15 K3 B1
WE# VSSQ CAS# VSSQ
85,89 FBA_CMD15 K3 B1 85,89 FBA_CMD11 J3 G9
CAS# VSSQ RAS# VSSQ
85,89 FBA_CMD11 J3 G9
RAS# VSSQ
20100702_Change to Mode E H5TQ1G63BFR-12C-GP
20100702_Change to Mode E H5TQ1G63BFR-12C-GP
OPS
OPS
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_VGA_S0
C8801 C8803 C8804 C8805 C8806 C8807 C8808
1
OPS OPS
SC10U6D3V3MX-GP
1D5V_VGA_S0 OPS
1
2 2
CLOSE TO THE MEMORY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
OPS OPS
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM CHANNEL-A
Size Document Number Rev
A2 -1
LZ57
Date: Tuesday, March 29, 2011 Sheet 88 of 102
A B C D E
A B C D E
1D5V_VGA_S0
1D5V_VGA_S0
VRAM3
FBA_D[63..0] 85,88 VRAM4
FBA_D33 FBA_D[63..0] 85,88
K8 E3
VDD DQL0 FBA_D34 FBA_D43
K2 F7 K8 E3
VDD DQL1 FBA_D35 VDD DQL0 FBA_D44
N1 F2 K2 F7
VDD DQL2 FBA_D36 VDD DQL1 FBA_D40
R9 F8 N1 F2
VDD DQL3 FBA_D39 VDD DQL2 FBA_D41
B2 H3 R9 F8
VDD DQL4 FBA_D32 VDD DQL3 FBA_D45
D9 H8 B2 H3
VDD DQL5 FBA_D38 VDD DQL4 FBA_D46
G7 G2 D9 H8
VDD DQL6 FBA_D37 VDD DQL5 FBA_D42
R1 H7 G7 G2
VDD DQL7 VDD DQL6 FBA_D47
N9 R1 H7
VDD FBA_D61 VDD DQL7
D7 N9
DQU0 FBA_D60 VDD FBA_D48
A8 C3 D7
VDDQ DQU1 FBA_D56 DQU0 FBA_D52
A1 C8 A8 C3
VDDQ DQU2 FBA_D59 VDDQ DQU1 FBA_D50
C1 C2 A1 C8
VDDQ DQU3 FBA_D57 VDDQ DQU2 FBA_D53
C9 A7 C1 C2
VDDQ DQU4 FBA_D62 VDDQ DQU3 FBA_D51
D2 A2 C9 A7
VDDQ DQU5 FBA_D58 VDDQ DQU4 FBA_D55
4 E9 B8 D2 A2 4
VDDQ DQU6 FBA_D63 VDDQ DQU5 FBA_D49
F1 A3 E9 B8
VDDQ DQU7 VDDQ DQU6 FBA_D54
H9 F1 A3
VDDQ VDDQ DQU7
H2 C7 FBA_DQS_WP7 85 H9
VDDQ DQSU VDDQ
B7 FBA_DQS_RN7 85 H2 C7 FBA_DQS_WP6 85
FBA_VREF_1 DQSU# VDDQ DQSU
H1 B7 FBA_DQS_RN6 85
VREFDQ FBA_VREF_1 DQSU#
M8 F3 FBA_DQS_WP4 85 H1
VRAM_CH_A_ZQ_3 VREFCA DQSL VREFDQ
L8 G3 FBA_DQS_RN4 85 M8 F3 FBA_DQS_WP5 85
ZQ DQSL# VRAM_CH_A_ZQ_4 VREFCA DQSL
L8 G3 FBA_DQS_RN5 85
ZQ DQSL#
K1 FBA_CMD19 85
ODT
1 85,88 FBA_CMD9 N3
A0 ODT
K1 FBA_CMD19 85
1
85,88 FBA_CMD24 P7 85,88 FBA_CMD9 N3
R8901 A1 A0
85,88 FBA_CMD10 P3 L2 FBA_CMD18 85 85,88 FBA_CMD24 P7
243R2F-2-GP 85,88 FBA_CMD13 A2 CS# R8904 A1
N2 T2 FBA_CMD20 85,88 85,88 FBA_CMD10 P3 L2 FBA_CMD18 85
A3 RESET# 243R2F-2-GP A2 CS#
OPS 85,88 FBA_CMD26 P8 85,88 FBA_CMD13 N2 T2 FBA_CMD20 85,88
2
A4 A3 RESET#
85,88 FBA_CMD22 P2 OPS 85,88 FBA_CMD26 P8
2
A5 A4
85,88 FBA_CMD21 R8
A6 NC#T7
T7 20100702_Change to Mode E 85,88 FBA_CMD22 P2
A5
85,88 FBA_CMD5 R2
A7 NC#L9
L9 85,88 FBA_CMD21 R8
A6 NC#T7
T7 20100702_Change to Mode E
85,88 FBA_CMD8 T8 L1 85,88 FBA_CMD5 R2 L9
A8 NC#L1 A7 NC#L9
85,88 FBA_CMD23 R3 J9 85,88 FBA_CMD8 T8 L1
A9 NC#J9 A8 NC#L1
85,88 FBA_CMD28 L7 J1 85,88 FBA_CMD23 R3 J9
A10/AP NC#J1 A9 NC#J9
85,88 FBA_CMD4 R7 85,88 FBA_CMD28 L7 J1
A11 A10/AP NC#J1
85,88 FBA_CMD7 N7 85,88 FBA_CMD4 R7
A12/BC# A11
85 FBA_CMD14 T3 J8 85,88 FBA_CMD7 N7
A13 VSS A12/BC#
85,88 FBA_CMD27 M7 M1 85 FBA_CMD14 T3 J8
A15 VSS A13 VSS
M9 85,88 FBA_CMD27 M7 M1
VSS A15 VSS
J2 M9
1D5V_VGA_S0 VSS VSS
85,88 FBA_CMD29 M2 P9 J2
BA0 VSS VSS
85,88 FBA_CMD6 N8 G8 85,88 FBA_CMD29 M2 P9
BA1 VSS BA0 VSS
85,88 FBA_CMD30 M3 B3 85,88 FBA_CMD6 N8 G8
BA2 VSS BA1 VSS
1
T1 85,88 FBA_CMD30 M3 B3
R8902 VSS BA2 VSS
A9 T1
1K33R2F-GP VSS VSS
OPS 85 FBA_CLK1 J7
CK VSS
T9
VSS
A9
85 -FBA_CLK1 K7 E1 85 FBA_CLK1 J7 T9
CK# VSS CK VSS
P1 K7 E1
2
D3 E8 F9
85 FBA_DQM7 DMU VSSQ FB CMD mapping Mode D-N12x VSSQ
1
R8903 C8902 E7 E2 D3 E8
1K33R2F-GP 85 FBA_DQM4 DML VSSQ 85 FBA_DQM6 DMU VSSQ
OPS SCD01U50V2KX-1GP D8 E7 E2
VSSQ 85 FBA_DQM5 DML VSSQ
3 D1 D8 3
2
VSSQ VSSQ
85,88 FBA_CMD25 L3 B9 D1
2
2 2
1D5V_VGA_S0
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_VGA_S0
C8901 C8903 C8904 C8905 C8906 C8907 C8908
1
SC10U6D3V3MX-GP
1D5V_VGA_S0 OPS
1
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM CHANNEL-A
1
Size Document Number Rev 1
A2 -1
LZ57
Date: Tuesday, March 29, 2011 Sheet 89 of 102
A B C D E
A B C D E
1D5V_VGA_S0
VRAM6
1D5V_VGA_S0 FBB_D[63..0] 85,91
VRAM5
FBB_D[63..0] 85,91 FBB_D21
K8 E3
FBB_D6 VDD DQL0 FBB_D18
K8 E3 K2 F7
VDD DQL0 FBB_D1 VDD DQL1 FBB_D17
K2 F7 N1 F2
VDD DQL1 FBB_D7 VDD DQL2 FBB_D23
N1 F2 R9 F8
VDD DQL2 FBB_D0 VDD DQL3 FBB_D16
R9 F8 B2 H3
VDD DQL3 FBB_D5 VDD DQL4 FBB_D20
B2 H3 D9 H8
VDD DQL4 FBB_D2 VDD DQL5 FBB_D19
D9 H8 G7 G2
VDD DQL5 FBB_D4 VDD DQL6 FBB_D22
G7 G2 R1 H7
VDD DQL6 FBB_D3 VDD DQL7
R1 H7 N9
VDD DQL7 VDD FBB_D31
N9 D7
VDD FBB_D13 DQU0 FBB_D24
D7 A8 C3
DQU0 FBB_D8 VDDQ DQU1 FBB_D30
A8 C3 A1 C8
VDDQ DQU1 FBB_D14 VDDQ DQU2 FBB_D25
4 A1 C8 C1 C2 4
VDDQ DQU2 FBB_D10 VDDQ DQU3 FBB_D29
C1 C2 C9 A7
VDDQ DQU3 FBB_D12 VDDQ DQU4 FBB_D26
C9 A7 D2 A2
VDDQ DQU4 FBB_D9 VDDQ DQU5 FBB_D28
D2 A2 E9 B8
VDDQ DQU5 FBB_D15 VDDQ DQU6 FBB_D27
E9 B8 F1 A3
VDDQ DQU6 FBB_D11 VDDQ DQU7
F1 A3 H9
VDDQ DQU7 VDDQ
H9 H2 C7 FBB_DQS_WP3 85
VDDQ VDDQ DQSU
H2 C7 FBB_DQS_WP1 85 B7 FBB_DQS_RN3 85
VDDQ DQSU FBB_VREF_0 DQSU#
B7 FBB_DQS_RN1 85 H1
FBB_VREF_0 DQSU# VREFDQ
H1 M8 F3 FBB_DQS_WP2 85
VREFDQ VRAM_CH_C_ZQ_2 VREFCA DQSL
M8 F3 FBB_DQS_WP0 85 L8 G3 FBB_DQS_RN2 85
VRAM_CH_C_ZQ_1 VREFCA DQSL ZQ DQSL#
L8 G3 FBB_DQS_RN0 85
ZQ DQSL#
K1 FBB_CMD0 85
ODT
1
1
K1 FBB_CMD0 85 85,91 FBB_CMD7 N3
ODT A0
85,91 FBB_CMD7 N3 85,91 FBB_CMD10 P7
R9001 A0 R9002 A1
85,91 FBB_CMD10 P7 85,91 FBB_CMD24 P3 L2 FBB_CMD2 85
243R2F-2-GP A1 243R2F-2-GP A2 CS#
85,91 FBB_CMD24 P3 L2 FBB_CMD2 85 85,91 FBB_CMD6 N2 T2 FBB_CMD20 85,91
A2 CS# A3 RESET#
OP 85,91 FBB_CMD6 N2 T2 FBB_CMD20 85,91 OP 85,91 FBB_CMD22 P8
2
2
A3 RESET# A4
85,91 FBB_CMD22 P8 85,91 FBB_CMD26 P2
A4 A5
85,91 FBB_CMD26 P2
A5 85,91 FBB_CMD5 R8
A6 NC#T7
T7 20100702_Change to Mode E
85,91 FBB_CMD5 R8
A6 NC#T7
T7 20100702_Change to Mode E 85,91 FBB_CMD21 R2
A7 NC#L9
L9
85,91 FBB_CMD21 R2 L9 85,91 FBB_CMD8 T8 L1
A7 NC#L9 A8 NC#L1
85,91 FBB_CMD8 T8 L1 85,91 FBB_CMD4 R3 J9
A8 NC#L1 A9 NC#J9
85,91 FBB_CMD4 R3 J9 85,91 FBB_CMD25 L7 J1
A9 NC#J9 A10/AP NC#J1
85,91 FBB_CMD25 L7 J1 85,91 FBB_CMD23 R7
A10/AP NC#J1 A11
85,91 FBB_CMD23 R7 85,91 FBB_CMD9 N7
A11 A12/BC#
85,91 FBB_CMD9 N7 85 FBB_CMD12 T3 J8
A12/BC# A13 VSS
85 FBB_CMD12 T3 J8 85,91 FBB_CMD30 M7 M1
A13 VSS A15 VSS
85,91 FBB_CMD30 M7 M1 M9
A15 VSS VSS
M9 J2
VSS VSS
J2 85,91 FBB_CMD29 M2 P9
VSS BA0 VSS
85,91 FBB_CMD29 M2 P9 85,91 FBB_CMD13 N8 G8
BA0 VSS 1D5V_VGA_S0 BA1 VSS
85,91 FBB_CMD13 N8 G8 85,91 FBB_CMD27 M3 B3
BA1 VSS BA2 VSS
85,91 FBB_CMD27 M3 B3 T1
BA2 VSS VSS
T1 A9
VSS VSS
1
A9 85 FBB_CLK0 J7 T9
VSS R9003 CK VSS
85 FBB_CLK0 J7 T9 85 -FBB_CLK0 K7 E1
CK VSS 1K33R2F-GP CK# VSS
85 -FBB_CLK0 K7
CK# VSS
E1 OP VSS
P1
P1 85 FBB_CMD3 K9
VSS CKE
85 FBB_CMD3 K9 G1
2
CKE VSSQ
G1 F9
VSSQ FBB_VREF_0 VSSQ
3 F9 85 FBB_DQM3 D3 E8 3
VSSQ DMU VSSQ
85 FBB_DQM1 D3 E8 85 FBB_DQM2 E7 E2
DMU VSSQ DML VSSQ
1
85 FBB_DQM0 E7
DML VSSQ
E2 OP VSSQ
D8
1
D8 R9004 D1
VSSQ 1K33R2F-GP C9002 VSSQ
VSSQ
D1 OP 85,91 FBB_CMD28 L3
WE# VSSQ
B9
85,91 FBB_CMD28 L3 B9 SCD01U50V2KX-1GP 85,91 FBB_CMD15 K3 B1
2
WE# VSSQ CAS# VSSQ
85,91 FBB_CMD15 K3 B1 85,91 FBB_CMD11 J3 G9
2
CAS# VSSQ RAS# VSSQ
85,91 FBB_CMD11 J3 G9
RAS# VSSQ
20100702_Change to Mode E H5TQ1G63BFR-12C-GP
20100702_Change to Mode E H5TQ1G63BFR-12C-GP OP
OP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
OP OP OP OP OP OP OP
FOR VRAM5 1D5V_VGA_S0
2
SC10U6D3V3MX-GP
OP
1
1D5V_VGA_S0
C9009
2 CLOSE TO THE MEMORY 2
2
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
OP OP OP OP OP OP OP
2
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM CHANNEL-C
A B C D Size Document Number E Rev
A2 -1
LZ57
Date: Tuesday, March 29, 2011 Sheet 90 of 102
A B C D E
1D5V_VGA_S0
VRAM7
FBB_D[63..0] 85,90
1D5V_VGA_S0
K8 E3 FBB_D35 VRAM8
VDD DQL0 FBB_D39 FBB_D[63..0] 85,90
K2 F7
VDD DQL1 FBB_D34 FBB_D62
N1 F2 K8 E3
VDD DQL2 FBB_D37 VDD DQL0 FBB_D59
R9 F8 K2 F7
VDD DQL3 FBB_D33 VDD DQL1 FBB_D60
B2 H3 N1 F2
VDD DQL4 FBB_D36 VDD DQL2 FBB_D56
D9 H8 R9 F8
VDD DQL5 FBB_D32 VDD DQL3 FBB_D61
G7 G2 B2 H3
VDD DQL6 FBB_D38 VDD DQL4 FBB_D58
R1 H7 D9 H8
VDD DQL7 VDD DQL5 FBB_D63
N9 G7 G2
VDD FBB_D48 VDD DQL6 FBB_D57
D7 R1 H7
DQU0 FBB_D53 VDD DQL7
A8 C3 N9
VDDQ DQU1 FBB_D50 VDD FBB_D40
A1 C8 D7
VDDQ DQU2 FBB_D54 DQU0 FBB_D45
4 C1 C2 A8 C3 4
VDDQ DQU3 FBB_D51 VDDQ DQU1 FBB_D41
C9 A7 A1 C8
VDDQ DQU4 FBB_D55 VDDQ DQU2 FBB_D47
D2 A2 C1 C2
VDDQ DQU5 FBB_D49 VDDQ DQU3 FBB_D44
E9 B8 C9 A7
VDDQ DQU6 FBB_D52 VDDQ DQU4 FBB_D46
F1 A3 D2 A2
VDDQ DQU7 VDDQ DQU5 FBB_D42
H9 E9 B8
VDDQ VDDQ DQU6 FBB_D43
H2 C7 FBB_DQS_WP6 85 F1 A3
VDDQ DQSU VDDQ DQU7
B7 FBB_DQS_RN6 85 H9
FBB_VREF_1 DQSU# VDDQ
H1 H2 C7 FBB_DQS_WP5 85
VREFDQ VDDQ DQSU
M8 F3 FBB_DQS_WP4 85 B7 FBB_DQS_RN5 85
VRAM_CH_C_ZQ_3 VREFCA DQSL FBB_VREF_1 DQSU#
L8 G3 FBB_DQS_RN4 85 H1
ZQ DQSL# VREFDQ
M8 F3 FBB_DQS_WP7 85
VREFCA DQSL
1
K1 FBB_CMD19 85 VRAM_CH_C_ZQ_4 L8 G3
ODT ZQ DQSL# FBB_DQS_RN7 85
85,90 FBB_CMD9 N3
A0
1
R9101 85,90 FBB_CMD24 P7 K1 FBB_CMD19 85
243R2F-2-GP A1 ODT
85,90 FBB_CMD10 P3 L2 FBB_CMD18 85 85,90 FBB_CMD9 N3
A2 CS# R9104 A0
OP 85,90 FBB_CMD13 N2 T2 FBB_CMD20 85,90 85,90 FBB_CMD24 P7
2
A3 RESET# 243R2F-2-GP A1
85,90 FBB_CMD26 P8 85,90 FBB_CMD10 P3 L2 FBB_CMD18 85
A4 A2 CS#
85,90 FBB_CMD22 P2 OP 85,90 FBB_CMD13 N2 T2 FBB_CMD20 85,90
2
A5 A3 RESET#
85,90 FBB_CMD21 R8
A6 NC#T7
T7 20100702_Change to Mode E 85,90 FBB_CMD26 P8
A4
85,90 FBB_CMD5 R2 L9 85,90 FBB_CMD22 P2
A7 NC#L9 A5
85,90 FBB_CMD8 T8
A8 NC#L1
L1 85,90 FBB_CMD21 R8
A6 NC#T7
T7 20100702_Change to Mode E
85,90 FBB_CMD23 R3 J9 85,90 FBB_CMD5 R2 L9
A9 NC#J9 A7 NC#L9
85,90 FBB_CMD28 L7 J1 85,90 FBB_CMD8 T8 L1
A10/AP NC#J1 A8 NC#L1
85,90 FBB_CMD4 R7 85,90 FBB_CMD23 R3 J9
A11 A9 NC#J9
85,90 FBB_CMD7 N7 85,90 FBB_CMD28 L7 J1
A12/BC# A10/AP NC#J1
85 FBB_CMD14 T3 J8 85,90 FBB_CMD4 R7
A13 VSS A11
85,90 FBB_CMD27 M7 M1 85,90 FBB_CMD7 N7
A15 VSS A12/BC#
M9 85 FBB_CMD14 T3 J8
VSS A13 VSS
J2 85,90 FBB_CMD27 M7 M1
VSS A15 VSS
85,90 FBB_CMD29 M2 P9 M9
BA0 VSS VSS
85,90 FBB_CMD6 N8 G8 1D5V_VGA_S0 J2
BA1 VSS VSS
85,90 FBB_CMD30 M3 B3 85,90 FBB_CMD29 M2 P9
BA2 VSS BA0 VSS
T1 85,90 FBB_CMD6 N8 G8
VSS BA1 VSS
A9 85,90 FBB_CMD30 M3 B3
VSS BA2 VSS
85 FBB_CLK1 J7 T9 T1
CK VSS VSS
K7 E1 A9
SC10U6D3V3MX-GP
85 -FBB_CLK1 CK# VSS VSS
P1 85 FBB_CLK1 J7 T9
VSS CK VSS
85 FBB_CMD16 K9
CKE OP 85 -FBB_CLK1 K7
CK# VSS
E1
1
G1 P1
1D5V_VGA_S0 VSSQ C9109 VSS
F9 85 FBB_CMD16 K9
VSSQ CKE
3 D3 E8 G1 3
2
85 FBB_DQM6 DMU VSSQ VSSQ
85 FBB_DQM4 E7 E2 F9
DML VSSQ VSSQ
1
D8 D3 E8
R9102 VSSQ
VSSQ
D1 CLOSE TO THE MEMORY 85
85
FBB_DQM5
FBB_DQM7 E7
DMU
DML
VSSQ
VSSQ
E2
OP 1K33R2F-GP 85,90 FBB_CMD25 L3 B9 D8
WE# VSSQ VSSQ
85,90 FBB_CMD15 K3 B1 D1
CAS# VSSQ VSSQ
85,90 FBB_CMD11 J3 G9 85,90 FBB_CMD25 L3 B9
2
OP
2
1D5V_VGA_S0
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
OP OP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
OP OP OP OP OP
FOR VRAM7
2
2 C9107 C9108 2
C9101 C9103 C9104 C9105 C9106
2
2
1
1D5V_VGA_S0
CLOSE TO THE MEMORY
OP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
OP OP OP OP OP OP
2
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM CHANNEL-C
Size Document Number Rev
A2 -1
LZ57
Date: Tuesday, March 29, 2011 Sheet 91 of 102
A B C D E
10 9 8 7 6 5 4 3 2 1
DCBATOUT PWR_DCBATOUT_VGA_CORE
1
PG9201
2
SSID = PWR.Plane.Regulator_GFX
Do Not Stuff
PG9202
J 1 2 J
1
1 2 OPS PC9215 PC9213 PC9214 PC9204 PC9202 PC9205 PC9203
6
5
2
1
6
5
2
1
OPS OPS N12P-GE only
D
D
D
D
D
D
D
D
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SCD1U25V3KX-GP
OPSDo Not Stuff PU9202 PU9203
2
5V_S5
IRF6721SPBF-GP-U IRF6721SPBF-GP-U
1
S
20100623_PWR modify
OPS TP9203
OPS
1
I I
3
PC9201 Do Not Stuff
PWR_VGA_CORE_TON 1 PR9202
2 Design Current = 32A
249KR2F-GP N12P-GE only
SC1U10V2KX-1GP TP9204 45<OCP<50A
2
PU9201 OPS 1
1
OPS OPS PC9206 Modify to PCMC135T-R36MF VGA_CORE
16 13 PWR_VGA_CORE_BOOT 1 PR9205 2PWR_VGA_CORE_BOOT_C 1 2
TON BOOT Do Not Stuff
2 PR9201 1 9 2D2R3J-2-GP SCD1U25V3KX-GP
PL9201
10R2F-L-GP VDDP PWR_VGA_CORE_UGATE
12 1 PR9218 2 VGA_CORE_UGATE
PWR_VGA_CORE_VDD UGATE PWR_VGA_CORE_PHASE Do Not Stuff
2 11 1 2
VDD PHASE PWR_VGA_CORE_LGATE
8 1 PR9219 2 VGA_CORE_LGATE OPS PG9205
LGATE Do Not Stuff
7
6
2
1
7
6
2
1
8209A_PGOOD_VGA PWRCNTL_0 L-D36UH-1-GP
4 7
SCD1U10V2KX-4GP
PGOOD G0
D
D
D
D
D
D
D
D
1
Do Not Stuff
1 2 PWR_VGA_CORE_CS 10 3 PWR_VGA_CORE_FB PU9204 PU9205 PTC9202 PTC9203 PTC9204
CS FB
1
8K87R2F-2-GP 14 PWRCNTL_1 IRF6725MTRPBF-GP-U OPS
PR9204 G1 PWR_VGA_CORE_D1 IRF6725MTRPBF-GP-U
OPS 5 84.06725.030 2 2 2
1
2
D1
PC9208
8209A_EN/DEM_VGA 15 6 PWR_VGA_CORE_D0 84.06725.030
ST470U2VDM-5-GP-U1
ST470U2VDM-5-GP-U1
ST470U2VDM-5-GP-U1
OPS
2
H PC9207 EN/DEM D0 H
OPS
3
SC1U10V2KX-1GP
G
S
S
G
S
S
PWR_VGA_CORE_VOUT PWR_VGA_CORE_VOUT
2
-1_1213'10 17
GND VOUT
1 OPS OPS
5
4
3
5
4
3
TP9206
1
10R2J-2-GP
OPS N12P-GE only
PR9203
RT8208AGQW-GP-U G0 G1 1
0 0 N12P-GE only
1 TP9202 OPS
Do Not Stuff
1 0 1 TP9201
2
RT8208A:74.08208.073 0 1 Do Not Stuff PR9211
Do Not Stuff
1 1 10R2J-2-GP 2 VGACORE_VDD_SENSE_1
83 VGACORE_VDD_SENSE
OPS
OPS Do Not Stuff
PR9206 1 2 1KR2J-1-GP 1 TP9205
3D3V_VGA_S0 PC9209 PC9210
1
PD9201 PR9208
Do Not Stuff
Do Not Stuff
G 2 DY 1 8209A_EN/DEM_VGA 10KR2F-2-GP G
19,27,36,37,47 PM_SLP_S3#
P-State PWRCNTL_1(G1) PWRCNTL_0(G0) N12M-GS N12P-GE VGA_CORE
DY
OPS DY
2
1
Do Not Stuff DY
PC9211
2
Do Not Stuff
P8 L L 0.875V 0.85V
2
ES L H
P0(Hot) H L 1V 0.95V
PWR_VGA_CORE_FB
P0(Cold) H H 1.025V 0.975V
boot voltage 0.875V 0.95V GS = 64.10035.6DL OPS OPS OPS
1
GV1 = 64.24035.6DL PR9209 PR9210 PR9213
3D3V_VGA_S0 270KR2F-GP 68KR2F-GP 68KR2F-GP
GV = 64.20035.6DL GV1 = 64.90925.6DL GV1 = 64.90925.6DL
1
F F
2
PR9212
PWR_VGA_CORE_D1
P-State N12P-GE N12P-GV N12P-GV1 N12M-GS N12M-GE N11M-GE2 GV = 64.90925.6DL GV = 64.49925.6DL
PWR_VGA_CORE_D0
10KR2J-3-GP
OPS
P0(Cold) 0.998V 1.025 0.925 1V 1.00V 1.00V GS = 64.82025.6DL GS = 64.49925.6DL
2
1GND_SENSE_1
DGPU_PWROK 22,93
Do Not Stuff P8 0.86V 0.85V 0.825V 0.875V 0.85V 0.85V
1
VGACORE_GND_SENSE 83
0R2J-2-GP
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L OPS
PR9207
Inductor: 1.5UH PCMC104T-1R5MN Cyntec DCR:4.2mohm Isat =33Arms 68.1R510.10J 10R2J-2-GP
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3Arms Panasonic/ 79.33719.L01 3D3V_VGA_S0 3D3V_VGA_S0
E
OPS E
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
2
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
1
Switching freq-->350KHz N12P-GE/GV1/GS PR9220
10KR2J-3-GP
PR9221 DY
10KR2J-3-GP
2
3D3V_AUX_S5
2
PWRCNTL_0
Frequency setting PWRCNTL_0 86
DY PR9217 PWRCNTL_1
470K -->165KHz Do Not Stuff
PWRCNTL_1 86
1
1
D D
100K -->500KHz PR9222
10KR2J-3-GP
PR9223
10KR2J-3-GP
N12P-GE N12P-GV1 N12P-GV N12P-GS
6
2
Do Not Stuff N12P-GE/GV1/GV/GS P0(Hot) 0.971V 0.915V 1.011V
DY P8/P12 0.86V 0.833V 0.86V
1
B B
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A Title A
DC/DC_VGA CORE_RT8208B
Size Document Number Rev
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 92 of 102
10 9 8 7 6 5 4 3 2 1
5 4 3 2 1
1
D Rdson=17.4~22m ohm 5 D G 4 TC9302 8 D S 1
SCD1U16V2KX-3GP
1
D D
D
84.02130.031 C9301 C9302 77.C1071.081 TC9301 7 D S 2
G
2ND = 84.03413.A31 OPS OPS SE390U2D5VM-6GP 6 D S 3
OPS
2
SIR460DP-T1-GE3-GP
R9302 OPS OPS OPS 5 D G 4
ST100U6D3VBM-5GP
G
2
100KR2J-1-GP 84.00460.037 77.93971.02L
SC10U6D3V3MX-GP
OPS 2nd = 84.08039.037 2ND = 79.3971V.3AL AO4468-GP
84.04468.037
2
1
2nd = 84.DM601.03F RUNON_R_1
4
84.2N702.A3F R9304 Q9303
100R2J-2-GP R9303
2N7002KDW-GP RUNON_R
OPS S D 2 1
Q9301
2
OPS NDS0610-NL-GP 20KR2F-L-GP
1
1
84.S0610.B31 OPS
G
2ND = 84.00610.C31 C9303
OPS SCD1U25V3KX-GP
2
-1'1203 3.3V_RUN_VGA_1 1 R9305 2 DIS_EN_1D5_RUN_R OPS
1
330KR2J-L1-GP
1
OPS OPS R9307
R9308 R9306 5K1R2F-2-GP
3D3V_S0 1 2 100KR2J-1-GP
OPS -1_1213'10
2
OPS 20KR2J-L2-GP RUNON_C
DGPU_PWR_EN
OPS
2
2
C9308
SCD1U10V2KX-4GP
D
Q9305
84.2N702.D31 DIS_EN_1D5_RUN
1
G . Q9307
. .
18 DGPU_PWR_EN# 2N7002E-1-GP
2ND = 84.2N702.J31 84.2N702.D31
D
D -1'1203 .
.
.
.
. Q9304 .
. . OPS
2N7002E-1-GP
2ND = 84.2N702.J31
S
1
OPS 2 DGPU_PWROK_R .
22,92 DGPU_PWROK
S
G
R9310 0R2J-2-GP .
. .
2N7002E-1-GP
84.2N702.D31
S
G
1
OPS; main(84.2N702.E31)
C9304
C C
2ND = 84.2N702.J31
OPS; main(84.2N702.E31) DY
Do Not Stuff
1D5V_VGA_S0 1D05V_VGA_S0
R9311 R9312
1
DIS_EN_1D5_RUN
+3VS to 1.8V Transfer 110R2F-GP 110R2F-GP
DIS_FBVDD_L
OPS OPS
2
I=300mA R9309
U9303 DGPU_PWROK_TO1D8V 1 2 DGPU_PWROK 22,92
Do Not Stuff
DIS_1D05V_S0_NV_L
VIN
1 3D3V_VGA_S0 DY
1
4
Do Not Stuff
4
2
Do Not Stuff
OPS
1
3
DIS_EN_1D5_RUN
Do Not Stuff DY DY
Do Not Stuff 1D8V_S0_NV = IFPA_IOVDD & IFPB_IOVDD, it
B
DY B
should be the latest ramp up rail.
A A
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DISCRETE VGA POWER
Size Document Number Rev
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 93 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LVDS_Switch
Size Document Number Rev
A2
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 94 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CRT_Switch
Size Document Number Rev
A3
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 95 of 102
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TOUCH PANEL
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 96 of 102
5 4 3 2 1
5 4 3 2 1
3D3V_S0 1
TP8507 Do Not Stuff
OPS 3D3V_AUX_S5 1
1
TP8508 Do Not Stuff
1
1
D 3D3V_S5 1 D
TP8509 Do Not Stuff
5V_S5 1
Do Not Stuff Do Not Stuff Do Not Stuff TP8510 Do Not Stuff
34.4GD01.101 34.4GD01.101 11,19,27 PM_PWRBTN#
1
TP8511 Do Not Stuff
5,11,22,36 H_CPUPWRGD 1
TP8512 Do Not Stuff
1
27,36 S5_ENABLE TP8513 Do Not Stuff
1
Structure boss 5,11,18,27,31,35,36,65,66,71,83 PLT_RST#
TP8514 Do Not Stuff
H7 H8
H1 H2 H3 H5 H6 H12
Do Not Stuff Do Not Stuff
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
1
1
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
C C
1 TP9701
H4 Do Not Stuff 27,68 KBC_PWRBTN# Do Not Stuff
STF237R113H63-GP H16
1 TP9700
Do Not Stuff
1
EC9708 EC9709 EC9710 EC9711 EC9712 EC9713
1
SCD1U25V2KX-GP
2
2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
34.44P03.101 DY DY DY DY DY
Do Not Stuff
POWER TESTING POINT--Bottom
1 TP9702
27,68 KBC_PWRBTN# Do Not Stuff
1 TP9703
Do Not Stuff
H17
Do Not Stuff
B B
1
DCBATOUT
S1 DCBATOUT
SPRING-71-GP SPRING-63-GP SPRING-63-GP
S2 S3 AD_JK
1
EC9714
Do Not Stuff
1
SCD1U25V2KX-GP
2
1
1
EC9720 EC9719 EC9718 EC9717 EC9716 EC9715
DY DY DY
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
2
2
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY 34.4Y806.001 34.4Y806.001 SA 0809'10
SC_1101'10
SA 0904'10
A BOM A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C
(Blanking) C
B B
BOM
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Change History
Size Document Number Rev
A4
LZ57 -1
Date: Tuesday, March 29, 2011 Sheet 98 of 102
5 4 3 2 1
5 4 3 2 1
Intel-Power Up Sequence
(AC mode) red word: KBC GPIO
(DC mode) red word: KBC GPIO
+RTC_VCC
+RTC_VCC T1
T1
PCH_RTCRST#
PCH_RTCRST#
+PWR_SRC
+PWR_SRC T2
T2
+3.3V_RTC_LDO
+3.3V_RTC_LDO
T3 KBC GPIO36 control
D
S5_ENABLE KBC_PWRBTN_EC#
Press Power button D
T4 KBC_PWRBTN_EC# GPIO3
+5V_ALW EC_ENABLE# (GPIO51) keep low
T5 T3
+KBC_PWR
+3.3V_ALW T4 KBC GPIO36 control
T6
S5_ENABLE
+5VALW_PCH_VCC5REFSUS T5
+5V_ALW
T6 +5V_ALW & +3.3V_ALW need meet 0.7V difference
+15V_ALW T7
T8 TPS51125 to KBC GPIO46 +3.3V_ALW
T7 +5V_ALW & +3.3V_ALW need meet 0.7V difference
3V_5V_POK
PCH to KBC GPI94 +5VALW_PCH_VCC5REFSUS
SUS_PWR_DN_ACK T9
KBC GPIO43 to PCH +15V_ALW T8
T10 T9 TPS51125 to KBC GPIO46
PCH_RSMRST#(EC Delay 40ms) >10ms
T11 PCH to KBC GPIO00 3V_5V_POK
T10 KBC GPO84 to PCH
PCH_SUSCLK_KBC
PM_PWRBTN#
AC_PRESENT_EC T12 <200ms PCH to KBC GPI94
SUS_PWR_DN_ACK T11
KBC GPIO43 to PCH
PCH_RSMRST# T12 >10ms
T13 PCH to KBC GPIO01
Press Power button PCH_SUSCLK_KBC
AC KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
3V_5V_POK
T13 KBC GPO84 to PCH DC PCH_RSMRST#
AC PM_PWRBTN# T14
PM_SLP_S4#
AC PM_PWRBTN# T15
T14 PM_SLP_S3# >30us
T16 KBC GPO16 to LAN
PM_LAN_ENABLE
PM_SLP_S4# T17
T15
+3.3V_LAN
PM_SLP_S3# >30us
C
T16 KBC GPO16 to LAN C
+1.5V_SUS T18
PM_LAN_ENABLE
T17
+V_DDR_REF(0.9V) T19
+3.3V_LAN +5V_RUN & +3.3V_RUN need meet 0.7V difference
+5V_RUN T20
+1.5V_SUS T18
+3.3V_RUN T21
+V_DDR_REF(0.9V) T19 T22
+5V_RUN & +3.3V_RUN need meet 0.7V difference
+5VS_PCH_VCC5REF
+5V_RUN T20
+1.5V_RUN T23 H_PWRGD
+3.3V_RUN T21 T25 >1ms
T22
+1.8V_RUN T24
+5VS_PCH_VCC5REF KBC GPIO71 to RT8208B
GFX_CORE_EN(Discrete only) T26
+1.5V_RUN T23 H_PWRGD
T25 >1ms T27
+VGA_CORE(Discrete only)
+1.8V_RUN T24 T28 KBC GPIO30 to APL5930
KBC GPIO71 to RT8208B 1.0V_RUN_VGA_EN(Discrete only)
GFX_CORE_EN(Discrete only)------Delay 5ms T26
T29
T27 +1.0V_RUN_VGA(Discrete only)
+VGA_CORE(Discrete only) T30 KBC GPIO66 to APL5930
T28 KBC GPIO30 to APL5930 1.8V_VGA_RUN_EN(Discrete only)
1.0V_RUN_VGA_EN(Discrete only)------Delay 4ms
T31
T29 +1.8V_RUN_VGA(Discrete only)
+1.0V_RUN_VGA(Discrete only) T32 KBC GPI95
T30 KBC GPIO66 to APL5930 +3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
1.8V_VGA_RUN_EN(Discrete only)------Delay 5ms T33
T31 +3.3V_RUN_VGA(Discrete only) -->Reserved for sequence
+1.8V_RUN_VGA(Discrete only)
T32 KBC GPI95
+3.3V_RUN_VGA_EN(Discrete only)-->DY reserved RUNPWROK T34
T33
T35
+3.3V_RUN_VGA(Discrete only) -->Reserved for sequence +1.05V_VTT
T36 TPS51218 to KBC GPI34
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
RUNPWROK T34
T37
T35 +0.75V_DDR_VTT
+1.05V_VTT
B
T36 TPS51218 to KBC GPI34 H_VTTPWRGD T38 B
H_VTTPWRGD T38
+1.05V_VTT
T39
CPU to TPS51611
GFX_VR_EN(UMA only)
+1.05V_VTT UMA GFX CORE Power
T39 +CPU_GFX_CORE(UMA only)
T40
CPU to TPS51611
GFX_VR_EN(UMA only)
T40 UMA GFX CORE Power
+CPU_GFX_CORE(UMA only)
1.5CPU_1.05VTT_PWRGD
T41 ( >99ms )
KBC GPO53 to ISL62883
IMVP_VR_ON
1.5CPU_1.05VTT_PWRGD T42
T41 ( >99ms ) CPU CORE Power
KBC GPO53 to ISL62883 +VCC_CORE <3ms
IMVP_VR_ON
T42 CLK_CPU_BCLK
CPU CORE Power CLKIN_BCLK(from CK505) stable
+VCC_CORE <3ms
43 >1ms ISL62883 to CLOCKGEN
CLK_CPU_BCLK
CLKIN_BCLK(from CK505) stable CK_PWRGD
>1ms
ISL62884 to KBC GPO14
IMVP_PWRGD
T44
43 >1ms ISL62883 to CLOCKGEN T45
CK_PWRGD 1.5CPU_1.05VTT_PWRGD Delay 10ms
ISL62884 to KBC GPO14 T46 >5ms
T44 >1ms
IMVP_PWRGD T45 KBC GPIO47 to PCH
1.5CPU_1.05VTT_PWRGD Delay 10ms PM_PWROK 3ms< T47 <20ms
T46 >5ms
+1.5V_RUN_CPU
T48 >1ms
KBC GPIO47 to PCH T49 >100ns
PM_PWROK 3ms< T47 <20ms PM_DRAM_PWRGD (for S3 Reduction)
+1.5V_RUN_CPU
T48 >1ms
T49 >100ns
H_VTTPWRGD
A PM_DRAM_PWRGD (for S3 Reduction) T50 >1ms A
PM_PWROK
H_VTTPWRGD T51 >1ms
T50 >1ms
+VCC_CORE
PM_PWROK 0.05ms< T52<650ms
T51 >1ms
H_PWRGD
+VCC_CORE
T53 KBC LRESET#
0.05ms< T52<650ms PLT_RST# >1ms
H_PWRGD
T54 KBC GPIO45
BOM
T53 KBC LRESET# PLTRST_DELAY#
PLT_RST#
T55
>1ms Wistron Corporation
T54 KBC GPIO45 H_CPURST#
21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
PLTRST_DELAY# Taipei Hs ien 221, Taiwan, R.O.C.
T55 Title
H_CPURST#
Power Sequence
Size Docum ent Num ber Rev
A1
LZ57 -1
Date: Tues day, March 29, 2011 Sheet 99 of 102
5 4 3 2 1
5 4 3 2 1
1V_VGA_S0 RT9025
RT8208B VGA_CORE For Discrete
D D
DCBATOUT TPS51116
Adapter
RT8223B 1D5V_S0
For Discrete
C 1D5V_DDR_S0 C
3D3V_AUX_S5
3D3V_S5
15V_S5 5V_AUX_S5 5V_S5
G9091
RT9025 G5285T11U-GP 3D3V_CARD_S0
B B
3D3V_DAC_S0
1D8V_VGA_S0 LCDVDD
For Discrete
Power Shape
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
A B C D E
PCH SMBus Block Diagram 3D3V_S5 3D3V_S0 KBC SMBus Block Diagram
5V_S0
Ʉ Ʉ
3D3V_S0 Ʉ
SRN2K2J-1-GP SRN2K2J-1-GP
Ʉ
DIMM 1 SRN10KJ-5-GP
1 SMBCLK SMB_CLK
Ʉ ɄPCH_SMBCLK 1
SMBDATA SMB_DATA
Ʉ Ʉ PCH_SMBDATA
SCL
SDA
TouchPad Conn.
3D3V_S5
PSDAT1 TPDATA
Ʉ TPDATA TPDATA
Ʉ 3D3V_AUX_KBC
SRN2K2J-8-GP
Ʉ
SML1CLK SML1_CLK
SRN4K7J-8-GP
SML1DATA SML1_DATA To KBC & eDP DIMM 2
3D3V_S5 ɄPCH_SMBCLK SCL SRN100J-3-GP Battery Conn.
SML0CLK SML0_CLK
Ʉ PCH_SMBDATA SDA
GPIO17/SCL1 BAT_SCL BATA_SCL_1 CLK_SMB
SDATA
NPCE795
SRN2K2J-1-GP
UMA SMBus address:xx LCDVDD_eDP
2 SCL 2
SDA
PCH
SDVO_CTRLCLK PCH_HDMI_CLK Level DDC_CLK_HDMI
Ʉ
SDVO_CTRLDATA PCH_HDMI_DATA
Shift DDC_DATA_HDMI Minicard LCDVDD_eDP
UMA
ɄPCH_SMBCLK
WLAN Ʉ
SRN2K2J-1-GP
3D3V_S0
Ʉ PCH_SMBDATA
SMB_CLK
SMB_DATA
eDP
Ʉ LCD_SMBCLK SCL
SMBus address:XX
Ʉ Ʉ LCD_SMBDATA SDA
UMA
3D3V_VGA_S0
CRT_DDC_CLK CRT_DDC_CLK
CRT_DDC_DATA CRT_DDC_DATA
Ʉ
SRN2K2J-1-GP
3
DIS
SRN0J-6-GP 3
DDC2CLK VGA_CRT_DDCCLK
DDC2DATA VGA_CRT_DDCDATA
VGA Ʉ Ʉ
3D3V_S0
SRN2K2J-1-GP SRN10KJ-6-GP
UMA
UMA
Ʉ
SRN0J-6-GP
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT CONN
5V_S0
3D3V_VGA_S0 UMA
2N7002DW-1-GP
Ʉ
Ʉ
4
5V_S0 4
SRN1K5J-GP
SRN2K2J-1-GP
DIS
DDC2CLK GPU_HDMI_CLK DDC_CLK_HDMI
BOM
TSCBTD3305CPWR
DDC2DATA GPU_HDMI_DATA DDC_DATA_HDMI
HDMI CONN Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SRN0J-6-GP
Title
SPKR_PORT_D_L-
DXN P2800_DXN
UMA Place near CPU
Codec
Thermal PWM CORE
92HD79B1
P2800 HP
HP1_PORT_B_L
MMBT3904-3-GP HP1_PORT_B_R
SC2200P50V2KX-2GP SC2200P50V2KX-2GP
VGA P2800_VGA_DXN VGA
DXN THRMDC
Thermal
FAN1_DAC
PH
OTZ
VSET VOUT
VIN
FAN CONTROL
P2793 PORTC_L
PAGE28 PORTC_R
Analog
VREFOUT_C MIC
4 BOM 4
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
A B C D E
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