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design

Edited by Bill Travis


ideas
Make noise with a PIC
Peter Guettler, APS Software Engineering GmbH, Cologne, Germany
uilding a stable noise generator most cases. And, because the smallest approximately 400 mV p-p with a flat

B for audio-frequency purposes re-


quires only a few components. The
circuit in Figure 1 relies on linear-feed-
member of the PIC family is an inexpen-
sive chip with low current consumption,
the circuit is easy to realize.
spectral distribution of 20 Hz to 20 kHz.
Closing S1 or applying a low level at pin
GP4 immediately stops all noise genera-
back shift registers and some simple soft- All noise generators run the same pro- tors and freezes the prevailing signal am-
ware. An eight-pin Microchip (www. gram (Listing 1 on the Web version of plitude. You can download the PIC soft-
microchip.com) PIC12C508 controller this Design Idea at www.edn.com). Per- ware from the Web version of this Design
(IC2) with a short program generates fectionists might program each PIC with Idea at www.edn.com.왏
pseudorandom noise at its output pin, an individual initial value for the shift
GP0. A single controller is sufficient for register, but, because all controllers run
Make noise with a PIC ..................................77
simple applications. To obtain Gaussian- uncorrelated with their own internal os-
distributed noise, you can use a number cillators and start out of reset at differ- Circuit provides linear
of identical PIC controllers in parallel in ent times, this measure is unnecessary. resistance-to-time conversion ....................78
a true realization of the central-limit the- Op amp IC1A sums and level-shifts the PC-configurable RLC resonator yields
orem. (The central-limit theorem states noise signals. Summing resistors R1 and single-output filter..........................................82
that the sum of an infinite number of R2 must have a value of 10 k times the
noise sources has Gaussian distribution, number of noise generators you use. The Single IC provides gains
regardless of the individual noise distri- output signal of IC1A feeds a 3-dB/oc- of 10 and 10 ..............................................86
bution of each generator.) Using an infi- tave filter to obtain pink noise. Buffer IC1B Publish your Design Idea in EDN. See the
What’s Up section at www.edn.com.
nite number of noise generators is im- decouples the filter and provides low out-
practical, but 10 to 16 are sufficient in put impedance. The signal amplitude is

5V 5V

10k
1 2
VDD GP5/CIN
3
GP4/COUT
4
GP3/MC
IC2 5
GP2
PIC12C508P 6
8 GP1 R1
VSS 7
GP0
nR
R

ADDITIONAL 5V 5V
PICs
8
10k 6 _
IC1B 220 VOUT
2 _ 7
1 GP5/CIN 2 IC1A 6.8k TL072P
VDD 1 5 +
GP4/COUT 3 TL072P PINK NOISE
GP3/MC 4 3 + 400 mV P-P
4
IC3 5
GP2
PIC12C508P 6 3k 1k 300
GP1 R2
8 7 5V
VSS GP0 3.3k
nR
2 S1 0.1 µF
DISABLE 1 µF 0.27 µF 47 nF 47 nF 33 nF
1
NOISE
GENERATORS –3-dB/OCTAVE FILTER OUTPUT BUFFER
SUMMING AMPLIFIER

Figure 1 This simple circuit generates Gaussian-distributed noise for audio applications.

www.edn.com August 7, 2003 | edn 77


design
ideas
Circuit provides linear
resistance-to-time conversion
S Kaliyugavaradan and D Arul Raj, Anna University, Chennai, India
esistance-based transducers, such els changed via a zener-diode

R as strain gauges and piezoresistive


devices, find common use in the
measurement of several physical param-
circuit, serves as clock input to
a D flip-flop. From the 7474
flip-flop, you obtain a square-
VS1

eters. For applications in which digital wave output that is high and
COMPARATOR
processors or microcontrollers serve for low alternately for a time pe- OUTPUT VOLTAGE 0 T1 T1T2
t
data acquisition and signal processing, riod T4C(R2RXR1R3)/R1.
the transducer’s response must assume a This equation indicates that VS2
form suitable for conversion to digital the circuit converts a change
format. It is desirable to convert the re- in sensor resistance into a
sistance change of such sensors into a proportional time period
proportional frequency or a time interval T with sensitivity
Figure 2
so that you can easily obtain an output T/RS4C(R2/R1).
in digital form, using a counter/timer. The following salient features
The circuit of Figure1 linearly converts of Figure 1 merit mention: kIS
the sensor resistance, RS, into a propor- ● The sensor is grounded;
tional time period. The circuit is essen- you can easily vary the con- COMPARATOR
tially a relaxation oscillator, comprising a version sensitivity by varying INPUT VOLTAGE 0 T1 T1T2
t

current source, a bridge amplifier, a com- either R1 or R2.


parator, and a flip-flop. The current, IS, ● You can adjust the offset kIS
divides in the paths of R1 and R2 as if the value, T0 (about which
two resistors were connected in parallel. changes in T occur because
Assuming ideal op amps, the circuit func- of a change in the sensor’s
tions as an oscillator when RX (R4RS) is resistance), by changing These waveforms represent the input and output of
greater than R1R3/R2. either R3 or R4 without af- comparator IC2.
The circuit produces waveforms at the fecting the conversion sensi-
input and output of the comparator, IC2 tivity. ● Thanks to the current source, the
(Figure 2). T1 and T2 are the time intervals ● The offset voltages of the op amps al- output is largely insensitive to noise volt-
for which the comparator’s output as- ter T1 and T2 in opposite ways, such that ages in the line of the current source and
sumes levels VS1 and VS2, respectively. their overall effect on T(T1T2) is not ap- to changes that occur in VS1 and VS2.
The output voltage from IC2, with its lev- preciable. Consider the example of converting a

OFFSET ADJUST
R3
C FF

34.3k 1 µF OUTPUT
D2 2 5
SENSITIVITY D Q
D1 VCC V0UT
ADJUST 15V
IS VCC
R2 15V
7474
2 _ 7
7 6
65.4k 6 3 + Q
R1 IC1 R5
IN5287 6 3
3 LF 411
+ IC2 CLK
4 2 _
2k LF411 10k
D3 D4 4
VEE 5V
R4 ZENER
–15V VEE
1k
RX –15V
RS
Figure 1 (SENSOR)
Pt 100)
NOTE: D1, D2, D3, AND D4 ARE IN4002s.

This simple circuit converts a resistance reading to a time period.

78 edn | August 7, 2003 www.edn.com


design
ideas
Pt-100 (platinum RTD) sensor in the level. This design uses an IN5287 current you obtain the needed sensitivity: 130.82
range of 119.4 to 138.51, which corre- regulator; it provides an IS of approxi- sec/. Following this step, with a fixed
sponds to a temperature range of 50 to mately 0.33 mA and has a dynamic im- R4, you adjust R3 to obtain the offset re-
100C, into time periods of 10 to 12.5 pedance better than 1.35 M. For a bet- quired in the output (T). Figure 1 shows
msec. The design is simple. Because the ter current source, you could use a circuit the values of components for this exam-
current through the sensor is a fraction based on a voltage-regulator IC. In the ple. The resistors all have 1% tolerance
of IS, IS should be low enough to keep the next step, with suitable and practical fixed and 0.25W rating, and C is a polycar-
self-heating error to an acceptably low values for R1 and C, you adjust R2 until bonate capacitor.왏

PC-configurable RLC resonator yields


single-output filter
Saurav Gupta, New Delhi, India
his Design Idea pres- OUTPUT

T ents a versatile filter cir-


cuit for low-power-
consumption instrumen- PC
PORT
D6 TO D9

D2 TO D5
S5
S6
S7
TRANSCONDUCTANCE
AMPLIFIER

VOUT
tation that you can pro- S8
R
gram from your PC using
the parallel port. The cir-
cuit uses analog switches D2
1k S1
and latches instead of digi- D3
tal potentiometers for the R1 2.2k S2
D4
digital control (figures 1
10k S3
and 2). By running simple VIN C1 D5
software code on the PC, 100k S4
you can configure a single PR 10V

robust design to work as a _


lowpass, highpass, or band-
R2 +
pass filter, and you can also
select the desired center fre- 10V
10V
quency, 0 (Listing 1). Un- _ R3
like a similarly controllable
design (Reference 1), this +

design is a single-out- LP C2
Figure 1 10V
put-at-a-time filter.
Many power-sensitive sys- A PC-configurable filter uses a synthesized PC-
R5
PROGRAMMABLE
tems do not require simul- inductor and analog switches to determine INDUCTOR
taneous-filter functions. filter type and center frequency.
The design exploits the
fact that a series RLC resonator can pro- Figure 1, the inductor, LP, is implement- upon the state of switches S1 through S4
vide various filter functions with its ele- ed as a PC-controlled synthesized induc- (determined by PC-port data bits D2
ments. Because the design is based on an tor. The value of the inductor is through D5). The expression for the fre-
RLC section, it is trivial to convert the de- LPC2RPR3R5/R2. Here, RP can assume quency is 0(R2/C1RPR3R5)1/2. You can
sign into a PC-controlled resonator. In any of 15 possible values, depending thus effectively select 15 frequency values.
(This design uses 12 values of practical
TABLE 1—REPRESENTATIVE PORT SETTINGS AND FILTER PARAMETERS interest.) Data bits D6 through D9 from
Filter type/center Port setting Hex output the PC’s parallel port set the state of ana-
frequency D9 D8 D7 D6 D5 D4 D3 D2 from PC log switches S5 through S8. The state of
Lowpass/9.93 kHz 0 0 1 1 0 1 0 0 X34 the switches determines the type of fil-
Highpass/22.9 kHz 1 0 1 0 0 1 1 0 XA6 ter.
Bandpass/3.16 kHz 0 1 0 1 1 0 0 0 X58 Figure 3 shows the software-generated
Bandpass/37.3 kHz 0 1 0 1 0 1 1 1 X57 display for the circuit. This design uses a
82 edn | August 7, 2003 www.edn.com
design
ideas
IN1 IN2
2.2k
D1 D2
1k S1 S2
V V 1/2
OPA2241
1 GND NC _
14 OC VCC S4 S3
2
15 1D 1Q D4 D3
3 100k +
16 2D 2Q 10k
4 IN4 IN3
17 3D 3Q
5 DG308
18 4D 4Q
6 R2 R3 C2 R5
19 5D 5Q
7 100k 100 0.1 F 1k
20 6D 6Q C1
8
21 7D 7Q 0.1 F
9
22 8D 8Q IN1 IN2
10 _
23 GND EN D1 D2
11
24 S1 S2 R1
12 74573
25 V V 4.7k 1/2
13 +
GND NC OPA2241
S4 S3
D4 D3 VIN
IN4 IN3 V+ V+
IN+ IOUT VOUT
DG308
50 Z+ V+
500
500 NC ISET
Figure 2
Z V
You must take the finite on-resistance value of IN NC
50 V V
the analog switches into account in determining
the center frequency of the filter. MAX436

9.93-kHz bandpass filter for demonstra-


tion and testing. Increasing the number
of analog switches can provide a wider
range. Moreover, you could use addi-
tional switches for gain programmabili-
ty. The 74573 latch provides the interface
to the PC. Table 1 shows the port/switch
settings for a few frequency and filter-
type selections. Note that the analog
switches (DG308) have a finite operating
on-resistance of approximately about
110; you must take this resistance into
account when you calculate the center
frequency. For precision instrumenta-
tion, other switches are available with
operating on-resistances as low as 30 to
50. You can download Listing 1 from
the Web version of this Design Idea at
www.edn.com.왏

Reference
1. Gupta, Saurav, and Tejinder Singh,
“PC-based configurable filter uses no
digital potentiometers,” EDN, Jan 23,
Figure 3
This user-friendly configuration screen allows you to determine filter type and 2003, pg 76.
frequency.

84 edn | August 7, 2003 www.edn.com


design
ideas
Single IC provides gains of 10 and 10
Moshe Gerstenhaber and Charles Kitchin, Analog Devices, Wilmington, MA
eal-world data-acquisition sys- single-SOIC approach

R
15V
tems require amplifying weak sig- is the smallest 0.1 F
nals to match the full-scale input available for this Figure 1
range of an A/D converter. Unfortunate- function, and the circuits 7 VS
4
ly, when you configure them as gain require no external com- 10k

blocks, most common amplifiers have ponents. Figure 1 shows AD628


8 100k
both gain errors and offset drift. The typ- an AD628 precision gain –IN
A1
10k
VOUT
+IN 5
ical two-resistor gain-setting arrange- block connected to pro- 1 100k
+IN A2
–IN
ment found in many op-amp circuits has vide a voltage gain of 10. 10k
serious accuracy and drift limitations. The gain block itself
VREF 3 RG 6
With standard 1% resistors, the circuit comprises two internal
–VG 2
gain can be off by as much as 2%. Also, amplifiers: a gain-of-0.1 0.1 F
the gain can vary with temperature, be- difference amplifier, A1,
VIN
cause each resistor drifts differently. You followed by an uncom- –15V
can use monolithic resistor networks for mitted buffer amplifier, This circuit has a precise gain of 10 and uses no external
precise gain setting, but these compo- A2. You can configure it components.
nents are expensive and consume valu- to provide different gains
able pc-board space. The circuits of fig- by strapping or grounding the appropri- nects between the VREF pin (Pin 3) and
ures 1 and 2 offer improved performance ate pins. ground, instead of to the op amp’s inputs.
and lower cost; they are also smaller. The For a gain of 10, the input signal con- With the input tied to the VREF pin, the

86 edn | August 7, 2003 www.edn.com


design
ideas
15V
voltage at the noninverting input of verts the input signal 0.1 F
A1 equals VIN(100 k/110 k), or by 180. With the Figure 2
VIN(10/11). The inverting input of A2 VREF pin grounded, the 7 VS
(Pin 6) is grounded; therefore, feedback noninverting input of A1 10k 4

from the output of A2 forces the nonin- is at 0V, so feedback


AD628
verting input of A2 to be 0V. The output forces the inverting input 8 100k
–IN 10k
A1 +IN VOUT
of A1 must then also be at 0V. The volt- of A1 to 0V as well. Be- +IN A2
5
1 100k –IN
age on the inverting input of A1 must be cause A1 operates at a
10k
equal to the voltage on the noninverting gain of 0.1, the output of
input of A1, so both equal VIN(10/11). A2 necessary to force the VREF 3 RG 6
Thus, the output voltage of A2, VOUT, inverting input of A1 to –VG 2
0.1 F
equals 0V is 10VIN. The two
10  100k  connections exhibit dif- VIN
VOUT = VIN × × 1 +  ferent input impedances.
–15V
11  10k  When you drive the VREF This companion circuit to the one in Figure 1 delivers
10 input (Pin 3) for a gain of an accurate gain of 10.
= VIN × × 11 = 10 VIN ,
11 10, the input impedance
providing a precise gain of 10 with no ex- to ground is 110 k; it is approximately efficient lower than 5 ppm/C. The 3-
ternal components. 50 G when you drive the noninverting dB bandwidth is approximately 110 kHz
The companion circuit of Figure 2 input of A2 (Pin 6) for a gain of 10. All with a 10-mV input and 95 kHz with a
provides a gain of 10. This time, the in- resistors are internal to the gain block, so 100-mV input. Although 15V supplies
put connects between the inverting input both accuracy and drift are excellent. are appropriate, you may operate these
of A2 (Pin 6) and ground. Operation is These circuits have gain accuracy better circuits with dual supplies from 2.25V
similar to that of Figure 1, but A2 now in- than 0.1%, with a gain temperature co- to 18V.왏

88 edn | August 7, 2003 www.edn.com