ELEC4240/9240 Power Electronics

Lecture 8 - Effect of source inductance on rectifier operation

Ideal VS real rectifier with source inductance

The output DC voltages of the rectifier circuits discussed so far have been found by
assuming that diode currents transfer (commutate) from one diode to another
instantaneously. However this can not happen when the AC source has some
inductance Ls. (Change of current through any inductance must take some time!). This
source inductance is associated with the leakage inductance of the supply transformer
and the inductance of the AC supply network to the input transformer. The
commutation process (or the overlap process) forces more than one diode or a pair of
diodes (in a bridge rectifier) to conduct simultaneously, resulting in a drop voltage
from the output terminals which is proportional to the load current.
The output dc voltage Vd of a rectifier falls with load current Id, by an amount which
is much larger than additional voltage drop across the conducting diodes when the
current through the diodes increases. The AC source inductance, which consists of the
AC line and the input transformer leakage inductances, is mostly responsible for the
additional voltage drop. Consider the half-wave diode rectifier shown below.

is Ls D

vs Id
IDf

vs = Vmaxsinωt ∼ vi Df Load

Figure 8.1. Half-wave diode rectifier with source inductance.

Let us assume that the load current Id is smooth and ripple-free (i.e., of constant, due
to the highly inductive load). Assume also that for ωt > 0, the load current flows
through the rectifier diode and that for ωt > π, it commutates to the free-wheeling
diode Df. This transfer of the load current between the rectifier and the freewheeling
diodes can not however be instantaneous, because of the source inductance Ls. This
transfer takes place over a small commutation or overlap angle µ, during which time,
the current gradually falls to zero in one circuit and it rises to Id in the other circuit at
the same rate. Clearly, the two diodes simultaneously conduct during the
commutation process (µ).

Lecture 8 Effect of overlap on rectifier 8-1 F. Rahman

ELEC4240/9240 Power Electronics

vs

iD Id

iDf

µ
vo

vi

µ µ µ µ

Figure 8.2 Waveforms in the rectifier circuit of figure 8.1

Lecture 8 Effect of overlap on rectifier 8-2 F. Rahman

ELEC4240/9240 Power Electronics
Because of the prolonged conduction of Df, the load voltage is clamped to zero for
0 < ωt <µ, resulting in some loss of positive voltage in the vo waveform.
Consequently Vd is reduced, the extent of which depends on µ, which in turn depends
on Ls and Id.

During the process of overlap, all of the ac source voltage drops across Ls, so that for
0 < ωt < µ,
di
v = Vmax sin ω t = Ls 8.1
dt
Integrating,
µ Id

∫ 0
Vmax sin ω td( ω t ) = ω Ls
∫
0
di = ω Ls I d 8.2

or, Vmax ( 1 − cos µ ) = ω Ls I d 8.3

ω Ls
and cos µ = 1 - Id 8.4
Vmax

The overlap, or commutation angle, µ can the found from (4) given Id and Ls.
π µ

∫ ∫
1 1
Vd = Vmax sin( ω t )d( ω t ) − Vmax sin ω td( ω t )
2π 0 2π 0

Vmax 1 V ⎡ ω Ls ⎤
= − ω Ls I d = max ⎢1 − Id ⎥ 8.5
π 2π π ⎣ 2Vmax ⎦

Vmax
π

Vd

Id

Figure 8.3 Voltage regulation characteristic of the rectifier of figure 8.1 due to source
inductance
Lecture 8 Effect of overlap on rectifier 8-3 F. Rahman
ELEC4240/9240 Power Electronics
Overlap in a bridge rectifier due to source inductance
During the positive half cycle, diodes D1 and D4 carries the load current Id. During
the negative half cycle, diodes D3 and D2 carry the load current. During overlap all
four diodes carry the load current. The output voltage during overlap is zero and all of
the supply voltage applies across the source inductor Ls.
vo

Id
D1 D3
ip Ls is

Vd Load
V maxsin ωt vi

N:1
D2 D4

Figure 8.4. A diode bridge rectifier with source inductance

vs

vo µ
µ

Id is

- Id

vi

µ µ µ µ
Figure 8.6 Waveforms in the rectifier of figure 8.4
Lecture 8 Effect of overlap on rectifier 8-4 F. Rahman
ELEC4240/9240 Power Electronics
Thus, during commutation overlap,
di
Vmax sin ω t = Ls 8.6
dt
µ Id

∫0
Vmax sin ω td( ω t ) = ω Ls
∫ − Id
di = 2ω Ls I d

2ω Ls
∴ cos µ = 1 − Id 8.7
Vmax

The dc output voltage of the converter is given by

π π µ

∫ ∫ ∫
1 1 1
Vd = Vmax sinω td( ω t ) = Vmax sinω td( ω t ) − Vmax sinω t( dω t )
π µ π 0 π 0

2Vmax ⎛ ω Ls ⎞
= ⎜1 − I ⎟ 8.8
π ⎝ Vmax d ⎠

2Vmax ⎛ ω Ls ⎞
= ⎜ 1 − I ⎟ 8.9
π ⎝ Vmax d ⎠

2Vmax
π

Vd

Id

Figure 8.5 Regulation characteristic of a 1-phase bridge rectifier due to source

inductance

Lecture 8 Effect of overlap on rectifier 8-5 F. Rahman

 ELEC4240/9240 Power Electronics
Effect of overlap on three-phase center-tap rectifier

In the three-phase, center-tap rectifier of figure below, the load current starts to
commutate to diode D2 from ωt = 0+ when vb starts to become more positive than va.
During overlap, both diodes D1 and D2 carry the load current which is assumed to
remain constant during the process.

v an Ls D1

vo
D2
vbn Ls Id

v cn Ls D3 L oad
Vd

Figure 8.7 Three-phase center-tap rectifier with source inductance

van vbn vcn

vo

vabi

ia

ib

ic
Figure 8.7
µ
Figure 8.8 Waveforms in the rectifier of figure 8.7

Lecture 8 Effect of overlap on rectifier 8-6 F. Rahman

ELEC4240/9240 Power Electronics
During overlap,

dia
van = Ls + vo 8.10
dt
di
vbn = Ls b + vo 8.11
dt

Assuming that Id remains constant during the overlap time, and noting that
ia + ib = I d , so that

dia di
=− b. 8.12
dt dt

Adding the voltage equations and canceling the equal but opposite terms,

van + vbn
vo = , during the overlap process. 8.13
2

Thus, during the commutation overlap, the converter output voltage vo is the average
of the voltages of the lines undergoing commutation. Once the load current is fully
commutated, vo jumps up to the potential vb. Form the ideal output voltage waveform,
the area bounded by vb and (va +vb)/2 is lost due to overlap of two conducting diodes.
In the following analysis, the line-neutral voltages are:

van = Vmax sinω t ; vbn = Vmax sin (ω t − 2π / 3 ) ; vcn = Vmax sin (ω t − 4π / 3 )

The part of the positive voltage pulse lost due to overlap starting from angle ωt = π/6
is given by
vbn + van vbn − van di
vbn − = = Ls 8.14
2 2 dt
The area (shaded) inside the voltage pulse lost due to overlap is given by
π
+µ
⎛ vbn − van ⎞ Id

∫π
6

6
⎜
⎝ 2
⎟ d( ω t ) = ω Ls
⎠ ∫
0
di = ω Ls I d 8.15

Note that (vb - va) is the line-line voltage vba. The integral on the right hand side by
shifting the origin by π/6 to the left. Thus

Lecture 8 Effect of overlap on rectifier 8-7 F. Rahman

ELEC4240/9240 Power Electronics
µ

∫
3Vmax
sin ω td( ω t ) = ω Ls I d 8.16
0 2
2ω Ls
∴ 1 − cos µ = Id , so that 8.17
Vmax l − l

2ω Ls
cos µ = 1 − I d where Vmax l-l = √3 Vmax 8.18
Vmax l − l

The dc output voltage is

3 3 Vmax 3ω Ls 3Vmax l − l ⎛ ω Ls ⎞
Vd = − Id = ⎜1 − Id ⎟ 8.19
2π 2π 2π ⎜ Vmax l − l ⎟
⎝ ⎠

3Vmax l − l
2π

Vd

Id

Figure 8.9 Regulation characteristic of the rectifier in figure 8.7

Lecture 8 Effect of overlap on rectifier 8-8 F. Rahman

ELEC4240/9240 Power Electronics
Effect of source inductance on three-phase diode bridge rectifier

vL+ vo = vL+ − vL−

van Ls ia
D1 D3 D5
iL
Ls ib vabi R
vbn Vd Load
Ls ic
L
vcn D4 D6 D2

vL−

Figure 8.10 Three-phase diode bridge rectifier with source inductance

As for the three-phase CT rectifier, the voltage equations are

dia
va = Ls + vL + 8.20
dt
di
vb = Ls b + vL + 8.21
dt
when D1 and D3 are in overlap due to the source inductance Ls and where all voltages
are with respect to the fictitious neutral point. vL+ is the potential of the positive
voltage bus (cathodes of the upper diodes) of the rectifier with respect to the neutral
point.
As before, during each overlap, the positive and negative dc buses have voltages
which are average values of the commutating line-line potentials.

During the commutation overlap of diodes D1 and D3, the positive rail voltage is (vb
+ va)/2, and the positive voltage lost from VL+ as a result of the overlap is
vb + va vb − va di
vb − vL+ = vb − = = Ls 8.21
2 2 dt
Integrating for the duration of the overlap
π
+µ
⎛ vb − va ⎞ Id

∫ ⎟ d( ω t ) = ω Ls ∫ di = ω Ls I d
6
π ⎜ 8.22
6
⎝ 2 ⎠ 0

Lecture 8 Effect of overlap on rectifier 8-9 F. Rahman

ELEC4240/9240 Power Electronics

va vb vc

vo

vABi

ia

ib

ic

Commutation notches in vabi

Figure 8.11 Waveforms in the rectifier of figure 8.10

Lecture 8 Effect of overlap on rectifier 8-10 F. Rahman

ELEC4240/9240 Power Electronics
Note again that (vb - va) is the line-line voltage. The integral in the right hand side by
shifting the origin by π/6 to the left. Thus
µ

∫
3Vmax
sin ω td( ω t ) = ω Ls I d 8.23
0 2

2ω Ls
∴ 1 − cos µ = I d , so that 8.24
Vmax l − l
2ω Ls
cos µ = 1 − I d where Vmax l-l = √3 Vmax 8.25
Vmax l −l

The dc output voltage Vd is given by

3Vmax l − l µV 3Vmax l − l 3ω Ls
∫
1 max l − l
Vd = − sin ω td (ω t ) = − Id 8.26
π π /3 0 2 π π

3Vmax l − l ⎛ ω Ls ⎞
Vd = ⎜⎜ 1 − Id ⎟ 8.27
π ⎟
⎝ Vmax l − l ⎠

3Vmax l − l
π

Vd

Id

Figure 8.12. Voltage regulation characteristic of the three-phase diode bridge rectifier
due to source inductance

Lecture 8 Effect of overlap on rectifier 8-11 F. Rahman