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TECHNOLOGY, KARACHI
PNEC NUST
LAB MANUAL
BASIC ELECTRONICS
EE-212
OBJECTIVES:
To familiarize the students with the use of measuring instruments.
EQUIPMENTS/COMPONENTS:
Power supply, Multimeter, Function Generator and Oscilloscope.
PROCEDURE:
Power supply: -
A power supply (sometimes known as a power supply unit or PSU) is a device or system
that supplies electrical or other types of energy to an output load or group of loads. The term is most
commonly applied to electrical energy supplies, less often to mechanical ones, and rarely to others
Multimeter:-
A multimeter or a multitester is an electronic measuring instrument that combines several
functions in one unit. The most basic instruments include an ammeter, voltmeter, and ohmmeter. Analog
multimeters are sometimes referred to as "volt-ohm-meters", abbreviated VOM. Digital multimeters are
usually referred to as "digital- multi- meters", abbreviated DMM.
Function Generator:-
A function generator is a piece of electronic test equipment used to generate electrical
waveforms. These waveforms can be either repetitive or single-shot (once only) in which case some
kind of triggering source is required (internal or external). The resultant waveforms can be applied to a
device under test and analyzed as they progress through the device, confirming the proper operation of
the device or pinpointing a fault in it.
Oscilloscope:-
An oscilloscope (sometimes abbreviated CRO, for cathode-ray oscilloscope, or commonly
just scope or O-scope) is a piece of electronic test equipment that allows signal voltages to be viewed,
usually as a two-dimensional graph of one or more electrical potential differences (vertical axis) plotted
as a function of time or of some other voltage (horizontal axis).
EXPERIMENT # 02
OBJECTIVES:
To experimentally plot the characteristic curve of a semiconductor diode and calculate its internal
resistance.
EQUIPMENTS/COMPONENTS:
Semiconductor diode, resistor, power supply, multimeter.
PROCEDURE:
In this lab, it is required to experimentally observe the behavior of the diode in case of forward and
reverse biasing and plot its characteristic curve.
1. For forward biasing, refer to the circuit shown in Fig. 1. Increase the power supply V and
observe the voltage drop across the diode, (Vd) and the current flowing through the diode, Id.
Tabulate your results as shown in Table 1.
2. For reverse biasing, refer to the circuit shown in Fig. 2. Repeat the same procedure and tabulate
your results as shown in Table 2.
3. Using the observations recorded in Table 1 and 2 plot Vd verses Id and write your comments.
4. You are also required to calculate the internal resistance of the diode and compare it with the one
given in the data sheet.
Table 1
Sr. V Vd Id
No. (Volts) (Volts) (mA)
1 0.1 D1 R=100Ω
2 0.2
3 0.3
4 0.4
5 0.5
6 0.6 V
7 0.7
8 0.8
Figure 1
9 0.9
10 1.0
11 2.0
12 3.0
13 4.0
14 5.0
… 10.0
Table 2
D1 R=100Ω
Sr. V Vd Id
No. (Volts) (Volts) (μA)
1 1
2 2
3 5
4 10
5 20
6 30 Figure 2
EXPERIMENT # 03
Objective:
Equipments/Components:
Multimeter
DC supply
Resistors
Zener Diode
Lab measurements:
1. Construct the circuit shown in figure 1.Measure and record the value of Vz and Iz for each
increment of voltage Vs in Table 1.
2. Construct the circuit shown in figure 21.Measure and record the value of Vz and Iz for each
increment of voltage Vs in Table 2.
3. Draw the characteristics curve of Zener diode in forward and reverse region and calculate Rz.
You can observe that Vz is not exactly constant. This shall enable you to calculate the internal
resistance Rz of Zener diode.
4. From table 2, estimate the Zener test current IZ-T est which is the current that brings the Zener
diode in breakdown region.
5. Design of a loaded Zener regulator. Refer to the loaded Zener regulator circuit shown in Fig3.
Let a 1k load be driven by Zener diode. Let us assume that the input supply Vs has a voltage
fluctuation from 1.5Vz to 5Vz. The objective of this design is to provide the load with constant
supply Vz even though the input voltage fluctuate from 1.5Vz to 5Vz. in order to meet this
objective, it is necessary that the Zener diode works in the breakdown region when the input
fluctuates between 1.5Vz to 5Vz. To achieve this objective, we have to ensure that IZ-T est flows
through the Zener diode when V is between1.5Vz to 5Vz . Let IL be the load current. Therefore
the current flows through Rs when Vs = 1.5 VZ will be
Rs = 1.5Vz – Vz
Is
The value of Rs will ensure that the Zener will be in breakdown region when supply is 1.5V z . It is
trivial to note that Zener will be in breakdown if Vs >1.5Vz . Change the input from 0.5Vz to 5Vz and
tabulate your results as shown in table 3.
Observations:
S.No. Vs Vz Iz S.No. Vs Vz Iz
1 0.1 1 0.5
2 0.2 2 1.0
3 0.3 3 1.5
4 0.4 4 2.0
5 0.5 5 3.0
6 0.6 6 4.0
7 0.7 7 5.0
8 0.8 8 6.0
9 0.9 9 7.0
10 1.0 10 8.0
11 2.0 11 9.0
12 3.0 12 10.0
13 4.0 13 11.0
14 5.0 14 12.0
15 10.0 15 13.0
Table 1 Table 2
1 0.5 Vz
2 0.8 Vz
3 0.9 Vz
4 1.0 Vz
5 1.5 Vz
6 2.0 Vz
7 2.5 Vz
8 3.0 Vz
9 3.5 Vz
10 4.0 Vz
11 4.5 Vz
Table 3
Comments and result:
Write down your comments on reading obtained from table 1, 2 and 3. Why the load voltage VL doesn‟t
remains constant even though the Zener diode is in breakdown region.
Figure1
Figure2
Figure 3
Experiment 04
Without Filter:
With Filter:
PROCEDURE:-
1. Connections are made as per the circuit diagram.
2. Connect the primary side of the transformer to ac mains and the secondary side to the rectifier input.
3. By the multimeter, measure the ac input voltage of the rectifier and, ac and dc voltage at the output of
the rectifier.
4. Find the theoretical of dc voltage by using the formula,
Vdc=Vm/П
Where, Vm=2Vrms, (Vrms=output ac voltage.)
REGULATION CHARACTERSTICS:-
1. Connections are made as per the circuit diagram.
2. By increasing the value of the rheostat, the voltage across the load and current flowing through the
load are measured.
3. The reading is tabulated.
4. Draw a graph between load voltage (VL and load current ( IL ) taking VL on X-axis and IL on y-axis
5. From the value of no-load voltages, the %regulation is calculated using the formula,
Without Filter:-
Vrms=Vm/2
Vm=2Vrms
Vdc=Vm/П
Ripple factor r=√ (Vrms/ Vdc) 2 -1 =1.21
With Filter:-
Ripple factor, r=1/ (2√3 f C R)
Where f =50Hz
C =100µF
RL=1KΩ
PRACTICAL CALCULATIONS:-
Vac=
Vdc=
Ripple factor without Filter =
Ripple factor with Filter =
OBSERVATIONS:-
WITHOUT FILTER
USING Vac(v) Vdc(v) r= Vac/Vdc
DMM
WITH FILTER
USING Vac(v) Vdc(v) r= Vac/Vdc
DMM
WITHOUTFILTER:-
Vdc=Vm/П, Vrms=Vm/2, Vac=√ ( Vrms2- Vdc 2)
WITH FILTER
1. The primary and secondary sides of the transformer should be carefully identified.
2. The polarities of the diode should be carefully identified.
3. While determining the % regulation, first Full load should be applied and then it should be
decremented in steps.
RESULT:-
1. The Ripple factor for the Half-Wave Rectifier with and without filters is measured.
2. The % regulation of the Half-Wave rectifier is calculated.
Experiment 05
Objective:-
To find the Ripple factor and regulation of a Full-wave Rectifier with and without filter.
APPARATUS:-
Experimental Board
Transformer (6-0-6v).
P-n Diodes, (lN4007) ---2 No‟s
Multimeters –2No‟s
Filter Capacitor (100μF/25v) -
Connecting Wires
Load resistor, 1KΩ
THEORY:-
The circuit of a center-tapped full wave rectifier uses two diodes D1&D2. During positive half
cycle of secondary voltage (input voltage), the diode D1 is forward biased and D2is reverse biased.
The diode D1 conducts and current flows through load resistor RL. During negative half cycle, diode D2
becomes forward biased and D1 reverse biased. Now, D2 conducts and current flows through the load
resistor RL in the same direction. There is a continuous current flow through the load resistor RL, during
both the half cycles and will get unidirectional current as show in the model graph. The difference
between full wave and half wave rectification is that a full wave rectifier allows unidirectional (one way)
current to the load during the entire 360 degrees of the input signal and half-wave rectifier allows this
only during one half cycle (180 degree).
CIRCUIT DIAGRAM:-
Without Filter:
With Filter :
PROCEDURE:
THEORITICAL CALCULATIONS:-
Vrms = Vm/ √2
Vm =Vrms√2
Vdc=2Vm/П
(i)Without filter:
Ripple factor, r = √ ( Vrms/ Vdc )2 -1 = 0.482
(ii)With filter:
C =100µF
RL=1KΩ
PRACTICAL CALCULATIONS:
Without filter:-
Vac=
Vdc=
Ripple factor, r=Vac/Vdc
With filters:-
Vac=
Vdc=
Ripple factor=Vac/Vdc
Without Filter:
USING Vac(v) Vdc(v) r= Vac/Vdc
DMM
With Filter
Without Filter
With Filter
PRECAUTIONS:
1. The primary and secondary side of the transformer should be carefully identified
2. The polarities of all the diodes should be carefully identified.
RESULT:-
The ripple factor of the Full-wave rectifier (with filter and without filter) is calculated.
EXPERIMENT # 06
Equipment’s/Components:
Semiconductor diodes
Multi-meter
Transformer
Resistor = 1kΩ
Oscilloscope
Procedure:
1. Connect the transformer to 220V mains supply and observe the voltages across terminals A, B
and C as shown in figure 1, 2 and 3 using oscilloscope and multi- meter.
2. Next, analyze the behaviour of the full – wave rectifier. Connect the circuit as shown in figure 4.
Using oscilloscope, observe the voltage across RL.
3. Measure the DC voltage across RL using multi-meter. Theoretically, calculate the DC voltage
using following equation and compare it with your observed reading:
Note: VP is the peak voltage at the secondary of the transformer and VD is the forward voltage
drop of the diode.
4. Disconnect D1 from the circuit and observe VL. Connect D1 back to its respective position and
disconnect D2 .Observe VL. Repeat the same procedure for D3 and D4 .
EXPERIMENT # 07
BJT as a Switch
OBJECTIVE:
Equipments/Components:
Multimeter
Transistor
Resistors
LED
DC power supplies
Function generator
Oscilloscope
Lab Measurement:
The required base current to get 10mA saturation current can be estimated using (2).
I C ( SAT )
I B ( SAT ) (2)
dc
Practically it is better to keep the base current a bit high. This is called „hard saturation’. Let the hard
saturation current be represented by IB(SAT-HARD). For example IB(SAT-HARD) can be 2 times IB(SAT). This ensures
that the base current is high enough to keep the transistor in saturation. The required value of R B to pump
IB(SAT-HARD) into the base of the transistor can be calculated using (3).
VBB VBE
RB (3)
I B ( SAT HARD )
Construct the circuit as shown in Fig. 1 with the calculated values of R C and RB. Now apply a timer input (0
and 5V level) from function generator at base and observe the blinking of LED. Also observe the input and
output on oscilloscope at dual mode. We can observe that when V in = 0V Vout = Vcc (ON State) and when Vin
= 5V ,Vout = 0V (OFF State).
Figure 1
EXPERIMENT # 08
Objective:
Equipments/Components:
Multi-meter
DC supply
Resistors
Transistor (2SC828)
Lab measurements:
1. Refer to the VDB circuit in Figure 1. The circuit parameters are as follows:
a. IE DC emitter current.
b. VCE Voltage at collector w.r.t. emitter (DC)
c. VBE Voltage at base w.r.t. emitter (DC)
d. VB Voltage at base w.r.t. ground (DC)
e. VE Voltage at emitter w.r.t. ground (DC)
f. RC ,RL ,RE Collector resistance, load resistance, emitter resistance
g. βdc DC current gain of the transistor
h. R1 and R2 Resistances of voltage divider network
i. VCC Power supply
4. Using equation (2), calculate the value of RC such that the saturation current is around 10mA.
5. Suppose our requirement is to set the collector current at 5mA. Using the following equations,
calculate the value of R1 to appropriately bias the circuit:
VE = IE RE ------------------------------ (3)
VB = VBE + VE ------------------------- (4)
VB = (R2 / (R 1 + R2 )) . VCC --------- (5)
6. Observe the value of IC and compare it with the specified value. Also measure VCE and verify its
observed value using equation (6).
7. Draw the load line of the circuit and locate the Q – point (VCE, IC) on the load line.
8. Replace the 2SC828 used with a few other samples of the same transistor. You will notice there
is no significant change in the Q – point despite the fact that there will be noticeable variation in
βdc of the transistors. This explains the fact that the Q – point of a VDB is immune to variations
in the transistor‟s βdc.
Figure 1
EXPERIMENT # 9
EQUIPMENT:-
1. Breadboard
2. Power Supply
3. Digital Multimeter (DMM)
4. Oscilloscope with probes
5. Function Generator with probe
6. Resistors: 2.2kΩ, 10kΩ, 3.3kΩ, 1kΩ, 1.2kΩ
7. Capacitors: 1µF (2), 470µF
8. Transistor: 2N3904
THEORY:-
The CE configuration is the most widely used of all BJT amplifier circuits. To establish a signal ground
at the emitter, a large capacitor CE is connected between emitter and ground. This capacitor is required
to provide a very low impedance to ground ideally zero. C E acts as a bypass capacitor. The lower the
signal frequency the less effective the bypass capacitor becomes. The CE amplifiers are used for large
voltage gain. The CE configuration is the best suited for realizing the bulk of the gain required in an
amplifier. Depending on the magnitude of gain required, either a single stage or a cascade of two or
three stages can be used.
Voltage Gain
The voltage gain is the ratio of ac output voltage to ac input voltage.
Av = υo /υin
Current Gain
The current gain from base to collector is Ic/Ib or β. However, the overall current gain is Ai = ίo /ίin
Power Gain
The power gain is the product of the overall voltage gain and the current gain.
Ap = Av * Ai
CIRCUIT DIAGRAM:-
VCC
15V
R7
R1 3.3kΩ
100kΩ
C3
Q1
C1
10µF
R3
10µF 10kΩ
2N3904
C2
10mVrms
V1 10kHz R2
0° 10kΩ 10µF
R4
330Ω
Figure 1
FORMULAE:-
DC Analysis:
VBE = 0.7V
VT = 25mV
VE = VB – VBE
IE = VE / RE ≈ IC
IB = IC / β
VC = VCC – ICRC
VCE = VC - VE
rπ= βVT / IC
re= αVT / IC
gm = IC/VT
Gain without R L:
Av = - gm RC
Gain with R L:
AV = - gm (RC║RL)
Input Resistance:
Ri = RB║rπ
Current Gain:
Ai = ίc/ ίb = β
Power Gain:
AP = Ai * AV
Output Resistance:
Ro = RC║rO≈ RC
TABLE 1
TABLE 2
S.No. Voltage Gain Calculated Measured
Without RL With RL Without RL With RL
1 AV
EXPERIMENT # 10
OBJECTIVE:-
EQUIPMENT:-
1. Breadboard
2. Power Supply
3. Digital Multimeter (DMM)
4. Oscilloscope with probes
5. Function Generator with probe
6. Resistors: 47kΩ, 5.6kΩ, 560Ω, 1kΩ
7. Capacitors: 10µF (2)
8. Transistor: 2N3904
THEORY:-
The common-collector (CC) amplifier is usually referred to as an emitter-follower. The input is applied
to the base through a coupling capacitor, and the output is at the emitter. The voltage gain of a CC
amplifier is approximately 1, and its main advantages are its high input resistance and current gain. The
CE configuration finds application as a voltage buffer for connecting a high resistance source to a low
resistance load.
CIRCUIT DIAGRAM:-
VCC
15V
R1
100kΩ
Q1
C1
V1 10µF
2N3904
25mVrms C2
10kHz
0° R2
10kΩ R3 10µF
560Ω R4
10kΩ
Figure 1
FORMULAE:-
DC Analysis:
VBE = 0.7V
VT = 25mV
VE = VB – VBE
IE = VE / RE ≈ IC
IB = IC / β
VC = VCC – ICRC
VCE = VC - VE
rπ= βVT / IC
re= αVT / IC
gm = IC/VT
Gain without R L:
AV = (βRE) / (rπ+(1+β)RE)
Gain with R L:
AV = β(RE║RL) / (rπ+[(1+β)(RE║RL)])
Input Resistance:
Ri = RB║[rπ +(1+β) RE]
Current Gain:
Ai = ίe/ ίb
Power Gain:
AP = Ai * AV ≈ Ai
Output Resistance:
Ro ≈ re+[(Rsig║RB)/(1+β)]
PROCEDURE AND OBSERVATION:-
Table 1
S. No. PARAMETERS CALCULATED MEASURED
1 Β
2 VCE
3 VCB
4 IC
5 IB
6 IE
7 VC
8 VB
9 VE
Table 2
S.No. Voltage Gain Calculated Measured
Without RL With RL Without RL With RL
1 AV
EXPERIMENT #11
EQUIPMENT:-
9. Breadboard
10. Power Supply
11. Digital Multimeter (DMM)
12. Oscilloscope with probes
13. Function Generator with probe
14. Resistors: 47kΩ, 5.6kΩ, 560Ω, 4.7kΩ, 1kΩ
15. Capacitors: 10µF (3)
16. Transistor: 2N3904
THEORY:-
The common-base amplifier provides high voltage gain. Since it has a low input resistance r e this causes
the input signal to be severely attenuated. In summary, the CB amplifier exhibits a very low input
resistance, a short circuit current gain that is nearly unity α, an open circuit voltage gain and a relatively
high output resistance. A very significant configuration of the CB circuit is as unity gain current
amplifier or current buffer. It accepts an input signal current at low input resistance and delivers a nearly
equal current at very high output resistance at the collector.
CIRCUIT DIAGRAM:-
Figure 1
FORMULAE:-
DC Analysis:
VE = VB – VBE
IE = VE / RE ≈ IC
IB = IC / β
VC = VCC – ICRC
VCE = VC - VE
VCB = VCE - VBE
rπ= βVT / IC
re= αVT / IC
gm = IC/VT
Gain without R L:
AV = gmRC
Gain with R L:
AV = gm(RC║RL)
Input Resistance:
Ri = re
Power Gain: AP = Ai * AV ≈ AV
Output Resistance: Ro = RC
PROCEDURE AND OBSERVATION:-
1. Construct the circuit as shown in figure 1.
Table 1
S. No. PARAMETERS CALCULATED MEASURED
1 Β
2 VCE
3 VCB
4 IC
5 IB
6 IE
7 VC
8 VB
9 VE
Table 2
S.No. Voltage Gain Calculated Measured
Without RL With RL Without RL With RL
1 AV
EXPERIMENT# 12
FET CHARACTERISTICS
Objective: a). To draw the drain and transfer characteristics of a given FET.
b). To find the drain resistance (rd) amplification factor (μ) and Transonductance (gm) of the
given FET.
APPARATUS: FET
Regulated power supply
Voltmeter (0-20V)
Ammeter (0-100mA)
Resistors 100 Ώ 1No
560 Ώ 1No
THEORY:
A FET is a three terminal device, having the characteristics of high input impedance and less noise,
the Gate to Source junction of the FET s always reverse biased. In response to small applied voltage
from drain to source, the n-type bar acts as sample resistor, and the drain current increases linearly
with VDS. With increase in ID the ohmic voltage drop between the source and the channel region reverse
biases the junction and the conducting position of the channel begins to remain constant. The VDS at
this instant is called “pinch of voltage”.
If the gate to source voltage (VGS) is applied in the direction to provide additional reverse
bias, the pinch off voltage ill is decreased.
In amplifier application, the FET is always used in the region beyond the pinch-off.
FDS=IDSS(1-VGS/VP )^2
CIRCUIT DIAGRAM
PROCEDURE:
1. All the connections are made as per the circuit diagram.
2. To plot the drain characteristics, keep VGS constant at 0V.
3. Vary the VDD and observe the values of VDS and ID.
4. Repeat the above steps 2, 3 for different values of VGS at 1V and 3V.
5. All the readings are tabulated.
6. To plot the transfer characteristics, keep VDS constant at 1V.
7. Vary VGG and observe the values of VGS and ID.
8. Repeat steps 6 and 7 for different values of VDS at 1.5 V and 2V.
9. The readings are tabulated.
10. From drain characteristics, calculate the values of dynamic resistance (r d) by using the formula
rd = ∆VDS/∆ID
11. From transfer characteristics, calculate the value of transconductace (gm) By using the formula
Gm=∆ID/∆VDS
12. Amplification factor (μ) = dynamic resistance. Tran conductance
μ = ∆VDS/∆VGS
OBSERVATIONS:
DRAIN CHARACTERISTICS:
DRAIN CHARACTERISTICS
PRECAUTIONS:
RESULT:
Objective
The objective of this exercise is to examine common source JFET amplifiers. Both voltage gain and input
impedance will be investigated.
Theory
In many regards, JFET amplifiers share similar attributes with their bipolar counterparts. Superficially, they look
very similar as well. The main functional differences are that JFET based amplifiers tend to have higher input
impedances but tend to offer lower voltage gains. Further, without swamping, JFET amplifiers tend to produce
lower levels of distortion. As with r' e impacting bipolar circuit performance, JFET performance is impacted by the
transconductance, gm. Like the bipolar common emitter amplifier, the common source amplifier exhibits a voltage
gain greater than one with inversion.
Equipment
Figure 16.1
Procedure
1. Consider the circuit of Figure 13.1 using Vdd = 15 volts, Vss = -3 volts, Rin = 33 kΩ, Rg = 330 kΩ, Rs = 4.7
kΩ, Rd = 4.7 kΩ, Rload = 22 kΩ, Cin = Cout = 10 µF and Cs = 470 µF. Assuming V GS = -2 volts and gm = 2
mS, determine the theoretical gain and input impedance of the circuit and record these in Table 13.1.
2. Build the circuit of Figure 13.1 using Vdd = 15 volts, Vss = -3 volts, Rin = 33 kΩ, Rg = 330 kΩ, Rs=4.7 kΩ,
Rd = 4.7 kΩ, Rload = 22 kΩ, Cin = Cout = 10 µF and Cs = 470 µF. Set Vin to a 100 mV peak sine at 1 kHz.
Measure the voltages at the gate and load, and record these in Table 13.1. Capture images of the input and
gate voltages, and the gate and load voltages. Note whether or not the load is inverted compared to the gate
signal.
3. Based on the measured gate and drain voltages, determine the resulting theoretical A v and Zin , and record
these in Table 13.1. Note that Zin may be computed using the voltage divider rule or Ohm's law given the
gate and input voltages along with the input resistor value. Also determine and record the percent deviations.
Data Tables
Table 13.1
EXPERIMENT #14
Objective
The objective of this exercise is to examine common drain (voltage follower) JFET amplifiers. Both voltage gain
and input impedance will be investigated.
Theory
In many regards, JFET amplifiers share similar attributes with their bipolar counterparts. Superficially, they look
very similar as well. The main functional differences are that JFET based amplifiers tend to have higher input
impedances but tend to offer lower voltage gains. Further, without swamping, JFET amplifiers tend to produce
lower levels of distortion. As with r' e impacting bipolar circuit performance, JFET performance is impacted by the
transconductance, gm. The source follower, like the bipolar emitter follower, shows a voltage gain just under one
with no inversion.
Equipment
Schematic
Figure 14.1
Procedure
1. Consider the circuit of Figure 14.1 using Vdd = 15 volts, Vss = -3 volts, Rin = 33 kΩ, Rg = 330 kΩ, Rs = 4.7
kΩ, Rload = 22 kΩ, Cin = 10 µF and Cout = 470 µF. Assuming V GS = -2 volts and gm = 2 mS, determine the
theoretical gain and input impedance of the circuit and record these in Table 16.2.
2. Build the circuit of Figure 14.1 using Vdd = 15 volts, Vss = -3 volts, Rin = 33 kΩ, Rg = 330 kΩ, Rs=4.7 kΩ,
Rload = 22 kΩ, Cin = 10 µF and Cout = 470 µF. Set Vin to a 100 mV peak sine at 1 kHz. Measure the
voltages at the gate and load, and record these in Table 16.2. Capture images of the input and gate voltages,
and the gate and load voltages. Note whether or not the load is inverted compared to the gate signal.
3. Based on the measured gate and drain voltages, determine the resulting theoretical A v and Zin , and record
these in Table 14.1. Also determine and record the percent deviations.
Data Tables
Table 14.1
EXPERIMENT # 15
Objective
The objective of this exercise is to examine common Gate JFET amplifiers. Both voltage gain and input
impedance will be investigated.
Theory
In electronics, a common-gate amplifier is one of three basic single-stage JFET amplifier topologies. In
this circuit the source terminal of the transistor serves as the input, the drain is the output and the gate is
common to both. The input resistance of the common gate amplifier can be relatively low. It follows that
significant loss of signal strength can occur in coupling the signal to the input of the common gate
amplifier.
Equipment
Without RL : With RL :
υo = _________ υo = _________
Av calculated = Av calculated =