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HITFET BTS 117

Smart Lowside Power Switch


Features Product Summary
• Logic Level Input Drain source voltage VDS 60 V
• Input Protection (ESD) On-state resistance RDS(on) 100 mΩ
• Thermal Shutdown Current limit ID(lim) 7 A
• Overload protection Nominal load current ID(ISO) 3.5 A
• Short circuit protection Clamping energy EAS 1000 mJ
• Overvoltage protection
• Current limitation

• Status feedback with external input resistor


• Analog driving possible

Application
• All kinds of resistive, inductive and capacitive loads in switching or
linear applications
• µC compatible power switch for 12 V and 24 V DC applications
• Replaces electromechanical relays and discrete circuits

General Description
N channel vertical power FET in Smart SIPMOS  chip on chip tech-
nology. Fully protected by embedded protected functions.

V bb

LOAD M

Drain
2
Overvoltage
dv/dt Current
1 protection
IN limitation lim itation

Over-
Overload Short circuit
circuit
ESD temperature Short
protection protection
protection
protection

Source 3


HIT F ET

Semiconductor Group Page 1 13.07.1998


BTS 117

Maximum Ratings at Tj = 25 °C unless otherwise specified


Parameter Symbol Value Unit
Drain source voltage VDS 60 V
Drain source voltage for short circuit protection VDS(SC) 32
Continuous input current 1) IIN mA
-0.2V ≤ VIN ≤ 10V no limit
VIN < -0.2V or VIN > 10V | IIN | ≤ 2
Operating temperature Tj - 40 ... +150 °C
Storage temperature Tstg - 55 ... +150
Power dissipation Ptot 50 W
TC = 25 °C
Unclamped single pulse inductive energy EAS 1000 mJ
ID(ISO) = 3.5 A
Electrostatic discharge voltage (Human Body Model) VESD 3000 V
according to MIL STD 883D, method 3015.7 and
EOS/ESD assn. standard S5.1 - 1993
Load dump protection VLoadDump2) = VA + VS VLD V
VIN=low or high; VA=13.5 V
td = 400 ms, RI = 2 Ω, ID=0,5*3.5A 75
td = 400 ms, RI = 2 Ω, ID= 3.5A 70
DIN humidity category, DIN 40 040 E
IEC climatic category; DIN IEC 68-1 40/150/56

Thermal resistance
junction - case: R thJC 2.5 K/W
junction - ambient: R thJA 75
SMD version, device on PCB: 3) R thJA 45

1A sensor holding current of 500 µA has to be guaranted in the case of thermal shutdown (see also page 3)
2V
Loaddump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
3Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70 µm thick) copper area for Drain connection. PCB is vertical
without blown air.

Semiconductor Group Page 2 13.07.1998


BTS 117

Electrical Characteristics
Parameter Symbol Values Unit
at Tj=25°C, unless otherwise specified min. typ. max.
Characteristics
Drain source clamp voltage VDS(AZ) 60 - 73 V
Tj = - 40 ...+ 150°C, ID = 10 mA
Off state drain current IDSS - - 5 µA
VDS = 32 V, Tj = -40...+150 °C, VIN = 0 V
Input threshold voltage VIN(th) 1.3 1.7 2.2 V
ID = 0.7 mA
Input current - normal operation, ID <ID(lim) : IIN(1) - 30 60 µA
VIN = 10 V
Input current - current limitation mode, ID=ID(lim) : IIN(2) - 120 300
VIN = 10 V
Input current - after thermal shutdown, ID =0 A: IIN(3) 800 2200 4000
VIN = 10 V
Input holding current after thermal shutdown IIN(H)
Tj = 25 °C 500 - -
Tj = 150 °C 300 - -
On-state resistance RDS(on) mΩ
ID = 3.5 A, VIN = 5 V, Tj = 25 °C - 90 120
ID = 3.5 A, VIN = 5 V, Tj = 150 °C - 180 240
On-state resistance RDS(on) mΩ
ID = 3.5 A, VIN = 10 V, Tj = 25 °C - 80 100
ID = 3.5 A, VIN = 10 V, Tj = 150 °C - 160 200
Nominal load current (ISO 10483) ID(ISO) 3.5 - - A
VIN = 10 V, VDS = 0.5 V, TC = 85 °C

Semiconductor Group Page 3 13.07.1998


BTS 117

Electrical Characteristics
Parameter Symbol Values Unit
at Tj=25°C, unless otherwise specified min. typ. max.
Characteristics
Initial peak short circuit current limit ID(SCp) - 25 - A
VIN = 10 V, VDS = 12 V
Current limit 1) ID(lim) 7 10 15
VIN = 10 V, VDS = 12 V, tm = 350 µs,
Tj = -40...+150 °C

Dynamic Characteristics
Turn-on time VIN to 90% ID : ton - 40 70 µs
RL = 4.7 Ω, VIN = 0 to 10 V, Vbb = 12 V
Turn-off time VIN to 10% ID : toff - 70 150
RL = 4.7 Ω, VIN = 10 to 0 V, Vbb = 12 V
Slew rate on 70 to 50% Vbb: -dVDS /dton - 1 3 V/µs
RL = 4.7 Ω, VIN = 0 to 10 V, Vbb = 12 V
Slew rate off 50 to 70% Vbb: dVDS/dtoff - 1 3
RL = 4.7 Ω, VIN = 10 to 0 V, Vbb = 12 V

Protection Functions
Thermal overload trip temperature Tjt 150 165 - °C
Unclamped single pulse inductive energy EAS mJ
ID = 3.5 A, Tj = 25 °C, Vbb = 32 V 1000 -- --
ID = 3.5 A, Tj = 150 °C, Vbb = 32 V 225 -- --

Inverse Diode
Inverse diode forward voltage VSD - 1 - V
IF = 5*3.5A, tm = 300 µs, VIN = 0 V

1Device switched on into existing short circuit (see diagram Determination of I


D(lim) . Dependant on the application, these values
might be exceeded for max. 50 µs in case of short circuit occurs while the device is on condition

Semiconductor Group Page 4 13.07.1998


BTS 117

Block Diagramm

Terms Inductive and overvoltage output clamp

RL V D
Z

I IN 2
D
IN
1 ID VDS Vbb S
HITFET
3
S HITFET
VIN

Short circuit behaviour


Input circuit (ESD protection)
V IN

I D(SCp)
IN

I D(Lim)
ID
ESD-ZDI

Source

t0 tm t1 t2
ESD zener diodes are not designed
for DC current > 2 mA @ VIN >10V.
t0 : Turn on into a short circuit
tm : Measurementpoint for ID(lim)
t1 : Activation of the fast temperature sensor and
regulation of the drain current to a level wher
the junction temperature remains constant.
t2 : Thermal shutdown caused by the second
temperature sensor, achieved by an
integrating measurement.

Semiconductor Group Page 5 13.07.1998


BTS 117

Maximum allowable power dissipation On-state resistance


Ptot = f(Tc ) RON = f(Tj); ID=3.5A; VIN =10V

BTS 117
50 200

W Ω

40
Ptot RDS(on)
150
35 max.
125
30

25 100
typ.

20 75

15
50
10
25
5

0 0
0 20 40 60 80 100 120 °C 150 -50 -25 0 25 50 75 100 °C 150

150 Tj

On-state resistance Typ. input threshold voltage


RON = f(Tj); ID= 3.5A; VIN=5V VIN(th) = f(Tj ); ID =0.7A; VDS=12V

250 2.0

Ω V

200 1.6
RDS(on) VIN(th)
175 1.4

150 1.2
max.
125 1.0

100 0.8
typ.

75 0.6

50 0.4

25 0.2

0 0.0
-50 -25 0 25 50 75 100 °C 150 -50 -25 0 25 50 75 100 °C 150
Tj Tj

Semiconductor Group Page 6 13.07.1998


BTS 117

Typ. transfer characteristics Typ. output characteristic


ID = f(VIN); VDS =12V; Tj=25°C ID = f(VDS); Tj=25°C
Parameter: VIN
10 10
10V
6V
5V
A A
4V
ID ID

6 6

4 4
Vin=3V

2 2

0 0
0 1 2 3 4 5 6 V 8 0 1 2 3 4 V 6
VIN VDS
Transient thermal impedance
Z thJC = f(tP)
Parameter: D=tP/T
10 1

K/W

RthJC
D=0.5
10 0

0.2

0.1

0.05
10 -1
0.02

0.01
0.005
0
-2
10 -7 -6 -5 -4 -3 -2 -1 0 2
10 10 10 10 10 10 10 10 s 10
tP

Semiconductor Group Page 7 13.07.1998


BTS 117

Application examples:

Status signal of thermal shutdown by


monitoring input current

R St

IN D

µC V
IN
HITFET V
bb
S

∆V
V
IN

thermal shutdown

∆V = RST *IIN(3)

Semiconductor Group Page 8 13.07.1998


BTS 117

Package and ordering code


all dimensions in mm

Ordering code: Q67060-S6500-A3 Ordering Code: Q67060-S6500-A2

Semiconductor Group Page 9 13.07.1998


BTS 117

Edition 7.97
Published by Siemens AG,
Bereich Halbleiter Vetrieb,
Werbung, Balanstraße 73,
81541 München
© Siemens AG 1997
All Rights Reserved.
Attention please!
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not for applications, processes and circuits implemented within components or assemblies.
The information describes a type of component and shall not be considered as warranted characteristics.
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or the Siemens Companies and Representatives worldwide (see address list).
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in question please contact your nearest Siemens Office, Semiconductor Group.
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Components used in life-support devices or systems must be expressly authorized for such purpose!
Critical components 1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or
systems2 with the express written approval of the Semiconductor Group of Siemens AG.
1)A critical component is a component used in a life-support device or system whose failure can reasonably be
expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of
that device or system.
2)Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or
maintain and sustain and/or protecf human life. If they fail, it is reasonable to assume that the health of the
user or other persons may be endangered.

Semiconductor Group Page 10 13.07.1998

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