DSP

ELL 850
Digital Control of Power Electronics

and Drive Systems
By
Dr. BHIM SINGH
Professor & Dean (Academics)
FNAE, FNA, FNASc, FASc, FTWAS, FIEEE, FIET, FIETE, FIE (I), C. ENGR
Department of Electrical Engineering
Indian Institute of Technology Delhi
New Delhi-110016-India
Digital Signal Processors
(DSPs)
Microprocessors
• The main components of the CPU are the program counter,
the instruction register, the instruction decoder, the data
address register, ALU, the timing and control circuits, and
the permanent and temporary storage.
• A CPU on a single chip is the Microprocessor.
• Metal-oxide semiconductor (MOS) and bipolar technologies
are used in the fabrication process of microprocessors.
• At present, HCMOS (high-speed complementary MOS) or
BICMOS (combination of bipolar and HCMOS) technology
to fabricate a microprocessor on a single chip
3
Microcomputers
• Interfacingmemory and I/O chips to the Microprocessor
chip forms a Microcomputer.
• The pins on each one of these chips are connected to the
lines on a system bus, which consists of address, data, and
control lines.
• Inthe past, some manufacturers designed a complete
microcomputer on a single chip with limited capabilities.
4
Microcontrollers
• Microcomputer on a single chip is a Microcontroller.
• Microcontrollers are typically used for dedicated
applications such as automotive systems, home appliances,
and home entertainment systems.
• Typicalmicrocontrollers include a microcomputer, timers,
and A/D (analog-to- digital) and D/A (digital to analog)
converters, all on a single chip.
• Examples of typical microcontrollers are the Intel 875 1 (8-
bit)/8096 (16-bit), Motorola HC 1 1 (8-bit)/HC 16 (1 6-bit),
and Microchip Technology’s PIC (peripheral interface
controller)
5
Digital Signal Processors (DSPs)
• A Digital Signal Processor (DSP) is a type of microprocessor
- one that is incredibly fast and powerful.
• A DSP is unique because it processes data in real time.

• This real-time capability makes a DSP perfect for
applications where delays are not tolerable.
6
Advantages of DSPs over
Microprocessors
• Real-time performance, simulation, and emulation
• High-speed number crunching
• Flexibility
• Reliability
• Increased system performance
• Reduced system cost
7
Some Typical DSPs

8
Some DSP Manufactures
Intel SHARC Cirrus
Texas Instruments (TI) Wuxi DSP Altera
Silicon Hive (acquired by Pico Chip (acquired NXP
Intel) by Mindspeed) Semiconductor
Freescale semiconductor Mindspeed ARM DSP
Motorola (acquired by Sandbridge (acquired Cavium
Freescale semiconductor) by Wuxi DSP)
Qualcomm Xilinx Tensilica
LSI AMD CEVA DSP
9
Typical Applications of DSPs
Space Military
10
Telecommunications
Medical Imaging Industrial
11
Automotive Oil Exploration
12
Instrumentation Telecommunications
13
Control
14
Automotive
Graphics/Imaging Consumer Electronics
15
Voice/Speech Computers
16
Control Instrumentation Industrial
Motor control Spectrum analysis Robotics
Disk control Function generation Numeric control
Servo control Pattern matching Security access
Robot control Seismic processing Power line monitors
Laser printer Transient analysis Active noise
control cancellation
Engine control Digital filtering Electronic meters
Phase-locked loops
17
Automotive
Vibration analysis Cellular telephones Radar detectors
Antilock brakes Active suspension Navigation
Antiskid brakes Noise suppression Digital radio
Engine control Electronic power Intelligent cruise
steering control
Adaptive ride control 4-wheel steering
Global positioning Air bag control
System diagnosis Voice commands
18
Telecommunication
Hand-free speaker Digital speech Answering
phones interpolation (DSI) machines
ADPCM transcoders Echo cancellations Modems
Digital PBXs FAX Cable modems
Line repeaters Cellular telephones Network
switching
Channel multiplexing Cordless telephones Data encryption
1.2 to 56 MB modems Adaptive equalizers
19
Telecommunication (…..contd.) Voice / Speech
Spread spectrum communications Voice mail
Video compression /multimedia Speech vocoding
ISDN basic / primary rate interfaces Speech recognition
Low-speed transcoders/ vocoders Speaker verification
DTMF encoding / decoding Speech enhancement
Packet switching and protocol Speech synthesis
Video conferencing Text-to-speech
20
Consumer
Power tools Set top boxes
Arcade games Digital cameras
Digital audio/TV Feature phones
Music synthesizer Multimedia
Educational toys Karaoke
Answering machines Dishwashers
Digital videodisk players Washing machines
21
Graphics / Imaging Military
3-D rotation Secure communications
Image transmission/compression Radio frequency modems
Pattern recognition Missile guidance
Image enhancement Navigation
Homomorphic processing Image processing
Workstations Sonar processing
Animation/digital map Radar processing
Robot vision
22
Computers General-Purpose DSP
Laser printers/copiers Digital filtering Convolution
Optical character recognition Fast Fourier transforms
(OCR) (FFTs)
Neural networks Adaptive filtering
High-speed array processors Correlation
Imaging Hilbert transforms
Videoconferencing Windowing
Modems Waveform generation
Networking controller Discrete cosine transforms
Scanner/bar-code scanner Hartley transforms 23
Control Applications:
Motor Control
• Theembedded nature of DSP and the high level of
computational power enables control of the most
complicated system.
• Today’s generations of automated systems must be designed
with environmental consciousness in mind, with more
efficient power conservation and a more robust control
function implementation.
• Suchsystems are now possible through the use of digital
motor control technologies
24
Motor Control
DSP
Signal
Command Controller Conversion Feedback Plant
Reference
D/A Power Motor load
profile or
Regulator Sensors Amplifier or
move/state
trajectory A/D Actuator
Digital Motor Control

• Command generation: polynomial, lookup table
• Controller: PID, LQR, Kalman filter, self-tuning regulator,
model reference adaptive control, notch filter, fuzzy logic,
gain scheduling
25
Motor Control
• Other DSP Tasks:
– Communication control for brushless multiphase Motor
– PWM signal generator for 1- to 3- phase motor
– Vector control of induction motors
– System modeling and diagnostics
26
Motor Control
• Motor control systems have traditionally been implemented
using analog and passive components such as operational
amplifiers, resistors, capacitors, and voltage regulators.
• Alternatively, control may be performed digitally by
converting a discrete sample of the analog input signal to a
digital equivalent.
• The input signal is not processed continuously but is
sampled at discrete intervals.
27
Motor Control
• A sampling interval of at least six to ten times the bandwidth
of the system is usually implemented, placing significant
performance demands on the system processor.
• Due to the high performance and low cost of digital signal
processors and microcontrollers, digital motor control
systems are replacing analog controllers in
today’s designs.
28
Motor Control
• Advantages of DSP-based motor control include:
Real-time generation of smooth reference and move profiles
Integration of memory (lookup tables) or multiple processors
into a single DSP
Use of advanced algorithms, resulting in fewer sensors and
lower system cost
 Vector control of brushless and induction motors
 Control of power switching inverters and the generation of
high-resolution pulse-width-modulation (PWM) outputs
Control of multivariable and complex systems using modern
intelligent methods such as neural networks and fuzzy logic
29
High-End Metering With DSPs
• Programmability, low power consumption, and the
advantage of reduced maintenance and operating costs of
electronic meters are the driving forces behind the
replacement of the Ferrari’s wheel meters.
• DSPs are a key feature of such systems and are suited to
high-feature (multitariff) 1-phase or 3-phase meters.
• These applications require 16- x 16-bit multiply operations
in real time at a high sampling rate to measure the harmonic
content of the current.
30
• A DSP solution based on standard devices is shown below:
Display
/ LCD-
CLKOUT Parallel driver
Input IF EPROM
signals Measurement 4
UL1-UL3 and or TMS320C2xx
MPX Serial
IL1-IL3 Signal 8 EEPROM
ADC IF
Temp. Conditioning inputs
0-Ref.
User
Parallel Interface
Control Signals IF
Address/Data
TMS320C2xx based Electricity Meter

31
• Traditional solutions using low-cost controllers would
require one microcontroller for each phase, whereas a single
DSP can handle all three phases on its own at relatively low
clock frequencies.
• Withspecial scanning and computation algorithms, the
power consumption of a 3-phase-system load can be
measured with minimum error.
• System calibration, self-checking, and setup menus for
system parameter modification are implemented in software.
32
• Inhigh-volume applications, a customizable DSP (cDSP)
could, integrate the interface functions on-chip.
• These functions include LCD drivers, a remote meter-
reading interface, analog-to-digital converters, a smart card
interface, and an external memory interface.
• Such a single-chip solution would result in lower standby
currents and improved battery life, thereby reducing
maintenance costs.
33
Laser Printers and Copiers
• The TMS320C6x generation of DSPs can turn the office
copier into an intelligent document management station.
• Desktop scanners already have the ability to read a document
into digital form, while laser printers can convert a digital
file into a paper copy.
• Linking these two machines through a microprocessor
produces a rudimentary digital copier.
• Digital copiers enhance the reproduction process by applying
digital signal processing techniques.
34
Laser Printers and Copiers
• By compressing images and storing them on disk, the digital
copier increases the reliability and simplifies the process of
reproducing multiple collated copies.
• The use of digital processing for improving on analog and
electromechanical methods has existed for some time.
• However, more revolutionary products will emerge as
advanced image/signal processing is applied to do more than
simply copy documents.
35
DSP Architecture
• All DSPs consist of several fundamental modules:
 a digital signal processing
 core to perform mathematical operations, memory to store
data and program instructions,
 a mixed-signal product to converse between the analog and
digital worlds.
• Asa stored-program machine, the processor must be told
what to do every clock cycle.
36
DSP Architecture
• Typically, a DSP fetches an instruction and some data from
memory, operates on these, and then returns the manipulated
data to storage.
• The way this is conducted is not the same for all processors.
• Two different architectures can be identified:
 Von Neumann
 Harvard
37
DSP Architecture
Stored Program
program control
ALU
and Input /
data
Output
Von Neumann Architecture
Program
Stored control Stored
program Input /
Output data
ALU
Harvard Architecture
Architecture of Digital Processors

38
DSP Architecture
• Von Neumann architecture has set the standard for computer
development over the past 40 years.
• Bothprogram and data can reside in the same memory-
mapped space.
• The disadvantage with this architecture is that there is only
one bus that shares both data and memory addresses.
• Therefore, only data space or program space can be accessed
in one cycle at any one time.
39
DSP Architecture
• Where fast data manipulation is vital, accessing both
program and data memory in a single cycle is advantageous.
• Harvard architecture separates the program and data
memory spaces.
• Having two buses to serve each address space ensures that
data and program access occurs in parallel, increasing
processing speed.
• However, processing power comes with a cost penalty.
• Two memory spaces require twice as many addresses, and
therefore, twice as many data pins.
40
The DSP System
Memory
DSP Chip Memory
Harvard
Von Neumann
DSP A/D Converters
Analog-to-digital
Digital-to-analog
D/A
Typical DSP System

41
The DSP System
• Some of the common features in a typical DSP system are:
A DSP to perform mathematical operations
Memory (both on-chip and external) to store data and
program instructions
Converters to convert signals from analog to digital and
from digital to analog.
• The DSP system may require external memory. In practice,
the program to be run is normally held in external memory
and then downloaded onto the DSP when the system is
started.
42
A Typical DSP Board
43
The Need for Speed:
DSP Technology
• The main concern for real-time algorithms is the amount of
processing that can be done before a new sample arrives.
• DSP-type algorithms are generically of the form involving a
multiply and add operation:
A = BC + D
• The addition function is quite simple for conventional
computers and can be performed in a single clock cycle. The
same is true of subtraction.
44
The Need for Speed:
DSP Technology
• Multiply functions take much longer, especially when
considering numbers such as π. A general-purpose processor
may take several hundreds of clock cycles to implement such
a calculation.
• A machine is needed that can perform a multiply and an add
in just one clock cycle.
• This requires an architecture molded to the specific
application.
45
The Need for Speed:
DSP Technology
•DSPs have hardwired units within the
processors for completing a multiply and
add within one single clock cycle.
• Because such multiply and accumulate (MAC)

instructions are the fundamental building blocks for
many DSP applications, efficient execution is
imperative.
46
The Need for Speed:
DSP Technology
• Pipelining is an additional method of speeding up the
instruction throughput of a processor, rather than speeding
up the actual time to execute a single instruction.
• The simplest analogy is that of a car production line.

• Itmight take 10 hours to assemble a complete car, but
because the construction of the car is broken down into
many subsections, a car might be finished every 10 minutes.
47
The Need for Speed:
DSP Technology
• Computer instructions can be broken down into stages, such
as fetching the instruction, decoding the instruction, fetching
any data, executing the instruction, and storing the result.
• In a way similar to that of a production line, instructions are

executed more quickly.
48
Example Architecture
• Programmable DSPs can be categorized into two distinct
groups according to their math type:
 Floating point
 Fixed point
• Theserefer to the format used to store and manipulate

numbers within the devices.
49
Fixed Point: Unsigned Integer
• Fixedpoint DSPs usually represent each number with a
minimum of 16 bits, although a different length can be used.
• For instance, Motorola manufactures a family of fixed point
DSPs that use 24 bits.
• In the simplest case, the 216 = 65,536 possible bit patterns are
assigned to the numbers 0 through 65,535. This is called
unsigned integer format.
• Thedisadvantage of unsigned integer is that negative
numbers cannot be represented.
50
Fixed Point: Offset Binary
• Offset binary is similar to Unsigned Integer Offset Binary
unsigned integer, except the Decimal Bit Pattern Decimal Bit Pattern
15 1111 8 1111
decimal values are shifted to 14 1110 7 1110
13 1101 6 1101
allow for negative numbers. 12 1100 5 1100
11 1011 4 1011
10 1010 3 1010
• In
9 1001 2 1001
the 4 bit example, the 8 1000 1 1000
7 0111 0 0111
decimal numbers are offset by 6 0110 -1 0110
5 0101 -2 0101
seven, resulting in the 16 bit 4 0100 -3 0100
patterns corresponding to the 3 0011 -4 0011
2 0010 -5 0010
integer numbers -7 through 8. 1 0001 -6 0001
0 0000 -7 0000
16 bit range 16 bit range

0 to 65,535 -32,767 to 51
32,768
Fixed Point: Offset Binary
• Inthis same manner, a 16 bit representation would use
32,767 as an offset, resulting in a range between -32,767 and
32,768.
• The most important use of offset binary is in ADC and DAC.

For example, the input voltage range of -5V to 5V is mapped
to the digital numbers 0 to 4095, for a 12 bit conversion.
52
Fixed Point: Sign and
Magnitude Sign and Magnitude
Decimal Bit Pattern
• Sign and magnitude is another simple 7
6
0111
0110
way of representing negative integers.
5 0101
•
4 0100
The far left bit is called the sign bit, and is 3 0011
made a zero for positive numbers, and a 2 0010
1 0001
one for negative numbers. 0 0000
•
0 1000
This results in one wasted bit pattern, -1 1001
since there are two representations for -2 1010
-3 1011
zero, 0000 (positive zero) and 1000 -4 1100
(negative zero). -5 1101
-6 1110
• This encoding scheme results in 16 bit -7 1111
numbers having a range of -32,767 to 16 bit range

32,767. -32,767 to 32,767
53
Fixed Point: Two’s Complement
• These first three representations are conceptually simple, but
difficult to implement in hardware.
• Remember, when A=B+C is entered into a computer

program, some hardware engineer had to figure out how to
make the bit pattern representing B, combine with the bit
pattern representing C, to form the bit pattern representing A.
• Two's complement is the format loved by hardware

engineers, and is how integers are usually represented in
computers.
54
Decimal Bit Pattern
• To understand the encoding pattern, 7
6
0111
0110
look first at decimal number zero in 5 0101
4 0100
the figure, which corresponds to a 3 0011
binary zero, 0000. 2 0010
1 0001
0 0000
-1 1111
• As we count upward, the decimal -2
-3
1110
1101
number is simply the binary -4 1100
-5 1011
equivalent (0 = 0000, 1 = 0001, 2 = -6 1010
0010, 3 = 0011, etc.). -7 1001
-8 1000
16 bit range
-32,768 to 32,76755
• Now, remember that these four bits are stored in a register
consisting of 4 flip-flops.
• If we again start at 0000 and begin subtracting, the digital
hardware automatically counts in two's complement: 0 =
0000, -1 = 1111, -2 = 1110, -3 = 1101, etc.
• This is analogous to the odometer in a new automobile.
• If driven forward, it changes: 00000, 00001, 00002, 00003,
and so on.
• When driven backwards, the odometer changes: 00000,
99999, 99998, 99997, etc.
56
• Using 16 bits, two's complement can represent numbers from
-32,768 to 32,767.
• The left most bit is a 0 if the number is positive or zero, and

a 1 if the number is negative.
• Consequently, the left most bit is called the sign bit, just as
in sign & magnitude representation.
57
Floating Point Numbers
• In floating point scheme, the basic idea is the same as used
in scientific notation, where a mantissa is multiplied by ten
raised to some exponent.
• For instance, 5.4321 × 106, where 5.4321 is the mantissa and
6 is the exponent.
• Notice that numbers represented in scientific notation are
normalized so that there is only a single nonzero digit left of
the decimal point. This is achieved by adjusting the exponent
as needed.
58
• Floating point representation is similar to scientific notation,
except everything is carried out in base two, rather than base
ten.
• While several similar formats are in use, the most common is

ANSI/IEEE Std. 754-1985.
• This standard defines the format for 32 bit numbers called

single precision, as well as 64 bit numbers called double
precision.
59
• As shown below, the 32 bits used in single precision are
divided into three separate groups:
 bits 0 through 22 form the mantissa,
 bits 23 through 30 form the exponent
 bit 31 is the sign bit.
60
• These 32 bits form the floating point number, v, by the following
relation:
V=(-1)S × M × 2E -127
where,
S : the value of the sign bit (0 for a positive number and 1 for a
negative number)
E : the value of the exponent (between 0 and 255 represented by
the eight exponent bits ).
Subtracting 127 from this number allows the exponent term to
run from 2-127 to 2128.
M : the value of the mantissa
61
• The mantissa, M, is formed from the 23 bits as a binary
fraction.
• For ex., the decimal fraction: 2.783, is interpreted as
2 + 7/10 + 8/100 + 3/1000 .
• The binary fraction: 1.0101, means
1 + 0/2 + 1/4 + 0/8 + 1/16.
• Floating point numbers are normalized in the same way as
scientific notation, that is, there is only one nonzero digit left
of the decimal point (called a binary point in base 2).
62
• Since the only nonzero number that exists in base two is 1,
the leading digit in the mantissa will always be a 1, and
therefore does not need to be stored.
• Removing this redundancy allows the number to have an
additional one bit of precision.
• The 23 stored bits, referred to by the notation: m22, m21, m21,
….. , m0, form the mantissa according to the following eq. :
M = 1 . m22m21m20m19 ….. m2m1m0
63
• In other words,
M = 1+ m222-1 + m212-2 + m202-3+ m192-4 …..
• If bits 0 through 22 are all zeros, M takes on the value of
one.
• If bits 0 through 22 are all ones, M is little bit under two, i.e.,
2 – 2-23
• Using this encoding scheme, the largest number that can be
represented is :
±(2 – 2-23) × 2128 = ±6.8 × 1038.
• Likewise, the smallest number that can be represented is:
±1.0 × 2-127 = ±5.9 × 10-39.
64
• Example of a floating point number
0 00000111 11000000000000000000000
+ 7 0.75
+1.75 X 2(7-127) = +1.316554 X 10-36
65
Fixed Point vs Floating Point
• All floating point DSPs can also handle fixed point numbers,
a necessity to implement counters, loops, and signals coming
from the ADC and going to the DAC.
• However, this doesn't mean that fixed point math will be
carried out as quickly as the floating point operations; it
depends on the internal architecture.
• For instance, the SHARC DSPs are optimized for both
floating point and fixed point operations, and executes them
with equal efficiency.
66
• The internal architecture of a floating point DSP is more
complicated than for a fixed point device. All the registers
and data buses must be 32 bits wide instead of only 16; the
multiplier and ALU must be able to quickly perform floating
point arithmetic, the instruction set must be larger (so that
they can handle both floating and fixed point numbers), and
so on.
67
• Floatingpoint (32 bit) has better precision and a higher
dynamic range than fixed point (16 bit) .
• Floating point programs often have a shorter development
cycle, since the programmer doesn't generally need to worry
about issues such as overflow, underflow, and round-off
error.
• Fixed point DSPs have traditionally been cheaper than
floating point devices.
68
Various Types of DSPs
• TMS320 Family - FXXXX, CXXXX
• dSPACE - 1104/1103 Controller, microlab box
• ADMC - 401, 326
• FPGA (Verilog, VHDL)
• Opal - RT
69
TMS320 Family Overview
• The TMS320 family consists of 16-bit fixed-point, 32-bit
floating-point, and 64-bit multiprocessor single-chip DSPs.
• These processors have the operational flexibility of high-
speed controllers and the numerical capability of array
processors.
• Combining these two qualities, the TMS320 processors are
inexpensive alternatives to custom-fabricated VLSI and
multichip bit-slice processors.
70
• The following characteristics make TMS320 family the ideal
choice for a wide range of processing applications:
 Flexible instruction set
 Inherent operational flexibility
 High-speed performance
 Innovative, parallel architecture
 Cost-effectiveness
71
• In 1982, Texas Instruments introduced the TMS32010—the
first fixed-point DSP in the TMS320 family.
• Today, the TMS320 family consists of the following
generations:
 C1x, C2x, C20x, C24x, C5x, C54x, and C62x 16-bit
fixed-point
 C3x, C4x, and C67x 32-bit floating-point
 C8x 64-bit multiprocessor
72
C6000
(C62x,C67x)
C5000 C8x
(C54x) C3x/4x
C5x High performance

Power Efficient
C2000 Performance
(C20x, C24x)
C1/2x
Control Optimized
The TMS Family Road Map

73
• Each generation of TMS320 devices has a similar structure;
a CPU combined with a variety of on-chip memory and
peripheral configurations.
• New combinations of on-chip memory and peripheral
options are used to create spin-off devices that satisfy a wide
range of needs in the worldwide electronics market.
• When memory and peripherals are integrated into one
processor, the overall system cost is greatly reduced and
board space is saved.
74
TMS320 Device Naming Conventions
TMS 320 C 25 FN L 40
Prefix:
Device
SMJ : MIL-PRF-38535 (QML)
SMQ : MIL-PRF-38535 (QML) plastic 1x-generation microprocessors/microcomputers
TMX : experimental device 10, 14, 15, 16, 17
2x-generation microprocessors: 25, 26
TMP : prototype device
TMS : qualified device 2xx-generation microprocessors:
203, 206, 209, 240, 241, 242, 243
Device Family: 3x-generation microprocessors: 30, 31, 32
320 : TMS320 family 4x-generation microprocessors: 40, 44
Technology: 5x-generation microprocessors:
No letter : NMOS 50, 51, 52, 53, 56, 57
AV : audio/video encoders or decoders 54x-generation microprocessors:
BC : CMOS with ROM bootloader 541, 542, 543, 545, 546, 548, 549
C : CMOS 6x-generation microprocessors: 6201, 6701
E : CMOS EPROM 8x-generation microprocessors: 80, 82
F : CMOS with flash memory AVxxx -generation microprocessors:
LBC : low-voltage CMOS with ROM bootloader 110, 120, 411
LC : low-voltage CMOS
LF : low-voltage CMOS with flash memory
P : CMOS one-time-programmable ROM
VC : very low-voltage 75
TMS320 Device Naming Conventions
TMS 320 25 FN L 40
Speed:
(in MHz or MIPS)
Package Type: Temperature Range:
FD : LCCC PCM : PQFP o
A : -40 to 85 C
o
FJ : JLCC PDB : PQFP H : 0o to 85oC

FN : PLCC PE : PQFP L
o o
: 0 to 70 C
FZ : CERQUAD PG : PQFP M : -55o to 125oC
GB : CPGA PGE : TQFP S
o
: -55 to 100 C
o
GE : CPGA PH : PQFP
GF : CPGA PN : TQFP
GFA : CPGA PJ : PQFP
GFW : PBGA PPM : PQFP
GGU : BGA PQ :PQFP
(ball grid array) PZ : TQFP
HFG : CQFP TA : TAB (encapsulated)
J : CDIP TAB : TAB (encapsulated)
JD : CDIP SB TB : TAB (bare die)
KGD : known good die TBB : TAB (bare die)
N : plastic DIP
76
TMS320 DSP Overview
• The key members (by generation) of the TMS320 family are:
 TMS320C2xx generation
 TMS320C3x generation
77
TMS320C2xx Generation
• TMS320C203 — a fixed-point, 16-bit DSP with 544 words
of on-chip RAM and two serial ports that runs up to 80
MHz. Pin compatible with the F206
• TMS320LC203 — a low-power version of the C203
• TMS320C206 — 16-bit, fixed-point DSP with 4.5K words
of on-chip RAM, 32K words with ROM
• TMS320F206 — a 16-bit, fixed-point DSP with 4.5K words
of on-chip RAM, 32K words of on-chip flash memory, and
two serial ports that runs up to 80 MHz. Pin compatible with
the C203 and C205
78
• TMS320LC206 — low-power version of C206
• TMS320C209 — a 16-bit, fixed-point DSP with 4.5K words
of on-chip RAM and 4K words of ROM that runs up to 57
MHz
• TMS320C240 — a 16-bit, fixed-point DSP with an
optimized event manager, dual on-chip 10-bit analog-to-
digital converters, SPI and SCI ports, 16K words of ROM,
28 bidirectional I/O pins, and a watchdog timer.
79
• TMS320F240 — a 16-bit, fixed-point DSP with an
optimized event manager, dual on-chip 10-bit analog-to-
digital converters, SPI and SCI ports, 16K words of flash
memory, 28 bidirectional I/O pins, and a watchdog timer.
• TMS320C241 — a 16-bit, fixed-point DSP with 544 words

of on-chip RAM, 8K words of on-chip ROM, event
manager, 10-bit analog-to-digital converter, SCI and SPI
ports, Controller Area Network (CAN) module
80
• TMS320F241 — a 16-bit, fixed-point DSP with 544 words
of on-chip RAM, 8K words of flash EEPROM, event
manager, 10-bit analog-to-digital converter, SCI and SPI
ports, Controller Area Network (CAN) module.
• TMS320C242 — a 16-bit fixed-point DSP with 544 words
of on-chip RAM, 4K words of on-chip RAM, event manager
module, 10-bit analog-to-digital converter
• TMS320F243 — a 16-bit fixed-point DSP with 544 words
of on-chip RAM, 8K words of flash EEPROM, event
manager, 10-bit analog-to-digital converter
81
TMS320C3x Generation
• TMS320C30 — a 33-million floating-point operations per
second (MFLOPS) (33-MHz), 32-bit, floating-point DSP
with two memory expansion buses, two serial ports, on-chip
ROM, 2K words of on-chip RAM, one channel DMA, and
CMOS technology
• TMS320C31 —similar to the ’C30 with one memory
expansion bus, no on-chip ROM, 2K words of on-chip
RAM, one serial port, a bootloader, and one channel of
DMA
• TMS320LC31 — a low-power version of the ’C31
82
• TMS320C32 — the lowest-cost version of the ’C3x with a
flexible memory interface, 512 words of on-chip RAM, low-
power modes, a bootloader, and two channels of DMA with
configurable priorities
• TMS320LC32 — a low-power version of the ’C32
83
• TMS320C40 — a high-performance, 330-MOPS, 384
Mbytes/s, 32 bit floating-point, multiport, parallel-processing
digital signal processor
• TMS320C44 — a lower-cost version of the ’C40 with four

communications ports and a smaller address reach.
84
• TMS320C50 — a complete system on a single chip. With
2K 16-bit words boot ROM and 10K 16-bit words on-chip
RAM, an entire DSP can be integrated into a 132-pin plastic
quad flat pack (PQFP).
• TMS320LC50 — a low-voltage version of the ’C50; 3.3-V
power supply
• TMS320C51 — in the ’C51, the ’C50’s 10K-word block of
RAM is replaced by 8K x 16-word ROM. This provides a
considerable advantage in cost and performance for users
who require large amounts of on-chip program space.
85
power supply
• TMS320C52 — a superb combination of both low cost and
high performance. Traditionally, devices in the same price
range have offered 10 million instructions per second
(MIPS) performance.
power supply
• TMS320C53 — provides even greater integration of on-chip
ROM than the ’C51. With 16K 16-word on-chip ROM and
4K 16-word on-chip RAM, an entire DSP system can be
integrated into the 132-pin PQFP.
86
power supply
• TMS320C53S — similar to the ’C53 specification with the
exception of two standard serial ports, the 100-pin thin quad
flat pack (TQFP), and preprogrammed ROM.
• TMS320LC53S — a low-voltage version of the ’C53S; 3.3-
V power supply
• TMS320LC56 — a 3.3-V device with 32K 16-word on-chip
ROM and 7K 16-word on-chip RAM, integrated into a 100-
pin TQFP. The communication ports consist of a standard
serial port and a buffered serial port (BSP). Available at 35-
or 25-ns cycle times
87
• TMS320LC57— Similar to the ’LC56 with an additional
parallel host port interface (HPI) and a 128-pin TQFP.
• TMS320BC57S — A 5-V device with 2K 16-word boot
ROM and 7K 16-word on-chip RAM. The communication
ports are similar to the ’LC57’s and consist of a standard
serial port, a host port interface, and a buffered serial port.
88
• TMS320C541 — available with an instruction cycle time of 25 ns
for 5K words of RAM and 28K-words of ROM and a 5-V power
supply
• TMS320LC541 — low-voltage versions of the ’C541, available
with instruction cycle times of 25 or 20 ns, and 3.3-V power
supplies
• TMS320C542 — available with an instruction cycle time of 25 ns
for 10K-words of RAM and 2K-words of ROM and a 5-V power
supply
• TMS320LC542 — low-voltage versions of the ’C542 available
with instruction cycle times of 25 or 20 ns, and 3.3-V power
supplies
89
• TMS320LC543 — available with instruction cycle times of
25 or 20 ns, 3.3-V power supplies, and the same memory
mix as the ’C542 but with fewer peripherals.
25 or 20 ns, 3.3-V power supplies, and 6K-words of RAM
and 48K-words of ROM
25 and 20 ns, 3.3-V power supplies, and the same memory
mix as the ’C545 but with fewer peripherals
90
15 or 12.5 ns, 3.3-V power supplies, and 32K-word RAM
and 2K-word ROM
• TMS320LC549/VC549 — available with instruction cycle
times of 15, 12.5, or 10 ns, 3.3- or 2.5-V power supplies, and
32K-word RAM and 16K-word ROM
91
• TMS320C6201 — available with an instruction cycle time
of 5ns. Based on the VelociTI VLIW ’C6200 fixed-point
CPU core. Executes up to 8 instructions per clock cycle and
achieves performance of 1600 MIPS @200MHz. Contains 1
M-bit on-chip static RAM (SRAM) and 32-bit external
memory interface (EMIF). 3.3v I/O, 2.5v CPU core.
92
• TMS320C6701 — floating point version of the TMS320C6201
available with an instruction cycle time of 6ns. Based on the
VelociTI VLIW ’C6700 floating-point CPU core. Executes up to 8
instructions per clock cycle and achieves performance of 1 billion
floating-point operations per second (1 GFLOPS) single precision
(420 million floatingpoint operations per second double
precision). Contains 1 M-bit onchip static RAM (SRAM) and 32-
bit external memory interface (EMIF). 3.3V I/O, 2.5V CPU core.
93
• TMS320C80 — a high-performance 2-billion-operations-
per-second (BOPS), 400 Mbytes/s multiprocessor device
with up to 400 Mbytes of on-chip memory. The ’C80 offers
50K bytes of static RAM (SRAM) and can handle up to 64-
bit instruction words.
• TMS320C82 — a cost-effective version of the ’C80 without
the video controller, and with only two parallel processors,
and with some added features
94
TMS320 Device Overview
C2x C3x C4xx C5x C54x C6x C8x AVxxx
C203 C30 C40 C50 C541 C6201 C80 AV110
LC203 C31 C44 LC50 LC541 C6701 C82 AV120
C206 LC31 C51 C542
F206 C32 LC51 LC542
C209 LC32 C52 LC543
C240 LC52 LC545
F240 C53 LC546
C241 LC53 LC548
F241 C53S LC549
C242 LC53S VC549
F243 LC56
LC57
BC57S
95
dSPACE (Digital Signal Processing and
Control Engineering) Controllers
DS1104 I/O box with DS1104 R&D Controller

attached master I/O ribbion Board
DS1103 PCC
Controller Board
96
dSPACE (Digital Signal Processing and
Control Engineering) Controllers
MicroLabBox BNC Varient MicroLabBox

Spring-Cage Variant
MicroLabBox
Sub-D Variant
97
dSPACE Controllers: DS 1104
Control Desk
MATLAB -
Simulink
DS1104 CP 1104 Power Electric Machines

R&D Connector Electronics
Controller Panel Drive
Card Encoder
Board
Setup Block Diagram
98
Control Desk, MATLAB and Simulink Interface

99
• The DS1104 R&D Controller Board is a standard board that
can be plugged into a PCI slot of a PC.
• The DS1104 is specifically designed for the development of
high-speed multivariable digital controllers and real-time
simulations in various fields.
• It is a complete real-time control system based on a 603
PowerPC floating-point processor running at 250 MHz.
• For advanced I/O purposes, the board includes a slave-DSP
subsystem based on the TMS320F240 DSP microcontroller.
100
• For purposes of rapid control prototyping (RCP), specific
interface connectors and connector panels provide easy
access to all input and output signals of the board.
• Thus, the DS1104 R&D Controller Board is the ideal
hardware for the dSPACE Prototyper development system
for cost-sensitive RCP applications.
• The CP1104 Connector Panel provides easy-to-use
connections between the DS1104 R&D Controller Board and
devices to be connected to it.
101
• Devices can be individually connected, disconnected or
interchanged without soldering via BNC connectors and
Sub-D connectors.
• This simplifies system construction, testing and
troubleshooting.
• In addition to the CP1104, the CLP1104 Connector/LED
Combi Panel provides an array of LEDs indicating the states
of the digital signals.
102
Technical Details
Main • MPC8240, PowerPC 603e core, 250 MHz
Processor • 32 kByte internal cache
Timers • 1 sample rate timer, 32-bit downcounter
• 4 general purpose timers, 32 bit
• 64-bit timebase for time measurement
Memory • 32 MByte synchronous DRAM (SDRAM)
• 8 MByte boot flash for applications
Interrupt • Interrupts by timers, serial interface, slave
Control DSP, incremental encoders, ADC, host PC and
Unit 4 external inputs
• PWM synchronous interrupts
103
Technical Details (….cond.)
Analog • 4 ADC inputs, 16 bit, multiplexed
Inputs • ± 10 V input voltage range
• 2 µs sampling time
• > 80 dB signal-to-noise ratio
• 4 ADC channels, 12 bit
• ± 10 V input voltage range
• 800 ns sampling time
• > 65 dB signal-to-noise ratio
Analog • 8 channels, 16 bit, 10µs max. settling time
Outputs • ± 10 V output voltage range
Serial Interface • Serial UART (RS232, RS485 and RS422)
104
Technical Details (….cond.)
Incrementa • Two digital inputs, TTL or RS422
l Encoder • 24-bit digital incremental encoders
Interface • Max. 1.65 MHz input frequency, i.e.
fourfold pulse counts up to 6.6 MHz
• 5 V / 0.5 A sensor supply voltage
Digital I/O • 20-bit digital I/O (bit-selectable direction)
• ± 5 mA output current
Slave DSP • Texas Instruments’ DSP TMS320F240
Subsystem • 4 kWord of dual-port RAM
• 3-phase PWM outputs and 4 single PWM outputs
• 14 bits of digital I/O (TTL)
105
dSPACE Controllers:
MicroLabBox
• MicroLabBox is a ready-to-use rapid control prototyping
(RCP) system for the laboratory environment.
• It can be connected to the mains without using an additional
power supply or a transformer.
• It provides standard interfaces to external devices such as
Ethernet and USB connectors.
• For generating and measuring I/O signals, the board provides
analog and digital input and output channels with included
signal conditioning.
106
dSPACE Controllers:
MicroLabBox
• MicroLabBox consists of two boards:
 DS1202
 DS1302
• DS1202 is the base board of MicroLabBox, which is based
on the Freescale Power Architecture technology.
• DS1302 is the I/O board of MicroLabBox. It provides the
board's standard I/O features.
107
dSPACE Controllers:
MicroLabBox
• The DS1202 board controls:
 The Ethernet interface, including the switch
configuration for host communication and I/O access
 The USB interface for data recording and booting an
application via a USB mass storage device
 Flash management for booting MicroLabBox and
loading real-time applications from the flash memory
 Communication and data exchange with the DS1302 I/O
Board.
108
dSPACE Controllers:
MicroLabBox
• The DS1302 controls:
 The analog I/O channels
 The digital I/O channels
 The serial interface (RS232 and RS422/485)
 The CAN interface
 Two different sensor supply outputs
 The customizable LEDs
 The buzzer
 The resolver interfaces
109
dSPACE Controllers: MicroLabBox
Technical Details
MicroLabB • Front Panel Variant
ox • Top Panel Variant with BNC Connectors
• Top Panel Variant with Spring-Cage
Terminal Blocks
Processor • Freescale QorlQ P5020, dual-core, 2 GHz 32
KB L1 data cache per core, 32 KB L1
instruction cache per core, 512 KB L2 cache
per core, 2 MB L3 cache total Freescale QorlQ
P1011 800 MHz for communication with host
PC
Memory • 1 GB DRAM 128 MB flash memory
110
Technical Details ( ….. contd.)
Host interface Integrated Gigabit Ethernet host
interface
Ethernet real- Integrated low-latency Gigabit Ethernet
time I/O I/O interface
interface
Inter-
faces USB interface USB 2.0 interface for data logging
("flight recorder") and booting
applications via USB mass storage
device (max. 32 GB supported)
Serial interface 2 x UART (RS232/422/485) interface
111

Inter- CAN interface 2 CAN channels (partial networking
faces supported)
LVDS interface 1 x LVDS interface to connect with the
Programmable Generic Interface PGI1
Resolution and 8 14-bit channels, 10 Msps, differential;
type functionality: free running mode 24 16-bit
channels, 1 Msps, differential;
Analog functionality: single conversion and burst
input conversion mode with different trigger and
interrupt options
Input voltage -10 ... 10 V
range
112
Resolution 16 16-bit channels, 1 Msps, settling
and type time: 1 µs
Analog
output Output -10 ... 10 V
voltage range
Output current ± 8 mA
Digital 8 bidirectional channels, 2.5/3.3/5 V (single-ended);
I/O functionality: bit I/O, PWM generation and
measurement (10 ns resolution), pulse generation
and measurement (10 ns resolution), 4 x SPI Master
12 bidirectional channels (RS422/485 type) to
connect sensors with differential interfaces
113
Technical Details ( …… cond.)

Electric motor Seperate 2 x Resolver interface
control I/O interfaces
functionality Functionality 6 x Encoder sensor input
on digital 2 x Hall sensor input
I/O channels 2 x EnDat interface
2 x SSI interface
Synchronous multi-channel
PWM
Block commutational
PWM
114
Physical 4 x Sub-D 2 x Sub-D 50 2 x Sub-D 9
connections 50 I/O I/O connectors I/O connectors
connectors 48 x BNC I/O 27 x spring-
4 x Sub-D connectors cage terminal
9 I/O 4 x Sub-D 9 I/O block
connectors connectors connectors
with 8 pins
each
Sensor Sensor supply 1 x 12 V, max. 3 W/250 mA (fixed)
supply 1 x 2 ... 20 V, max. 1 W/200 mA (variable)
115
References
• Phil Lapsley, Jeff Bier, Amit Shoham, and Edward A. Lee,
“DSP Processor Fundamentals”, Wiley-IEEE Press, 1996,
ISBN 0-7803-3405-1.
• Steven W. Smith, “The Scientist and Engineer's Guide to
Digital Signal Processing”, San Diego: 2nd ed., California
Technical Publishing, 1999, ISBN: 0-9660176-7-6
• Hamid A. Tolait, and Steve G. Campbell, “DSP-based
Electromechanical Motion Control”, New York: CRC Press,
2004, ISBN: 0-8493-1918-8
• TexasInstruments, “TMS320 DSP Development Support
Reference Guide”, Application Note, May 1998
116
References
• Jerry
Luecke, “Analog and Digital Circuits for Electronic
Control System Applications”, Burlington, Elsevier, 2005,
ISBN: 0-7506-7810-0
• M. Rafiquzzaman, “Microprocessor Theory and Applications
with 68000/68020 and Pentium”, New Jersy: John Wiley and
Sons, 2008, ISBN: 978-0-470-38031- 4
• Texas Instruments, “Dual-Output Low-Input-Voltage DSP
Power Supply Controller with Sequencing”, Application
Note, Sep. 2000
• Texas Instruments, “Using the TPS56300 to Power DSPs”,
Application Note, Jan. 2001
117
References
• TexasInstruments, “TMS320F28xx and TMS320F28xxx
DSP Power Reference Design”, Application Note, April
2008.
• Texas Instruments, “TMS320F2837xS Delfino
Microcontrollers”, Appl. Note, October 2015.
• dSPACE, “MicroLabBox Features”, Application Note,
Release 2017-A, May 2017
• dSPACE, “DS1104 R&D Controller Board Hardware
Installation and Configuration”, Appl. Note, Release 4.1,
March 2004.
118
References
• dSPACE, “ECE 5671/6671 – Lab 1 dSPACE DS1104
Control Workstation & Simulink Tutorial”, Appl. Note, Sep.
2016.
• Texas Instruments, “F2837xS Firmware Development
Package”, Appl. Note, March, 2016
• Texa Instruments, “Using TMS320 Family DSPs in Motion
Control Systems”, Application Note, Sep. 1996.
• dSPACE, “DS1104 R&D Controller Board”, 2017.
119

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ELL 850

Digital Control of Power Electronics

• A DSP is unique because it processes data in real time.

• High-speed number crunching

• Increased system performance

• Reduced system cost

Some Typical DSPs

Medical Imaging Industrial

Automotive Oil Exploration

Graphics/Imaging Consumer Electronics

Digital Motor Control

TMS320C2xx based Electricity Meter

Architecture of Digital Processors

DSP A/D Converters

Typical DSP System

• Because such multiply and accumulate (MAC)

• The simplest analogy is that of a car production line.

• In a way similar to that of a production line, instructions are

• Theserefer to the format used to store and manipulate

16 bit range 16 bit range

• The most important use of offset binary is in ADC and DAC.

numbers having a range of -32,767 to 16 bit range

• Remember, when A=B+C is entered into a computer

• Two's complement is the format loved by hardware

• The left most bit is a 0 if the number is positive or zero, and

• While several similar formats are in use, the most common is

• This standard defines the format for 32 bit numbers called

C5x High performance

The TMS Family Road Map

FJ : JLCC PDB : PQFP H : 0o to 85oC

• TMS320C241 — a 16-bit, fixed-point DSP with 544 words

• TMS320C44 — a lower-cost version of the ’C40 with four

DS1104 I/O box with DS1104 R&D Controller

MicroLabBox BNC Varient MicroLabBox

DS1104 CP 1104 Power Electric Machines

Setup Block Diagram

Control Desk, MATLAB and Simulink Interface

Technical Details ( ….. contd.)

Technical Details ( …… cond.)

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