1) 32 Bit x 32 Bit Multiprecision Razor-Based Dynamic Voltage Scaling Multiplier With Operands

Scheduler
2) A Novel Joint data-hiding and Compression Scheme based on SMVQ and Image Inpainting.
3) Combination of Fingerprint for Privacy Protection
4) Implementation of Speech Recognition System
5) Incentive based Data sharing in Delay Tolerant mobile Networks
6) Packet loss Concealment using WSOLA & GWSOLA Techniques
7) Low Area and Power Optimization for AES Encryption Module on FPGA
8) Implementation and Enhancement of design parameters in Handoff Algorithm
9) Impact of relay nodes on Delay tolerant network
10) Autonomic queuing system