MCL331

PROJECT REPORT
on
FABRICATING A NANO-LABYRINTH
ON SILICON WAFER

SUBMITTED BY:
S.PARDHU NIHAR (2014ME20759)
PAWAN YADAV (2014ME20744)
RAMU NAIDU MALLA (2014ME20752)
SANGRAM VUPPALA (2014ME20761)

Supervised by:
Prof. Aravindan

Mechanical Engineering Department

Indian Institute of Technology Delhi
April 2017
Introduction:
Our objective is to fabricate a Nano-Labyrinth (maze) on a Silicon
wafer starting with Spin Coating of Photo Resist, Electron Beam
Lithography, Sputtering Deposition and concluding with Etching.
Recently, due to the advancements in the fields of Material Sciences
and Nanotechnology, the research for flexible functionality of
optoelectronic devices are attracting great interests. Amongst these
flexible optoelectronic devices, the Transparent Flexible Electrodes
(TFE) is one of the most crucial research topics these days.
Fabricating Nano Labyrinth patterns is the key step in Manufacturing
TFE.

Fig 1*. Nano-Labyrinth Patterns

*Reference for Figure 1: “Photonic Labyrinths: Two-Dimensional

Dynamic Magnetic Assembly and in Situ Solidification, pages 1770-
1775” by Qiao Zhang, Michael Janner, Le He, Mingsheng Wang,
Yongxing Hu, Yu Lu, and Yadong Yin. Department of Chemistry,
University of California, Riverside, Riverside, California 92521,
United States
Approach:
We approached our objective of making the Nano labyrinth by first
opting for Maskless optical Lithography but on discussion with TA
Patel sir and Dr. Uday of NRF lab we decided to switch to EBL as it
had capability to go down in size up to 50 nm as compared to
Maskless optical Lithography which had capability to go down in size
up to 10 Micro meter. For sputtering and etching we contacted centre
of energy studies and with help of Prof. K.Vamsi and Research
scholar Krishna Singh we decided to sputter Aluminium on our
silicon wafer for the maze
Electron Beam Lithography is a process of scanning a focused ion
beam of electrons to draw required shape on a surface that is covered
by resist.
The basic structure to carry it out is as per following –

Fig 2 – Showing various steps Involved

Courtesy - Electron Beam Lithography Josef Brown Mechanical
Engineering Undergraduate
It includes –
STEP 1: Taking silicon wafer, Developing resist on it via photoresist
STEP 2: e-beam Developing
STEP 3: Sputtering
STEP 4: Etching
The discussion of each step is explained in the following pages.

Objective: Patterning of a maze onto a silicon wafer at nano-scale.

Material Required: Silicon wafer (0.5mm thickness), Photo-resist
polymer(in this case PMMA is the best alternative), Aluminium,
Etchant(1:3 ratio of methyl butyl ketone and isopropyl alcohol)

Step 1: Substrate generation

For this process we chose Silicon wafer added photoresist layer on it
via spin coating phenomenon and then got the required substrate.
Starting with silicon it is a semiconductor whose conductivity can be
increased by adding n-type or p-type impurities.
Wafers are produced by silicon ingots by cutting it into disk shaped
and then performing various process like edge rounding, polishing,
Lapping etc.
For adding photoresist layer we must see the role of resist first –
ionization occurs after the collision of resist with electrons from
electron beam which results in physical and chemical changes in
resist. There are 2 types of resists that can be employed here i.e
Positive resist and Negative resist.
Positive resist undergoes increase in solubility after interaction with
electron while Negative resist undergo cross linking of polymers to
decrease its solubility. Common examples positive resist are – ZEP
520 and PMMA. While common negative resist is Hydrogen
silsesquioxane.
We choose PMMA (Poly-methyl methacrylate) because we needed a
positive resist and PMMA had all the suitable properties for our
product as it has long chain of polymers hence it takes long time
before we find increase in solubility, suitable glass transition
temperature and hence better properties.

Figure 3: PMMA structure Courtesy: Wikipedia

Table 1- Mechanical properties of PMMA

Reference - Morphological and thickness analysis for spin coating
PMMA by R.Magchoon, S.Baghery, and E.Mohagerani page -4
For deposition of PMMA we use spin coating due to its benefits of
accuracy and uniformity. We used following graph to compare spin
coating velocity and the thickness of 950PMMA to be deposited inn
dichloroethane and with Discussion with Dr. Uday we choose do add
thickness of Photoresist to be 60nm .There will be effect of
concentration , Viscosity , Coating rate . We are using solvent as
dichloroethane but this graph will change for different solvent.

Table 2 –Concentration effect on Spin coating

Reference - Morphological and thickness analysis for spin coating
PMMA by R.Magchoon, S.Baghery and E.Mohagerani page -4

Fig 4– Showing thickness vs angular velocity

Reference –Morphological and thickness analysis for spin coating
PMMA by R.Magchoon, S.Baghery, E.Mohagerani, page – 2.
Step 2: The substrate after spin coated with the PMMA, it is
exposed with an electron beam from the electron beam
lithography system.
ELECTRON BEAM LITHOGRAPHY SYSTEMS:
An electron beam lithography system guides a nanometer focussed
electron beam to form a latent image in a layer of resist. These can be
classified according to beam shape and beam deflection strategy.
The commercial electron beam systems are dedicated electron beam
writing systems whereas for the research purposes an electron
microscope is converted to an electron writer which produce
linewidths of 20nms whereas the commercial ones produce line
widths of 10nms.

Fig. 5 SCHEMATIC OF ELECTRON BEAM LITHOGRAPHIC

SYSTEM
Reference: Electron beam lithography, S.Griesing, University of
Saarland.

System Overview:
1. Electron beam:
• Beam shape: Spot beam
• Accelerating voltage: 100 kV
• Beam current: 500 pA to 20 nA
• Minimum beam size: ≤ 2.9 nm (high resolution writing mode at
100 kV)
2. Beam Deflection:
• Method: Vector scan
• Writing field in high speed writing mode: 1 mm X 1 mm
• Writing field in high precision writing mode: 62.5 µm X 62.5
µm
• Beam positioning DAC: 19 bits
• Beam scanning DAC: 12 bits
• Beam scanning speed: 50 MHz
3. Stage Movement:
• Method: Step and repeat
• Stage position measurement: Laser interferometer
• Positional step size: λ/1024 (0.62 nm)
• Stage movement range: 190 X 170 mm
• Writing area: 150 X 150 mm
• Movement speed: Up to 10 mm/s
4. Material Transfer:
• Autoloader with 10-cassette loading system
Substrate Requirements:
• Piece parts from 5 mm X 5 mm to 150 mm wafers; 5" and 6"
mask blanks
• Si, III-V, Metals, Dielectrics are allowed
• Substrates must be mounted directly on to the proper cassette

Electron sources: For higher resolution field electron emission

sources such as heated W/ZrO2 and for low resolution thermionic
sources can be used. Electronic or magnetic lenses are used for fine
focussing of the electron beam by the use of Magnetic Lorentz force.

Fig 6 THERMIONIC ELECTRON SOURCE

Reference: Cabrini, Stefano, and Satoshi Kawata, eds.
Nanofabrication handbook. CRC Press, 2012.

The PMMA is a positive resist, so it gets soluble in the developer

which means we have to expose the electron beam in the pattern of
the maze.
Step3: Sputter Deposition
The patterned substrate which is ready for deposition can be treated
using PVD (thermal deposition) or Sputter deposition. Thermal
deposition involves heating of an aluminium sample at around 700
degrees Celsius. The aluminium vapours get deposited on the silicon
wafer sample with the patterned photo resist on the surface.
Aluminium is the third material in the trinity of matrix substances
employed to fabricate silicon solid-state components (the other two
being silicon and silicon dioxide). It has emerged as the most
important material for such applications accuse of its low resistivity
and its compatibility with the other two matrix substances.
Aluminium thin films adhere well to Silicon because during the
thermal step that sinters the metal silicon contacts, the aluminium atop
the SiO2 layer forms a thin layer of A12O3 at the A1/SiO2 interface,
which promotes good adhesion.
Sputter deposition involves the bombardment or the collision of heavy
ions with the target plate (Aluminium here). The target metal acts as
the cathode whereas the substrate or the silicon wafer acts as the
anode. The sputtered species are neutral in general. The parameters
affecting the sputter yield of this process are:
 Ion energy of the incident heavy ion.
 Angle of incidence on the anode or the patterned substrate.
 Discharge current.
 Pressure of the gas chamber.
1. Ion Energy:
The sputter yield increases with the increase in the ion energy.
But the atoms from the target are not sputtered until a certain
threshold energy.
For heavier nuclei, we see that it reaches a saturation as we
increase the ion energy.
Sometimes, at very high energies, the yield decreases because of
the increasing penetration depth and hence increasing energy
 loss below the surface, i.e. not all the affected atoms are able to
reach the surface to escape.

Fig 7. Ion Energy vs Sputtering Yield

*Reference: Slide 15,Chapter-9, NE 343: Microfabrication and thin
film technology Instructor: Bo Cui, ECE, University of Waterloo;
http://ece.uwaterloo.ca/~bcui/ Textbook: Silicon VLSI Technology by
Plummer, Deal and Griffin .
2. Angle of incidence:
As the angle increases the sputtering yield increases but after a
certain value the yield decreases due to the penetration effect.
Sputter rate also depends on the masses of the colliding atoms
and their kinetic energies.
The max. Yield is seen between 60 and 70 degrees.
3. Pressure and Discharge Current:
Too high chamber pressure would lead to too many collisions
and the deposition onto the substrate would be considerably
reduced and they would hence be found more on the walls of the
chamber. For low pressures the number of heavy atoms moving
would be reduced and hence it would lower the deposition rate.
Therefore, an optimum pressure mid-way is used for max.
Yield.
Fig. 8 Influence of Working Pressure and Current on Deposition Rate
*Reference: Slide 27, Chapter-9, NE 343: Microfabrication and thin
film technology Instructor: Bo Cui, ECE, University of Waterloo;
Textbook: Silicon VLSI Technology by Plummer, Deal and Griffin .

Fig. 9 The final state after deposition of the metal B onto substrate A
Reference: Slide 9, The Materials Science of Thin Films. 2nd ed.
Burlington, MA: Academic Press, 2001. ISBN: 0125249756.
Step 4: Etching
After we have sputter deposited the metal (Aluminium), we need to
etch off the Resist (PMMA) to get final pattern.
Lift-off is a standard process to create metal patterns on a substrate. In
the past, nanometer scale metal patterns were produced exclusively by
electron beam lithography, notably the PMMA resist.
Lift offs can either be Positive or Negative. Negative tone resist
process is preferred because lift-off by positive tone resist such as
PMMA will require exposure of large areas and consume long e-beam
lithography time. However, negative resist is known to produce over-
cut profiles, which makes lift-off very difficult.

Fig 10*: Schematic diagram of the PMMA resist Etching (Negative

Lift-off)
*Reference for Figure: “Electron beam lithography of HSQ/PMMA
bilayer resists for negative tone lift-off process, page 815” by Haifang
Yang, Aizi Jin, Qiang Luo, Junjie Li, Changzhi Gu, Zheng Cui,
Beijing National Laboratory for Condensed Matter Physics, Beijing,
China.
We have chosen to use Positive Lift-off as it suits better to patterns
like Labyrinths.
It is done by immersing the Pattern in a 1:3 mixture of Methyl
Isobutyl Ketone and Isopropyl Alcohol. This was suggested to us by
Goswami Sir (T.A). Methyl Isobutyl Ketone and Isopropyl Alcohol
were procured from the welding lab in the workshop.
CAD model and its Dimensions:
Since the minimum we could go onto the EBL machine available in
NRF lab is 50nm we gave the following dimensions to our maze. The
base surface is silicon and the Maze white is Aluminium metal.

Fig 11: CAD Model

The thickness of silicon wafer was selected to be 0.3mm.
The height and thickness of patterning for maze was 100nm.
Scale: 1:20 Units: nm

Fig. 12 Orthographic View of the Pattern

Conclusion and Future Course of Action:
We had decided our Parameters as specified above also we tried to
make our product in NRF Lab IIT DELHI with the help of Dr. Uday
Kumar and were scheduled for Spin coating and e-beam developing
in NRF lab on Friday but unfortunately on Thursday the Pump of e-
beam developing machine went off and would take 1-2 month for new
pump to come from Germany.
For sputtering and developing we are scheduled in Centre of energy
with help of Prof. K. Vamsi and Research scholar Krishna Singh. We
are given time on Monday, Tuesday or Wednesday at our
convenience and it would take around 3 Hrs. for the same.
We have an appointment on Monday for Maskless Optical
Lithography in NRF lab and hopefully we can develop our maze in
Micro-scale (Due to lower limit of Maskless Lithography as
10micrometer) till Tuesday.
References:
1. “Copper Micro-Labyrinth with Graphene Skin: New Transparent
Flexible Electrodes with Ultimate Low Sheet Resistivity and Superior
Stability” by Hak Ki Yu and Ho Won Jang, Academic Editor.
2. “Morphological and thickness analysis for spin coating PMMA” by
R.Magchoon, S.Baghery, and E.Mohagerani.
3. “.Schematic of electron beam lithography,Electric and comp. eng.”,
James and Loyd, University of Illinois.
4. “Handbook of nanofabrication”, Gary Wiederrecht, Academic
Press, 2010.
5. “Nanofabrication handbook”, Cabrini, Stefano, and Satoshi
Kawata, CRC Press, 2012.
6. “Electron beam lithography of HSQ/PMMA bilayer resists for
negative tone lift-off process” by Haifang Yang, Aizi Jin, Qiang Luo,
Junjie Li, Changzhi Gu, Zheng Cui, Beijing National Laboratory for
Condensed Matter Physics, Beijing, China.