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Electrical Machines I Prof. Krishna Vasudevan, Prof. G. Sridhara Rao, Prof. P.

Sasidhara Rao

6 Phasor diagrams

r1 jxl1 r’2 jx’l2

I1

Io
Ic Im
Rc V’2 Z’L
V1 jXm

(a)
r1 jxl1 r’2 jx’l2 R jX
I1 I’2 I1 I’2
R=r1+r’2
Io
Ic Im
Z’L V’2 x=xl1+x’l2
V1 Rc V1 V’2
jxm
I1=I’2

(b) (c)

The resulting equivalent circuit as shown in Fig. 16 is known as the exact

equivalent circuit. This circuit can be used for the analysis of the behavior of the transform-
ers. As the no-load current is less than 1% of the load current a simplified circuit known
as ‘approximate’ equivalent circuit (see Fig. 16(b)) is usually used, which may be further

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Electrical Machines I Prof. Krishna Vasudevan, Prof. G. Sridhara Rao, Prof. P. Sasidhara Rao

simplified to the one shown in Fig. 16(c).

On similar lines to the ideal transformer the phasor diagram of operation can be
drawn for a practical transformer also. The positions of the current and induced emf phasor
are not known uniquely if we start from the phasor V1 . Hence it is assumed that the phasor
φ is known. The E1 and E2 phasor are then uniquely known. Now, the magnetizing and loss
components of the currents can be easily represented. Once I0 is known, the drop that takes
place in the primary resistance and series reactance can be obtained which when added to
E1 gives uniquely the position of V1 which satisfies all other parameters. This is represented
in Fig. 17(a) as phasor diagram on no-load.

Next we proceed to draw the phasor diagram corresponding to a loaded transformer.

The position of the E2 vector is known from the flux phasor. Magnitude of I2 and the load
power factor angle θ2 are assumed to be known. But the angle θ2 is defined with respect
to the terminal voltage V2 and not E2 . By trial and error the position of I2 and V2 are
determined. V2 should also satisfy the Kirchoff’s equation for the secondary. Rest of the
construction of the phasor diagram then becomes routine. The equivalent primary current

I2 is added vectorially to I0 to yield I1 . I1 (r1 + jxl1 )is added to E1 to yield V1 . This is shown
in fig. 17(b) as phasor diagram for a loaded transformer.

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Electrical Machines I Prof. Krishna Vasudevan, Prof. G. Sridhara Rao, Prof. P. Sasidhara Rao

V1
IoX l1

E1 Ior1 E2

Io
φ φ
Im Il

V1
I1X l1

I1r1
E1 I2x2 I r
2 2
E2 I2
V2
I’2 Il
Io
φ φ