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Comparative study of DC circuit breakers using

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 Comparative Study of DC Circuit Breakers Using
Realtime Simulations
M. Mobarrez, M. G. Kashani, S. Bhattacharya
Department of Electrical and Computer Engineering
North Carolina State University
Raleigh, USA
{mmobarr,sbhatacharya,mghapan}@ncsu.edu
Abstract—One of the main limitations in using high voltage
and medium voltage DC grids is the issues related to the current-
limiting devices and circuit breakers. These devices should be
able to handle large currents in the normal operation condition
and block high DC currents in a few microseconds in the case of
DC faults. Moreover, they are required to dissipate huge
amounts of energy stored in the transmission line inductances. In
this paper, four configurations of DC circuit breakers from three
general groups are evaluated and the results are compared in
terms of the time required by the breakers to interrupt the
current, maximum DC breaking current, rated voltage, efficiency
and current state of development. The performance of DC circuit
breakers is evaluated when a line to ground DC fault happens in
a 9 module/2 terminal DC system. Simulation results were
obtained using Real Time Digital Simulator (RTDS) and PSCAD.
Keywords—component; solid state DC circuit breaker; hybrid
solid state sircuit breaker; mechanical DC circuit breaker; multi-
terminal dc system; DC Arc; RTDS; CB
I. INTRODUCTION
The global trends in using green energy and replacing fossil
fuels with the renewable energy resources, has been increased
significantly during the recent decades [1], [2]. Therefore,
integrating renewable energies, like wind farms and solar
power plants, into the power grids became more and more
popular. DC transmission and distribution system has several
advantages over the AC transmission and distribution system to
connect the renewable energy sources such as the offshore
wind farms and; solar farms to the grid. DC transmission
systems are environmental friendly, economical especially for
the long distances, they can be used to connect two or more AC
grids with different frequencies, and also power flow control is
easier in the DC systems [3], [4].
Nowadays, one of the main limitations of using high power
DC grids is the issues related to the current limiting devices
and DC circuit breakers (DC CB) [5]. The handling of short-
circuits in the DC grid with large penetration of distributed
energy generation, has become a real challenge. There is a
structural difference between the AC and DC Mechanical CB
and this is because of the absence of natural zero crossing of
the short circuit current in the DC system. DC breakers need to
create an artificial zero current crossing by some extra means
and then open the switch. They should also be able to interrupt
the short circuit current very quickly and need to dissipate the
large amount of energy stored in the inductances of the system.
k,((( 
R. Adapa
Power Delivery and Utilization
Electric Power Research Institute (EPRI)
Palo Alto, USA
radapa@epri.com
Presently, DC breakers are widely available for the low and
medium voltage range. Circuit breakers usable for HVDC
system are not commonly available and have very limited
ratings [6].
The level of short circuit current has increased enormously
with the integration of distributed energy sources. As a result
the classical mechanical circuit breakers will not be able to
handle this short circuit current. After detecting a short circuit
the mechanical circuit breaker takes few cycles prior to open
the switch mechanically. Eventually an arc occurs that has little
impact on the current. The current can be stopped at its natural
zero crossing if the plasma is significantly cooled down to
avoid re-ignition. Thus turning off a short circuit takes at least
50 milliseconds (3 cycles of 60Hz AC) which is very long and
will destroy the high voltage direct current (HVDC) converters
[6].
High power semiconductor based solid state circuit
breakers provide enormous advantages compared to the
mechanical ones, since a solid state breaker is able to switch in
a few microseconds and does not require zero current crossing.
The technology development for DC Solid State Circuit
Breaker (SSCB) is becoming very important to the active
research and technology development in both medium voltage
direct current (MVDC) and HVDC grids [6]. The HVDC grids
concept is mainly motivated by integration of large-scale off-
shore wind farms and the recent concepts of Multi-terminal
(MT) DC grids for power transmission and then MV based
MTDC grids for power distribution to large cities. The research
on fast DC breakers is a 45+ year old topic, challenges at
fundamental level including: fast operation (less than 5ms
including detecting the fault and opening the breaker) without
normal zero crossing in the current waveform and absorption
of considerable energy of the system.
The focus of this paper is to model and compare four
different configurations of DC Circuit breakers including Solid
State DC CB, Hybrid DC CB with Fast Mechanical Switch,
Hybrid DC CB with Mechanical Dis-connector and
Mechanical DC CB, in terms of the time required for them to
interrupt the DC fault current time required by the breakers to
interrupt the current, maximum DC breaking current, rated
voltage, efficiency and current state of development. Also, the
four configurations were modeled in a Real Time Digital
Simulator (RTDS) and the performance of the breakers has
been evaluated in a 9 module/2 terminal DC system when a
line to ground fault occurs on the DC side. Moreover, in order
to be able to model the Mechanical DC CB., a high-current free
burning DC arc modeling has been presented in this paper.
II. HVDC CIRCUIT BREAKERS MODELS
A. Mechanical Resonance DC Circuit Breaker
In order to be able to model the mechanical DC CB, a
model of a high-current DC arc is needed. There are three
different methods that can be used to develop a model for arc
[7].
1. Physics-based models: Arcs are very chaotic in nature and
complex, so developing a theoretical model based on arc
physics is very complicated.
2. Equivalent circuit models: This model focuses on either V-
I characteristic of the arc or its apparent impedance. So
whenever the effect of the arc on an electric circuit is
desired, this model can be considered.
3. Heuristic model: Experimental data is used along with
macroscopic mathematical model to model the arc.
DC equivalent circuit of the arc can be seen in Fig. 1.
Since the effect of the arc on the electric circuit of the breaker
is needed in this paper, Equivalent Circuit Model was used for
the arc modeling. Different scientists established different
models for the DC arc. The DC arc models presented by
different scientists from 1900 are listed in the following [8]:
• Ayrton Equation
• Steinmetz Equation
• Nottingham Equation
• Van and Warrington Equation
• Miller and Hildenbrand
• Hall, Myers and Vilicheck
• Stokes and Openlander Model
• Paukert’s Compilation of LV Arcing-Fault Data
• Solver,
Stokes and Openlander Model has enough accuracy and is
suitable for high current applications. Therefore, this model is
used as the arc model in the Mechanical CB model. The
following equations show the voltage and the resistance of the
free burning arc with copper electrodes.
଴Ǥଵଶ
ܸ௔௥௖ ൌ ሺʹͲ ൅ ͲǤͷ͵Ͷܼ௚ ሻ‫ܫ‬௔௥௖ (1)
ଶ଴ା଴Ǥହଷସ௓೒
ܴ௔௥௖ ൌ బǤఴఴ (2)
ூೌೝ೎
case. It should be considered that the negative voltage of the
arc means that the arc resistance is negative. Although negative
resistance does not exist, it is the way DC arcs behave [8].
Fig. 1. DC arc equivalent circuit [8].
Fig. 2. Steady state arc voltage.
The mechanical resonance DC circuit breaker produces
artificial zero current by superposing an oscillating current on
the DC current. To achieve the artificial zero current crossing,
an LC series resonance circuit is put in parallel with the
interrupter (can be conventional AC breaker) as it is shown in
Fig. 3. By appropriate selection of L and C, the oscillating
current, LC-Resonance Path Current, will be greater than the
dc current passing through the Mechanical Breaker and
accordingly, a superimposed current, which is the summation
of the oscillating current and the DC current can produce zero
current in the mechanical breaker. So, the DC arc in the breaker
can be extinguished. This method of arc extinguishing can be
divided into two different methods with respect to the electrical
charge of the capacitor before its connection to the mechanical
breaker. The two methods are [9]
1. Pre-charging method.
2. Non-charging method.
In the pre-charging method the capacitor should be
connected to the mechanical breaker just after the mechanical
breaker is opened. The current of LC-Resonance path in this
method can be described by the following equation [9]
஼ ௧
‫ܫ‬ଶ ൌ ‫ܿܧ‬ට ݁ ିఈ௧ ‫݊݅ݏ‬ (4)
௅ ξ௅஼

ܼ௚ ൌ ͸ͲͲ‫ Ͳݐ‬൏ ‫ ݐ‬൏ ͲǤͲͺ͵‫݀݊݋ܿ݁ݏ‬ (3)

Where Zg is the gap length between the two electrodes. It

has been considered that it takes 5 cycles (in 60Hz system) for
the electrodes to completely separate from each other.
While an 80 kV DC source is supplying a 106.67 ohms
load through a DC cable with R=25 Ÿ and L=0.075 H, a
normal AC breaker opens the circuit and since there is no zero
crossing in the current, a steady state DC arc will be achieved. Fig. 3. Schematic of the mechanical resonance DC circuit breaker.
Fig. 2 shows the steady state DC arc voltage in the mentioned


 Where EC is the initial voltage of the capacitor, C is the
capacitance of the capacitor, L is the inductance of the
inductor, t is time and Į is a constant and I2 is the current
through the LC-resonance path.
In order to extinguish the dc current with pre-charging
method, the following 2 requirements needs to be fulfilled [9].
஼
‫ܫ‬௠௔௫ ൏ ‫ܿܧ‬ට (5)
௅

ௗ௜ Fig. 4. DC current (A) in the main path of mechanical resonance dc

൏ߚ (6)
ௗ௧ circuit breaker.
Where Imax is the maximum DC current that can be Fig. 5. Arc voltage (V).
interrupted by the breaker. ߚis a constant depending on the
ௗ௜ The value for L is 0.05 μH and the value for C is 0.1 farads.
mechanical breaker characteristics, if exceeds from this
ௗ௧ Fig. 4 and Fig. 5 show the DC current in the main path and the
value, breaker may fail to operate. arc voltage respectively.
The current slope can be presented approximately with the B. Full Solid State Circuit Breaker
following equation:
Fig. 6 shows the circuit breaker using fully solid state
ௗ௜ ா೎ devices. Here no artificial zero crossing arrangement is used.
̱ሺͲǤ͸ െ ͲǤ͹ሻ (7)
ௗ௧ ௅ The solid state devices are turned off as soon as any fault is
Equation (7) shows that increasing the initial voltage of the
capacitor, will increase the capability of the breaker in
interrupting higher DC currents. However, increasing EC will
increase the current slope. In order to keep the current slope
constant, L needs to be increased. On the other hand, increase
in L, reduces the oscillating frequency which means that higher
time will be needed for the breaker to interrupt the current. So
it can be concluded that the higher the breakable current, the
slower the breaker interrupting the current.
In the non-charging method, the capacitor is connected in
parallel with the mechanical breaker through a switch. detected. Therefore, the current has to find path through the
Whenever the arc voltage of the interrupter reaches to a certain surge arrestors and hence the current dies down to zero after a
value, the switch will be closed. The maximum dc current that few microseconds. The energy stored in the line inductances is
can be interrupted with this method is shown in the in the dissipated in the surge arrestors. Under normal operation the
following equation [9] entire load current flows through the semiconductor devices
஼ (diodes and IGBTs in series). The line current is to be
‫ܫ‬௠௔௫ ൏  ܸ௔ ට (8) continuously sensed and when a fault occurs the gating pulse is
௅
made low to turn off the IGBTs. Thus the IGBT switches are
Where Va is the arc voltage at the time of connecting the subjected to a very high blocking voltage. IGBTs and diodes
capacitor. with such ratings tend to have higher on state resistance and
In this method, increase in the maximum breakable current employing these switches in the conduction path results in
can be achieved by choosing a small inductance. Therefore, the higher losses [5].
oscillating frequency will also increase by increase in the The test system is similar to the test system for Mechanical
maximum breakable current. This characteristic, makes the Resonance DC Circuit Breaker and the current limit is set at
non-charging method the superior method for interrupting high 2 kA. The response time with this configuration in order to cut
DC currents. Therefore, the non-charging method has been off the fault is under 2 milliseconds as shown in Fig.7. Also the
used in the models presented in this paper. voltage surge is significant.
The test system is an 80 kV voltage source that supplies a
106.67 ohms load through a cable with resistance of 25 ohms
and inductance of 0.07 H. A line to ground dc fault occurs at
0.1 second, as soon as the dc current reaches to the two times
of the rated current, fault is detected and the interrupter will be
opened. Whenever the arc voltage reaches to a certain value, 50
volts in our case, the series resonance LC circuit connects in
parallel with the interrupter to extinguish the arc by creating
zero current crossing. Fig. 6. Schematic of the full solid state circuit breaker.


 Fig. 7. Current though the main path during the line to ground fault
(full solid state breaker).
Fig. 8. Voltage across the main path during the line to ground fault
(full solid state breaker).
C. Hybrid Solid State Circuit Breaker with Fast Mechanical
Switch
The structure of Hybrid Solid State Circuit Breaker with
Fast Mechanical Switch is shown in Fig. 9. Under normal
operation the entire load current flows through the fast
mechanical switch, while the upper semiconductor devices stay
off. When a fault happens, the fast mechanical switch is opened
and the upper semiconductor devices are turned on
simultaneously. Thus the upper IGBT switches and diodes are
subjected to a very high blocking voltage, while the mechanical
switch with negligible contact resistance carries the load
current under normal conditions. Thereby in comparison with
topology B, this topology results in a more efficient DC CB
system [10].
Fig. 9. Schematic of the hybrid Solid State Circuit Breaker with fast
mechanical switch.
Fig. 10. Current though the main path during the line to ground fault
(hybrid breaker with fast mechanical switch).

Fig. 11. Voltage across the main path during the line to ground (hybrid
breaker with fast mechanical switch).
The test system is similar to the test system for Mechanical
Resonance DC Circuit Breaker and the current limit is set at
2 kA. The response time with this topology in order to cut off
the fault is about 3 milliseconds as shown in Fig. 10.
D. Hybrid Solid State Circuit Breaker with Mechanical Dis-
connector
Fig. 12 shows the structure of the hybrid solid state circuit
breaker with mechanical dis-connector. Under normal
operation the entire load current flows through the
semiconductor devices in series with the mechanical switch,
while the lower devices stay off. When a fault occurs, the lower
semiconductor devices are turned on and the IGBTs in series
with mechanical dis-connector turned off with a short delay,
followed by the switching of the mechanical dis-connector.
Thus the lower IGBT switches and diodes are subjected to a
very high blocking voltage, while the upper switches that carry
the load current under normal conditions are protected from the
voltage surge owing to the opening of the mechanical switch.
Thereby in comparison with the full solid state circuit breaker,
this topology results in a more efficient DC CB system [11].
The test system is similar to the test system for Mechanical
Resonance DC Circuit Breaker and the current limit is set at
2 kA. The response time with this topology in order to cut off
the fault is about 5 milliseconds as shown in Fig. 13.
Fig. 12. Schematic of the hybrid Solid State Circuit Breaker with
mechanical dis-connector.
Fig. 13. Current though the main path during the line to ground fault
(hybrid breaker with mechanical dis-connector).

 Fig. 14. Voltage across the main path duringg the line to ground
fault (hybrid breaker with mechanical dis--connector).
III. DC CBS PERFORMANCE UNDER LINE TO
T GROUND FAULT
IN A 9 MODULE 2 TERMIANAL DC SYSTEM
When it comes to selecting a DC circcuit breaker for a Fig. 15. MTDC System Used for evaluating the performance of the
specific application, parameters like efficienncy, size, costs and breakers inn the RTDS.
the time required by the breaker to interrupt the current should
be taken into consideration. In order to makee our four depicted
configurations comparable, these configuratioons are modeled in
the Real Time Digital Simulator (RTDS) annd the performance
of each breaker has been evaluated in the liine to ground fault
condition.
The RTDS Simulator is designed speciffically to simulate
electrical power systems and to test physicaal equipment such
as control and protection devices [12], [13]. A 9 module/2
terminal DC system with the overhead trannsmission line was Fig. 16. Detailed model of thee MTDC system used for modeling
selected for testing the depicted DC circuit breakers
b in RTDS. the breakerrs in RTDS.
The specification of this MTDC system, its configuration and
the placement of the breakers are shown in thhe Table. I, Fig. 15
and Fig.16 respectively.
When a DC fault happens, two breakers shown in Fig. 16,
isolate the converters from the fault, then thee capacitors will be
discharged in the transmission line (mode I). After that, the
energy in the inductances is discharged whiich is called mode
II. The performance of the mentioned breakker configurations
during a line to ground DC fault are presentedd in the following.
Fig. 17. Current in the mainn path (mechanical resonance DC
A. Mechanical Resonance DC Circuit Breakker breaaker).
The configuration of this breaker was shownn in Fig. 3. Current
in the main path of the breaker and currentt in the series LC
resonance path during the normal operatioon of the MTDC
system and during the line to ground fault coondition are shown
in Fig. 17 and Fig. 18 respectively.

TABLE I. MTDC SYSTEM SPECIFIC

CATIONS.

Terminal Phase-a voltage (V) Va1 3000

Nominal frequency (Hz) fs 60 Fig. 18. Current in the series LC resonance path (mechanical
resonance DCD breaker).
AC system inductance (mH) Ls 0.437
AC system resistance (Ÿ) Rs 0.0149
B. Full Solid State Circuit Breeaker
The configuration of this breaaker was shown in Fig. 6. The
Terminal DC link voltage(kV) VDC 9
breaker has been implemented in the MTDC discussed above.
Submodule capacitor (mF) CDC 10 Current through the breakers beefore the fault, after the fault and
DC side inductor (mH) LDC 1.8 after the operation of the breakker have been shown in Fig. 19.
Switching frequency (Hz) fs 540 Moreover, current of the transm
mission line the fault is shown in


 Fig. 19. Current of the breakers (full solid state breaker).
Fig. 20. Transmission line current before the fault and during Mode I
and Mode II (full solid state breaker).
C. Hybrid Solid State Circuit Breaker with Fast Mechanical
Switch
Configuration of this breaker was shown in Fig. 9. The
breaker has been implemented in the MTDC discussed above.
Current through the breakers in both main path and the
commutation path before the fault, after the fault and after the
operation of the breaker are presented in Fig. 21 Moreover,
current of the transmission line during the fault is shown in Fig.
22. Capacitors and inductances discharge mode were
highlighted on the figure.
Fig. 21. Current of the main path and the commutation path (hybrid
breaker with fast mechanical switch).
Fig. 22. Transmission line current before the fault and during Mode I
and Mode II (hybrid breaker with fast mechanical switch).

D. Hybrid Solid State Circuit Breaker with Mechanical
Disconnector
Configuration of this breaker was shown in Fig. 12. The
breaker has been implemented in the MTDC discussed above.
Current through the breakers in both main path and the
commutation path before the fault, after the fault and after the
operation of the breaker are presented in Fig. 21 Moreover,
current of the transmission line during the fault is shown in Fig.
22. Capacitors and inductances discharge mode were
highlighted on the figure.
IV. COMPARISON OF THE FOUR CONFIGURATIONS
From the simulation results and [5], [6], [9], [10], [11],
[14], [15] the four evaluated DC circuit breakers are compared
in terms of the time required by the breakers to interrupt the
current, maximum DC breaking current, rated voltage,
efficiencies and current state of development Table II shows
the results from this comparison.
V. CONCLUSION
DC circuit breakers can be divided into three main groups.
These three groups and their basic characteristics are shown in
the Table III. In this paper, one configuration from the first
group, two configurations from the second group and one
configuration from the third group have been evaluated. Each
configuration has its own advantages and disadvantages. For
example one has the capability to interrupt the current in a
short time while it has high conduction losses and another one
has low conduction losses but is not as fast as the first one.
Therefore, depending on
Fig. 23. Current of the main path and the commutation path.
Fig. 24. Transmission line current before the fault and during Mode I
and Mode II.
 TABLE II. SUMMARY AND COMMENTS ON THE EVALUATED DC CIRCUIT BREAKERS
Configuration Full SSCB Hybrid +Mech Dis-connector Hybrid + Fast Mech Switch Mechanical LC Breaker

Expected interruption <1 milliseconds <2 milliseconds <5-30 milliseconds <60 milliseconds
time
Required times for <0.1ms for commutation <0.2ms for commutation ~20ms for contact separation ~20ms for contact separation
(conventional AC circuit breaker) and current zero creation
1- Commutation ~1ms for energy <1ms for dis-connector
absorption opening ~1-5ms for magnetically driven ~30ms for passive resonance
2- Energy absorption UFS (Ultra –Fast Switch) with
~1ms for energy absorption opening speed >20m/s ~2ms for active resonance

Maximum rated voltage <800kV (same as voltage <120kV verified by test (up to AC circuit breakers >650kV <500kV available
level) 320kV achievable) Ultra-Fast Switches <12kV

Maximum DC breaking <5kA expected <9kA experimentally proven <6-12kA (estimated) <up to 4kA proven in
current (up to 16kA expected) operation
Expected power loss in <30% (large forward <1% (only few IGBTs in series <0.001% (metal contacts) <0.001% (metal contacts)
comparison to a VSC voltage due to serial in the main path)
converter station connection of solid state
devices)
-not yet build for HVDC -working principle proven -not yet available -applied in CSC HVDC
Current state of -development of VSC and -type test and interruption test -slow AC breakers available -also used as MRTB (Metal
development CSC boosts technology as with downscaled breaker -UFS not yet available Return Transfer Breaker)
components are alike passed
the selected HVDC technologies, the research on HVDC CB, [4] H. Vahedi, S. Rahmani, K. Al-Haddad, "Pinned Mid-Points
focuses on a particular individual aspects [6]. It means that Multilevel Inverter (PMP): Three-Phase Topology with High Voltage
Levels and One Bidirectional Switch”, IECON 2013-39th Annual
the requirements of a HVDC circuit breaker are set by the Conference on IEEE Industrial Electronics Society, Austria, 2013, pp.
system control activities and the breaker needs to be 100-105.
designed based on those requirements. [5] C. Meyer, M. Kowal, and R. W. De Doncker, “Circuit breaker
concepts for future high-power DC-applications,” in 40thConf. Rec.
TABLE III. CHARACTERISTIC OF THE THREE MAIN GROUPS OF DC IEEE IAS Annu. Meeting, Hong Kong, Oct. 2005, pp. 860–866.
CBS. [6] Christian M.Franck, “HVDC Circuit Breakers: A Review Identifying
Group Mechanical Hybrid DC CB Solid-State DC CB Future Research Needs” IEEE transaction on power delivery., vol. 26,
DC CB no. 2, April. 2011.
[7] Fabian M. Uriarte, A. L. Gattozzi John D. Herbst, Hunter B. Estes,
Characteristics Thomas J. Hotz, Alexis Kwasinski Robert E. Hebner, “A DC Arc
Response time 20~60 20~60 5~1000 Model for Series Faults in Low Voltage Microgrids” in IEEE
milliseconds milliseconds microseconds
TRANSACTIONS ON SMART GRID, VOL. 3, NO. 4,
voltage/current Full V/I range Limited V/I Limited V/I range
range range
DECEMBER 2012.
Arc Arc generates No Arc No Arc [8] Ammerman, R. F., Gammon, T., Sen, P.K., and Nelson, J.P., “DC arc
Maintenance No maintenance No maintenance
models and incident energy calculations”, IEEE Transactions on
Maintenance
needed needed needed Industry Applications, Vol. 46, No. 5, Sept/Oct 2010, pages 1810-
Losses Very low Low losses High conduction 1819
losses losses [9] S Tokuyama, H Sugawara - US Patent 4,216,513, 1980.
[10] Jean-Marc Meyer, Alfred Rufer. “A DC Hybrid CircuitBreaker with
ACKNOWLEDGMENT Ultra-Fast Contact Opening and Integrated Gate-Commutated
Thyristors (IGCTs)”. IEEE Trans on Power Delivery, Vol. 21, No. 2,
This Work made use of ERC shared facilities supported April 2006, pp: 646-651.
by the National Science Foundation under Award Number
[11] M. Callavik, A. Blomberg, J. Häfner, and B. Jacobson, “The hybrid
EEC-08212121. HVDC breaker,” ABB Grid Systems Technical Paper, Nov. 2012.
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