Signa Excite HD 1 - 5t

Technical
Publications
Direction 5133310
Revision 1
SignaR EXCITE HD 1.5T

(Release 12.x)
Block Diagrams &
Supplemental Schematics
Copyrighte 2004 by General Electric Company, Inc.

All Rights Reserved
Operating Documentation
DAMAGE IN TRANSPORTATION
All packages should be closely examined at time of delivery. If damage is apparent, have
notation “damage in shipment” written on all copies of the freight or express bill before
delivery is accepted or “signed for” by a General Electric representative or a hospital
receiving agent. Whether noted or concealed, damage MUST be reported to the carrier
immediately upon discovery, or in any event, within 14 days after receipt, and the contents
and containers held for inspection by the carrier. A transportation company will not pay a
claim for damage if an inspection is not requested within this 14 day period.
File a report with
D Call 1–800–548–3366 and use option 8.

http://data.supportcentral.ge.com/upload/15325/doc_324531.doc
D Fill out a report on http://3.28.216.127/sctq/InstallFulfill/IFHome.htm
D Contact your local service coordinator for more information on this process.
Rev. 08/15/2003

!"" #$% &
'
(' ) * " '+ ,+ - '+.

/ +0 $1

-+ " 2+ - *"" !1 34 &5
GE MEDICAL SYSTEMS LANGUAGE POLICY FOR SERVICE DOCUMENTATION
REV 1 DIRECTION 2128126
D THIS SERVICE MANUAL IS AVAILABLE IN ENGLISH ONLY.

WARNING D IF A CUSTOMER’S SERVICE PROVIDER REQUIRES A LANGUAGE OTHER
THAN ENGLISH, IT IS THE CUSTOMER’S RESPONSIBILITY TO PROVIDE
TRANSLATION SERVICES.
D DO NOT ATTEMPT TO SERVICE THE EQUIPMENT UNLESS THIS SERVICE
MANUAL HAS BEEN CONSULTED AND IS UNDERSTOOD.
D FAILURE TO HEED THIS WARNING MAY RESULT IN INJURY TO THE SERVICE
PROVIDER, OPERATOR OR PATIENT FROM ELECTRIC SHOCK, MECHANICAL
OR OTHER HAZARDS.
D CE MANUEL DE MAINTENANCE N’EST DISPONIBLE QU’EN ANGLAIS.

AVERTISSEMENT D SI LE TECHNICIEN DU CLIENT A BESOIN DE CE MANUEL DANS UNE AUTRE
LANGUE QUE L’ANGLAIS, C’EST AU CLIENT QU’IL INCOMBE DE LE FAIRE
TRADUIRE.
D NE PAS TENTER D’INTERVENTION SUR LES ÉQUIPEMENTS TANT QUE LE
MANUEL SERVICE N’A PAS ÉTÉ CONSULTÉ ET COMPRIS.
D LE NON-RESPECT DE CET AVERTISSEMENT PEUT ENTRAÎNER CHEZ LE
TECHNICIEN, L’OPÉRATEUR OU LE PATIENT DES BLESSURES DUES À DES
DANGERS ÉLECTRIQUES, MÉCANIQUES OU AUTRES.
D DIESES KUNDENDIENST–HANDBUCH EXISTIERT NUR IN

ENGLISCHER SPRACHE.
WARNUNG
D FALLS EIN FREMDER KUNDENDIENST EINE ANDERE SPRACHE BENÖTIGT,
IST ES AUFGABE DES KUNDEN FÜR EINE ENTSPRECHENDE ÜBERSETZUNG
ZU SORGEN.
D VERSUCHEN SIE NICHT, DAS GERÄT ZU REPARIEREN, BEVOR DIESES
KUNDENDIENST–HANDBUCH ZU RATE GEZOGEN UND VERSTANDEN
WURDE.
D WIRD DIESE WARNUNG NICHT BEACHTET, SO KANN ES ZU VERLETZUNGEN
DES KUNDENDIENSTTECHNIKERS, DES BEDIENERS ODER DES PATIENTEN
DURCH ELEKTRISCHE SCHLÄGE, MECHANISCHE ODER SONSTIGE
GEFAHREN KOMMEN.
D ESTE MANUAL DE SERVICIO SÓLO EXISTE EN INGLÉS.

AVISO D SI ALGÚN PROVEEDOR DE SERVICIOS AJENO A GEMS SOLICITA UN IDIOMA
QUE NO SEA EL INGLÉS, ES RESPONSABILIDAD DEL CLIENTE OFRECER UN
SERVICIO DE TRADUCCIÓN.
D NO SE DEBERÁ DAR SERVICIO TÉCNICO AL EQUIPO, SIN HABER
CONSULTADO Y COMPRENDIDO ESTE MANUAL DE SERVICIO.
D LA NO OBSERVANCIA DEL PRESENTE AVISO PUEDE DAR LUGAR A QUE EL
PROVEEDOR DE SERVICIOS, EL OPERADOR O EL PACIENTE SUFRAN
LESIONES PROVOCADAS POR CAUSAS ELÉCTRICAS, MECÁNICAS O DE OTRA
NATURALEZA.
1 of 2
GE MEDICAL SYSTEMS LANGUAGE POLICY FOR SERVICE DOCUMENTATION
D ESTE MANUAL DE ASSISTÊNCIA TÉCNICA SÓ SE ENCONTRA

DISPONÍVEL EM INGLÊS.
ATENÇÃO
D SE QUALQUER OUTRO SERVIÇO DE ASSISTÊNCIA TÉCNICA, QUE NÃO A
GEMS, SOLICITAR ESTES MANUAIS NOUTRO IDIOMA, É DA
RESPONSABILIDADE DO CLIENTE FORNECER OS SERVIÇOS DE TRADUÇÃO.
D NÃO TENTE REPARAR O EQUIPAMENTO SEM TER CONSULTADO E

COMPREENDIDO ESTE MANUAL DE ASSISTÊNCIA TÉCNICA.
D O NÃO CUMPRIMENTO DESTE AVISO PODE POR EM PERIGO A SEGURANÇA

DO TÉCNICO, OPERADOR OU PACIENTE DEVIDO A‘ CHOQUES ELÉTRICOS,
MECÂNICOS OU OUTROS.
D IL PRESENTE MANUALE DI MANUTENZIONE È DISPONIBILE

SOLTANTO IN INGLESE.
AVVERTENZA
D SE UN ADDETTO ALLA MANUTENZIONE ESTERNO ALLA GEMS RICHIEDE IL
MANUALE IN UNA LINGUA DIVERSA, IL CLIENTE È TENUTO A PROVVEDERE
DIRETTAMENTE ALLA TRADUZIONE.
D SI PROCEDA ALLA MANUTENZIONE DELL’APPARECCHIATURA SOLO DOPO

AVER CONSULTATO IL PRESENTE MANUALE ED AVERNE COMPRESO IL
CONTENUTO.
D NON TENERE CONTO DELLA PRESENTE AVVERTENZA POTREBBE FAR

COMPIERE OPERAZIONI DA CUI DERIVINO LESIONI ALL’ADDETTO ALLA
MANUTENZIONE, ALL’UTILIZZATORE ED AL PAZIENTE PER
FOLGORAZIONE ELETTRICA, PER URTI MECCANICI OD ALTRI RISCHI.
2 of 2
SIGNA 1.5T EXCITE RELEASE 12.x
GE MEDICAL SYSTEMS BLOCK DIAGRAMS & SUPPLEMENTAL SCHEMATICS
REVISION HISTORY
REV DATE PRIMARY REASON FOR CHANGE

1. . . . . . Sep 29, 2004 Initial Release
LIST OF EFFECTIVE PAGES
PAGE REV PAGE REV PAGE REV PAGE REV PAGE REV
Title Page . . . . . . . . . . 1 2–1 . . . . . . . . . . . . . . . . 1 PATIENT HANDLING PDU COOLING SYSTEM
GE Logo Page . . . . . . – 3–1 to 3–6 . . . . . . . . . . 1 Tab MR405 . . . . . . . . . – Tab MR406 . . . . . . . . . – Tab 2308173 . . . . . . . . –
2128126 . . . . . . . . . . . 1* SYSTEM 1–1 to 1–7 . . . . . . . . . . 1 i...................1 i...................1
A ..................1 Tab MR364 . . . . . . . . . – 2–1 to 2–4 . . . . . . . . . . 5 1–1 to 1–2 . . . . . . . . . . 1
i...................1 1–1 to 1–7 . . . . . . . . . . 1 MGD/RRF/RF
OVERVIEW OPERATOR Tab MR451 . . . . . . . . . –
Tab MR367 . . . . . . . . . – WORKSPACE GRADIENT i...................1
i...................1 Tab 2158195 . . . . . . . . – Tab MR418 . . . . . . . . . – 1–1 to 1–22 . . . . . . . . . 1
1–1 . . . . . . . . . . . . . . . . 1 1–1 to 1–2 . . . . . . . . . . 1 1–1 to 1–3 . . . . . . . . . . 1 2–1 to 2–12 . . . . . . . . . 1
This revision number/letter corresponds to the indicated document’s revision control system.
A
CONTENTS
OVERVIEW
Purpose
Standard Conventions
Abbreviations
SYSTEM
System Block Diagrams
OPERATOR WORKSPACE
Operator Workspace Block Diagrams
PATIENT HANDLING
Patient Handling Block Diagrams
GRADIENT
Gradient Block Diagrams (HFD & ACGD)
PDU
PDU Block Diagrams
Note:
Phoenix PDU found in Vendor Manuals only. (SEE Service Methods CDROM)
MGD/RRF/RF (1.5T)
MGD/RRF/RF Block Diagrams (1.5T)
RF Supplemental Schematics (1.5T)
COOLING SYSTEM
Water Chillers Block Diagrams
Note:
For all Chillers and Cooling System variations (SEE Vendor Manuals on MR Service Methods CDROM)
i
OVERVIEW
TABLE OF CONTENTS
SECTION PAGE
1 – PURPOSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1
2 – STANDARD CONVENTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
3 – ABBREVIATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1
i OVERVIEW
SECTION 1 – PURPOSE
The purpose of this document is to provide an overview of the hardware which makes up the MR Signa System, and a
quick means to troubleshoot major signals within the system.
It is recommended that you page through this manual to become familiar with its content and organization, beginning
with System Tab, OVERALL SYSTEM. This section shows how the major subsystems are grouped by cabinet, and
the main communication lines between them.
The remaining block diagrams are organized into sections which correspond to major subsystems. Some diagrams
show hardware from another subsystem in order to complete an entire signal flow route. For such exceptions, the
board/module title of the circuitry shown will generally help identify the applicable subsystem. See Illustration 1–1 for
tab organization of this manual.
COOLING SYSTEM
PDU MGD/RRF/RF
PATIENT HANDLING GRADIENT
SYSTEM OPERATOR WORKSPACE
OVERVIEW
TAB ORGANIZATION FOR THIS DIRECTION

ILLUSTRATION 1
These block diagrams, along with provided diagnostics, are intended to be the primary tools for troubleshooting the
MR System from a system or subsystem level on down to the specific module or board level. Since some of the RF
subsystem block diagrams are presently insufficient for troubleshooting to the FRU (Field Replaceable Unit) level,
schematics have been provided to supplement those block diagrams. When using the diagnostics, the block
diagrams can provide a better understanding of what circuitry the diagnostics are testing, and how to further isolate a
problem if required.
1–1 OVERVIEW
SECTION 2 – STANDARD CONVENTIONS
The following standard conventions are used within the block diagrams:
D The type of line used to enclose a major box on a block diagram indicates the following:
CABINET
BOLD, DASHED MODULE or INTERFACE

Line
CIRCUIT BOARD
DOUBLE Line
PIGGYBACK BOARD
(Circuit Board mounted on
another Circuit Board)
BOLD, SOLID
Line
DASHED Line
D The component designator for cabinets, modules, circuit boards, etc. is enclosed in “( )” after or below their
name on the block diagram.
D Logic levels: A “0” indicates a logic “low” level (typ. <0.8VDC), a “1” indicates a logic “high” level (typ. >
2.0VDC).
D An “*” is used to identify an “active low” signal (e.g. “INT*” signal when at a logic “0” indicates that an
interrupt is present; a logic “1” level indicates that no interrupt is present).
9
D A “#/” indicates the number of wires in a cable (e.g. indactes 9 wires).
D Signal flow is generally from left to right on a block diagram. Arrows are used to identify exceptions to this
rule and to aid in identifying input/output signal lines on the diagram.
D The “x” symbol (e.g. –––x) shown on boxes in a block diagram are used to indicate that the function within
the box is enabled by the “active” signal on this input line.
+24V SETIND
K42
TEMPEXTREME
For this example, when signal TEMPEXTREME goes active (“1”), relay K42 will close (become enabled)
and the signal SETIND now becomes active to set a temperature indicator.
2–1 OVERVIEW
SECTION 3 – ABBREVIATIONS
Note
This list has been compiled from a wide variety of sources. Not all of these abbreviations will apply to
your system. For an electronic copy of over 1000 acronyms, see Direction 2124201–2.
A BB = Buffered Data or Broadband

AC = Alternating Current BC = Body Coil
ACGD = Advanced Concept Gradient Driver BD = Board
ACK = Acknowledge BDS = Buffered Data Strobe
ACQ = Acquisition BLK = Black
A/D = Analog–to–Digital BNC = BNC Connector
ADC = Analog to Digital Converter BRM = Body Resonance Module
ADD or ADDR = Address BRT = Brightness
ADJ = Adjust BUF = Buffer
ADV = Advance B/W = BandWidth
AGC = Automatic Gain Control
AGP = Applications Gateway Processor (Board) C
AI = Applications Interface, Artificial Intelligence C = centigrade, Celsius
ALGN = Align CAB = Cabinet
ALU = Arithmetic Logic Unit CAL = Calibration
AM = Amplitude Modulation CALC = Calculate
AMP = ampere, amplifier CAN = Controller Area Network
A/N = Alpha–numeric CATTEN = Course Attenuation
ANSI = American National Standards Institute CB = Circuit Breaker
ANT = Antenna CCC = CAN Core Controller card
AP = Array Processor CCW = Counter Clockwise
APM = Analog Power Monitor CD–ROM = Compact Disk Read–Only Memory
APS = Auto Pre–Scan or Acquisition Processing CE = Chip Enable
System (Board) CF = Center Frequency
APSGT = Auto Pre–Scan Gain Control CFA = Center Frequency Adjust
ARCH = Archive/Remove Process CHAN or CHNL = Channel
ASC = Automated Support Center or CHK = Check
Amplifier Support Controller CKT = Circuit
ASCII = American Standard Code for Information CLR = Clear
Interchange CMD = Command
ASM or ASSY = Assembly CMMR = Common Mode Rejection Ratio
ASM = Analog Service Module CMOS = Complimentary Symmetry Metal Oxide
ATTEN = Attenuator Semiconductor
AUTO = Automatic CMP = Compare or Compressor
AUX = Auxiliary CNT = Contrast
COAX = Coaxial
B COF = Cut Off Frequency
B = magnetic field CONFIG = Configuration
BATT = Battery CONT = Continuous
3–1 OVERVIEW
CONV = Converter E
CPD = Communication Pin Driver ECC = Extended Cursor Control or Error Checking and
CPU = Central Processing Unit Correction
CRT = Cathode–Ray Tube ECG = Electro–Cardiogram
CTL = Clock Time Control EEPROM = Electrically Erasable Programmable Read
CTRL = Control Only Memory
CV = Configuration Variable EFB = Envelop Feedback
CW = Clockwise or Controller Wave EPI = Echo Planer Imaging
CYL = Cylinder e.g. = for example
EM or EMERG = Emergency
EMI = Electro–Magnetic Interference
D EN or ENA = Enable
D/A = Digital–to–Analog ENV = Envelope
DAC = Digital to Analog Converter EOS = End Of Sequence
dB = Decibel EOT = End Of Travel
dBm = Decibels above or below one Milliwatt EOW = End Of Waveform
DC = Direct Current EPO = Emergency Power Off
DCB = Driver Control Board EPROM = Erasable Programmable Read Only
DCKSTP = Dock Stop Memory
DD = Dynamic Disable ERU = Emergency Rundown Unit
EXER = Exerciser
DDS = Direct Digital Synthesizer
DDSB = Dynamic Disable Switch Box F
DEC = Decimal f = farad
DEG = Degree(s) F = Fahrenheit, Fuse (designator)
DEMUX = Demultiplexer FBD = Functional Block Diagram
DEV = device FBK = Feedback
DIA = Diagnostic Imaging Accessories FC = footcandle
DIAG = Diagnostic Fc = Center Frequency
DIFF = Differential FDBK = Feedback
DIG = Digit FDO = Future Delivery Order
Dig B0 = Digital B0 Adjustment FE = Field Engineer
DIP = Dual In–line Package FET = Field–Effect Transistor
DIR = Direction FF or FIFO = First In – First Out
DIS = Disable FFD = Full Field Distortion
FFT = Fast Fourier Transform
DM = Driver Module
FID = Free Induction Decay
DMA = Direct Memory Access
FIDAT = FIFO In Data
DMAC = Direct Memory Access Controller
FIFO or FF = First In – First Out
DMM = Digital Multi–Meter
FILT = Filter
DPR or DPRAM = Dual Port Random Access Memory
FM = Frequency Modulated
DQA = Daily Quality Assurance FMI = Field Modification Instruction
DRAM = Dynamic Random Access Memory FOV = Field Of View
DRC = Dynamic Ram Controller FREQ = Frequency
DRF = Digital Receive Filter (Board) FRNT = Front
DRVR = Driver FRU = Field Replaceable Unit
DSP = Digital Signal Processor ft = foot
DVM = Digital Volt Meter FT = Feet
DWG = Drawing FTP = File Transfer Protocol
3–2 OVERVIEW
G INT or INTR = Interrupt

G = gauss I/O = Input/Output
G/A = Gradient Amplifier IP = Image Processor or Plate Current (RF amp) or
GEN = Generator Instruction Processor or Internet Protocol
GND = Ground IPA = Intermediate Power Amplifier
GOC AA = Global Operator Console Audio Assembly IPC = Interprocess Communication
GRAD = Gradient IQ = Image Quality
GRN = Green IRF = Interface and Remote Functions (Board)
GRY = Grey IRF I/O = Interface and Remote Functions
GP = Gradient Processor Input/Output (Board)
GSW = Gradient Switch IRQ = Interrupt Request
ISA = Interrupt Start Address
H ISI = Inter–Sequence Interrupt
H = henry ISO = Isolator or Isolation
H = Hexadecimal IT–MGD = Image Transfer–MDG (Board)
HC = Head Coil IT–Host = Image Transfer–Host (Board)
HD = Head IVI = Interactive Vascular Imaging
He = Helium
He–ALARM = Helium Alarm J
HEX = Hexadecimal J = Jack Connector (designator)
He–WARNING = Helium Warning JP = Jumper
HFA = High Fidelity Amplifier
HFD = High Fidelity Driver K
HORIZ or HORZ = Horizontal K = Kelvin (unit of temperature) or Kilo (Thousand)
HPC = Hardware and Protocol Control KB = one thousand bytes of memory
HPFS = Host Platform Software KCal = kiloCalorie
hr = hour kg = kilogram
HSN = High Speed Network kHz = kilohertz
HSS (D) = High Speed Serial Data Link KVA = kilo Volt Amperes
HTR = Heater kW = Kilowatt
HV = High Voltage
HV PSU = High Voltage Power Supply Unit L
HVAC = Heating, Ventilation, & Air Conditioning L or LFT = Left
Hz = hertz LAN = Local Area Network
lb = pound
I LBK = Loopback
I = Current or Phase or Real LCA = Logic Cell Arrays
IAMP = Amplifier Current (Gradient) LED = Light Emitting Diode
ICD = Installation Certification Document LFC = Load From Cold
ICL = Coil Overcurrent (Gradient) LHe =Liquid Helium
ID = inner diameter LIN = Linear
ID = Identity, Identifier LM or LMK = Landmark
i.e. = that is to say LMP = Lamp
IEC = International Electrical Code LNK = Link
IEEE = Institute of Electrical & Electronics Engineers LPCA = Low Profile Carriage Assembly
I/F = Interface LO = Local Oscillator
in. = inch LOEP = List of Effective Pages
INFO = Information LONG = Longitudinal
INS, INST, or INSTR = Instruction LVLE = Low Voltage, Low Energy
3–3 OVERVIEW
M OPTO = Optical
m = meter ORG = Orange
M = mega – one million OT = Overtemp
mA = millamps OV = Over voltage
MAG = Magnet OVR = Over
MB = megabyte OVRLD or OL = Overload
MC = Multi–Coil oz = ounce
MCD = Multi–Coil switch Driver OW = Operator Workspace
MCR = Multicoil Receive (Tool or Diagnostic)
MDS = Multidrop Serial interface
MEM = Memory P
Mfg. = Manufacturing P = Positive
MFU = Multi–Format Unit PA = Patient or Power Amplifier
MGD = Multi–Generational Data acquisition (Chassis) PAC = Physiological Acquisition Controller
MGMNT = Management PAL = Programmable Array Logic or Patient Alignment
MHz = megahertz Lights
mm = millimeter PAN = Primary Archive Node
MOD = Modifier PAT = Patient
MON = Monitor PCI = Programmable Communications Interface or
MOSFET = Metal Oxide Semiconductor Field Effect Peripheral Component Interconnect
Transistor PCT = Pulse Controller Task
MOV = Metal Oxide Varistor PDI = Product Delivery Instruction
MPS = Manual Pre–Scan
PDU = Power Distribution Unit
MR = Magnetic Resonance
PEN = Penetration
MSG = Message
PHPS = Patient Handling Power Supply
MTR = Motor
PIN = Positive–Intrinsic–Negative
MUX = Multiplexer
PIO = Programmed Input/Output
mV = millivolts
PLL = Phase Lock Loop
MW = megawatt
mW = milliwatt PIXEL = Picture Element
PM = Phase Modulation, or Planned Maintenance
N PMC = PCI Mezzanine Connector
N = Negative P/N = Positive/Negative
N2 = Nitrogen PNL = Panel
n.c. = normally closed POS = Position
NEC = National Electrical Code POT = Potentiometer
Ni–Cad = Nickel Cadmium PP = Penetration Panel
n.o. = normally open PPC = Power PC
NO. = Number P–P = Peak to Peak
NOPROC = No Processing ppm = parts per million
NOREC = No Reconstruction
PREAMP = Preamplifier
nS = Nanosecond
PROC = Process, Processor
O PROG = Program, –ed, –able
O2 = oxygen PROM = Programmable Read Only Memory or
OC = Operator’s Console Program
OD = outside diameter PS = Power Supply
OM = Oxygen Monitor PSD = Pulse Sequence Database
OPI = Oblique Plane Imaging PSG = Pulse Sequence Generator
3–4 OVERVIEW
PSU = Power Supply Unit SAG = Sagittal

PSS = Power Supply System Board SAR = Specific Absorption Rate
PT = Patient Transport or Patient Table S/C = Superconducting
PUR = Purple SCA = Scan Control Assembly
PVC = Polyvinylchloride SCP = Scan Control Processor (Board)
PW = Pulse Width SCR = Silicon Controlled Rectifier
PWA = Printed Wiring Assembly SCSI = Small Computer System Interface
PWB = printed wiring board SEC = second
PWR = Power SEG = Segment
SEL = Select
Q SEPI = Spin Echo Planer Imaging
Q = Quadrature, Quality Factor or Imaginary SGA = Switchable Gradient Amplifier
Qty = Quantity SGI = Silicon Graphics Inc.
QUAD = Quadrature or Quadrant SIG = Signal
SII = “S–2” (type of magnet)
R
SIII = “S–3” (type of magnet)
R or RT = Right
SIMMS = Single In–line Memory Module
RAM = Random Access Memory
SIP = Single In–line Package
RCV = Receive
SL = Slice
RD = Read
SMC = Status Monitoring and Control
RDY = Ready
SMPTE = Society of Motion Picture and Television
RECON = Reconstruction
Engineers
REF = Reference or Reflected
SN = Service Note
REG = Register or Regulator
SNR = Signal–to–Noise Ratio
RET or RTN = Return
SPI = Serial Peripheral Interface
REV = Revision or Reverse
SPT = System Performance Test
RF = Radio Frequency
SPU = Signal Processing Unit
RFAMP = Radio Frequency Amplifier
SRAM = Static Random Access Memory
RFA = RF Amplifier
RFI = Radio Frequency Interference or RF Interface SRF = Solid State RF Amplifier SGA or Scalable RF
(Module) (Cabinet)
RFS = RF System Cabinet SRF/TRF = Sequencer Related Function / Trigger and
RGB = Red Green Blue Rotation Function (Board)
RLA or RLY = Relay SRI = Scan Room Interface
rms = root mean square SRV = Service
ROI = Region of Interest SSM = System Support Module
ROM = Read Only Memory SSP = Sequence Synchronous Protocol
RPC = Remote Control Panel SST = Small Sample Test
RRF = Remote RF (Chassis) STAB = Stability
RRF–DIF = Remote RF–Digital Interface board STAT = Status
RSR = Register STD = Standard
RST = Reset STD DEV = Standard Deviation
R/W = Read/Write STIF Bd = SRF/TRF InterFace Board
RX = Receive SUB–D = Subminiature D (connector)
RXD = Receive Data SW = Switch or Software
S/W = Software
S SYNC = Synchronous
S = Switch (designator) SYS = System
SACK = Slave Acknowledge SYSID = System Identification
3–5 OVERVIEW
T W
T = tesla WARP = Waveform And Rotation Processor
TAC = Twin Accessory Cabinet WC = Water Chiller
TBD = To Be Determined WR = Write
TBL = Table WHT = White
TEMP = Temperature WIM = Workspace Interface Module
TFU = Thyristor Firing Unit WND = Window
TG = Transmit Gain WORM = Write Once Read Many
TGWC = TwinSpeed Gradient Water Cooler WRT = Write
TNS = Transient Noise Suppressor
TP = Test Point (designator)
X
TR or T/R = Transmit–Receive XCVR = Transceiver
TRMAP = Transmit/Receive Map XFMR = Transformer
TRM = Twin Coil Resonator Module XMT or XMIT = Transmit
TS = Terminal Strip Y
TSCC = TwinSpeed Cooling Cabinet
YEL = Yellow
TST = Test
TTL = Transistor to Transistor Logic
TX = Transmit
TXD = Transmit Data
U
UART = Universal Asynchronous Receiver–Transmitter
uf = microfarad
UFI = Ultra Fast Imaging
UNBLK = Unblank
uP = Microprocessor
UPLMT = Up Limit
USART = Universal Synchronous/Asynchronous
Receiver–Transmitter
uS or usec = microsecond
UTNS = Universal Transient Noise Suppressor (Board)
UV = Under voltage
V
VAC = Volts Alternating Current
VAR = Variable
VBUS = Bus Voltage
VCR = Video Cassette Recorder
VCNTRL = Control Voltage for 8645 Techrons
VDC = Volts Direct Current
VERT = Vertical
Vp–p = Volts Peak–to–Peak
VRMS = Volts, Root Mean Square
VTR = Video Tape Recorder
3–6 OVERVIEW
(GOC COMPUTER CABINET) OPERATOR WORKSPACE TABLE

(OW1 A2) (OW1 A1)
PC HOST COMPUTER
(OW1 A15) HOST MONITOR
USB TO GRAPHIC
SERIAL (OW1 A6)
HIGH ORDER SHIM (HOS) USB
(OPTIONAL) CONVERTER
IDE BUS SLOTS
LCD DISPLAY
IDE HDD GRAPHIC (OW1 A3)

FROM RF/SYSTEM CABINET,
IT–MGD SHT 2A OR 2B
CDROM BIT 3

ETHERNET TO/FROM RF/SYSTEM CABINET
FDD ETHERNET SWITCH SHT 2A OR 2B
SCSI DASM VIDEO
(OPTIONAL) CAMERA
T (OW1 A5) SERIAL PORT (OPTION) SCSI TOWER
PHONE LINE MODEM (OW1 A16)
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
TERMINATOR
KEYBOARD/MOUSE KEYBOARD/MOUSE DVD–RW
SECURITY KEY LPT AUX AUDIO AUX OUT

SERIAL PORT

1 TO SUITE NETWORK HUB ETHERNET SCIM
SCIM
(OW1 A20)
GOC AUDIO ASM
(OW1 A21) E–STOP
2 SERVICE PORT AUX INPUT STEREO RACK
(OPTION) MOUSE
(OW1 A8)
MUSIC
J5 MODEM MIB OUT IN–THE–BORE KEYBOARD
AC INPUT J1 DC PS J3 DC +5/+12/–12 (OPTION) (OW1 A7)
(FROM PDU)
POWER STRIP TO SCSI TOWER
J2
AC POWER (OW1 A11) TO HOST MONITOR STEREO SPEAKERS
DISTRIBUTION J4 TO LCD DISPLAY
OC SPEAKER L/R (OW1 A10)
(OW1 A19)
TO OPTION MONITOR 1
TO OPTION MONITOR 2

TO PATIENT ALARM
TO AUDIO SPEAKER
TO DASM NOTES:
TO HUB 1 NETWORK CONNECTION AVAILABLE FOR EXTERNAL
TO MODEM SUITE CONNECTION
TO HOST PC 2 NETWORK CONNECTION AVAILABLE AT FRONT OF
GOC ASSEMBLY FOR THE SERVICE LAPTOP
REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM

FOR ADDITIONAL INFORMATION:
NOTE:
1) PATIENT HANDLING
2) MGD/RRF/RF
NOTE:
Additional Signal/Cabling detail can be found under
Interconnects on the Service Methods CDROM.
EXCITE 12.x OVERALL SYSTEM

Forward Production or Pre–EXCITE Upgrades
(OPERATOR WORKSPACE CABINET/TABLE)
SHEET 1A OF 5


(OW1 A2) (OW1 A1)
PC HOST COMPUTER
USB TO GRAPHIC
SERIAL (OW1 A6)
IDE BUS SLOTS
LCD DISPLAY

FROM
CDROM BIT 3 SYSTEM CAB , IT–MGD SHT 2A OR 2B
TO/FROM
ETHERNET
FDD SYSTEM CAB ETHERNET SWITCH SHT 2A OR 2B
SCSI
(OPTIONAL) DASM VIDEO
T (OW1 A5) CAMERA SCSI TOWER
MODEM SERIAL PORT (OPTION)
PHONE LINE SERIAL 1 (OW1 A16)
(INSITE)
SCSI
SERIAL 2 MOD
TERMINATOR
KEYBOARD/MOUSE DVD–RW
KEYBOARD/MOUSE
SECURITY KEY LPT AUX AUDIO
AUX OUT MOUSE
SCIM (OW1 A8)
SCIM

(OW1 A20)
HUB KEYBOARD
1 TO SUITE NETWORK WIM (OW1 A7)
(OW1 A21) E–STOP

2 SERVICE PORT STEREO SPEAKERS

AUX INPUT STEREO RACK

J5 MODEM (OPTION)
AC INPUT J1 DC PS J3 DC +5/+12/–12
(FROM PDU) MUSIC
POWER STRIP TO SCSI TOWER MIB OUT IN–THE–BORE
J2
AC POWER (OW1 A11) TO HOST MONITOR (OPTION)
(OW1 A19)
TO OPTION MONITOR 1
TO OPTION MONITOR 2
TO PATIENT ALARM
TO AUDIO SPEAKER
TO DASM NOTES:
DUPLEX ASSEMBLY FOR THE SERVICE LAPTOP

NOTE:
1) PATIENT HANDLING
NOTE: 2) MGD/RRF/RF
Additional Signal/Cabling detail can be found under Interconnects on
the Service Methods CDROM.

EXCITE Upgrades
(OPERATOR WORKSPACE CABINET/TABLE)
SHEET 1B OF 5


NOTES:
1
TERM SERVER 1 LHE meter may be present on upgraded systems not equipped

with a Magnet Monitor.
2 J1 not present if this is an RFS Cabinet.
ETHERNET SWITCH
3 Teal PDU. See vendor manual.

4 Optional Resistive Shim Supply (HOS).

5 Present only for systems with TRM Body Coil.

%

6 MDS not installed if HFD Cabinet present.

7 CAN Line connected if HFD Cabinet is present.
%
8 J1 Terminator not installed if HFD Cabinet is present.

"

9 J18 not present and unblank is not used if this is an RFS Cabinet.
$ 10 Can Link cable and terminator not present if a cable is already
AE SHT 3

% connected to the serial port.
$

%"

TO
EITHER

SRFD OR SRFD II
$- % SHT 3

%
6 6

AB SHT 3
, %
%
AC SHT 3
# 6
AD SHT 3
6
()
%

MDS
"!
! FIBER
"! %! RFS CAB OR
AA SRFD OR SRFD II
SHT 3
F/O

CAN LINK 7
SHT 5
GRADIENT CAB

(MR3)
! FAN TWIN ACCESSORY CABINET
$

5 4
(
(TAC) CAN LINK
, 10
SHT 5
6 GP TO/FROM RESISTIVE SHIM
6
OR USB TO SERIAL POWER SUPPLY
T
CONVERTER TO FILTER BOX
& , GP3 SHT 1A OR 1B ON PEN PANEL
%
BOARD SHT 4

! , SHT 4
7 2 3
$&%

HFA or SGA–X R
POWER SUPPLY, # GRADIENT SHT 4
FAN MODULE !( 2 ! 2 SWITCH 3 TO
+ HFA or SGA–Y R PEN
## %+ 8 PANEL
$ SHT 4
2 3 SHT 4
$&'$& *
"! # % HFA or SGA–Z R
%

SGA PS
$
%
VACUUM VACUUM
3 SENSOR GAUGE
VACUUM VACUUM LINE
POWER DISTRIBUTION UNIT REGULATOR TO

PREAMP PWR, (PD1) VACUUM
REAR
7 16 CHANNEL CNTL END BELL
%
& & PUMP SHT 4
$ PD – POWER DISTRIBUTION POWER FOR
!

%
& CONTACTORS
TERM & ALL CABINETS
DRIVER
8
- % AC GRADIENT DRIVER (ACGD) (1.5T)
! + +
DRIVER 9 !
! or
HF DRIVER (HFD) (1.5T)
EXCITE 12.x
– 4 Channel or 8 Channel

!

"
# $


NOTES:
TERM SERVER
1 J18 not present and unblank is not used if this is an RFS Cabinet.
2 J1 not present if this is an RFS Cabinet.
ETHERNET SWITCH
3 Teal PDU. See vendor manual.
4 Optional Shim Supply.

5 Present only for systems with TRM Body Coil.

% 6 MDS not installed if HFD Cabinet present.

7 CAN Line connected if HFD Cabinet is present.
% 8 J1 Terminator not installed if HFD Cabinet is present.

9 Can Link cable and terminator not present if a cable is already

$ "
connected to the serial port.
AE SHT 3

%
$

%"

TO
EITHER

SRFD OR SRFD II
$- % SHT 3

%
6

6 AB SHT 3
, %
%
AC SHT 3
#
6 AD SHT 3
()
%

"!
F/O "!
!%! RFS CAB OR
AA SRFD OR SRFD II
SHT 3

%
. &.- ,
CAN LINK 7
SHT 5
!.-
F/O /
!(.- # - 8 GRADIENT CAB

$

(MR3)
, SWITCH TWIN ACCESSORY CABINET
SHT 4 FAN 4
+- (TAC)

9 CAN LINK
(
! $ SHT 5
, RESISTIVE SHIM
6 GP
TO/FROM
POWER SUPPLY
T
USB TO SERIAL
6 OR CONVERTER TO FILTER BOX
GP3 SHT 1A OR 1B ON PEN PANEL
%
&.+ , BOARD SHT 4
!.+ RF SHT 4
SPLITTER 7 2 3
$&%

HFA or SGA–X R
,
POWER SUPPLY, GRADIENT SHT 4
FAN MODULE 2 3 TO
SWITCH R
!(.+ # HFA or SGA–Y PEN
2 ! PANEL
+ SHT 4
2 3 SHT 4
## R
$&'$& %+ 8 HFA or SGA–Z
* $
"! # %
%
SGA PS
$ 2 VACUUM VACUUM

%
SENSOR GAUGE
3 VACUUM VACUUM LINE
POWER DISTRIBUTION UNIT REGULATOR TO

PREAMP PWR, (PD1) VACUUM
REAR
16 CHANNEL CNTL END BELL
7 %
& & PUMP SHT 4
$ PD – POWER DISTRIBUTION POWER FOR
!

%
& CONTACTORS
TERM & ALL CABINETS
DRIVER
8
- % AC GRADIENT DRIVER (ACGD) (1.5T)
! + +
DRIVER 1 !
! or
HF DRIVER (HFD) (1.5T)
EXCITE 12.x
– 16 Channels

!

"
# $

RFS CABINET (MR2) NOTES:

120VAC POWER DISTRIBUTION 1 See sheet 5 for CAN Link details.
2
TO J2
2 120VAC POWER DISTRIBUTION
120VAC ASC CHASSIS
,
TO J3 2 J2 ASC CHASSIS
1 J3 MGD CHASSIS
2
J4 ETHERNET SWITCH
J5 TERM SERVER
$ SRFD II MODULE POWER FROM PDU J6 OPEN
+ -
BODY RF AND T/R BIAS
J7 RRF CHASSIS
AC DISTRIBUTION B1
CB1 RF SENSE ”B” HEAD RF AND T/R BIAS SHT 4 J8 SERVICE
30 AMPS B2
CB2 RF SENSE ”A” T/R BIAS HEAD J9 OPEN
BLK
φA T/R BIAS BODY
CB1 15A
BWN
φB
RED
CB2 15A RF IN AA DRIVER MODULE
FROM PDU φC SHT 2A OR 2B
AC POWER 1
GRN ISA
G
BLU 120VAC MGD CHASSIS PEN PANEL (PP1)
N CB3
J10 BORE LIGHT
1A LINE CLOCK 1 L SHT 4
120VAC 6.3VAC J5 STIF LONG DRIVE MOTOR
E SHT 4
POWER FROM PDU PHPS MOTOR COMMAND
N1 SHT 4
(SSM CIRCUIT BREAKER) ALIGNMENT LIGHTS
M SHT 4
TO RFS CABINET J24 38.5V DOCK
N2 SHT 4
RF/SYSTEM CABINET (SRFD II) (1.5T)

EXCITE 12.x NEW INSTALLATION

SRFD CABINET (MR1)

SRFD II CABINET (MR1)
AA
RF IN
AA
RF IN SRFD II
RFI MODULE
BODY RF AND T/R BIAS
SYSTEM SUPPORT B1 SHT 4 SYSTEM SUPPORT
MODULE (SSM) HEAD RF AND T/R BIAS
B2 SHT 4
MODULE (SSM)
ANALOG POWER RF SENSE RF OUT RF IN ANALOG POWER RF SENSE BODY RF AND T/R BIAS
B1 SHT 4
MONITOR (APM) BD RF IN RF OUT RF AMP MODULE #1 MONITOR (APM) BD
HEAD RF AND T/R BIAS
UNBLK UNBLK B2 SHT 4
AB %
RF OUT RF IN
AB %

T/R BIAS T/R BIAS
AC ! RF IN RF OUT RF AMP MODULE #2 AC !
SHT 2A OR 2B COMMUNICATIONS SHT 2A OR 2B COMMUNICATIONS
AD %
PIN DRIVER (CPD) BD AD %
PIN DRIVER (CPD) BD
IPS MODULE IPS MODULE

HIGH VOLTAGE BD HIGH VOLTAGE BD
BUCK/H–BRIDGE POWER BUCK/H–BRIDGE POWER

BOARD FROM PDU BOARD FROM PDU
MTR CMD MTR CMD
N1 SHT 4 N1 SHT 4
38.5V DOCK 38.5V DOCK
N2 SHT 4 N2 SHT 4
DOCK/LIGHT LONG MTR DOCK/LIGHT LONG MTR
BOARD E SHT 4 BOARD E SHT 4
ALIGN LIGHT SHT 4 ALIGN LIGHT SHT 4
SHT 2A OR 2B AE M SHT 2A OR 2B AE M
BORE LIGHT SHT 4 BORE LIGHT SHT 4
L L
SCALEABLE RF DRIVER II (SRFD II) (1.5T)

SCALEABLE RF DRIVER (SRFD) (1.5T)
EXCITE 12.x UPGRADE OR EXCITE 12.x UPGRADE
EXCITE 12.x

– New Installation & Upgrade

!

"
# $
$
PENETRATION PANEL MAGNET ENCLOSURE AND REAR PEDESTAL (MG2 & MG3)
(PP1) 1 (SEE NOTE 1)
PNEUMATIC
PATIENT ALERT SQUEEZE
BULB SCAN ROOM I/F (SRI) MODULE MAGNET I/F #1 MODULE
SYSTEM
ALERT
AIR MTR CMD LONG HOME LIMIT SW BD
LINE SHT 3 N1
REMOTE OXYGEN FIBER (3) LONG
OXYGEN MONITOR SENSOR MODULE SRI–3 BD OPTO
(OM1) (OM3) ENCODER
METER LONGITUDINAL
(SEE NOTE 6) (SEE NOTE 6) ENCODER RIGHT/LEFT
CONTROL/DISPLAY E–STOPS
3
SENSOR
CONTROL BD SHT 2A E LONGITUDINAL
ALARM OR 2B MOTOR DRIVE DOCK LIMIT MOD
SHT 3
DOCK ASSEMBLY PATIENT
LIGHT DOCK LIMIT
SW BD UP LIMIT SW TRANSPORT
PEDALS (PT1)
ALARM LIGHT SHT 2A N2 MOTOR (SEE NOTE 1)
OR 2B
SHT 3
TO TAC VACUUM LINE VACUUM LINE REAR END BELL
VACUUM REGULATOR
SHT 2A OR 2B AIR LINES BLOWER BOX
BORE VENT (MG6)
SHT 3 M PATIENT ALIGNMENT LIGHTS
(HALOGEN OR LASER DIODE) PATIENT COMM. BOX
SPEAKER REMOTE
INTERCOM Q SHT 1A OR 1B
SHT 3 L BORE LIGHT FIBER OPTIC BUNDLES BOARD
NOTES:
REPEATER 1 ALL POWER AND SIGNAL LINES ENTERING AND LEAVING
PANEL (SEE NOTE 2)
THE RF ENCLOSURE PASS THROUGH THE PENETRATION
PANEL. FOR EASE OF USE, ON THIS DIAGRAM, THEY ARE
SHT 2A OR 2B D FIBER (3) PHYS ACQ CNTLR (PAC) MOD NOT SHOWN GOING TO THE PENETRATION PANEL.
FIBER OPTIC
REPEATER BELLOWS
TO/FROM STIF SHT 2A OR 2B C BD FIBER (2) 2 S/C SHIM POWER SUPPLY AND S/C SHIM COILS.
IN SYSTEM CAB PAC BD CARDIAC LEADS
SHT 2A OR 2B J PHOTOPLETHYSMOGRAPH
PROBE (OPTIONAL) 3 FOR MOBILE SYSTEMS, SENSOR IS LOCATED IN
CEILING BOX.
BODY QUADRATURE HYBRID ASM 4 ONLY PRESENT WITH TRM COILS.

RF/GRADIENT COIL
SHT 3 B1 SIGNA MR/i AND CV/i SYSTEMS MANUFACTURED AF-
BODY T/R SWITCH DIRECT 5 TER JUNE 15, 2000 HAVE MICROPHONE IN THE HEAD
GRADIENT BODY AND HYBRID DRIVE DISABLE RF BODY COIL CARRIAGE INSTEAD OF THE REAR END BELL.
7 FILTER NOTCH SWITCHES
SHT 2A R TO MUX A1 COIL
OR 2B BOX SHT 2A OR 2B FILTER PREAMP 6
WATER CHILLER TWO WATER LINES (SEE NOTE 3) X, Y, Z GRADIENT COILS
(WC1) TO RF/GRAD COILS (SEE NOTE 3) 7 MR/i AND CV/i FIXED SITE SYSTEMS HAVE NESLAB
WATER CHILLER. MOBILES HAVE E & W HEAT
8 TSCC OR TGWC EXCHANGER.
8 FOR TSCC AND TGWC SEE WATER CHILLER.
LOW PROFILE CARRIAGE ASM 8 QUAD HEAD COIL ASM
SHT 3 B2 RF TRANSMIT
SWITCH MICROPHONE 9 PRESENT IN 16 CHANNEL SYSTEMS ONLY.
SWITCH CNTL SURFACE COILS
HEAD T/R &
HEAD/MC1–MC8 8 PREAMP ASM
EXTREMITY COIL
SHT 2A TO MUX J200 A2 8
OR 2B TO MUX J201 A3 MC9–MC16
16 SPECTROSCOPY COILS
MULTI–COIL (SEE NOTE 5)
CHANNEL ASSEMBLY
SWITCH MC1–MC8
SHT 2A OR 2B V1
MC PREAMP PREAMP POWER & 16 CHAN CNTL (HEAD & MC) (8 PREAMP BDS) REFER TO THE FOLLOWING FUNCTIONAL BLOCK
FROM BIAS ASM DIAGRAM FOR ADDITIONAL INFORMATION:
DRIVER MODULE MULTI COIL
MC DRIVE & LOOPBACK MC1–MC8 ”A” CONNECTOR NOTE:
SHT 2A OR 2B V2 MULTI–COIL 1) PATIENT HANDLING
FILTER MODULE MC9–MC16 50 OHM 2) MGD/RRF/RF
9 ”B” CONNECTOR 9 RF LOAD 3) GRADIENT
MAGNET POWER SUPPLY 4) MAGNET AND CRYOGENS
(SEE NOTE 4)
5) REFER TO SPECTROSCOPY MANUALS
6) OXYGEN MONITOR SUBSYSTEM (DIR. 15336).
2 S/C SHIM POWER SUPPLY
(SEE NOTE 4)
2 S/C SHIM COIL
MAGNET POWER SUPPLY
4
MAIN COIL EMERGENCY RUNDOWN UNIT
SHIM FILTER G
SPLITTER (MS4 FOR GE MAGNET)
SHT 2A OR 2B AND
FROM RESISTIVE SHIM POWER SUPPLY (SEE NOTE 4) BOX (SEE NOTE 4)
IN TAC CRYOSTAT
SHT 2A OR 2B
RESISTIVE 4
EXCITE 12.x OVERALL SYSTEM SHIM COIL
(ONLY MAIN COMMUNICATION LINES SHOWN)
SHEET 4 OF 5

CAN LINK BLOCK DIAGRAM for sites with RFS CABINET & HFD CABINET
RF/SYSTEM CABINET (MR2) HFD CABINET PEN PANEL TAC CABINET
INLINE TERMINATOR
MGD CHASSIS RRF CHASSIS ASC CHASSIS (OPTIONAL) DRIVER GP MODULE PHPS HIGH ORDER
MODULE MASTER SHIM
SCP BOARD RRF–DIF RRF–DIF ASC RF ASC RF ASC NB ASC BB (HOS)
MASTER SLAVE PROCESSORS 1 & 2 DETECTORS 1 & 2 IF BOARD IF BOARD TERMINATOR
CAN PMC J22 J23 J22 4 J23 J3 J2 J2 J1 J56 J7 J7 J8 J8 J154 J155 J5 1 J4
BOARD T T
OR
CAN LINK BLOCK DIAGRAM for sites with SYSTEM CABINET & HFD CABINET
SYSTEM CABINET (MR2) HFD CABINET TAC CABINET
INLINE TERMINATOR
MGD CHASSIS RRF CHASSIS DRIVER GP MODULE HIGH ORDER

MODULE MASTER SHIM
SCP BOARD RRF–DIF RRF–DIF (HOS)
MASTER SLAVE TERMINATOR
CAN PMC J22 J23 J22 J23 J2 J1 J56 J7 J7 J8 J8 J5 2 J4
BOARD T 4 T
OR
CAN LINK BLOCK DIAGRAM for sites with SYSTEM CABINET & ACGD CABINET
SYSTEM CABINET (MR2) TAC CABINET
INLINE TERMINATOR
MGD CHASSIS RRF CHASSIS DRIVER HIGH ORDER

MODULE SHIM
SCP BOARD RRF–DIF RRF–DIF (HOS)
MASTER SLAVE TERMINATOR
CAN PMC J22 J23 J22 4 J23 J2 J1 J56 J5 3 J4
BOARD T T
NOTES:
1 HOS is optional. Terminator must be connected to

J155 on PHPS if HOS not present.
HOS is optional. Terminator must be connected to J8
2
on HFD Cabinet I/F if HOS not present.
EXCITE 12.x
3 HOS is optional. Terminator must be connected to 56
CAN Link Block Diagrams on System Cabinet I/F if HOS not present.

!

" 4 Only present in systems equipped with 16 Channels.
$ # $
,

(OW1 A2) (OW1 A1)
PC HOST COMPUTER
USB TO GRAPHIC
SERIAL (OW1 A6)
IDE BUS SLOTS
LCD DISPLAY

FROM
CDROM BIT 3 SYSTEM CAB , IT–MGD

TO/FROM
ETHERNET SYSTEM CAB ETHERNET SWITCH
FDD
SCSI
(OPTIONAL) DASM VIDEO
T (OW1 A5) CAMERA SCSI TOWER
MODEM SERIAL PORT (OPTION)
PHONE LINE SERIAL 1 (OW1 A16)
(INSITE)
SCSI
SERIAL 2 MOD
TERMINATOR
!
SECURITY KEY LPT AUX AUDIO AUX OUT MOUSE
SCIM (OW1 A8)
SCIM
(OW1 A20)
HUB
KEYBOARD
1 TO SUITE NETWORK WIM (OW1 A7)
(OW1 A21) E–STOP
2 SERVICE PORT STEREO SPEAKERS

AUX INPUT STEREO RACK

J5 MODEM (OPTION)
AC INPUT J1 DC PS J3 DC +5/+12/–12
(FROM PDU) MUSIC
POWER STRIP TO SCSI TOWER MIB OUT IN–THE–BORE
J2
AC POWER (OW1 A11) TO HOST MONITOR (OPTION)
(OW1 A19)
TO OPTION MONITOR 1
TO OPTION MONITOR 2
TO PATIENT ALARM
TO AUDIO SPEAKER
TO DASM NOTES:
DUPLEX ASSEMBLY FOR THE SERVICE LAPTOP

NOTE:
ADDITIONAL SIGNAL/CABLING DETAIL CAN BE FOUND UNDER
INTERCONNECTS ON THE SERVICE METHODS CDROM.

(EXCITE Upgrades)
(OPERATOR WORKSPACE CABINET/TABLE with WIM)
SHEET 1A OF 2
REV 1
OPERATOR WORKSPACE 1–1


(OW1 A2) (OW1 A1)
PC HOST COMPUTER
USB TO GRAPHIC
SERIAL (OW1 A6)
IDE BUS SLOTS
LCD DISPLAY

FROM RF/SYSTEM CABINET,
CDROM BIT 3 IT–MGD

TO/FROM RF/SYSTEM CABINET
ETHERNET ETHERNET SWITCH
FDD
(OPTIONAL) SCSI DASM VIDEO
T (OW1 A5) CAMERA
SERIAL PORT (OPTION) SCSI TOWER
PHONE LINE MODEM (OW1 A16)
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
TERMINATOR
SECURITY KEY LPT AUX AUDIO AUX OUT
SERIAL PORT

!
1 TO SUITE NETWORK HUB ETHERNET SCIM
SCIM
(OW1 A20)
GOC AUDIO ASM
(OW1 A21) E–STOP
2 SERVICE PORT AUX INPUT STEREO RACK
(OPTION) MOUSE
(OW1 A8)
MUSIC
J5 MODEM MIB OUT IN–THE–BORE KEYBOARD
AC INPUT J1 DC PS J3 DC +5/+12/–12 (OPTION) (OW1 A7)
(FROM PDU)
POWER STRIP TO SCSI TOWER
J2
AC POWER (OW1 A11) TO HOST MONITOR STEREO SPEAKERS
(OW1 A19)
TO OPTION MONITOR 1

TO OPTION MONITOR 2
TO PATIENT ALARM
TO AUDIO SPEAKER
TO DASM NOTES:
GOC ASSEMBLY FOR THE SERVICE LAPTOP

NOTE:
1) PATIENT HANDLING
2) MGD/RRF/RF
NOTE:
Additional Signal/Cabling detail can be found under
Interconnects on the Service Methods CDROM.

Forward Production or Pre–EXCITE Upgrades
(OPERATOR WORKSPACE CABINET/TABLE with GOC AUDIO ASM)
SHEET 1B OF 2

OPERATOR WORKSPACE TABLE (OW1 A1)

SCAN CONTROL INTERFACE MODULE

(SCIM) (OW1 A7)

WORKSPACE INTERFACE BOARD (OW1 A1 A4 A1)
*%
# # *%
( ' '

$ '
$

$
#

*%
ÎÎÎÎÎ
)

& & *%

ÎÎÎÎÎ
ÎÎÎ

#

$
%!% ,-./0 +

+

ÎÎÎ
!#
#"!#
' "
ÉÉÉÉ ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ ÎÎ
Î Î
ÎÎ
&
"& # +
"& (

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎ
Î Î
ÎÎ

"#

1//,
Î Î
ÎÎÎ Î

' *%!*%
%!% ' ("#
(
Î ÎÎÎÎ
ÎÎÎÎ
/0

!#
%!% 2

#

Î
#

(
Î

'
*
* $ LEFT
Î

SPEAKER
*
*

Î

* &
&

Î
*
* #
(
(

Î

$
*
* RIGHT

SPEAKER
Î

"
%**
Î

STEREO * *% *
(AUX INPUT) %**
MUSIC IN–
Î
THE–BORE
*

Î
*

Î
+
& +
#

%* $
+
Î

) $ $

%*
Î

+
) ( (
& ' ' *
Î
+

# ) )

# $ % +
+
## " "
Î

+
Î
+

( # #

# +
Î
$ #$
$ # +
+
" #& # #
Î
%+

+ $ #

Î
# #

' '
Î
INTERCOM BOARD
(OW1 A1 A4 A2)
Î # (


(OPERATOR WORKSPACE CABINET/TABLE with WIM) # +
SHEET 2A OF 2

OPERATOR WORKSPACE TABLE (OW1 A1)

*%
*%
*%

*%
SCAN CONTROL INTERFACE MODULE

(SCIM) (OW1 A7)

ÎÎÎÎÎ

( '
$
ÎÎÎÎÎ
ÎÎÎ
$

,-./0 +

+

ÎÎÎ "
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
&
+
(
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ

1//,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
( ' *%!*%
("#

ÎÎÎÎÎ
ÎÎÎ

/0
2 #

#

(

' % &
$ LEFT
+*
* +* %
SPEAKER

+*
*

&
&
**+
(

(
$ RIGHT

&
SPEAKER

*

+

+

# %# $

+
+
&

+

%
( (
* +

) )

+
+
" "
* +
%$ #
* +

+
+
# #
+*

% #
*

#

*

!

+
+
$

$

+

%
" %'
STEREO *
* MUSIC IN BORE
*
AUX INPUT *
* TRANSDUCER


(OPERATOR WORKSPACE CABINET/TABLE with GOC AUDIO ASM # +
SHEET 2B OF 2

MAGNET ENCLOSURE (MG2)
ÏÏ
Ï Ï ÏÏ
ÏÏÏÏÏÏÏÏ
SRI–3 (SCAN ROOM INTERFACE) MODULE (MG2A33)
Ï
ÏÏÏÏÏÏÏÏ
AT LEAST
PENETRATION PANEL 64Kx8 EPROM
ÏÏ
Ï
ÏÏ Ï
ÏÏÏÏÏ
(PP1)
AT LEAST EPLD
ÏÏ Ï
PHPS J14 J1
32Kx8 RAM REAR PEDESTAL (MG3)
OUTEN–P 5 MAGNET I/F #1 (MG3A1)
ÏÏ Ï
OUTEN–N
24 WDM
J4
ÏÏ
MOTORCMD ANALOG J2
3 +5VENC +5VENC J3
MOTORRTN SIGNAL 4 4 1
ÏÏ
22 CONDITIONING LOGIC +5VENCRET +5VENCRET
23 23 9
SYS CAB I/F ENCSENSE–P ENCSENSE–P LONG
ÏÏ
(MR2A11) J91 5 5 5 OPTO
FIBER ENCSENSE–N ENCSENSE–N
J13 J13 OPTIC 24 24 13 ENCODER
RSTSRI RESET RST
ÏÏ
1045–2 FIBER J5 711–2 RESET MICRO– (MG3A6)
J11 LONG–ENC–A–P LONG–ENC–A–P
SERIAL CONTROLLER 1 1 2
OPTIC I/F (12MHZ) LONG–ENC–A–N LONG–ENC–A–N
ÏÏ
XMIT DATA 20 20 10
TO/FROM TXDSRI REPEATER (TO SRI)
J12 TXD LONG–ENC–B–P LONG–ENC–B–P
STIF BD 1045–1 J9 BOARD J3 711–1 2 2 3
ÏÏ
IN MGD FIBER LONG–ENC–B–N LONG–ENC–B–N
NOTE 1 (PP1A17A1) RECV DATA OPTIC
RXD
21 21 11
RXDSRI J11 SERIAL
ÏÏ
J10 NOTE 1 (FROM SRI) 1/F HOME–P J1
1045–1 J4 711–1 6 6 9 J2
HOME–N BUF
25 25 3
ÏÏ
1 DR
9 LONG–EOT–P 9 4
3
ÏÏ
LONG–EOT–N 2
J15 FPGA 28 28 11
RIGHT/LEFT OPERATOR B0 POLARITY +8VDC
34 J3 7 6 +5V 1
ÏÏ
OPERATOR DISPLAY COIL–PRES 1 1 DCKSTP–P +8VDC
NOT USED 36 10 7
CONTROL (MG2A4) COIL–PRES 2 9 DCKSTP–N +8VDC–RTN
5V
SHINY
ÏÏ
26 14 REG
(MG2A5) RIGHT/LEFT
37
2 UPLMT–P REFLECTIVE
+8VDC–RTN
J1/J2 J3 J4 29 15 SURFACE
J1/J2
ÏÏ
ÏÏÏÏ
LIGHTS LIGHTS LITE– ON 10 UPLMT–N RUN 421
13 12 8
FAN FAN FAN–ON 6 8VDC TO DOCK LIMIT SWITCH BD (A1)
14 13 7 SHT 2A
ABORT ABORT STOP–SCAN 7 8VDC
4 3 11
BACK TO ALIGN BACK TO ALIGN END EXAM 8 8VDC–RTN
15 14 13
PAUSE PAUSE PAUSE–SCAN 14 8VDC–RTN
3 2 12
START START START–SCAN 15 8VDC–RTN
10 9 14 RUN 749 NOTE:
STOP MOVE STOP MOVE STOP–TABLE J10
9 8 9 BLK#1 Additional Signal/Cabling detail can be found under
MOVE TO SCAN MOVE TO SCAN ADV–SCAN 1 Interconnects on the Service Methods CDROM.
12 11 10 RED#1 DUAL TEMP SENSOR
OUT < OUT < OUT–SLOW ANALOG 2 IN FRONT END BELL
8 7 16 RED#2 (MG2 A36) REFER TO THE FOLLOWING FUNCTIONAL BLOCK
IN > IN > IN–SLOW TEMP 5
7 6 CONDITIONING DIAGRAMS FOR ADDITIONAL INFORMATION.
15 PIVOT RED#3 NOTES:
OUT << OUT << OUT–FAST ENABLES (3) 7
6 5 17 BLK#2 DUAL TEMP SENSOR 1) MGD/RRF/RF
IN >> IN >> IN–FAST PIVOT 8 IN FRONT END BELL
5 4 3 LOGIC BLK#3 (MG2 A36)
HOME TABLE–DOWN TABLE–DOWN 9
16 15 18
LANDMARK LANDMARK_A LANDMARK_A (RIGHT PANEL) 6 UNUSED PENETRATION
11 10 6 J2 PANEL
LANDMARK_B LANDMARK_B (LEFT PANEL) +8VDC (PP1)
19 33 7
ALIGNMENT ALIGNMENT_A ALIGN–ON–A (RIGHT PANEL)
2 1 10 +8VDC
2
ALIGNMENT_B ALIGN–ON–B (LEFT PANEL) +8VDC–RTN
22 36 26 PHPS
18 19 29 +8VDC–RTN
+24V +24V CONT–SW–PWR (+24V)
1 J14
23 37 J1 24VDC
XMIT J19 7
FIBER 24VDC
NOT USED J18 OPTIC 8
RCVE 24VDC–RTN
TX/RX POWER 9
CONDITIONING 24VDC–RTN 1
10 J20
12VDC PIN(S) . . . . . . . SIGNALS
11
J4 78 J5 12VDC
DRIVERS 12
SEE SHEET 2 8V–12V–RTN 1–5 . . . . . . . . . . TX
EM–STOP 13
FOR MORE 43
8V–12V–RTN 6–10 . . . . . . . . . RX
LV–RTN 14
INFORMATION 44 11 . . . . . . . . . . . COIL PRESENT 1
8VDC
J15 15 12 . . . . . . . . . . . COIL PRESENT 2
RED–LED 24VDC
16 26 13 . . . . . . . . . . . COIL PRESENT 4
YEL–LED 24VDC SHT 3 14 . . . . . . . . . . . BODY TX EN 2
17 27
GRN–LED 24VDC–RTN 15 . . . . . . . . . . . GRN
18 28
NOT USED 24VDC_1 24VDC–RTN 16 . . . . . . . . . . . GRN–1
J4 12 29 17 . . . . . . . . . . . GRN
MOVE_LED MOVE_LED 24VDC_2 12VDC
18 39 13 30 18 . . . . . . . . . . . +24VDC
ALMT_LED ALMT_LED 24VDC 12VDC
19 38 14 31 19 . . . . . . . . . . . +24VDC
START_LED START_LED 8V–12V–RTN
20 41 32 20–29 . . . . . . . . RTN (TX,RX)
LONG_0_CA LONG_0_CA RUN 1215 8V–12V–RTN 30, 33, 37 . . . . GND
17 8 TO/FROM 37 J20 33
+12V +12V 16 CHANNEL J20 8VDC 31 . . . . . . . . . . . COIL PRESENT 3
NOTE 1 34
1
EM–STOP 32 . . . . . . . . . . . BODY TX EN 1
1 34 . . . . . . . . . . . RED
20 LV–RTN
35 . . . . . . . . . . . RED
EXCITE 12.x PATIENT HANDLING 36 . . . . . . . . . . . RED
Forward Production & Pre–EXCITE Upgrade
SHEET 1A OF 5
PATIENT HANDLING 1–1

MAGNET ENCLOSURE (MG2)
ÏÏ
Ï Ï ÏÏ
ÏÏÏÏÏÏÏÏ
SRI–3 (SCAN ROOM INTERFACE) MODULE (MG2A33)
Ï
ÏÏÏÏÏÏÏÏ
AT LEAST
PENETRATION PANEL 64Kx8 EPROM
ÏÏ
Ï
ÏÏ Ï
ÏÏÏÏÏ
(PP1)
AT LEAST EPLD
ÏÏ Ï
J14 J1
32Kx8 RAM REAR PEDESTAL (MG3)
OUTEN–P 5 MAGNET I/F #1 (MG3A1)
ÏÏ Ï
OUTEN–N
SRF: TO/FROM 24 WDM
SSM REAR I/F J40 J4
ÏÏ
SHT 4 MOTORCMD ANALOG J2
3 +5VENC +5VENC J3
MOTORRTN SIGNAL 4 4 1
ÏÏ
22 CONDITIONING LOGIC +5VENCRET +5VENCRET
23 23 9
SYS CAB I/F ENCSENSE–P ENCSENSE–P LONG
ÏÏ
(MR2A11) J91 5 5 5 OPTO
FIBER ENCSENSE–N ENCSENSE–N
J13 J13 OPTIC 24 24 13 ENCODER
RSTSRI RESET RST
ÏÏ
1045–2 FIBER J5 711–2 RESET MICRO– (MG3A6)
J11 LONG–ENC–A–P LONG–ENC–A–P
SERIAL CONTROLLER 1 1 2
OPTIC I/F (12MHZ) LONG–ENC–A–N LONG–ENC–A–N
ÏÏ
XMIT DATA 20 20 10
TO/FROM TXDSRI REPEATER (TO SRI)
J12 TXD LONG–ENC–B–P LONG–ENC–B–P
STIF BD 1045–1 J9 BOARD J3 711–1 2 2 3
ÏÏ
IN MGD FIBER LONG–ENC–B–N LONG–ENC–B–N
NOTE 1 (PP1A17A1) RECV DATA OPTIC
RXD
21 21 11
RXDSRI J11 SERIAL
ÏÏ
J10 NOTE 1 (FROM SRI) 1/F HOME–P J1
1045–1 J4 711–1 6 6 9 J2
HOME–N BUF
25 25 3
ÏÏ
1 DR
9 LONG–EOT–P 9 4
3
ÏÏ
LONG–EOT–N 2
J15 FPGA 28 28 11
RIGHT/LEFT OPERATOR B0 POLARITY +8VDC
34 J3 7 6 +5V 1
ÏÏ
OPERATOR DISPLAY COIL–PRES 1 1 DCKSTP–P +8VDC
NOT USED 36 10 7
CONTROL (MG2A4) COIL–PRES 2 9 DCKSTP–N +8VDC–RTN
5V
SHINY
ÏÏ
26 14 REG
(MG2A5) RIGHT/LEFT
37
2 UPLMT–P REFLECTIVE
+8VDC–RTN
J1/J2 J3 J4 29 15 SURFACE
J1/J2
ÏÏ
ÏÏÏÏ
LIGHTS LIGHTS LITE– ON 10 UPLMT–N RUN 421
13 12 8
FAN FAN FAN–ON 6 8VDC TO DOCK LIMIT SWITCH BD (A1)
14 13 7 SHT 2B
ABORT ABORT STOP–SCAN 7 8VDC
4 3 11
BACK TO ALIGN BACK TO ALIGN END EXAM 8 8VDC–RTN
15 14 13
PAUSE PAUSE PAUSE–SCAN 14 8VDC–RTN
3 2 12
START START START–SCAN 15 8VDC–RTN
10 9 14 RUN 749 NOTE:
STOP MOVE STOP MOVE STOP–TABLE J10
9 8 9 BLK#1 Additional Signal/Cabling detail can be found under
MOVE TO SCAN MOVE TO SCAN ADV–SCAN 1 Interconnects on the Service Methods CDROM.
12 11 10 RED#1 DUAL TEMP SENSOR
OUT < OUT < OUT–SLOW ANALOG 2 IN FRONT END BELL
8 7 16 RED#2 (MG2 A36) REFER TO THE FOLLOWING FUNCTIONAL BLOCK
IN > IN > IN–SLOW TEMP 5
7 6 CONDITIONING DIAGRAMS FOR ADDITIONAL INFORMATION.
15 PIVOT RED#3 NOTES:
OUT << OUT << OUT–FAST ENABLES (3) 7
6 5 17 BLK#2 DUAL TEMP SENSOR 1) MGD/RRF/RF
IN >> IN >> IN–FAST PIVOT 8 IN FRONT END BELL
5 4 3 LOGIC BLK#3 (MG2 A36)
HOME TABLE–DOWN TABLE–DOWN 9
16 15 18
LANDMARK LANDMARK_A LANDMARK_A (RIGHT PANEL) 6 UNUSED
11 10 6 J2
LANDMARK_B LANDMARK_B (LEFT PANEL) +8VDC
19 33 7
ALIGNMENT ALIGNMENT_A ALIGN–ON–A (RIGHT PANEL)
2 1 2 10 +8VDC PENETRATION
ALIGNMENT_B 22
ALIGN–ON–B (LEFT PANEL)
36 26 +8VDC–RTN PANEL
+8VDC–RTN (PP1)
+24V +24V 18 CONT–SW–PWR (+24V) 19 29
1 J14
23 37 J1 24VDC
XMIT J19 7
FIBER 24VDC
NOT USED J18 OPTIC 8
RCVE 24VDC–RTN
TX/RX POWER 9
CONDITIONING 24VDC–RTN 1
10 J20
12VDC PIN(S) . . . . . . . SIGNALS
11
J4 78 J5 12VDC
DRIVERS 12
SEE SHEET 2 8V–12V–RTN 1–5 . . . . . . . . . . TX
EM–STOP 13
FOR MORE 43
8V–12V–RTN 6–10 . . . . . . . . . RX
LV–RTN 14
INFORMATION 44 11 . . . . . . . . . . . COIL PRESENT 1
8VDC
J15 15 12 . . . . . . . . . . . COIL PRESENT 2
RED–LED 24VDC
16 26 SRF: TO/FROM 13 . . . . . . . . . . . COIL PRESENT 4
YEL–LED 24VDC SSM REAR I/F J40 14 . . . . . . . . . . . BODY TX EN 2
17 27 SHT 2 (EM–STOP)
GRN–LED 24VDC–RTN SHT 4 (ALL OTHERS) 15 . . . . . . . . . . . GRN
18 28
NOT USED 24VDC_1 24VDC–RTN 16 . . . . . . . . . . . GRN–1
J4 12 29 17 . . . . . . . . . . . GRN
MOVE_LED MOVE_LED 24VDC_2 12VDC
18 39 13 30 18 . . . . . . . . . . . +24VDC
ALMT_LED ALMT_LED 24VDC 12VDC
19 38 14 31 19 . . . . . . . . . . . +24VDC
START_LED START_LED 8V–12V–RTN
20 41 32 20–29 . . . . . . . . RTN (TX,RX)
LONG_0_CA LONG_0_CA RUN 1215 8V–12V–RTN 30, 33, 37 . . . . GND
17 8 TO/FROM 37 J20 33
+12V +12V 16 CHANNEL J20 8VDC 31 . . . . . . . . . . . COIL PRESENT 3
NOTE 1 34
1
EM–STOP 32 . . . . . . . . . . . BODY TX EN 1
1 34 . . . . . . . . . . . RED
20 LV–RTN
35 . . . . . . . . . . . RED
36 . . . . . . . . . . . RED
EXCITE 12.x PATIENT HANDLING
EXCITE Upgrade
SHEET 1B OF 5

SRI–3 (MG2A33) J4 – OPERATOR DISPLAY (MG2A4)

1 LONG_0_A 1
LONG_0_B
2
LONG_0_C
2 LONG POSITION DISPLAY
GOC AUDIO ASM 3 3
4 LONG_0_D 4
RFS CAB I/F J6 J18 LONG_0_E 1
5 5
(MR2A15) 2 8
LONG_0_F
1 3 6 6
7 LONG_0_G 7 PERIPHERAL
HFD CABINET LONG_0_CA LONG_0_CA PULSE
8 8
LONG_1_CA
9
LONG_1_A
9 3 2 1 0 LIGHT BAR
10 10 J5
SCIM 1 P_VLED
LONG_1_B 1
PDU J2 J23 J26 EM–STOP J1 11
LONG_1_C
11
7 7 3 1 EMER 12 12 SCAN TIME REMAINING DISPLAY 2 P_LED9
STOP 13 LONG_1_D 13 14
8 2 LONG_1_E
14 14 4 P_MODE
MAGNET ENCLOSURE 15 LONG_1_F 15 1 2
CONTROL/DISPLAYS LONG_1_G
PEN PANEL (PP1) 16 16 5 P_REFA
+24V SRI–3 LONG_2_A 15
(RIGHT) (LEFT) 17 17
18 LONG_2_B 18 6 P_REFO
J32
PHPS J14 LONG_2_C 3
J25 J1 J5 J4 J5 J4 19 19
11 LONG_2_D 3 2 1 0
11 1 1 43 20 20 7 P_RHI
IN OUT 16
8 8 24 24 20 20 44 21 LONG_2_E 21
22 LONG_2_F 22 8 P_OUT
LVLE– LONG_2_G 4
RETURN 23 23
24 LONG_2_CA 24 9 P_RLO
LONG_3_CA LONG_3_CA 17
25 25
E–STOP 26 LONG_3_A 26
10
5
P_VP
27 LONG_3_B 27
LONG_3_C “S” DISPLAY “I” DISPLAY 11 P_GND
28 28 18
29 LONG_3_D 29
30 LONG_3_E 30 2,3,6,7 2,3,6,7
MAGNET ENCLOSURE
(MG2)
DOCK LIMIT MODULE
31
32
33
LONG_3_F
LONG_3_G
LONG_S_0
LONG_S_1
31
32
33
LONG_S_0
LONG_S_1
9,12
13,16
S 9,12
13,16
I RESPIRATION
34 34 LIGHT BAR
(MG2A31) 35 LONG_S_2 35 LONG_S_2
1 R_VLED
LONG_S_3 LONG_S_3 19
36 36
J1 J1 DOCK LIMIT LONG_S_CAL (+12V) LONG_S_CAL (+12V) R_LED9
DCKSTP–P J2 J2 37 37 2
1 1 SWITCH BD MTR–OFF ALMT_LED 7
DCKSTP–N 3 17 38 38
20 9 (MG2A31A1) J5 – 39 MOVE_LED R_MODE
1 37
OFF–RTN SEE SHEET 1 N.C.
39 4
20
UPLMT–P 40 40 TO PAC II
RUN 421 2 2 FOR MORE R_REFA
UPLMT–N J3 41 START_LED 41 EM_STOP 5 (MG2 A11 J4)
21 10 25 GND INFORMATION NC_RET EMERGENCY 8
NOTE 1
TO SRI–3 J3 GND 2 42 42
SHEET 1A OR 1B 6 6 26 43 EM_STOP 43 EM_STOP STOP 6
21
R_REFO
GND LVLE_RET LVLE_RET LVLE_RET
7 7 20 TBL–UP* 44
STR_0_A
44 SWITCH
+8V 3 45 45 7 R_RHI
25 14 21 9
+8V 46 STR_0_B 46
26 15 STR_0_C 8 R_OUT
47 47 EMER_STOP 22
48 STR_0_D 48
STR_0_E READBACK 9 R_RLO
49 49 10
50 STR_0_F 50
10 R_VP
51 STR_0_G 51 23
PATIENT TRANSPORT STR_0_CA (+12V) STR_0_CA (+12V)
DOCK ASSEMBLY 52 52 11 R_GND
(PT1) 53 STR_1_CA (+12V) 53 STR_1_CA (+12V) 11
(MG2A29) 54 STR_1_A 54
PEN PANEL TABLE UP
55 STR_1_B 55
(PP1) LIMIT LINKAGE TABLE FULL UP CONDITION
TABLE UP HYDRAULIC STR_1_C
LIMIT SWITCH 56 56
CYLINDER 57 STR_1_D 57
TABLE (MECHANICAL STR_1_E COLON ECG DISPLAY
(MECHANICAL LINKAGE) LINKAGE) 58 58
PHPS
DOWN
59 STR_1_F 59
DISPLAY
PEDAL STR_1_G
DOCK MOTOR PUMP PULL RODS 60 60
ON SWITCH TABLE STR_COLON STR_COLON ECG_RET
P1 (MECH LINKAGE) 61 61 25
FROM J47 UP DOWN STR_2_A
RF SYSTEM I/F 1184 387 PEDAL VALVE 62 62 ECG_DRV
63 STR_2_B 63 12
J125 HYDRAULIC
PUMP RETURN 64 STR_2_C 64
DOCK MOTOR STR_2_D ECG_DRV
(MECHANICAL 65 65 13
COUPLER) STR_2_E
66 66
SUPPLY 67 STR_2_F 67
HYDRAULIC STR_2_G
RESERVOIR 68 68
69 STR_2_CA (+12V) 69 N.C.
STR_3_CA (+12V) STR_3_CA (+12V) 6
70 70
STR_3–A N.C.
71 71 24
72 STR_3_B 72
73 STR_3_C 73 N.C.
NOTES: STR_3_D 26
A 74 74
75 STR_3_E 75
1
76 STR_3_F 76
F B
G 77 STR_3_G 77
EMER_STOP rdbk EMER_STOP_READBACK
REFER TO THE FOLLOWING FUNCTIONAL BLOCK 78 78
79 LVLE RTN 79
E C DIAGRAMS FOR ADDITIONAL INFORMATION. N.C.
D NOTES: 80 80
1) MGD/RRF/RF

Forward Production & Pre–EXCITE Upgrade
SHEET 2A OF 5

SRI–3 (MG2A33) J4 – OPERATOR DISPLAY (MG2A4)

1 LONG_0_A 1
LONG_0_B
2
LONG_0_C
2 LONG POSITION DISPLAY
WIM 3 3
4 LONG_0_D 4
SYS CAB I/F J6 J18 LONG_0_E 1
1 3 5 5
(MR2A15) NOT USED LONG_0_F
2 8 6 6
7 LONG_0_G 7 PERIPHERAL
‘ACGD/PDU CABINET LONG_0_CA LONG_0_CA PULSE
8 8
LONG_1_CA
9
LONG_1_A
9 3 2 1 0 LIGHT BAR
10 10 J5
SCIM 1 P_VLED
LONG_1_B 1
PDU J2 J23 J26 EM–STOP J1 11
LONG_1_C
11
7 7 3 1 EMER 12 12 SCAN TIME REMAINING DISPLAY 2 P_LED9
STOP 13 LONG_1_D 13 14
8 2 LONG_1_E
14 14 4 P_MODE
MAGNET ENCLOSURE 15 LONG_1_F 15 1 2
CONTROL/DISPLAYS LONG_1_G
SRF CABINET 16 16 5 P_REFA
+24V PEN SRI–2 LONG_2_A 15
(RIGHT) (LEFT) 17 17
PNL 18 LONG_2_B 18 6 P_REFO
J32 J40 J14 J1 J4 J5 J4 LONG_2_C 3
J25 J5 19 19 3 2 1 0
11 11 1 1 43 20 LONG_2_D 20 P_RHI
7
IN OUT 16
8 8 24 24 20 20 44 21 LONG_2_E 21
22 LONG_2_F 22 8 P_OUT
LVLE– LONG_2_G 4
RETURN 23 23
24 LONG_2_CA 24 9 P_RLO
LONG_3_CA LONG_3_CA 17
25 25
E–STOP 26 LONG_3_A 26
10
5
P_VP
27 LONG_3_B 27
LONG_3_C “S” DISPLAY “I” DISPLAY 11 P_GND
28 28 18
29 LONG_3_D 29
30 LONG_3_E 30 2,3,6,7 2,3,6,7
MAGNET ENCLOSURE
(MG2)
DOCK LIMIT MODULE
31
32
33
LONG_3_F
LONG_3_G
LONG_S_0
LONG_S_1
31
32
33
LONG_S_0
LONG_S_1
9,12
13,16
S 9,12
13,16
I RESPIRATION
34 34 LIGHT BAR
(MG2A31) 35 LONG_S_2 35 LONG_S_2
1 R_VLED
LONG_S_3 LONG_S_3 19
36 36
J1 J1 DOCK LIMIT LONG_S_CAL (+12V) LONG_S_CAL (+12V) R_LED9
DCKSTP–P J2 J2 37 37 2
1 1 SWITCH BD MTR–OFF ALMT_LED 7
DCKSTP–N 3 17 38 38
20 9 (MG2A31A1) J5 – 39 MOVE_LED R_MODE
1 37
OFF–RTN SEE SHEET 1 N.C.
39 4
20
UPLMT–P 40 40 TO PAC II
RUN 421 2 2 FOR MORE R_REFA
UPLMT–N J3 41 START_LED 41 EM_STOP 5 (MG2 A11 J4)
21 10 25 GND INFORMATION NC_RET EMERGENCY 8
NOTE 1
TO SRI–3 J3 GND 2 42 42
SHEET 1A OR 1B 6 6 26 43 EM_STOP 43 EM_STOP STOP 6
21
R_REFO
GND LVLE_RET LVLE_RET LVLE_RET
7 7 20 TBL–UP* 44
STR_0_A
44 SWITCH
+8V 3 45 45 7 R_RHI
25 14 21 9
+8V 46 STR_0_B 46
26 15 STR_0_C 8 R_OUT
47 47 EMER_STOP 22
48 STR_0_D 48
STR_0_E READBACK 9 R_RLO
49 49 10
50 STR_0_F 50
10 R_VP
51 STR_0_G 51 23
PATIENT TRANSPORT STR_0_CA (+12V) STR_0_CA (+12V)
DOCK ASSEMBLY 52 52 11 R_GND
(PT1) 53 STR_1_CA (+12V) 53 STR_1_CA (+12V) 11
(MG2A29) 54 STR_1_A 54
PEN PANEL TABLE UP
55 STR_1_B 55
(PP1) LIMIT LINKAGE TABLE FULL UP CONDITION
TABLE UP HYDRAULIC STR_1_C
LIMIT SWITCH 56 56
CYLINDER 57 STR_1_D 57
TABLE (MECHANICAL STR_1_E COLON ECG DISPLAY
(MECHANICAL LINKAGE) LINKAGE) 58 58
DOWN
59 STR_1_F 59
DISPLAY
PEDAL STR_1_G
DOCK MOTOR PUMP PULL RODS 60 60
ON SWITCH TABLE STR_COLON STR_COLON ECG_RET
P1 (MECH LINKAGE) 61 61 25
FROM J47 UP DOWN STR_2_A
SSM J36 PEDAL VALVE 62 62 ECG_DRV
63 STR_2_B 63 12
SHT 4 HYDRAULIC
PUMP RETURN 64 STR_2_C 64
DOCK MOTOR STR_2_D ECG_DRV
(MECHANICAL 65 65 13
COUPLER) STR_2_E
66 66
SUPPLY 67 STR_2_F 67
HYDRAULIC STR_2_G
RESERVOIR 68 68
69 STR_2_CA (+12V) 69 N.C.
STR_3_CA (+12V) STR_3_CA (+12V) 6
70 70
STR_3–A N.C.
71 71 24
72 STR_3_B 72
73 STR_3_C 73 N.C.
NOTES: STR_3_D 26
A 74 74
75 STR_3_E 75
1
76 STR_3_F 76
F B
G 77 STR_3_G 77
EMER_STOP rdbk EMER_STOP_READBACK
REFER TO THE FOLLOWING FUNCTIONAL BLOCK 78 78
79 LVLE RTN 79
E C DIAGRAMS FOR ADDITIONAL INFORMATION. N.C.
D NOTES: 80 80
1) MGD/RRF/RF

EXCITE Upgrade
SHEET 2B OF 5

PATIENT HANDLING POWER SUPPLY (PHPS)
J89
BORE LIGHT. 1 2 +15VDC
PATIENT ALIGNMENT LIGHT, 3 11 +/–15V RTN
PAC, –15VDC
9 10
AND +9VDC TO
SRI POWER SUPPLY 12 13 14 PAC J2
4 5 –8VDC
6 8 +9/–8 RTN
7 15
J14
1 EMSTOP
+9VDC F/O PWR J35
12 13 14 20 LVLE RTN
TO
F/O REPEATER J1 9VDC RTN EMSTOP
5 6 7 8 3
22 LVLE RTN
NOTE:
5 OUTPUT EN–P
OUTPUT EN–N 1 OPTIONAL: USED ONLY IF HIGH ORDER SHIM
24
(HOS) INSTALLED. PP1 PHPS J155 TERMINATOR
7 26 +24V TO REMOVED WHEN HOS IS INSTALLED.
8 27 SRI3 J1
SHT 1A
9 28 +24V RTN
10 29
11 30 +24V RTN
12 31
EM STOP J32
11 15 34 +8V
LVLE RTN
24 13 32
ALIGN LIGHT–N +12V,+8V RTN
8 14 33
ALIGN LIGHT–P
FROM 21 J15
RF/SYSTEM CAB BORE VENT–N 1 3 5 7 9 +12V
9
J125 BORE VENT–P 14 16 18 20 22
22 TO
BORE LIGHT–N BORE
10 2 4 6 8 10 +12V RTN LIGHT
BORE LIGHT–P CONTROL
23 BOARD 1 9 15 17 21 22
FROM J154 PAC J20

CAN IN CNTL/MON 10 11 12 13 14 15 16 17 18 +15V
HFD CABINET J8 TO
CAN CORE PWR/COMM 29 30 31 32 33 34 35 36 37 PATIENT
J155 BOARD
TO CAN OUT BORE LIGHT
TAC CABINET J27
1
T FAN CONTROL CNTL/MON 1 2 3 4 5 6 7 8 9 +15V RTN
LIGHTS
JP1
SS CONTROL 20 21 22 23 24 25 26 27 28
SERVO AMP
+8VDC PWR J47 11 12 13
ENABLE +38.5V
2 DOCK MOTOR
23 24 25
120VAC, N AND
LONG DRIVE 1 2 3 AUX RTN
POWER SUPPLY 14 15 16 TO
MOTOR 2 SERVO AMP 38.5V SENSE+ DOCK MOTOR
SERVO AMP 7
BOARD POWER 38.5V SENSE–
MOTOR 1 20
J11
SS RELAY 1 2 3 4 MOTOR 1
GND
5 CHS GND TO
LONG DRIVE MOTOR
SS RELAY 6 7 8 9 MOTOR 2
FROM NEUTRAL
PDU
(SSM)
CB1 CB2
120VAC, 1φ PATIENT COMFORT FAN F5
120VAC, N 120V SS RELAY PATIENT FAN 120VAC
10A 3A 2 (HOT) TO
PATIENT COMFORT FAN
F6
N PATIENT FAN (NEUTRAL)

PATIENT HANDLING POWER SUPPLY (PHPS)
SHEET 3 OF 5

TO
SYSTEM SUPPORT
MODULE SHT 5
1 2 3 SYSTEM SUPPORT MODULE P1

PENETRATION FAN CABINET
CB4 PANEL (MG6)
(MR1A7) 208VAC INPUT
DOCK ON, LIGHT ON, ALIGN ON, VENT ON
(PP1)
BUCK/H–BRIDGE PLUG BORE VENT FAN
INPUT CIRCUIT BUCK CIRCUIT H–BRIDGE CIRCUIT (TO PATIENT HANDLING) F5 J1
BOARD J37 BLOWER
J5 (PATIENT)
U9 F6
(MR1A7A3) F8–10
VENT ON
CB1 AIR
~ (FROMCK/LIGHT BD HOSES
VIA HV BD) F7 GRADIENT FAN
– + J2
+15V,–15V,+5V
(TO PATIENT HANDLING) F7

~ CB2 J47 BLOWER
+ (GRADIENT)
AC 208V F8
PHASE 1
235V 1
T2
+ REAR
PWM
– SUPPLY –RAW – END BELL
(MG2 A14)
REAR I/F BD 1
F1 FIBEROPTIC BUNDLE/
J1 T7
~ +15VMC FLAT PANEL
100V FROM J6 J34
– +
H–BRIDGE ~ 3 1,3,5 J15 BORE
HIGH VOLTAGE BOARD +12V BORELIGHT
J4 J3 LIGHT
MCRTN 2,4,6
(MR1A7A5) (MG2A15)
+15V DRIVE, –15V DRIVE, DRIVE COMM. J3 +15V DRIVE T4
F
100V FROM LIGHT RTN 4 I J31 J20 PATIENT
RECTIFIER H–BRIDGE L10 –15VMC L ALIGNMENT
–15V DRIVE 5 T 1–9, 20–29
LIGHTS (MG2A30)
E
10VI, –10VI, HV SENSE, HV, COMM. J1 HV R 29–37 LASER DIODES
T2 +15V PA2 1 S +5V REG
HV SENSE HV 100V FROM
10–18
CIRCUIT F1 2
H–BRIDGE T7 J41
HV COMM. ~ J11
100V FROM
+15VPAC LONG MTR1 6 1–4
– +
H–BRIDGE ~ LONG MTR2 7 6–9
10VI T2
10VI COMM. 100V FROM PACRTN
DOCK+38.5 8 J36
RECTIFIER LONGITUDINAL
–10VI H–BRIDGE 9 11–13, 23–25 MOTOR DRIVE
10–12 1–3, 14–16 J47 (MG3A7)
+15V,–15V,+5V, GND DOCK–RTN
J2 +15V L3 –15VPAC TO
T3 J7 7 DOCK
GND +38VREMOTESENSE 6 ASSEMBLY
RECTIFIER 100V FROM 20 (MG2 A29 P1)
J4 J6 J5 DOCK/LIGHT BOARD –15V H–BRIDGE +39VREMOTESENSE 7
SHT 2B
243V J40
(MR1A7A4) MOTORCMDRTN 1
22
F1 GND F1 LONGITUDINAL
Q11 T3 T7 MOTOR 2
~ ~ –8VPAC 3 TO PP1 J14 ENCODER
RECTIFIER 100V FROM 100V FROM – + OUTEN–P 3 (MG3A6)
T7 – + + H–BRIDGE H–BRIDGE ~ 5 SHT 1B
~ +5V
OUTEN–N 4
R47 PACRTN 24
ALIGN ON 15VPAL J1
+24V SRI 26 26, 27
– +8VSR1 28 34
+12V SRI 29 30, 31 TO PP1 J14
F1
F1
T7 SHT 1B
~ 9VPAC 11 28,29
~ 100V FROM
+24VSRIRTN
– +
T7 – + + H–BRIDGE ~ 13 32,33
~
R10412V PACRTN 7
LIGHT ON BORE GND 8
LIGHT
+24V+8V SPIRTN 9
– J3
~ 12 VSRI VENT ON 1 22 FROM CPD BD J1 SHT 4
LONGMTR2
LONGMTR1 100V FROM – + J18
H–BRIDGE ~ MCRTN 16 10, 11, 13, 14 (NOT USED)
H–BRIDGE LONGMTR2
SRIRTN PAC RTN 3
CIRCUIT
OUTEN–N J35
4 6, 7, 8, 11, 15
OUTEN–P F
+15V PAC 18 1, 2
I J89
MOTOR COMMAND RTN F5 –15V PAC 19 L 9, 10
T8 TO PAC
MOTOR COMMAND ~ T
100V FROM 8 VSRI –8VPAC 20 4, 5 NOTE 1
F2 – + E
H–BRIDGE ~
PAC 8/9 21 R
S
~ 9VPAC 22 12,13,14
T6 – + C61 WATER
+5V 24
~ LINES
WC OR GRADIENT
+ He WATER COIL
DOCK ON 38.5V F5 CHILLER (MG2A12A1)
T8
DOCK ~ 24 VSRI
100V FROM
–
– + REMOTE PAC IF ASSEMBLY
R80 H–BRIDGE ~
ALERT
24 VSRITN J7 AIR PAC–II
J1
1 PNEUMATIC LINE I/F PANEL
38.5V DOCK REMOTE SENSE PATIENT SQUEEZE
J1 J3 J2 ALERT BULB
SYSTEM
AIR LINE AIR LINE
J7 J6
NOTE: REFER TO THE FOLLOWING FUNCTIONAL BLOCK

1 DIAGRAM FOR ADDITIONAL INFORMATION:
PATIENT HANDLING – SSM 1 F7/F8 AND GRADIENT BLOWER PRESENT NOTE:
SHEET 4 OF 5 ON SYSTEMS WITH BRM BODY COIL. 1) MGD/RRF/RF

SYSTEM SUPPORT MODULE

(MR1A7) REAR
L1 PANEL
J11 J14 208 V L2 208 VAC ASM
INPUT 3 PHASE
CPD BOARD FRONT PANEL DISPLAY BOARD L3
FLAT BUS
1
(MR1A7A2) MONITOR MONITOR FRONT
DOOR
AND ENABLE
LED’S DETECT
GND
U10 SWITCHES J3 J5
J1 EFBEN–N 1 7
HEAD
GND 2
TO MDS OPTICAL CONVERTERS

T/R BIAS
SWITCH LED LED +5V 3
BANK BANK 1 BANK 2
MCR–EN–P 4
BODY GND 6 FROM
T/R BIAS SYSCAB J18
UNBLANK–N 11 6 NOTE 2
TO NB AMP
ALTERA 7064 EPLD UNBLANK–P 12 1
TO AUX
HC711P2 MICROPROCESSOR
AUTO SPECTRO 43 2
ECHO
EFBEN–P
ROM CPUw/ RS–232 INPUT SPECTRO
(SPC WATCH LOGIC PORTS
CODE) DOG PORT1
T/R BIAS S–UNBLK–N 75 8
TPS SPECTRO
RAM RS–232 RS–232 RESET
OUTPUT
APM BOARD J1 S–UNBLK–P 76 3
REGISTERS PORT2 LEVEL 14 BIT TIMER J1–15
EEPROM RS–232 CONVERTERS COUNTER
LOGIC PORTS
UNBLK U18 U11
(MR1A7A1) VENT ON 22 TO REAR I/F BD
TIMERS BUS UBNLNK
(CONFIG) PORT3 CONTRL GATING LOGIC R19 J32
LOGIC DD,TR,MC RFIN ADJ. TP5
ALIGNON–P 14 21
DECIDED I/O A/D TP22
SPI BUS VREFB VREFA OPEN RF IN TP BUFF VCA RF
DECIDED SIGNALS TR DRIVE
PORTS CONVERTR U14 CIRCUIT TP4 U18 ERROR LOOPG 4 QUAD
CONTROL MULTIPIER OUTPUT LIGHTON–N 15 10
OUTPUT DRIVE POWER AMP
+5V U16 AMP U26
PORTS U28 U26 POWER U25 INTEGRATOR U17 CABLE
RFAMPS
SPLITTER
LOG U10 U7 DETECT
LIGHTON–P 20 22
EFB RF OUT
SHORT SPLITTER U24 TP8
U15 U14 CIRCUIT AMPS
MC1–DRIVE R61 TEST
PRE EN VENTON–P 46 22 FROM
JP3 ANITLOG AMP BODY ENV. SYSCAB J25
HV RELAY (NB AMP)
MC1 DET. B
DRIVE NORM U19 LOOP BODY ENV. B ALIGNON–N 47 8 NOTE 2
UNBLANK OPEN
BYPASS B
SPECTRO GAIN
INHIBIT B
RS–422
READY B
U14 CIRCUIT R14
FAULT B
EFB ENABLE ADJ. ADJ. R15
LIGHT ON
INPUT
U25
U24 R22 ZERO MON.LEVEL VENTON–N 78 9
CONV POWER BODY IN B R287
SHORT
10 J46 4
ALIGNMENT ON U15 R58 U14 CIRCUIT SPLITTER AUX–RTS
VENT ON MC2–DRIVE
R311
MC2 POWER BODY BODY BPF B AUX–RXD 44 3
ADJ. CABLE
DRIVE COMBNR
OPEN
U13 CIRCUIT
HEAD BPF B DETECT TP7 MICRO AUX–TXD 65 2 LAPTOP J/F
POWER SUPPLY
HV U22 U21 HEAD ENV. U1
VOLTAGE CONTROLSIGNAL POWER AUX–CTS 66 5
DOCK EN
DIVIDERS INTERFACE SHORT R310 SPLITTER HEAD IN B DET. B HEAD ENV. B

U15 U13 CIRCUIT HEAD
DRIVE R51 AUX–DTR 67 20
VENT ON
LIGHT ON
ALIGN ON
MC3–DRIVE ADJ. R12 R13

PAC
+15
–15
MC3 MON.LEVEL J507

+5
ZERO
DRIVE OPEN
OVERHEAT FAULT 7 19
U13 CIRCUIT J507 J408 J409 J3 NOT USED J104 NOT USED J106 J107 J103
U13 NOT GND 8
U30
CABLE
SHORT
U13 CIRCUIT
HEAD BODY USED DETECT FJST–I–RTN 9 13
U15
MC4–DRIVE R66 IN B IN B SPECTRO TP19
MC4 J102 ENV. PWRSHO WN 16 11
DRIVE
NOT USED BPF DET. B
SRFD OR SRFD II CABINET NOT GND 17
R96 R97
USED ZERO MON.LEVEL GND 19
FJST–2RTN 39 14
HIGH VOLTAGE
1 BOPRESENT 40 22
+15V 42 1,2
RF MON J503
U46 DUTYFAULT 45 17
CABLE RUN P540015
DETECT TP21 BIASON 48 20
(SPECTRO)
10VI, –10VI, HV SENSE, HV, COMM.
BODY IN A J110 BODY ENV. PAC8/9 49

J42 DET. A BODY ENV. A
DD DRIVE BODY1 POWERFLT 51 18
R100 R101
MON.LEVEL
SEE MGD/RRF/RFSUBSYSTEM SECTION: ZERO 0FLT 70 16
+15V,–15V,+5V, GND
SRFD POWER CABINET (SHT 7A) OR FJST–3–RTN 73 15

SRFD II POWER CABINET (SHT 7C) CABLE
DETECT TP20 MICRO +15V 74 1,2
HEAD IN A J108 HEAD U8 ACON 77 9
ENV
+5V DET. A HEAD ENV. A
J44 FAULTRST 79 10
FAULT A
INHIBIT A
BYPASS A
READY A
+15V NOT USED R98 R99
DD MON.LEVEL
–15V ZERO UNBLANK288 80 12
DOCK ON
LIGHT ON ACOURDBK 82 21
ALIGN ON CABLE
GND 81
VENT ON J101 DETECT
SPECTRO TP18 J504
UNBLK2N8/2 33 1
NOT BPF
ENV.
USED DET. A
GND 34–38 TO SRFD RFI J18 OR
MOSI J43 SRFD II J18
R95 41 6
R94
MON.LEVEL
UNBLK2NB/P
SCLK BODY2 ZERO
J501
NB–RTS 53 4
J9 J1 N0–TXD 68 3 TO SRFD RFI J18 OR

J5 J4 SRFD II J18
NB–RXD 64 2
REAR PANEL ASM J503 RF MON
1 2 3 MDS–RXD 71 RX FROM GRAD CAB
NB SERIAL NOTE 1
J501
FROM
J3 1 J504 PCM MDS–TXD 72 TX TO SYS CAB J16
NOTE 2
SYSTEM SUPPORT
MODULE
SHT 4 RF IN FROM
SYSTEM CAB J1
NOTE 2 REFER TO THE FOLLOWING FUNCTIONAL BLOCK
DIAGRAM FOR ADDITIONAL INFORMATION:
NOTE:
1) GRADIENT
2) MGD/RRF/RF
PATIENT HANDLING – SSM

SHEET 5 OF 5

HFD CABINET
NOTE:
Additional Signal/Cabling detail MR3 HFA–X
MR3 GP3 J20
HIGH FIDELITY
can be found under Interconnects
on the Service Methods CDROM J19
AMPLIFIER–X
I COIL NOT
Refer to the following Functional SUPERVISORY MONITORING J18
USED J6
EMI
Block Diagrams for additional CIRCUIT FILTER TRANSFORMER
information: RESET
J11
1)MGD/RRF/RF HEAT SGA
MDS RESET SYNC CONTROL
TRI 90 SENSOR VOARD
TRI 0
RESET ECC
OPTIONAL: Used only if ICOIL J5
1 BACKPLANE BOARD
Patient Handling Power Supply CAN RESET
(PHPS) is not installed. J8 RESET
RESET
IREF IERROR VDRIVE
terminator removed when RESET DELAY
PHPS is installed. GATE POWER
LDIDT DRIVER BUS BAR
2 Present only on Forward BOARD (HIGHER
Production or Pre–EXCITE INVERTER)
upgrade systems.
VOLTAGE POWER
DSP2 SCALER BUS BAR
J16 PRBLEM BOARD (LOWER CAB
INT J10 INVERTER) TB1 I/F
TEST
NOT J17 POINTS
USED TRI 90 J3
MONITORING J3 X+ 1+
TRI 0 FILTER
BOARD J2 X– 2–
SDRAM ECC
ICOIL J1 J4
J22
NOT RS232
USED XCVR VDRIVE
IREF IERROR
DSP1
RESET X
PEN PANEL CAN
Y+ 3+
J4
(SEE NOTE 1) mP LDIDT J5 J3 TO PEN PANEL
CAB DSP2
Y Y– 4– (BRM BODY COIL) OR
I/F BUS J2 TWIN ACCESSORY CAB
PHPS 1 J6 (TRM BODY COIL)
MR3 HFA–Y SHT 2
J8 J8 Z J4
2 J154 T CAN
FPGA J11
HIGH FIDELITY
XCVR JTAG J1
CONFIG TRIANGLE AMPLIFIER – Y
DEVISE GEN
TRI 90
SGA TRI 0
CONTROL/ 5+ J5
STATUS ECC Z+
FPGA J5 J3
CONFIG ICOIL Z– 6–
CONFIG GSCP J2
DEVISE
SYSTEM CABINET (NOT USED) VDRIVE J6
IREF IERROR
OR MR3 HFA–Z J4
RF/SYSTEM CABINET DSP1 HIGH FIDELITY
BUS AMPLIFIER – Z J1
(SEE NOTE 1) LDIDT
CAB
DRIVER I/F FPGA
MODULE J56 J7 J7 FLASH SDRAM J13
J1 PS
CONTROL/
STATUS
J15
PDU
STIF CLK
J17 J2
J1 RS422 NOT
BD J11 DAB RX USED 208 VAC
XDATA J2 J14
J14 HSSD
YDATA J3 INPUT RS422 NOT
J13 M/S SGA
ZDATA J4 XCVR USED
J12 POWER
ASM SUPPLY
DUART INT DUARTE
CE MUX SELECT/ENABLE
J5 J9 SELECT
TO TAC CABINET J12 RS232 L1
SHT 2 XCVR 420 VAC 420 VAC
USED ON TWINSPEED ONLY A/D INPUT L2 SSM
J5 CHANNEL
DUART L3 RFI
NOT PC
USED J6 FAN 208VAC 3φ
ONBOARD HOST
POWER L1 K1 SYSTEM CAB
J21 16 CH 16 CH 16 CH 16 CH SUPPLY INCOMING L2 SHIM P.S.
NOT SSI Synchronous Read Loop MUX MUX MUX MUX POWER
RELAY
USED MOITORING 4–Level FIFO in FPGA L3 MAG P.S.
MNS (SPARE)
GRADIENT – HFD
SHEET 1A OF 2
GRADIENT 1–1
SYSTEM CABINET ACGD CABINET (MR3)

(SEE NOTE 1)
CAB CAB MR3 GP
I/F I/F +15V
STIF J17 J2 ON BOARD
CLK J1 I –15V POWER
BD J11 SUPPLY
CALCULATION CONTROL
XDATA J2 HSSD +5V
DAC
J14 FIBER ECC MR3 SGA – X
YDATA J3 INPUTS IGRAD
J13 IERROR SWITCHABLE
ZDATA J4 ERROR + GRADIENT
J12 LOOP + +
ÏÏÏÏ
ÏÏ
TXMDS DETECTION – AMPLIFIER – X
MATCH
DERIVATIVE
MDS J20 DI/DT
8:4
LINK J21 RXMDS
ÏÏ
ÏÏ
ÏÏ
1 PI J6
J16 LOCAL ECC EMI
DATA COMP FILTER TRANSFORMER
ÏÏ Ï
GRADIENT IREG
DATA UPDATE LOOPGAIN
SAMPLING REGISTERS DIGITAL SLEW
ÏÏÏ
ÏÏ ÏÏ
ÏÏÏÏÏÏÏÏÏ
Ï Ï
TUNING LCOIL
VCNTRL
LIMIT
ICOIL
HEAT
ÏÏ
ÏÏÏÏÏÏÏÏÏ
Ï
PLL/
SRF CABINET OSC J7 SYNC
(SEE NOTE 1) SENSOR
ÏÏ
Ï ÏÏ
Ï
J8
TRIANGLE GEN./
CAB V’OD CLOCK
ÏÏ
ÏÏÏ
Ï Ï Ï
I/F J9
DSP PROCESSOR
320C31–40
ÏÏ
Ï
ÏÏÏ
TX J5
1 SGA BYPASS SWITCH BACKPLANE BOARD
J5
ÏÏ
ÏÏÏÏ
HANDSHAKE
RX J1 AND
J6 MDS CONTROL
ÏÏ
DUART
ÏÏ
Ï ÏÏ
ÏÏ
ÏÏÏ
J5 DEBUG
J16 PORT
TO TAC CABINET J12 POWER
ÏÏÏ
Ï ÏÏ
SHT 2 ANALOG GATE
USED ON TWINSPEED ONLY SRAM SERVICE BUS BAR
256K X 32 MODULE TABLE DRIVER (HIGHER
ÏÏ
ÏÏÏÏ
Ï
ÏÏÏ
BOARD INVERTER)
ÏÏ
ÏÏ
FLASH
256K X 8 SGA – PS LEVEL SHIFT VOLTAGE
POWER
ÏÏ
SCALER
BOARD BUS BAR
(LOWER CAB
INVERTER) TB1 I/F
FAN
X+ 1+ J3
FILTER J3
MR3 SGA – Y BOARD J2 X– 2–
SWITCHABLE
GRADIENT J5 J1 J4
AMPLIFIER – Y Y+ Y+ 3+
J4
TO PEN PANEL
J1 J2 (BRM BODY COIL) OR
Y– Y– 4–
J3 TWIN ACCESSORY CABINET
NOTE: J4 J6 (TRM BODY COIL)
Additional Signal/Cabling detail SHT 2
can be found under Interconnects J5
MR3 SGA – Z Z+ Z+ 5+
on the Service Methods CDROM J2
SWITCHABLE Z– Z– 6–
Refer to the following Functional GRADIENT J3
Block Diagrams for additional AMPLIFIER – Z SGA PS
information: SGA PS
1)MGD/RRF/RF J5
J1
1 Fiber Optic cables only feed J4

through the cabinet I/F Panel. J6
There are no terminations at SGA
the I/F. POWER SUPPLY PDU RF ACCESSORY CABINET
208 VAC
SSM
L1
RF AMP
420 VAC L2 420 VAC
PC
L3
HOST
SYSTEM CABINET
L1 K1 SHIM P.S.
INCOMING L2 RELAY
POWER MAG P.S.
L3
MNS (SPARE)
GRADIENT – ACGD
SHEET 1B OF 2
GRADIENT 1-2
NOTE: SYSTEMS WITH

Refer to the following Functional BRM BODY COIL
Block Diagrams for additional GRADIENT COIL (EPOXY FILLED)
information: PENETRATION PANEL (MG2 A12 A1)
1)OVERALL SYSTEM (PP1)
INNER OUTER
1 Twin Accessory Cabinet is GRADIENT FILTER BOX MG3 GRADIENT GRADIENT
present only on TwinSpeed (PP1 A7) TS1 COIL COIL
systems (with TRM body coil). J1
1 X1
X+
X
J2
X– 2 X2
FROM J3
HFD CABINET I/F Y+ 3 Y3
SHT 1A
OR
Y
ACGD CABINET I/F J4
Y– 4 Y4
SHT 1B
J5
5 Z5
Z+
Z
J6
Z– 6 Z6
SYSTEMS WITH
TRM BODY COIL
1 TWIN ACCESSORY CABINET (TAC)
J8
INCOMING POWER INCOMING POWER 208V 2 PHASE
208V 2 PHASE
J10
CHILLER VACUUM VACUUM
GAUGE SENSOR
VACUUM J11 VACUUM LINE TO TWIN RESONANT MODULE

PUMP REAR
END BELL (TRM) EPOXY FILLED
VACUUM (MG2A12A1)
REGULATOR PEN PANEL GRADIENT COIL
(PP1)
SHIM COIL
J27 J22
TO USB/SERIAL CONVERTER OPTIONAL FILTER
FROM HOST SHIM P.S. ZOOM
J12 INNER OUTER
TO ACGD CABINET OR HFD CABINET J5 ZOOM TO WHOLE BODY GRADIENT GRADIENT FILTER GRADIENT GRADIENT
SHT 1A OR 1B CONTROL LINE SWITCH (PP1 A7) COIL COIL
XZM+ XZM+
X+
XZM– XZM–
X–
FROM
HFD CABINET I/F YZM+ YZM+
SHT 1A Y+
OR YZM– YZM–
ACGD CABINET I/F Y–
SHT 1B
ZZM+ ZZM+
Z+
ZZM– ZZM–
Z–
XZM– WHOLE BODY

XWB+ XWB+
X–
XWB– XWB– XWB–
YZM–
YWB+ YWB+
Y–
YWB– YWB– YWB–
ZZM–
ZWB+ ZWB+
Z–
ZWB– ZWB– ZWB–
INNER OUTER
GRADIENT COIL GRADIENT COIL
GRADIENT CHAIN HARDWARE
SHEET 2 OF 2
GRADIENT 1–3
PDU
TABLE OF CONTENTS
Note:
PDU found in Vendor Manuals only. (SEE SERVICE METHODS CDROM)
PDU i
MGD/RRF/RF (1.5T)
TABLE OF CONTENTS
SECTION PAGE
1 – MGD/RRF/RF SUBSYSTEM (1.5T)

MGD CHASSIS – HOST, RECEIVE, AND RECON FUNCTIONS
(Forward Production & Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1
MGD CHASSIS – SEQUENCE SEGMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
RRF CHASSIS INTERCONNECT BLOCK DIAGRAM 1 OF 2A
(4 and 8 Channel Systems) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–3
RRF CHASSIS INTERCONNECT BLOCK DIAGRAM 1 OF 3B
(16 Channel – Forward Production & Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–4
(4 and 8 Channel Systems) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–5
(Channels 1–8 of 16 Channel – Forward Production & Upgrades) . . . . . . . . . . . . . . . . 1–6
(Channels 9–16 of 16 Channel – Forward Production & Upgrades) . . . . . . . . . . . . . . . 1–7
RRF RECEIVE CHAIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–8
DRIVER MODULE
(Upgrade with SSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–9
DRIVER MODULE
(Forward Production, RFS Cabinet, no SSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–10
SRFD POWER CABINET – SYSTEM SUPPORT MODULE
(Upgrades Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–11
SRFD CABINET – RFI AND SOLID STATE AMPS
(Upgrades Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–12
SRFD II POWER CABINET – SYSTEM SUPPORT MODULE
(Upgrades Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–13
SRFD II RF AMPLIFIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–14
MAGNET ROOM & RELATED COMPONENTS
(Forward Production & Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–15
MULTI–COIL MODULES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–16
MULTI–COIL ADAPTER (J10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–17
PHYSIOLOGICAL ACQUISITION CONTROLLER II . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–18
16 CHANNEL SWITCH (1.5T) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–19
8 CHANNEL MULITCOIL “A” AND “B” CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . 1–20
ASC CHASSIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–21
MNS INTERCONNECTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–22
NOTE:
Additional Signal/Cabling detail can be found under Interconnects on the Service Methods CDROM.
MGD/RRF/RF (1.5T)
i
TABLE OF CONTENTS (Continued)
SECTION PAGE
2 – MGD/RRF/RF SUBSYSTEM SUPPLEMENTAL SCHEMATICS (1.5T)

HEAD & BODY PREAMP SCHEMATIC (46–264442S) . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
HV DYNAMIC DISABLE FILTER MODULE SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . 2–2
HEAD T/R PREAMP FILTER BOARD (2295844, 3 SHEETS) . . . . . . . . . . . . . . . . . . . 2–3
T/R BOARD SCHEMATIC (2133404S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–6
MULTICOIL MODULE (2295846) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–7
MOTHER BOARD (2295860, 5 SHEETS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–8
NOTE:
Additional Signal/Cabling detail can be found under Interconnects on the Service Methods CDROM.
MGD/RRF/RF (1.5T)
ii
SECTION 1 – MGD/RRF/RF SUBSYSTEM (1.5T)
GOC COMPUTER CABINET SYSTEM CABINET OR RFS CABINET

(OW1 A2)
MGD CHASSIS
LINUX PC CAB
I/F D1 TO SCP BOARD
PCI EXPANSION J63 8 – PORT 10/100/1000 BASE T (SHT 2)
E–NET2 ETHERNET SWITCH D2 TO AGP BOARD
(SHT 2)
IMAGE TRANSFER J22
IT – HOST
(IT) LINK
TERM
SERVER
1 DRF2 BOARD (FRONT SLOT 7)
(SHT 2) B1 2
APS FILTER ENGINE
GOC AUDIO ASM TO/FROM IRF I/O
(SHT 2) B2 3 SERIAL (CHANNEL 0)
5 A WAVEFORM SERIAL DEBUG DSP FILTER ENGINES
NOTE 1 (SHT 2) 1 100MHz CHANNELS 1–15
TO/FROM STIF B3 4 320C6201–200
(FOR TPS RESET) SSRAM
(SHT 2) EMIF (128k x 32)
WIM TO/FROM IRF I/O Serial DPR

6 A WAVEFORM SERIAL COM1 RJ45 1 2 HPI 20MHz (4k x 32)
NOTE 1 (SHT 2) APS BOARD (FRONT SLOT 1)
(MOTOROLA MCP750)
IT – MGD
L2 CACHE PPC BOARD
1MB
750
MEMORY TRANSCEIVERS & BUFFERS
32–128MB
RAVEN
E’NET
DEC 21140
4MB
FLASH 10/100Mb/s
DUAL
SERIAL PCI–GP BUS I/F CLK RECEIVER
SSP I/F
(PLX 9054, DIST I/F
CPLD & LOGIC
NVRAM
RTC PCI
NOTES:
Î ÎÎ Î Î Î
Additional Signal/Cabling detail can be found under PCI to
2 – SYNC/ASYNC
OPTIONAL E’NET
Interconnects on the Service Methods CDROM. ISA/IDE
Î Î
ÎÎ Î Î Î
BRIDGE J1 J2 J3 J4 J5
Refer to following Block Diagrams for additional
DUAL USB
PCI to PCI
Î Î Î
ÎÎÎ Î Î ÎÎÎÎÎÎÎ
Î
information: BRIDGE
21154
1)OPERATOR WORKSPACE
Î Î ÎÎÎÎÎÎÎÎÎÎÎ
Î ÎÎ
RECEIVE DATA BUS
C1 (SHT 2)
Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
SEQUENCE DATA BUS
1 There are 16 Receive Channels on each DRF2 Board. C2 (SHT 2)
J5 J4 J3 J2 J1
Each system has one DRF2 Board.
Î
ÎÎÎÎ Î
20MHZ CLOCK BUS
C3 (SHT 2)
2 Reflex 200 AP has single AP Board
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ Î Î Î
(two CE nodes, 1GB MEM total).).
PCI 1 64 BIT, 33 MHZ
Î
ÎÎÎ Î ÎÎ
ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î
3
Reflex 200B AP has second AP Board
(two CE nodes, 1GB MEM total).
Î Î Î ÎÎ Î Î ÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎ Î E TO/FROM
Reflex 400 AP has second AP Board
ÎÎÎ ÎÎÎ Î Î
Î ÎÎÎ
AGP INTERNAL PCI
(four CE nodes, 2GB MEM total). 64 BIT, 33MHZ
(SHT 2)
ÎÎÎ ÎÎÎ
Reflex 400B AP has second AP Board
(four CE nodes, 2GB MEM total). J5 J4 J3 J2 J1 J2 J1
Reflex 800 AP has second AP Board J5 J4 J3 J2 J1

(four CE nodes, 4GB MEM total).
CE NODE #1 CE NODE #2
4 Reflex 200B, 400B, and 800 require installation of PIM AND AND
across upper slots 2 and 3 on rear of MGD module. MEMORY MEMORY
PIM
5 GOC AA Module in Forward Production and 4 (REAR SLOTS 2 & 3) P
Pre–EXCITE Upgrades. 2 AP BOARD (FRONT SLOT 2) S
BRIDGE BOARD 21554
6 WIM Module in GOC’s upgraded from EXCITE. 3 AP BOARD (FRONT SLOT 3) DRAWBRIDGE
(REAR SLOT 8)
EXCITE 12.x MGD/RRF/RF SUBSYSTEM

(Forward Production & Upgrades)
MGD CHASSIS – HOST, RECEIVE, AND RECON FUNCTIONS
SHEET 1 OF 14
MGD/RRF/RF (1.5T) 1–1

DEBUG TO HOST MGD CHASSIS

SHT 1 B2
FROM/TO D1
SYSTEM CABINET
ETHERNET SWITCH D2
SHT 1 GIGALINK SRF/TRF BOARD (FRONT SLOTS 13 & 14)
”GIGALINK” FIBERLINK RF EXCITE COMMANDS, RCV DATA CHNS 9–16
TO/FROM RF DIF2 TRF SRF RF SEQUENCE SSP/GRAD
RJ45 RJ45
CLOCK SYSTEM TX0 RX1
SHT 3B 3 SOURCE RESET GENERATION RX0 TX1 SEQUENCE SCP2 BD
DEBUG TO HOST B1 DSP TX1 RX0 DSPGENERATION THRU–LINE
SHT 1
J6 WARP/WAM HPI 320C6201–200 (FRONT SLOT 12) TERMINATOR
COM1 RJ45 J7 RX1 TX0 320C6201–200
LED SW PWR TP
AGP BOARD (FRONT SLOT 10) IRF2 BD
4–DABOUTs EMIF HPI EMIF HPI EMIF (MOTOROLA
TMR0
MOTOROLA MCP750 (FRONT SLOT 11) TMR1 GRAD SEQUENCER DATA CPV3060)
RX0
L2 CACHE PPC CORRECTED GRAD/B0 DATA
1MB TX0
750 DSP TX1 CAN
SDRAM SDRAM PMC1 TO/FROM
320C6701–166RX1 4M x 32 4M x 32 SLOT CARD
4MB MEMORY (SLOT 2) RF–DIF BOARD
FLASH 32–128MB MEZZANINE HPI J22
HPI
SMC 0
SPU SHT 3A OR 3B
EMIF
TMR0/1 SPU TRIGGERS DPR DPR
PCI–GP 4K x 32 4K x 32
RAVEN BUS I/F TX0 SAMPLED GRAD DATA
E’NET SEQ BUS RX0 INTERNAL PCI
(PLX 9045, PAC SYNC DATA
DEC 21140 I/F CPLD & LOGIC) TX1/RX1
DUAL DSP
10/100Mb/s & DECODE 320C6701–166 DPR MPC860T
SERIAL DPR
4K x 32 1 4–SCCs
MONITOR MEM 2–SMCs
NVRAM REMOTE STATUS I/F 1–10/100bT
RTC RF DPR
RCVR DUART 4K x 32
PCI I/F SYNCHRONIZER BUFFERS
PCI TO BUS
SDRAM
2 – SYNC/ASYNC
2–DIRECT SEQ. TRIGGERS

OPTIONAL E’NET
ISA/IDE OUTPUT
SPU EXTERNAL TRIGGER

TEMP 4M x 32 PCI to PCI
4 – DABOUTs
SSP I/F OUT

BRIDGE MON SPU WAVEFORM I/F BRIDGE
PCI to PCI 21554
DUAL USB
PAC SYNC DATA

LINE TRIGGER
AUX SERIAL I/F
BRIDGE
CLK GEN
21154 HPI_ctrl mem_if
& DIST.
Î ÎÎ
PCI–GP Bus I/F
(PLX 9054,
CPLD AND LOGIC J5 J4 J3 J2 J1
CLK
Î Î
ÎÎÎ
Î Î Î Î Î Î
ÎÎÎ ÎÎ
Î
J5 J4 J3 J2 J1 J5 J4 J3 J2 J1 DIST
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î Î Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î Î Î ÎÎÎ
Î Î Î
RECEIVE DATA BUS
RECEIVE DATA BUS C1 J5 J4 J3 J2 J1
SHT 1
Î
Î Î Î Î Î Î ÎÎÎ
Î Î
SEQUENCE DATA BUS SEQUENCE DATA BUS
SEQUENCE DATA BUS C2
SHT 1
20MHZ CLOCK BUS 20MHZ CLOCK BUS
Î Î Î
Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î
20MHZ CLOCK BUS C3 SPU
SHT 1 WAVEFORM I/F
ÎÎÎÎÎÎÎ
Î Î Î Î
TO/FROM
AGP INTERNAL E cPCI_2 64 BIT, 33 MHZ cPCI_2 64 BIT,
ÎÎ Î
PCI 64 BIT, 33 MHZ
33 MHZ WAVEFORM
SHT 1 PC SERIAL
J5 J4 J3 J5 J4 J3
IRF I/O BOARD STIF BOARD
SPU EXT. TRIG

SYS RESET
HOST SERIAL
EXT SEQ TRIG1
EXT SEQ TRIG2

4 – DAB OUTs
AUX SERIAL
(REAR SLOT 11) (REAR SLOT
HIGHSPEED
AC LINE TRIG
MEASURE I/O
RECEIVER
SERIAL I/F
SCB BUS
MDS FIBER
MDS FIBER
SSP OUT
TO SYNC
BUS TAP
SRI RESET
13 & 14)
RM–RF
ASYNC
SRI FIBER
SRI FIBER
ASYNC
TEMP
SEQ BUS
WARP
DECODE TO SYNC
PAC
NOTES: FIBER
Refer to following Block Diagrams for
additional information: J21 J22 J20 J23 J9 J10 J3 J12 J13 J14 J11 J4 J1 J2 J8 J5 J6 J7 J20 J21 J18 J19 J16 J15 J17
RS–422
GRAD
CLOCK
10 MHZ
1)GRADIENT
GDAT CLK
CHNS 1–8
GIGALINK
RXD MDS
TXD MDS
RXD PAC
TXD PAC
RXD SRI
TXD SRI
RST SRI
J10
GDAT Y
GDAT X
GDAT Z
2)PATIENT HANDLING TEMP AC DIST
WAVE
HOST
SMC
SENSOR PANEL
1 This connection not used for Forward

Production Systems. ”GIGA LINK” FIBERLINK RF EXCITE COMMANDS, RCV DATA
TO/FROM RF DIF1 FIBER OPTIC REPEATER
2
Does not pass through I/F panel, connects SHT 3A
(PP1A17A1)
directly to Term Server Port 4. SYSTEM CABINET I/F J26 J25 J125 J23 J15 J17 J17 J17 J17 LINE TRIGGER J17 J16 J13 J13 J13 J13 J13
2 JUMPER TEST
(MR2 A15) LOOPBACK
3
This Fiber Optic cable only present on J24
systems with 16 Channels. VCC TO PAC BD
4 6 J7 J1 MG2 A11 A1 J1/J9
RCVR XMIT SHT 10
4 Only present on Forward Production TO/FROM
J11 J5
systems. WIM OR GOC AA TO/FROM FROM TO RCVR XMIT
MUX
WAVEFORM SERIAL A NOTE 1 TO SRI BD NOTE 2
PDU RF DOOR MAGNET MONITOR J9 J3
(SHT 1A OR 1B) SWITCH RCVR XMIT TO SRI BD NOTE 2
J10 XMIT RCVR J4
TO FROM SRI BD NOTE 2
TO/FROM J8 J2
RF CABINET TERM SERVER PORT 4 B3 GRADIENT CABINET XMIT RCVR FROM PAC BD
1 NOTE 1
SHT 6 OR 7A SHT 1 MG2 A11 A1 J1/J10
EXCITE 12. x MGD/RRF/RF SUBSYSTEM FROM
RF CABINET
SHT 10
1
MGD CHASSIS – SEQUENCE SEGMENT 4 TO PHPS J32 SHT 6 OR 7B
SHEET 2 OF 14

TO/FROM RRF CHASSIS

MGD CHASSIS
IRF I/O BOARD J20 ”GIGA LINK” FIBER LINK
SHT 2
TO/FROM CAN I/F – 1
CAN ON SCP
SHT 2
DRIVER MODULE
SHT 5A
OR J23 J22 J21
ASC CHASSIS RF–DIF BOARD RX_Clock
UTNS Address/Data/Control
SHT 13 High–Speed UTNS I/F
(FRONT SLOT RX_Data I/F Flag
10 & 11) RX_Fiber Fiber– Rcvr Data Data
Optic TX_Data DTNS I/F
LEDs I/F Clock
Data
D RX DETECT TX_Fiber RCV 1–4
D TX READY Rcvr A Address/Control RCVR A I/F
Reset_n
D TX LCKD
RCV 5–8
D 20MHZ OK Control Rcvr B Address/Control RVCR B I/F
CAN
D 2.5V OK
D 3.3V OK CAN JTAG I/F CAN LED
Clock Exciter Clock
D CAN STAT D –1
D CAN ERR Exciter Address/Data/Control BUFFERS/
RCV 1–4 UNBLNK J17 Status/Rx Bus RCVRS
SMB RCV 5–8UNBLNK DDS and Sine Rho/Synth Data
J18
TO SERVICE Look up for
SYSTEM CABINET OUTPUTS INVIEW J19 High Speed LED Master Exciter
I/F J24 EXC UNBLNK Service
OR J20 DAC
Rho/Theta or Omega Data
RFS CABINET LED I/F
I/F J24 DDS and Sine
(FOR MAGNET Rho/Synth Data BUFFERS/
Rho/Theta or Omega Data Look up for
MONITOR) Slave Exciter RCVRS
FROM J1
FRONT PANEL
I/O BOARD J1 J2 J3 J4 J5
SHT 4A
MIDPLANE RHO DATA, EXC CLK

UTNS DATA/ADDR/CNTRL SIGNALS FROM
EXC ADDR, SYNTH DATA, RHO DATA UTNS BOARD J5
EXC DATA, CNTRL SHT 4A
RCV 5–8 RCV 1–4
MUX CTL0–15 MUX CTL0–15 TO
MUX BOARD J2
SHT 4A
J1 J4 J3 J2 J4 J3 J2 J1 J2 J5 J4 J1
EXCITER2 BD
EXCITER BOARD – SLAVE (REAR SLOT 6 & 7) RECEIVER2 BD
(FUTURE OPTION 14 BIT @ 2.25MHZ BPF 5 MHZ 135 MHZ (REAR SLOT 10 & 11)
FOR SPECTRO) 20 MHZ DDS SAW FILTER SAW FILTER 135 MHZ 1MHZ (+/–250KHZ) LPF LPF RCVR 1–4 (IN)
(REAR SLOT 9) DAC 5MHZ LPF @ 141.7 MHZ @ 141.7 MHZ LPF AMP SAMPLE MIXER FROM
AMP LO OUT UTNS
14 CH1 DIGITAL BLANKING RCVR1 BOARD J7
#1
(SEE SHT 4D)

1 ATTEN SWITCH SHT 4A
J7
SERIES CH2
AMP 0–30dB, 3dB STEPS
144 MHZ AMP 150–270 MHZ #2 ADC LO1
VCXO COARSE TUNE J8 RCVR CH3
AMP OSCILLATOR 1–4
RCVR4
~ #3
J9
CH4 RECEIVE CIRCUIT – CHANNEL 4 (SAME AS ABOVE)
EXT 1
141.7 MHZ ~ LO4 J6
LO DR #4 1MHZ RCVR5
LO IN FROM SLAVE EXCITER J10 SAMPLE CH5
(SEE SHT 4D)

J11 J11 RECEIVE CIRCUIT – CHANNEL 5 (SAME AS ABOVE) LO5
SAW FILTER SAW FILTER CH6
DAC 5MHZ LPF @144MHZ @144MHZ 135MHZ LPF SWITCH RCVR 5–8 (IN)
AMP PWR ADC
14 DETECT PLD RCVR CH7 FROM
5–8 UTNS
14 BIT @ RCVR8 BOARD J7
CH8 RECEIVE CIRCUIT – CHANNEL 8 (SAME AS ABOVE) SHT 4A
20 MHZ DDS SERIES TX Out LO8 J7
TX Out LO 5–8 LO 13–16 AMP
J6 J7 J8 J9 J10 J6
LO 1–4 LO 9–12 LO1–4 (66.11 MHZ FOR 1.5T)
TO MUX BOARD J11
SHT 4A OR 4B LO5–8 (66.11 MHZ FOR 1.5T)
TO
MUX
BOARD J10
SHT 4A
EXCITE 12.x MGD/RRF/RF SUBSYSTEM NOTE:

(4 and 8 Channel Systems) 1 Slave Exciter is a future option for Spectro.
SHEET 3A OF 14

TO/FROM
MGD CHASSIS RRF CHASSIS ”GIGA LINK” FIBER LINK
IRF I/O BOARD J20
SHT 2
CAN ON SCP CAN I/F – 2 CAN I/F
SHT 2
TO/FROM J23 J22 J21
DRIVER MODULE UTNS Address/Data/Control
SHT 5A RX_Clock
OR High–Speed UTNS I/F
RX_Data I/F Flag
ASC CHASSIS J23 J22 J21
SHT 13 RX_Fiber Fiber– Rcvr Data Data
Optic TX_Data DTNS I/F
2ND ”GIGALINK” LEDs I/F Data
TO/FROM FIBERLINK Clock
D RX DETECT TX_Fiber RCV 1–4
MGD CHASSIS Rcvr A Address/Control RCVR A I/F
IRF2 J7 D TX READY
Reset_n
SHT 2 D TX LCKD
RCV 1–4 UNBLNK J17 RCV 5–8
D 20MHZ OK Control Rcvr B Address/Control RVCR B I/F
CAN
SMB
RCV 5–8UNBLNK J18 D 2.5V OK
D 3.3V OK CAN JTAG I/F CAN LED
SERVICE INVIEW J19 Clock Exciter Clock
D CAN STAT D –1
OUTPUTS EXC UNBLNK Exciter Address/Data/Control
J20 D CAN ERR BUFFERS/
Status/Rx Bus RCVRS
DDS and Sine Rho/Synth Data
RCV 1–4 UNBLNK J17 Look up for
High Speed LED Master Exciter
SMB RCV 5–8UNBLNK Service
J18
SERVICE DAC
OUTPUTS INVIEW J19 Rho/Theta or Omega Data
LED I/F
TO EXC UNBLNK DDS and Sine
J20 Rho/Synth Data
SYSTEM CABINET Look up for BUFFERS/
Rho/Theta or Omega Data RCVRS
I/F J24 Slave Exciter RF–DIF BOARD
OR FROM
RFS CABINET FRONT PANEL J1 (FRONT SLOT 10 & 11)
I/F J24 I/O BOARD J1 J2 J3 J4 J5
(FOR MAGNET SHT 4B OR 4C J1 RF–DIF BOARD
MONITOR) (FRONT SLOTS 1 & 2)
J2 J3 J4 J5
FROM UTNS BOARD J5

MIDPLANE RHO DATA, EXC CLK SHT 4C
EXC ADDR, SYNTH DATA, RHO DATA UTNS DATA/ADDR/CNTRL SIGNALS FROM UTNS BOARD J5
EXC DATA, CNTRL RCV 1–4 SHT 4B
MUX CTL0–15 MUX CTL0–15 TO MUX BOARD J2
SHT 4B AND 4C
RCV 5–8
RCV 13–16 RCV 9–12
J1 J4 J3 J2 J4 J3 J2 J1 J2 J5 J4 J1
EXCITER2 BD RECEIVER2 BD
EXCITER BOARD – SLAVE (REAR SLOT 6 & 7) (REAR SLOT 1 & 2)
(FUTURE OPTION 14 BIT @ J2 J5 J4 J1
(SEE SHT 4D)

RCVR 9–12
FOR SPECTRO) 20 MHZ DDS RECEIVER2 BD (IN)
SAW FILTER SAW FILTER LPF
(REAR SLOT 9) DAC
AMP
AMP 2.25MHZ BPF 5 MHZ 135 MHZ (REAR SLOT 10 & 11) FROM
14 LO OUT 1MHZ (+/–250KHZ) LPF LPF UTNS
(SEE SHT 4D)

1 #1 SAMPLE MIXER BOARD J7
J7 SHT 4C
SERIES CH1 DIGITAL BLANKING
RCVR1
144 MHZ AMP 150–270 MHZ #2 ATTEN SWITCH RCVR 1–4
VCXO COARSE TUNE J8 CH2 (IN)
AMP OSCILLATOR AMP 0–30dB, 3dB STEPS J6 FROM
ADC LO1
~ #3
J9
RCVR
1–4
CH3 UTNS
BOARD J7
EXT 1
141.7 MHZ ~ CH4
RCVR4 J6 SHT 4B
LO DR #4 RECEIVE CIRCUIT – CHANNEL 4 (SAME AS ABOVE) LO4
(SEE SHT 4D)

LO IN FROM SLAVE EXCITER J10
J11 J11 RCVR 13–16
1MHZ RCVR5 (IN)
(SEE SHT 4D)

SAW FILTER SAW FILTER SAMPLE CH5 RECEIVE CIRCUIT – CHANNEL 5 (SAME AS ABOVE) FROM
DAC LPF SWITCH LO5 UTNS
AMP PWR PLD BOARD J7
14 DETECT CH6
SHT 4C
ADC
14 BIT @ RCVR CH7 J7
20 MHZ DDS SERIES TX Out 5–8
TX Out LO 5–8 LO 13–16 AMP RCVR8
CH8 RCVR 5–8
J6 J7 J8 J9 J10 J6 RECEIVE CIRCUIT – CHANNEL 8 (SAME AS ABOVE) LO8 J7 (IN)
FROM
LO 1–4 LO 9–12 UTNS
TO MUX BOARD J11 BOARD J7
SHT 4A OR 4B LO1–4 (66.11 MHZ FOR 1.5T) SHT 4B
LO5–8 (66.11 MHZ FOR 1.5T)
LO9–12 (66.11 MHZ FOR 1.5T)
LO13–16 (66.11 MHZ FOR 1.5T) TO
MUX
BOARD J10
SHT 4B OR 4C

(16 Channel – Forward Production & Upgrades) 1 Slave Exciter is a future option for Spectro.
SHEET 3B OF 14

RRF CHASSIS
MASTER EXCITER SLAVE EXCITER GENERAL BNC DAB

SERVICE OUTPUTS SERVICE OUTPUTS SERVICE OUTPUTS OUTPUTS
RHO/THETA/ RHO/THETA/ RHO/THETA/ RHO/THETA/ RF UNBLNK TO

OMEGA OMEGA OMEGA OMEGA SCOPE RF DISABLE RS–422 DRIVER MODULE J19
UNBLANK SERVICE DAC SELECT SWITCH UNBLANK SERVICE DAC SELECT SWITCH TRIGGER 10 MHZ REF SWITCH DABOUT 5 DABOUT 6 DABOUT 7 DABOUT 8 DABOUTS 1– 4 SHT 5A OR 5B
J9 J5 S1 J10 J6 S2 J7 J8 S3 J11 J12 J13 J14 J15 J16

FRONT PANEL I/O BOARD
(FRONT SLOT 4)
SERIAL ID PROM
J1 J4
FROM RF–DIF BOARD J1

SHT 3A MIDPLANE
FROM RF–DIF BOARD J5 UTNS DATA/ADDR/CNTRL SIGNALS
SHT 3A
FROM EXCITE BD– MUX CTL0–15

SLAVE J2
SHT 3A
FROM SLAVE EXCITER J6

SHT 3A OR 3B
SYSTEM
CABINET
I/F
J5 J4 J1 J2 J4 J1 TO
UTNS–III MUX BOARD RF SRFD OR
MASTER EXC OUT OUT J1 SRFD II
BOARD (REAR SLOTS 13 & 14) J8 1 CABINET
NOTCH NOTCH 8 MASTER EXCITER IN
(REAR ENABLE 1– PERIOD J10 SHT 6 OR 7B
SLOT 12) SHOT CONTROL
Power SLAVE EXCITER IN
J11
V–THRESH J52
DAC LOG Divider SLAVE EXCITER OUT TO MNS CAB
1– AMP J9
SHOT HIGH 50 OHM For J3 SHT 14
MUX EXT OUT Loopback (OPTIONAL)
”INCREMENT” PASS J31 SMB J6
COMPARATOR FILTER
AMP TERM MUX EXT IN
FIRST GAIN STAGE J7
14.5 dB
16dB R1≥9 AMP SW1–8
SPECTRO IN
TO AMP 0.5dB (+15V PREAMP BIAS )
RCVR BD J6 CH1 “NOTCHING”
SHT 3A LC DELAY LINE ATTEN. RCVR 1 CH1–8 OUT SW1 J14
RF OUT m–WAVE BODY IN
15.5 dB m–WAVE (+15V PREAMP BIAS ) J202
ATTEN. BLANKING
50W
RCVR1 J13 FROM
R1≤8 SWITCH
Source PEN PANEL
Select J202 SHT 8
RCVR 1–8 SW5
J7 FIRST GAIN STAGE J12 NAV IN
J15
14.5 dB
16dB R1≥9
(SEE SHT 4D)
(SEE SHT 4D)

CH2 AMP AMP
RF OUT 0.5dB RCVR5 HEAD/MC1
ATTEN. RCVR 2 6 Source
LC DELAY LINE
m–WAVE Select
15.5 dB m–WAVE MC5 J200
ATTEN. BLANKING 6 FROM
TO MC 1–8 IN J5 16 CHANNEL
RCVR BD J7 R1≤8 50W SWITCH
MC 2–4 SWITCH
(SEE SHT 4D)

SHT 3A CH3 RCVR 3 SW2–4 MC 6–8 SHT 9A
”NOTCH CIRCUIT” – CHANNEL 3 (SAME AS CHANNEL 2) J6 SW 6–8
RF OUT
CH4 RCVR 4
”NOTCH CIRCUIT” – CHANNEL 4 (SAME AS CHANNEL 2)
RF OUT
CH5 RCVR 5
”NOTCH CIRCUIT” – CHANNEL 5 (SAME AS CHANNEL 2) J16 J17 J19
RF OUT
CH6 RCVR 6 MASTER RF SAMPLE SLAVE RF SAMPLE NAV RF OUT
RF OUT
CH7 RCVR 7
”NOTCH CIRCUIT” – CHANNEL 7 (SAME AS CHANNEL 2) 50Ω UTNS3 SPLITTER
RF OUT
CH8 RCVR 8
FROM RF OUT
EXCITER BD–
MASTER J6 MASTER EXC IN
SHT 3A

(4 and 8 Channel Systems) 1 J1 not present in RF System Cabinet.
SHEET 4A OF 14

RRF CHASSIS



(FRONT SLOT 4)
SERIAL ID PROM
J1 J4

SHT 3A MIDPLANE
FROM RF–DIF BOARD J5 UTNS DATA/ADDR/CNTRL SIGNALS
SHT 3B

SLAVE J2
SHT 3B
FROM SLAVE EXCITER J6

SHT 3A OR 3B
SYSTEM
CABINET
I/F
J5 J4 J1 J2 J4 J1
UTNS–III MUX BOARD RF TO
MASTER EXC OUT OUT J1 SRFD OR
BOARD (REAR SLOTS 13 & 14) J8 1 SRFD II
NOTCH NOTCH 8 MASTER EXCITER IN
(REAR ENABLE 1– PERIOD J10 CABINET
SLOT 12) SHOT CONTROL SLAVE EXCITER IN SHT 6 OR 7B
V–THRESH Power J11 J52
DAC LOG Divider SLAVE EXCITER OUT TO MNS CAB
1– AMP J9
SHOT HIGH TO J7 MUX For J3 SHT 14
MUX EXT OUT Loopback (OPTIONAL)
PASS J31 EXT IN ON J6
”INCREMENT” 2ND MUX
COMPARATOR FILTER
AMP SHT 4C MUX EXT IN
FIRST GAIN STAGE J7
14.5 dB
TO 16dB R1≥9 AMP SW1–8
RCVR BD J6 AMP SPECTRO IN
IN SLOTS CH1 0.5dB
“NOTCHING” (+15V PREAMP BIAS )
10 & 11 LC DELAY LINE ATTEN. RCVR 1 CH1–8 OUT SW1 J14
SHT 3B RF OUT m–WAVE
15.5 dB m–WAVE BODY IN J202
ATTEN. BLANKING (+15V PREAMP BIAS )
50W
RCVR1 J13 FROM
R1≤8 SWITCH
Source PEN PANEL
Select J202 SHT 8
RCVR 1–8 SW5
J7 FIRST GAIN STAGE J12 NAV IN
J15
14.5 dB
16dB R1≥9
(SEE SHT 4D)
(SEE SHT 4D)

CH10 AMP AMP
0.5dB RCVR5 HEAD/MC1
RF OUT ATTEN. 6 Source
LC DELAY LINE RCVR 2
m–WAVE Select
TO ATTEN. BLANKING 6 MC 1–8 IN
RCVR BD J7 J5 FROM
R1≤8 50W SWITCH
MC 2–4 16 CHANNEL
IN SLOTS
(SEE SHT 4D)

CH3 RCVR 3 SW2–4 MC 6–8 SWITCH
10 & 11 (SAME AS CHANNEL 2) J6 SW 6–8
SHT 3B ”NOTCH CIRCUIT” – CHANNEL 3 SHT 9A
RF OUT
CH4 RCVR 4
RF OUT
CH5 RCVR 5
RF OUT
RF OUT
TO J31 ON 2ND UTNS3 SPLITTER
CH7 RCVR 7
”NOTCH CIRCUIT” – CHANNEL 7 (SAME AS CHANNEL 2) UTNS3 BOARD
RF OUT SHT 4C
CH8 RCVR 8
RF OUT
FROM
EXCITER BD–
MASTER J6 MASTER EXC IN
SHT 3B

(Channels 1–8 of 16 Channel – Forward Production & Upgrades) 1 J1 not present in RF System Cabinet.
SHEET 4B OF 14

RRF CHASSIS



(FRONT SLOT 4)
SERIAL ID PROM
J1 J4

SHT 3A MIDPLANE
FROM 2ND RF–DIF BOARD J5 UTNS DATA/ADDR/CNTRL SIGNALS
SHT 3B

SLAVE J2
SHT 3B
FROM J6 MUX EXT

OUT ON 1ST MUX SYSTEM
SHT 4B CABINET
I/F
J5 J4 J1 J2 J4 J1
2ND UTNS–III MUX BOARD MASTER EXC OUT
BOARD NOTCH NOTCH 8
(REAR SLOTS 4 & 5) J8
(REAR PERIOD MASTER EXCITER IN
ENABLE 1– J10
SLOT 3) SHOT CONTROL
Power SLAVE EXCITER IN
J11
V–THRESH
DAC LOG Divider SLAVE EXCITER OUT
1– AMP J9
SHOT HIGH 50 OHM For
MUX EXT OUT Loopback
”INCREMENT” PASS J31 SMB J6
COMPARATOR FILTER
AMP MUX EXT IN
FIRST GAIN STAGE J7
14.5 dB
16dB R1≥9 AMP SW9–16
TO 2ND AMP SPECTRO IN
RCVR BD J6 CH9 0.5dB TERM
“NOTCHING” (+15V PREAMP BIAS )
IN SLOTS 1 & 2 LC DELAY LINE ATTEN. RCVR 9 CH9–16 OUT SW1 J14
SHT 3B RF OUT m–WAVE
15.5 dB m–WAVE BODY IN
ATTEN. BLANKING (+15V PREAMP BIAS )
50W
RCVR1 J13
R1≤8 SWITCH
Source
SW5
Select
FIRST GAIN STAGE RCVR 9–16 J12 NAV IN
J7 J15
14.5 dB
R1≥9
(SEE SHT 4D)
16dB
CH10 AMP AMP
RF OUT
0.5dB RCVR5 MC9
ATTEN. RCVR 10 6 Source
LC DELAY LINE
m–WAVE Select
ATTEN. BLANKING J6 6
TO 2ND MC 9–16 IN J5 FROM
R1≤8 50W
(SEE SHT 4D)
RCVR BD J7 SWITCH
MC 10–12 16 CHANNEL
(SEE SHT 4D)

IN SLOTS 1 & 2 CH11 RCVR 11 SW10–12 MC 14–16 SWITCH
SHT 3B ”NOTCH CIRCUIT” – CHANNEL 11 (SAME AS CHANNEL 2) SW14–16 SHT 9A
RF OUT
CH12 RCVR 12
RF OUT
CH13 RCVR 13
RF OUT
FROM
RF OUT UTNS3 ANTENNA
RF SPLITTER
CH15 RCVR 15 SHT 4B
RF OUT
CH16 RCVR 16
RF OUT

(Channels 9–16 of 16 Channel – Forward Production & Upgrades)
SHEET 4C OF 14

RFS CABINET OR SYSTEM CABINET (MR2)
RRF CHASSIS
MUX BOARD UTNS–3 BOARD RECEIVER/ RFS CABINET OR SYSTEM CABINET I/F PANEL
RECEIVER–2 BOARD PENETRATION PANEL (PP1)
J12 J6 J6 J200 J201 J202 J200 J201 J202
CH. 8/16 CH. 8/16 CH. 1/9 CH. 1 CH. 9 BODY IN CH. 1 CH. 9 BODY IN
CH. 7/15 CH. 7/15 CH. 2/10 CH. 2 CH. 10 OPEN CH. 2 CH. 10 OPEN
CH. 6/14 CH. 6/14 CH. 3 CH. 11 OPEN CH. 3 CH. 11 OPEN
CH. 5/13 CH. 5/13 Not Used CH. 4 CH. 12 OPEN CH. 4 CH. 12 OPEN
CH. 4/12 CH. 4/12 CH. 5 CH. 13 OPEN CH. 5 CH. 13 OPEN
CH. 1/9 CH. 1/9 LO 1–4 or CH. 8 CH. 16 UTNS 3 CH. 8 CH. 16 UTNS 3
9–12 ANT. IN ANT. IN
REAR PEDESTAL(MG3)
J5 J7 J7 CABLE I/F (MG3 A17)

J4 1
CH. 1/9 CH. 1/9 CH. 5/13

CH. 2/10 CH. 2/10 CH. 6/14 BODY IN
CH. 3/11 CH. 3/11 OPEN
CH. 4/12 CH. 4/12 Not Used OPEN
CH. 5/13 CH. 5/13 OPEN
CH. 6/14 CH. 6/14 OPEN

CH. 7/15
CH. 7/15 CH. 7/15 CH. 8/16 OPEN
CH. 8/16 CH. 8/16 LO 5–8 or OPEN

13–16 UTNS 3
ANT. IN
NOTE:
Depending on where boards
are located each can service
either channels 1–8 or 9–16. NOTE:
1 Located in Rear Pedesatal, see Sht 8.

RRF RECEIVE CHAIN CONNECTIONS
SHEET 4D OF 14

DRIVER MODULE J7 J1
DRIVER CONTROL BOARD Bi–Directional CAN Comm
CAN CORE BOARD TERM
FAN +12 VDC TRDD Drive Pwr J11 (DAUGHTER CARD) DSP1
AC–DC CAN COMM J2 J13 J6 Bi–Directional CAN Comm J2
MULTIPLE –15 VDC TRDD Drive Pwr & MODULE TO/FROM
J20 TS1 OUTPUT STATUS RRF CHASSIS
120 VAC J20 RF–DIF BD J23
CB1 POWER +/– 12 VDC Mixed Signal Pwr J2
SUPPLY TO TR/DD BOARD (FUTURE) SHT 3A OR 3B
J1
+/– 15 VDC Preamps & Aux Pwr J19
J12 TO MCD2 BOARD (FUTURE)
FAN + 24 VDC Isolated Network Driver
Power SYS CAB
+ 24 VDC For HV Supply POWER Sense MC Aux Pwr (+/– 15VDC) I/F
MC Preamp Pwr (+15VDC)
+/– 10VDC MC Drive Power J16 MANAGEMENT J4 J3 J62 TO
16 Channel Switch & Power (+/–15VDC) 16 Channel Switch Control PEN PANEL
MC2 DRIVE POWER OUT J15 J77
(FUTURE) High Speed Data I/F (FUTURE)
J3 High Speed Data I/F J4 SHT 9A
HV POWER + 24 VDC J10 (FUTURE)
SUPPLY J8 FPGA HV Disable, Serial ID
MC Disable Sw FRONT PANEL
J3 (DRIVER DD Disable Sw I/F BD Disable HV, TR,
Cable Fault
SYS CAB J17 Driver Control & Serial ID
I/F UDB Power CONTROL) TR Disable Sw Switches DD, MC
Serial ID, Unblanks, Unblank Enable HV Disable Sw
J55 J6 Head T/R Bias Inhibit Unblank CCC Debug Port CCC Error,
TO SRFD J9 J8 J2 J21 CCC Status,
CABINET J53 J7 Body T/R Bias J1 CCC HRT,
SHT 6 OR 7B J10 J9 DCB HRT,
Unblank Enable, Cable Faults, Switches LEDs
J52 J8 MNS T/R Bias Module Error,
TO MNS J9 J10 Unblanks, DCB Inhibit ANALOG Serial ID, Debug Ports, Driver Fault,
LED Drive, +/– 12VDC, Debug Unblank MUXING Unblanks, LED Drive Unblank:
J44 J21 BD1 Serial ID 3.3VDC NB,BB,CW,
J92 TR–DD
DRIVER BD LOW PASS INHIBIT
J45 J22 BD2 DSP2 FILTERING
J93 Unblank TP1, TP2,
TO J46 J23 DD (DRIVER OUTPUT SPI, Unblank, Inhibit Unblank
Test Points TP3, GND
PEN J94 J2 MONITORING) Board Present, Cable Present
PANEL J47 J24 BD3 J21
HV FILTER J95 CCC De–Bug
J48 J25 BD4 J22 Port
J96 J15 J18 J9 J17 J19 DCB De–Bug
Port
UNBLANK DISTRIBUTION Cable Fault
SPARE J15 J15
BOARD
Not Used
MCD_SN
Self–ID
UPM NB1 J11 J11 J10 +12 V DC
Not Used –12 V DC
Vref
J3
J12 J12 CONTROL BOARD&CABLE_PRESENT_IN Reference
UPM NB2 Unblank of A Scaling
Not Used Unblanks, BOARD_PRESENT_OUT
Outputs
Unblank Enable, VREF1/2/3
MNS IF J13 J13 Inhibit Cable Sense,
CABLE_PRESENT_OUT
B
Buffer
Unblank Amps
Not Used LEDs
Inputs +3.3V DC V_IN_RCV
RFI/Amp IF J14 J14 Control 1
Not Used Sense 1
Driver Output 0
0
J3
SPARE J16 J16
Not Used SYS CAB
Serial ID, I/F 1
Status, Sense, Control 2
J17 J17 Sense 2
Driver Output 1 MC00–
SPARE Control, Power 1 J2 MC15 J61 MC1–16
Not Used (+/– 12VDC, TO
Unblanks, EFBEN J18 J18 3.3VDC) PEN PANEL
SSM J5 J78
EFBEN SHT 9A
Unblank Control N
J19 J19 Driver Output N
FROM Inputs EFBEN Sense N N
FRONT PANEL
+10V_SENSE Sample, Scaling
I/O BOARD J16 CABLE_PRESENT_SEND
SHT 4A & Invert
A
+10V_SENSE Load
Sample & Loopback
Scaling B
Drive Power J1 +10V DC CABLE_PRESENT_RCV
SYSTEM CABINET I/F (MR2 A15) +/– 10VDC
J18 TO SRFD OR SRFD2 SSM J5 –10V DC 1
SHT 6 OR 7B MC DRIVER BOARD 1 MC16–
J66 MC17–32
J1 MC31
J2 TO
MC DRIVER BOARD 2 PEN PANEL
J10 J203
SHT 9A
MC DRIVER NUMBERING INSIDE THE
DRIVER MODULE (Upgrade with SSM) 1 DRIVER MODULE IS 0–15 AND 16–32..
OUTSIDE NUMBERING IS 1–16 AND 17–32.
SHEET 5A OF 14

DRIVER MODULE RFS

DRIVER CONTROL BOARD
CAN CORE BOARD CAB I/F
FAN +12 VDC TRDD Drive Pwr J11 (DAUGHTER CARD) DSP1 J7 J1 J56 TO
AC–DC CAN COMM Bi–Directional CAN Comm HFD CAB
MULTIPLE –15 VDC TRDD Drive Pwr & MODULE J7
J20 TS1 OUTPUT STATUS J2 J13 J6 J2
120 VAC CB1 POWER +/– 12 VDC Mixed Signal Pwr J2 Bi–Directional CAN Comm TO/FROM
SUPPLY ASC CHASSIS J2
+/– 15 VDC Preamps & Aux Pwr J1 SHT 13
J20 TO TR/DD BOARD (FUTURE)
FAN + 24 VDC Isolated Network J12
Driver J19 TO MCD2 BOARD (FUTURE)
+ 24 VDC For HV Supply POWER Power MC Aux Pwr (+/– 15VDC)
Sense MC Preamp Pwr (+15VDC)
+/– 10VDC MC Drive Power J16 MANAGEMENT J4 J3 TO
16 Channel Switch & Power (+/–15VDC) 16 Channel Switch Control
J15 PEN PANEL J77
MC2 DRIVE POWER OUT J3 J4 SHT 9A
(FUTURE) J10 High Speed Data I/F (FUTURE) High Speed Data I/F
HV POWER + 24 VDC (FUTURE)
SUPPLY FPGA HV Disable, Serial ID FRONT PANEL
J8 MC Disable Sw
J3 (DRIVER DD Disable Sw I/F BD Disable HV, TR,
Cable Fault
J17 Driver Control & Serial ID
UDB Power CONTROL) TR Disable Sw Switches DD, MC
Serial ID, Unblanks, Unblank Enable HV Disable Sw
J2 Inhibit Unblank CCC Debug Port CCC Error,
J21 J1 CCC Status,
CCC HRT,
J6 Head T/R Bias DCB HRT,
TO SRFD II J9 J8 Unblank Enable, Cable Faults, Switches LEDs
CABINET J7 Body T/R Bias Module Error,
J9 Unblanks, DCB Inhibit Serial ID, Debug Ports, Driver Fault,
SHT 7C J10 LED Drive, +/– 12VDC,
J8 MNS T/R Bias Debug Unblank Unblanks, LED Drive Unblank:
TO MNS J9 J10 Serial ID 3.3VDC NB,BB,CW,
LOW PASS ANALOG INHIBIT
J21 BD1 DSP2 FILTERING MUXING
J92 TR–DD SPI, Unblank, Inhibit Unblank Unblank TP1, TP2,
DRIVER BD (DRIVER OUTPUT Test Points TP3, GND
J22 BD2 MONITORING) Board Present, Cable Present
J93 J21
TO J23 DD CCC De–Bug
PEN J94 J2 J22 Port
PANEL J24 BD3 J15 J18 J9 J17 J19 DCB De–Bug
HV FILTER J95 Port
J25 BD4 Cable Fault
J96
MCD_SN
Self–ID
+12 V DC
Vref
–12 V DC
J3
BOARD&CABLE_PRESENT_IN Reference
A
J15 J15 UNBLANK DISTRIBUTION Scaling
SPARE BOARD_PRESENT_OUT
BOARD
Not Used CABLE_PRESENT_OUT VREF1/2/3 Buffer
B Amps
J11 UPM NB1 J11 J10
TO ASC CHASSIS +3.3V DC V_IN_RCV
SLOT 15, J3
CONTROL Control 1
J12 J12 Driver Output 0
TO ASC CHASSIS UPM NB2 Unblank of Sense 1 0
Unblanks, J3
SLOT 11, J3 Outputs
Unblank Enable,
J13 MNS IF J13 Inhibit Cable Sense, Serial ID,
TO ASC CHASSIS Unblank Status, Sense, Control 2 1
SLOT 6, J5 Inputs LEDs Sense 2
Driver Output 1 MC00–
Control, Power 1 J2 MC15
J14 J14 MC1–16
RFI/Amp IF (+/– 12VDC,
TO ASC CHASSIS 3.3VDC) TO
SLOT 8, J5 J5 PEN PANEL
J16 J16 J78
SPARE SHT 9A
Not Used Control N
Driver Output N
Sense N N
J17 SPARE J17
Not Used +10V_SENSE Sample, Scaling
& Invert CABLE_PRESENT_SEND
J18 Unblanks, EFBEN J18 Load
A
SSM +10V_SENSE Sample & Loopback
Not Used EFBEN Scaling B
Drive Power J1
Unblank +/– 10VDC +10V DC CABLE_PRESENT_RCV
J19 Inputs J19 EFBEN
1
FROM –10V DC
FRONT PANEL MC DRIVER BOARD 1 MC16– MC17–32
I/O BOARD J16 MC31 TO
SHT 4A J1 J2
MC DRIVER BOARD 2 PEN PANEL
J10 J203
SHT 9A
MC DRIVER NUMBERING INSIDE THE
DRIVER MODULE (Forward Production, RFS Cabinet, no SSM) 1 DRIVER MODULE IS 0–15 AND 16–32..
OUTSIDE NUMBERING IS 1–16 AND 17–32.
SHEET 5B OF 14

SYSTEM SUPPORT MODULE REAR

(MR1A7) PANEL
L1 ASM
J11 J14 208 V L2 208 VAC
FRONT PANEL DISPLAY BOARD INPUT 3 PHASE 1
CPD BOARD L3
FLAT BUS
(MR1A7A2) MONITOR MONITOR FRONT J3 J5
AND ENABLE DOOR GND
U10 SWITCHES
LED’S DETECT EFBEN–N 1 7
J1 GND 2
HEAD +5V 3

T/R BIAS
SWITCH LED LED MCR–EN–P 4
BANK BANK 1 BANK 2
GND 6 FROM SYSCAB J18
SHT 5A
BODY UNBLANK–N 11 6
T/R BIAS UNBLANK–P 12 1
TO NB AMP EFBEN–P 43 2
ALTERA 7064 EPLD
TO AUX
AUTO SPECTRO S–UNBLK–N 75 8
ROM CPUw/ ECHO INPUT
(SPC WATCH
RS–232
LOGIC PORTS
SPECTRO S–UNBLK–P 76 3
PORT1
CODE) DOG
TPS SPECTRO
T/R BIAS
OUTPUT
APM BOARD J1 VENT ON 22 TO REAR I/F BD NOTE 2
REGISTERS PORT2 LEVEL 14 BIT TIMER
LOGIC PORTS
(MR1A7A1) J1–15
14 J32 21
EEPROM RS–232 CONVERTERS COUNTER UNBLK U18 U11
ALIGNON–P
TIMERS BUS UBNLNK
(CONFIG) PORT3 R19
CONTRL GATING LOGIC LIGHTON–N 15 10
DECIDED I/O A/D LOGIC DD,TR,MC RFIN ADJ. TP5 TP22
SPI BUS VREFB VREFA RF IN TP RF
PORTS CONVERTR DECIDED SIGNALS TR DRIVE OPEN
U14 CIRCUIT TP4 U18 ERROR
BUFF VCA
4 QUAD LIGHTON–P 20 22
POWER LOOPG CONTROL MULTIPIER OUTPUT
OUTPUT DRIVE AMP
PORTS
+5V
U28 U26 POWER U25 SPLITTER INTEGRATOR U17 U16 AMP U26 CABLE VENTON–P 46 22 FROM SYSCAB J25
U10 U7
RFAMPS LOG DETECT SHT 2
EFB RF OUT
PRE EN ALIGNON–N 47 8
JP3 ANITLOG AMP BODY ENV.
HV RELAY (NB AMP)
MC1 78 9
UNBLANK DRIVE NORM U19 LOOP DET. B BODY ENV. B VENTON–N
OPEN
BYPASS B
SPECTRO GAIN J46
INHIBIT B
RS–422
READY B
U14 CIRCUIT R14 10 4
FAULT B
EFB ENABLE ADJ. ADJ. R15 AUX–RTS
INPUT U24 MON.LEVEL
LIGHT ON U25 R22 R287 ZERO
CONV POWER BODY IN B
ALIGNMENT ON U15
SHORT
U14 CIRCUIT AUX–RXD 44 3
R58 SPLITTER
VENT ON MC2–DRIVE
R311
BODY BODY BPF B AUX–TXD 65 2 LAPTOP I/F
MC2 POWER CABLE
ADJ.
DRIVE COMBNR AUX–CTS 66 5
OPEN HEAD BPF B DETECT TP7
U13 CIRCUIT MICRO
POWER SUPPLY
HV CONTROLSIGNAL U22 U21 POWER HEAD ENV. U1 AUX–DTR 67 20
VOLTAGE
DOCK EN
DIVIDERS INTERFACE SHORT

U13 CIRCUIT
R310 SPLITTER HEAD IN B DET. B HEAD ENV. B
7 J507 19
15V DRIVE
U15 R51 HEAD OVERHEAT FAULT
VENT ON
LIGHT ON
ALIGN ON

PAC
+15
–15
MON.LEVEL 8
MC3 GND
+5
ZERO
DRIVE OPEN
U13 CIRCUIT J507 J408 J409 J3 NOT USED J104 NOT USED J106 J107 J103 FJST–I–RTN 9 13
U30 U13 NOT
CABLE
SHORT
U13 CIRCUIT
HEAD BODY USED DETECT
PWRSHO WN 16 11
U15
NOT USED J102 GND 17
MC4 ENV.
BPF
DRIVE
SRFD CABINET (SHT 7A) DET. B GND 19
NOT
R96 R97
USED ZERO MON.LEVEL FJST–2RTN 39 14
RFI MODULE
(MR1 A23) HEAD COUPLE B BOPRESENT 40 22
J5
HIGH VOLTAGE
BODY COUPLE B +15V 42 1,2
J6 1
DUTYFAULT 45 17
PWR MONITOR RF MON J503 RUN P540015
J18 BIASON 48 20
U46
CONTROL (SPECTRO)
CABLE
DETECT TP21
PAC8/9 49
BODY COUPLE A BODY IN A J110 BODY ENV.

POWERFLT 51 18
J42 J8 DET. A BODY ENV. A 0FLT 70 16
DD DRIVE BODY1
TO PEN PANEL J44 R100 R101
J4 SHT 8 ZERO
MON.LEVEL FJST–3–RTN 73 15
+15V,–15V,+5V, GND
TO PEN PANEL J152 +15V 74 1,2

J3
SHT 8 CABLE
ACON 77 9
TP20 MICRO
COMMUNICATION LINE
DETECT
UNBLANK FROM SSM

+5V HEAD COUPLE A HEAD IN A J108 HEAD U8 FAULTRST 79 10
+15V J7 ENV
HEAD ENV. A
–15V J44 DET. A UNBLANK288 80 12
FAULT A
INHIBIT A
BYPASS A
READY A
R98 R99
DOCK ON DD NOT MON.LEVEL ACOURDBK 82 21
LIGHT ON USED RF AMP 1 ZERO
ALIGN ON J20 L1,L2,GND GND 81

VENT ON J504
RF MON
J3 CABLE UNBLK2N8/2 33 1
J11 J101 DETECT
RF IN SPECTRO TP18 GND 34–38 TO RFI
NOT ENV. J18 SHT 7A
J16 J1 BPF DET. A UNBLK2NB/P 41 6
COM USED
J43 J501
MOSI
J4 R94 R95 NB–RTS 53 4
J1 ZERO MON.LEVEL TO RFI
SCLK BODY2 RF OUT N0–TXD 68 3 J18 SHT 7A
NB–RXD 64 2
J5 J4 J9 J1 MDS–RXD 71 RX FROM GRAD CAB
RF AMP 2 (NOTE 1)
AMP2 DRIVE MDS–TXD 72 TX TO SYS CAB J16
REAR PANEL ASM J503 RF MON J12 SHT 2
PORT SHT 7
NB SERIAL AMP2 IN
J501 J2
1 2 J3 1 PCM SHT 7
3 J504
J17 AMP2 COMM
RF IN FROM J1 SHT 7
FROM SYSTEM CAB J1 J14
SYSTEM SUPPORT MODULE (+8V XMT/ SHT 4A OR 4B
J19 L2, L3, GND
NOTE 2 –12.25V
TO SYSTEM CAB J55
SHT 5A RECEIVE) HEAD T/R BIAS
J9 REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM
EXCITE 12.x MGD/RRF/RF SUBSYSTEM (+4V XMT/
–12.25V
(Upgrades Only) TO SYSTEM CAB J53 RECEIVE) BODY T/R BIAS
J10
NOTE:
SHT 5A 1) GRADIENT
SRFD POWER CABINET – SYSTEM SUPPORT MODULE
SHEET 6 OF 14 2) PATIENT HANDLING

RFI
(MR1A23)
BLK
RED
ÁÁ
ÁÁ
J19
220V
TB1
ANALOGIC
RF
ÁÁ
EXT CONT J1 AMPLIFIER
GRN/YEL
ÁÁ
RED #1
J20
BLK 220V
RFA POWER GATING GATING
HEATSINK ASSEMBLY DRV_IN 0° FET +45dBm 0° FET
30A BREAKER GRN/YEL Preamp Preamp GATING 21dB 12dB
J3
ÁÁ
RF INPUT Attenuator Gain/Phase FET
12dB 16dB Compensation 18dB Xformer
RED –14dB –6dB
Network FET FET
SW J21 nominal
21dB 12dB
BLK POWER 180° 180°
FROM +24dBm GATING
0dBm +12dBm –2dBm +14dBm +12dBm
ORN PDU GATING GATING GATING 0° AC INPUT CABLE
HSTEMP_DAC FET
RF OUTPUT FET x 4 12dB
0.4A 0.4A GRN/YEL 9kW GAIN_DAC 12dB
(69.54dBm) DELTA_TJ+_DAC 0°
FET
BLK Typical Amp Stage 12dB
180°
BLK FAN J4 GATING CB1
12dB 180° GATING
64dB
FET x 4 FET x 4 CIRCUIT
GATING 12dB BREAKER
0° 52dB
POWER SUPPLY J2B 3–way 250V, 20A
REFLECTED 3–way Typical Amp Stage
Combiner Splitter
RED/BLU 1 BLU GATING 52dB
5 –OUT MONITOR 12dB 180°
ORN/BLU 2 GRN 64dB FET x 4 57dBm
1 +/–15V COM FET x 4
12dB GATING 52dB
BLK 3 RED RF 0°
3 +OUT SAMPLE P1
4 NC Typical Amp Stage
J2A
HS_TEMPH_V
2 FORWARD
CMD_LTCH_L
DEV2_FLT_H
DEV1_FLT_H
5 BLK 12dB 180° AC INPUT CABLE
DELTA_TJ+
CMD_EN_L
NC 4 –OUT MONITOR 64dB
D_CLK_IN
D_WRITE
5V FET x 4
TAB
TAB
TAB
TAB
D_READ
6 ORN GATING
FWD_V
+OUT TO TAB 7 VR1 VR2
RFL_V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
TAB 9
3
4
5
8
P2
NC
NC
DC POWER
10
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
8
7
1
2
9
6
4
3
5
INPUT J22
BD RF TEST PORT
J13 GATING CABLE RF/CONTROL RF/CONTROL
RF CABLE KIT DATA CABLE
POWER CABLE
RF INPUT RF IN FROM
J14 SYS CAB J1
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
SHT 4A OR 4B
9
8
7
6
5
4
3
2
1
6 –15V
5 15_RTN
4 +15V
3 48V_RTN
2 NC
1 +48V
LOW VOLTAGE DIGITAL
GND
RF_MISO
RF_DATA_CLK
RF_CMD_LTCH_L
FWD_VOLTS
DATA_TO_RF
RF_CMD_EN_L
DEV2_FLT_H
DEV1_FLT_H
HS_TEMP_V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RFL_VOLTS
NC
DELTA_TEMP
CONTROL OUT STATUS BALANCE OUT
J23 J15 J11
J13 VDD RTN
J12 VDD+
J15 DRV VDD+

AMP1 DRIVE
J11 1 POWER_ON+
AMP2 DRIVE 2 FAULT_RESET+ LINE FILTER
J25 J12 3 AMP_READY+ 250V, 20A
4 AMP_FAULT+ J7
5 AMP_OVERLOAD+
TRANSLATOR 6 VT100_RXD
BD FACTORY 7 VT100_TXD LINE
RF INTERFACE
TEST 8 NC J4 CONDITIONER
AMP1 COMM J14 LINE
J1 J16 CONNECTOR 9 POWER_ON– OUTPUT
CONDITIONER
AMP2 COMM 10 FAULT_RESET– CABLE
J3 J17 11 AMP_READY– PCB LINE
12 AMP_FAULT– J1 J2 CONDITIONER
13 AMP_OVERLOAD– INPUT CABLE
J18 TO J501 14 NC
GENERAL COMM 15 GND
TO J503 SHT 6
TO J504 J9 FAN1
GATING J5 FAN +V
INPUT J10
FAN –V
FAN2
FAULT SW1
RESET RFA POWER
TOPCOVER ASSEMBLY FAN POWER CABLE
220V
RF OUTPUT TB1
BD J1
ÁÁ
Á
ANALOGIC
EXT CONT RF
RF INPUT J3
AMPLIFIER
ÁÁ
Á
WHT AMP1 IN #2
J1
BLU/WHT AMP2 IN RF OUTPUT 9kW (69.54dBm)
J2 J4 CB1 ANALOGIC
GRN HEAD OUTPUT
HEAD J3 SHT 8 REFLECTED J2B RF
GRA BODY OUTPUT MONITOR
AMPLIFIER
ÁÁ
Á
J4 RF SAMPLE P1
FORWARD J2A
BRN
BODY J5 HEAD COUPLE B
TO J106 MONITOR VR1 VR2 #1
ÁÁ
Á
P2
YEL BODY COUPLE B
J6 TO J107
BLU YEL HEAD COUPLE A SHT 6 GATING CABLE
J7 TO J108
J8 BODY COUPLE A ANALOGIC
TO J110
RF
J13 VDD RTN
J12 VDD+
J15 DRV VDD+
J9 HEAD T/R FACTORY

TO SYS CAB J55
J10 BODY T/R TEST J4
J7 AMPLIFIER
TO SYS CAB J53 CONNECTOR RF INTERFACE
J14
#2
J1 J2
GATING INPUT FAN +V J9 FAN1
J5
EXCITE 12.x MGD/RRF/RF SUBSYSTEM SW1 RFA POWER FAN –V J10 FAN2
FAULT RESET TOPCOVER ASSEMBLY
(Upgrades Only)
SRFD CABINET – RFI AND SOLID STATE AMPS
SHEET 7A OF 14

SYSTEM SUPPORT MODULE REAR

(MR1A7) PANEL
L1 ASM
J11 J14 208 V L2 208 VAC
FRONT PANEL DISPLAY BOARD INPUT 3 PHASE 1
CPD BOARD L3
FLAT BUS
(MR1A7A2) MONITOR MONITOR FRONT J3 J5
AND ENABLE DOOR GND
U10 SWITCHES
LED’S DETECT EFBEN–N 1 7
J1 GND 2
HEAD +5V 3

T/R BIAS
SWITCH LED LED MCR–EN–P 4
BANK BANK 1 BANK 2
GND 6 FROM SYSCAB J18
SHT 5A
BODY UNBLANK–N 11 6
T/R BIAS UNBLANK–P 12 1
TO NB AMP EFBEN–P 43 2
ALTERA 7064 EPLD
TO AUX
AUTO SPECTRO S–UNBLK–N 75 8
ROM CPUw/ ECHO INPUT
(SPC WATCH
RS–232
LOGIC PORTS
SPECTRO S–UNBLK–P 76 3
PORT1
CODE) DOG
TPS SPECTRO
T/R BIAS
OUTPUT
APM BOARD J1 VENT ON 22 TO REAR I/F BD NOTE 2
REGISTERS PORT2 LEVEL 14 BIT TIMER
LOGIC PORTS
(MR1A7A1) J1–15
14 J32 21
EEPROM RS–232 CONVERTERS COUNTER UNBLK U18 U11
ALIGNON–P
TIMERS BUS UBNLNK
(CONFIG) PORT3 R19
CONTRL GATING LOGIC LIGHTON–N 15 10
DECIDED I/O A/D LOGIC DD,TR,MC RFIN ADJ. TP5 TP22
SPI BUS VREFB VREFA RF IN TP RF
PORTS CONVERTR DECIDED SIGNALS TR DRIVE OPEN
U14 CIRCUIT TP4 U18 ERROR
BUFF VCA
4 QUAD LIGHTON–P 20 22
POWER LOOPG CONTROL MULTIPIER OUTPUT
OUTPUT DRIVE AMP
PORTS
+5V
U28 U26 POWER U25 SPLITTER INTEGRATOR U17 U16 AMP U26 CABLE VENTON–P 46 22 FROM SYSCAB J25
U10 U7
RFAMPS LOG DETECT SHT 2
EFB RF OUT
PRE EN ALIGNON–N 47 8
JP3 ANITLOG AMP BODY ENV.
HV RELAY (NB AMP)
MC1 78 9
UNBLANK DRIVE NORM U19 LOOP DET. B BODY ENV. B VENTON–N
OPEN
BYPASS B
SPECTRO GAIN J46
INHIBIT B
RS–422
READY B
U14 CIRCUIT R14 10 4
FAULT B
EFB ENABLE ADJ. ADJ. R15 AUX–RTS
INPUT U24 MON.LEVEL
LIGHT ON U25 R22 R287 ZERO
CONV POWER BODY IN B
ALIGNMENT ON U15
SHORT
U14 CIRCUIT AUX–RXD 44 3
R58 SPLITTER
VENT ON MC2–DRIVE
R311
BODY BODY BPF B AUX–TXD 65 2 LAPTOP I/F
MC2 POWER CABLE
ADJ.
DRIVE COMBNR AUX–CTS 66 5
OPEN HEAD BPF B DETECT TP7
U13 CIRCUIT MICRO
POWER SUPPLY
HV CONTROLSIGNAL U22 U21 POWER HEAD ENV. U1 AUX–DTR 67 20
VOLTAGE
DOCK EN
DIVIDERS INTERFACE SHORT

U13 CIRCUIT
R310 SPLITTER HEAD IN B DET. B HEAD ENV. B
7 J507 19
15V DRIVE
U15 R51 HEAD OVERHEAT FAULT
VENT ON
LIGHT ON
ALIGN ON

PAC
+15
–15
MON.LEVEL 8
MC3 GND
+5
ZERO
DRIVE OPEN
U13 CIRCUIT J507 J408 J409 J3 NOT USED J104 NOT USED J106 J107 J103 FJST–I–RTN 9 13
U30 U13 NOT
CABLE
SHORT
U13 CIRCUIT
HEAD BODY USED DETECT
PWRSHO WN 16 11
U15
NOT USED J102 GND 17
MC4 ENV.
BPF
DRIVE
SRFD II CABINET (SHT 7C) DET. B GND 19
NOT
R96 R97
USED ZERO MON.LEVEL FJST–2RTN 39 14
SRFD II MOD.
HEAD SAMPLE B BOPRESENT 40 22
J5
HIGH VOLTAGE
BODY SAMPLE B +15V 42 1,2
J6 1
DUTYFAULT 45 17
PWR MONITOR RF MON J503 RUN P540015
J18 BIASON 48 20
U46
CONTROL (SPECTRO)
CABLE
DETECT TP21
PAC8/9 49
BODY COUPLE A BODY IN A J110 BODY ENV.

POWERFLT 51 18
J42 J8 DET. A BODY ENV. A 0FLT 70 16
DD DRIVE BODY1
TO PEN PANEL J44 R100 R101
73 15
J4 MON.LEVEL FJST–3–RTN
SHT 8 ZERO
+15V,–15V,+5V, GND
+15V 74 1,2
J3 TO PEN PANEL J152
CABLE
SHT 8 ACON 77 9
TP20 MICRO
COMMUNICATION LINE
DETECT
UNBLANK FROM SSM

+5V HEAD SAMPLE A HEAD IN A J108 HEAD U8 FAULTRST 79 10
+15V J7 ENV
HEAD ENV. A
–15V J44 DET. A UNBLANK288 80 12
FAULT A
INHIBIT A
BYPASS A
READY A
R98
DOCK ON DD NOT USED R99
MON.LEVEL ACOURDBK 82 21
ZERO
LIGHT ON
ALIGN ON GND 81
VENT ON J504
RF MON
CABLE UNBLK2N8/2 33 1
J101 DETECT
SPECTRO TP18 34–38 TO SRFD II
GND
NOT ENV. J18 SHT 7C
BPF DET. A UNBLK2NB/P 41 6
USED
J43 J501
MOSI
R94 R95 NB–RTS 53 4
ZERO MON.LEVEL TO SRFD II
SCLK BODY2 N0–TXD 68 3 J18 SHT 7C
NB–RXD 64 2
J5 J4 J9 J1 MDS–RXD 71 RX FROM GRAD CAB
(NOTE 1)
MDS–TXD 72 TX TO SYS CAB J16
REAR PANEL ASM J503 RF MON SHT 2
NB SERIAL
J501
1 2 3 J3 1 J504 PCM
RF IN FROM J1
FROM SYSTEM CAB J1 J14
SYSTEM SUPPORT MODULE (+8V XMT/ SHT 4A OR 4B
NOTE 2 –12.25V
TO SYSTEM CAB J55
SHT 5A RECEIVE) HEAD T/R BIAS REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM
J9
EXCITE 12.x MGD/RRF/RF SUBSYSTEM (+4V XMT/ FOR ADDITIONAL INFORMATION:
–12.25V
(Upgrades Only) TO SYSTEM CAB J53 RECEIVE) BODY T/R BIAS
J10 NOTE:
SHT 5A
SRFD II POWER CABINET – SYSTEM SUPPORT MODULE 1) GRADIENT
SHEET 7B OF 14 2) PATIENT HANDLING

SRFD II MODULE
INPUT POWER
AC POWER
208V 3 PHASE
CB1
CIRCUIT
BREAKER POWER
SUPPLY
GND STUD
3 POLE
J21 CONTACTOR
FROM PDU UNBLANK AND CONTROL J18
TO SHT 7B
I/F TRANSLATION OR
SWITCH CONTROLS SWITCH CONTROLS ASC SLOT 8 J6
SHT 13
OUTPUT
CONDITIONING
HEAD RF POWER OUT J3 TO SHT 7B OR 8
HEAD TR BIAS J9 FROM SHT 7B OR 5A OR 5B
INPUT CONDITIONING RF AMPLIFIER
HEAD J5
HEAD DUAL
ATTEN GAIN HEAD RF SAMPLE A/B J7
COUPLER
ADJUST TO SHT 7B
AMP OR
J6
BODY BODY DUAL ASC SHT13
COUPLER BODY RF SAMPLE A/B J8
J14
RF IN FROM BODY BODY TR BIAS J10
SYS CAB J1 GAIN FROM SHT 7B OR 5A OR 5B
ADJUST
OR BODY RF POWER OUT J4
RF IN FROM TO SHT 7B OR 8
MUX J8
SHT 4A OR 4B
RF
TEST PORT

SRFD II RF AMPLIFIER
SHEET 7C OF 14

PEN PANEL MAGNET REAR PEDESTAL (MG3) MAGNET ENCLOSURE (MG2)

(PP1) UTNS3 BODY QUADRATURE HYBRID ASSEMBLY (MG3A3)
CABLE I/F 16 CHNNL ANTENNA
TO (MG3A17) SWITCH BODY T/R SWITCH QUAD DIRECT 8 BODY COIL ASSEMBLY (MG2A12)
SYS CAB OR J202 J4 (MG3A8) (MG3A3A1) PIN DIODE SPLITTER DRIVE
OR RFS CAB J202 2 2 (MG3A3A2) DISABLE ISOLATION BOX
J35 J36 J1 T/R SWITCH EPOXY FILLED GRADIENT COIL TRM OR BRM
SHT 4A OR 4B (MG3A3A3)
J3/J4 J3/J4
FROM
J44
BODY OUTPUT
J1 J4 1/4l J1
l/4
SRFD II J4
SHT 6 OR BODY COIL PREAMPLIFIER 4 1
7B OR 7C DYNAMIC DISABLE DYNAMIC DISABLE
J200 8 IMAGE (MG3A3A5) l/4 l/4 SWITCH BOARD SWITCH BOARD
TO HEAD REJECT (MG2A12A9, DDSB6) 5 5
(MG2A12A4, DDSB1)
RFS CAB OR (NOTCH) PREAMPLIFIER BD l/4
MC1–MC8 OUT IN J1 J1
SYS CAB J200 FILTER (A1) RF BODY
PUT P2 P1 PUT J2 5
SHT 4A OR 4B CARTRIDGE
36 dB 8 (MG2A12A1)
DYNAMIC 68.86 MHZ PIN DIODE ISOLATION BOX 1 J2 BODY HEAD HEAD BODY J2
DISABLE T/R SWITCHES
FILTER J3/J4 J3/J4
J3 1/4l J2
MODULE 3
J16 16 CHANNEL J23
SWITCH J20 A11, DDSB8 A6. DDSB3
(PP1A11) J25
J5 J6
FROM SYS CAB A10, DDSB7 A5, DDSB2
J46 SHT 5A DD DD
OR J94 J74
DRIVER MODULE A8, DDSB5 A7, DDSB4
FILTER 3
J23 SHT 5B
TO SRI–3 J20
FROM SYS CAB MAGNET ENCLOSURE (MG2) J7 J8 J9 J10 REAR DYNAMIC FRONT DYNAMIC J7 J8 J9 J10
J48 SHT 5A BD4 DD4 (–15V HEAD/+550V BODY) J6 DISABLE BIAS DISABLE BIAS
DD4 J12 SPLITTER
OR J96 J76 SPLITTER
DRIVER MODULE DD3 (–15V HEAD/+550V BODY) J5 J11 (MG2A12A12) (MG2A12A13)
FILTER 5
J25 SHT 5B
DD2 (–15V HEAD/+550V BODY) J4 J12

FROM SYS CAB
J47 SHT 5A BD3 DD3 DD1 (–15V HEAD/+550V BODY) J3 J11
OR J95 J75
DRIVER MODULE FILTER 4
J24 SHT 5B
FROM SYS CAB

J45 SHT 5A BD2 DD2 LOW PROFILE CARRIAGE ASSEMBLY (MG2 A16)
OR J93 J73 QUICK QUAD HEAD QUAD HEAD COIL ASM (MG2A16A1)
DRIVER MODULE FILTER 2 INTEGRATED HEAD T/R ASSEMBLY (MG2 A16 A5) DISCONNECT COIL ADAPTER
J22 SHT 5B (MG2A16A4) (MG2A16A6)
HEAD
COIL HEAD T/R BOARD J3– PINS PINS POWER SPLITTER
FROM SYS CAB CABLE
J44 SHT 5A BD1 TRACK 4 2A,B J 2A,B 2A,B J13 J1 (MG2A16A1A2)
DD1 J6
OR J92 J72 l/8
DRIVER MODULE FILTER 1
J21 SHT 5B RECEIVE LOAD 4A,B 4A,B 4A,B
PIN DIODE RF FILTER

T/R SWITCH ISOLATION BD
CABLE
I/F (MG2A16A1A2)
RF TX (MG3A17) 4
HEAD IN
SWITCH PIN TRANSMIT LOAD 7A,B 7A,B 7A,B

DIODE RF FILTER ISOLATION BD
J152 J151 J1 T/R (MG2A16A1A2)
IMAGE PREAMPLIFIER SWITCH
FROM J4 ATTENUATION REJECT
HEAD OUTPUT FILTER 9A,B 9A,B 9A,B J14 BLU
J3 J153 J2 28 dB l/8
SHT 6 OR 6A 6A 6A
7B OR 7C HD COIL ID 1 J3
COIL
J150 J3 ID
68.86 MHZ 10VDC 6B 6B 6B
6 HD COIL PRESENT 1
8 4 9 1A,B:3A,B
J1 9 PIN CONNECTOR 5A,B
NOTES: 8A,B;10AB
2 TO
1 THESE CONNECTIONS WILL BE CROSSED IF MAGNET FIELD ”A” CONNECTOR EXTREMITY/QUAD MULTI–COIL REVERSE FIELD
IS REVERSED ASSEMBLY J11 2
50 OHM HEAD COIL ADAPTER QUAD HEAD
E1 E6 (MG2A16A6) SHT 9A COIL ADAPTER 2 RECEIVE ONLY
2 RF LOAD (MG2A16A6) DUAL SURFACE SURFACE COIL
OPTIONAL COIL ADAPTERS 2A,B J13 2
2A,B J15 COIL ADAPTER ADAPTER
(MG2A16A6) (MG2A16A6)
3 2A,B J17
TEST JACK 4A,B 2A,B J20
SURFACE SURFACE
4A,B COIL
SHOWN IN THE RECEIVE STATE (–15V DC) SAME AS COIL
4 4A,B
NOT SHOWN IS TRANSMIT STATE (+ 8V DC, UNDER LOAD) EXTREMITY QUAD 4A,B
7A,B HEAD
COIL 7A,B
5 SHOWN IN BODY MODE MNS RCVE COIL
ASSM 7A,B 7A,B
J2 9A,B J14
6 OPTIONAL: SEE MNS MANUAL 9A,B J16
9A,B
6A 9A,B J21
7 COIL 6A
ID COIL SURFACE
8 ISOLATION BOXES NOT ON TWINSPEED SYSTEM 6B ID COIL
MNS XMIT 6B
J1 7
7
(Forward Production & Upgrades)
MAGNET ROOM & RELATED COMPONENTS
SHEET 8 OF 14

LOW PROFILE CARRIAGE ASSEMBLY (MG2 A16)

SYSTEM CABINET PENETRATION 16 CHANNEL SWITCH ASM MAGNET
(MR2) PANEL (MG3 A36) ENCLOSURE MNS RCVR MULTICOIL ASSEMBLY (MG2 A16 A8)
SPECTRO & (MG2)
RRF MULTICOIL PLATE J2 MULTICOIL BOARD ASSEMBLY #8 MOTHER BOARD 8HR BRAIN COIL SHOWN
PREAMP RFIN T/R
CHASSIS (PP1) MULTICOIL (RX) 28dB PREAMP 8 PIN
IMAGE
See Sheet 11 CABLE J8 REJECT
RF IN T/R PROTECT
PIN SW
PINS
1
& PHASE ADJ 27–37
MUX CAB for details TRACK FILTER BIAS 8 MC COIL B37 EXTERNAL
BD 1 I/F PREAMP BIAS (10V)
22–PIN BENDIX
TO ”A” CONNECTOR E6 SW CNTL PRESENT 2 PREAMPS
FROM SHT 12 RF IN A37
J5 J200 J200 J1 J23 (EXT. PREAMP) 8
1–8 HEAD
CABLE B36
(MC1–8) (1–8)
TRACK J7 MULTICOIL BOARD ASSEMBLY #7 7
(MG3A17J2) 75W LOAD
(SAME AS ABOVE) A35
MUX SHT 8 6
BD 2 J21 B34
8 J6 MULTICOIL BOARD ASSEMBLY #6 5
J5 J201 J201 J2 TO ”A” CONNECTOR COIL ID 2 COIL ID 2
9–16 (SAME AS ABOVE) PINS
J18 SHT 12 12–26 A34
(A34)
MULTI–COIL ADAPTER (J10) SEE SHT 9B

(MC9–16) B26 (T/R BIAS)
6 (9–16) J5 MULTICOIL BOARD ASSEMBLY #5 8
J24 (SAME AS ABOVE) +/–15V A25,B25 (PREAMP BIAS
MC SW 8
J203 J203 J11 +15V)
FILTER (G1) B24 (T/R BIAS)
PP1 A15 J4 MULTICOIL BOARD ASSEMBLY #4 7
30–PIN BENDIX
(SAME AS ABOVE) B22 (T/R BIAS)
6
J15
MC SW COIL ID LEDS ”A” B20 (T/R BIAS)
J78 J78 J10 J3 MULTICOIL BOARD ASSEMBLY #3 TO 5
TO J61 OR J5 FILTER (G1) MC BD
PP1 A15 (SAME AS ABOVE) B18 (T/R BIAS)
ASM 4
4 4
FROM TO J66 OR J10 2–7 B16 (T/R BIAS)
DRIVER J17 COIL ID LEDS ”B” 3
J2 MULTICOIL BOARD ASSEMBLY #2
MODULE MC BIAS
SHT 5A J77 J77 J5 TO ”B” CONNECTOR (SAME AS ABOVE) B14 (T/R BIAS)
OR 5B TO J62 OR J3 FILTER (G2) J22 SHT 12 +10V 2
PP1 A16 8
B12 (T/R BIAS)
2 2 MULTICOIL BOARD ASSEMBLY #1 1
J19 PREAMP
IMAGE 28dB RFIN T/R
RF IN T/R PROTECT
REJECT PIN SW PREAMP 1
3 & PHASE ADJ PINS EXTERNAL
J1 FILTER BIAS 1 1–11 PREAMPS
PREAMP BIAS (10V) RF SW A4
SW CNTL 4
22–PIN BENDIX
RF IN CNTRL
J20
TO SRI–3 J20 (EXT. PREAMP) B3
7 3
SEE NOTE 1 TP3
TP7
VREG A2
3 J9 MCD1–8 (PIN SWITCH BIAS 1–8) 10V TP4 2
UNREG
5.1V B1
1
5 A1
+15V, –15V
REFER TO THE FOLLOWING TP5 VREG
FUNCTIONAL BLOCK DIAGRAM TP1 TP6, TP8 5 10V VREG TP2 EXT PREAMP
(–15V) (+15V) –5V SWITCH CNTRL
J11
NOTE:
1) OPERATOR WORKSPACE TO/FROM HEAD T/R
2) PATIENT HANDLING ASSEMBLY J1
SHT 8 HEAD COIL PRESENT 1,
HEAD COIL ID 1, 10V (HEAD PREAMP BIAS ),GND
NOTES: BENDIX COIL ID LEDS
1 8 hr brain coil /pin configuration shown. Standard

coils use 30 pin bendix; coils with integrated 2 MC PREAMP BIAS FILTER PINOUTS
3
preamps use outer 22 pin bendix connectors for rf J5 & J77 J9 & J19
inputs and 30 pin connector for coil DC bias. PIN . . . . . SIGNAL NAME PIN(S) . . . . . . . SIGNALS
4
1 ....... XPT_DATA_POS 5 Only 16 Channel Systems have a
PIN PIN PIN 1,14 . . . . . . . . . –15V J10 & J78 LOCATED 6
1 1 1 2 ....... XPT_STROBE_POS second MUX board. J201 not used
B14 B16 B20 2,15 . . . . . . . . . +15V PIN(S) . . . . . SIGNAL BEHIND
1 1 1 3 ....... XPT_OE_N_POS 3, 4, 13, 23–25 GND in 8 and 4 Channels systems.
MULTICOIL TEST
B16 B18 B22 4 ....... AGND 5 . . . . . . . . . . . . MCD8 1–8 . . . . . . . . MCD1–8 (NOTE 1) BD ASSY . . POINT . . . FUNCTION
2 2 2
5 ....... AGND 6 . . . . . . . . . . . . MCD4 9 .......... MC CABLE PRESENT_O IN (NOTE 2)
30–PIN BENDIX
30–PIN BENDIX
30–PIN BENDIX
B18 B20 6 ....... +15V (NOTE 1) 7 . . . . . . . . . . . . MCD7 10,11 . . . . . . NO CONNECT 7 .......... TP1 . . . . . . . . –15V
3 3
7 ....... +15V (NOTE 1) 8 . . . . . . . . . . . . MCD3 12–19 . . . . . . MCD9–16 (NOTE 3) 6 .......... TP2 . . . . . . . . . –5V
B20 B22
4 4 8 ....... +15V (NOTE 1) 9 . . . . . . . . . . . . MCD6 20–27 . . . . . . GND 6 .......... TP3 . . RF SW CNTRL SIG
B22 9 ....... XPT_DATA_NEG 10 . . . . . . . . . . . MCD2 29 . . . . . . . . . MC CABLE PRESENT_1 IN (NOTE 2) 2, 3 . . . . . . . . TP4 . . . . . . . . . 5.1V
5 10 . . . . . . XPT_STROBE_NEG 11 . . . . . . . . . . . MCD5 30–37 . . . . . . GND 1, 2 . . . . . . . . TP5 . . . . . . . +10V_B
B24 11 . . . . . . XPT_OE_N_NEG 12 . . . . . . . . . . . MCD1 1, 2 . . . . . . . . TP6 . . . . . . . . +15V
6 12 . . . . . . AGND 16 . . . . . . . . . . . RED_LED NOTE 1: MULTICOIL BIAS (+3V,+5V,+7V,–5V). 7, 8 . . . . . . . . TP7 . . . . . . . +10V_A
13 . . . . . . AGND 17 . . . . . . . . . . . YEL_LED NOTE 2: THESE TWO PINS CONNECTED TOGETHER 7, 8 . . . . . . . . TP8 . . . . . . . . +15V
6 COIL 4 COIL 2 COIL 14 . . . . . . –15V (MC COILS) 18 . . . . . . . . . . . GRN_LED ON J10 FOR DIAGNOSTIC LOOPBACK.
PHASED PHASED PHASED
ARRAY ARRAY
15 . . . . . . –15V (MC COILS) 19 . . . . . . . . . . . COIL PRESENT #1 NOTE 3: NOT USED/CONNECTED AT J10 INSIDE
ARRAY CROSSPOINT SWITCH ASSEMBLY.
20 . . . . . . . . . . . COIL PRESENT #2
21 . . . . . . . . . . . COIL ID #1
EXCITE 12.x MGD/RRF/RF SUBSYSTEM NOTE 1: ANALOG POWER FOR 22 . . . . . . . . . . . COIL ID #2
MULTI–COIL MODULES PREAMPS (MC & HEAD),
SHEET 9A OF 14 CROSSPOINT & MC COILS.


MULTI–COIL ADAPTER (J10)
SHEET 9B OF 14

MAGNET ENCLOSURE
(MG2)
PHYSIOLOGICAL ACQUISITION CONTROLLER (PAC II) MODULE

(MG2A11)
PHYSIOLOGICAL ACQUISITION CONTROLLER (PAC II) MODULE
(MG2A11A1)
ECG SIGNAL ACQUISITION CIRCUIT
ISOLATED CIRCUIT TO
STIF BOARD VIA
ÎÎÎÎÎÎÎÎ
ÎÎ
OPERATION/DIAG
LED DS2 J10 J1 PP1 A17 A1 J2
FROM PATIENT J2 4 SERIAL 0–5 P2(0) TXD OPTIC TXD PAC
GAIN LOW PASS OPTIC XMIT SHT 2
ÎÎ
ECG LEADS AMP FILTER DAC ISOLATION 80C196
J9
ÎÎ Î Î
P2(1) RXD OPTIC RXD PAC
CPU RCVR FROM
STIF BOARD VIA
ÎÎ Î
ÎÎÎÎÎÎÎ
Î Î
J8 PP1 A17 A1 J1
DBTXD
RESPIRATION SIGNAL ACQUISITION CIRCUIT DATA 0–15 1 SHT 2
DBRXD
ÎÎ
ÎÎ ÎÎÎÎÎ
ÎÎÎ
2
DBGND
3
Î ÎÎ
ÎÎ
ÎÎÎÎ
J3 LATCH DUAL VCC
R12 UART/RS232 4 DEBUG
BELLOWS PRESSURE 100X LEVER OUTPUT RESP (16 BIT) TERMINAL
TRANSDUCER DAC SHIFTER BUFFER BIT DRVRS SPTXD
6
Î ÎÎÎ Î ÎÎÎ
Î
ÎÎÎÎ ÎÎ
AUX 1 MAIN REVERSE PORT
ADC SPRXD
REGISTER 7
(MG2A11A2) P–PULSE
SPGND
Î ÎÎÎ Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
Î
ÎÎÎÎ ÎÎ
16KX16 8
BAR GRAPH J1 J4 J5 EPROM VCC
9
ÎÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ
ÎÎ
ÎÎÎÎ ÎÎ
DATA 0–15
32KX8
ÎÎÎ
ÎÎ Î
ÎÎ
ÎÎÎÎÎÎÎÎ
Î ÎÎ
SRAM
AUX DATA ACQUISITION CIRCUIT
SERIAL 0–3
J6
ÎÎÎ
Î
ÎÎÎ Î
+5V ADDR 0–15
2
AUXIN
Î ÎÎÎÎÎ
ÎÎ Î
Î Î
3
NOT
USED AGND
ÎÎ ÎÎÎ
Î
4 ADDR 0–15 1
AGND PAC
5 +15V
CONTROL 1 2
LOGIC +12V
J6 AUX DATA ACQUISITION CIRCUIT 12 13 14
–12V J7 J2
FROM FIBER OPTIC 4 5 FROM
LGN REAR I/F BOARD SSM J35
PLETH. PROBE I/F J5 6 7 8 15
OPTIC DS1 HIGH –15V IN SRFD OR SRFD II CABINET
RCVR 9 10 NOTE 1
J7 J1 PEAK LEVEL UP–DOWN* AGND OR FROM PHPS J89
LDRV COMP 3 11
2 LOW
A
COL 400X DAC 10X OUT
FROM 3
STANDARD B
ATTN 0–11
PLETH.
PROBE I/F GND
4
GND
5
J5
(MG2A11A3)
BAR GRAPH J4
J1
NOTES:
1 MULTIPLE WIRES/PINS WITH SAME SIGNAL ARE NOT SHOWN

NOTE:
1) PATIENT HANDLING

PHYSIOLOGICAL ACQUISITION CONTROLLER II
SHEET 10 OF 14

16 CHANNEL SWITCH 1.5T

(MG2 A11)
J21
16 CHANNEL SWITCH (1.5T)
CH. 1 (MG2A11)
CH. 2 J17
+/– 15V
CH. 3 MC T/R BIAS 25–32
J11
CH. 4 FROM PEN PANEL J203

TO “B” CONNECTOR SHT 9A
CH. 5 SHT 9A
CH. 6
CH. 7
J18
CH. 8 +/–15V
MC T/R BIAS 17–24
TO “A” CONNECTOR
SHT 9A
J22
CH. 1/9
CH. 2/10 J19
+/–15V
J10
CH. 3/11 MC T/R BIAS 1–8 FROM PEN PANEL J78
SHT 9A
CH. 4/12 TO MC ASM
SHT 9A
CH. 5/13
CH. 6/14
CH. 7/15 TO COIL LED’S J15
COIL LED COIL BODY TX COIL ID HART EXT. MUX
SHT 9A PRESENT ENABLE COIL ID CONTROL 16 CHANNEL SWITCH 1.5T
CH. 8/16 J18 (MG2 A11)
J20
J1
TO/FROM SRI–3 J20 FROM PEN PANEL J77
J23 SHT 9A VOLTAGE
REGULATOR +/–15V SHT 9A CH. 1
SERIAL LOGIC INPUT CH. 2
CH. 1 PLD
J35 J36 CH. 3
CH. 2 TO CABLE I/F 11.5dB FROM UTNS3 ANTENNA
SHT 8 SHT 8 CH. 4
CH. 3
TO PEN PANEL J150 J25
HEAD TX SWITCH CONTROL
CH. 5
CH. 4 SHT 8
CH. 6
CH. 5 J21
FROM “A” CONNECTOR A1:A8 IR 8 4 A1–A4 CH. 7
CH. 6 SHT 9A FILTER 4
(SEE ILLUSTRATION ON LEFT) x8 B1–B4
RCV1:RCV4 4
J1 CH. 8
CH. 7 4 GAIN TO PEN PANEL J200
H1–H4 x4 SHT 9A
CH. 8 L1–L4 (SEE ILLUSTRATION ON RIGHT)
MC1,HEAD1=8dB
IR B1–B8 8
FROM “B” CONNECTOR J22
B1:B8 FILTER 8 SP4T X 4 ALL OTHERS=7dB J2
SHT 9A x8 B1–B8 4 #1
(SEE ILLUSTRATION ON LEFT)
63.86 MHZ
J24 63.86 MHZ
SP2T X 8 TEST OSC. CH. 9
TEST OSC.
FROM HEAD T/R J4 J23 MC5=8dB CH. 10
CH. 1 AND H1(HEAD):H8(MNS) 4 4 A5–A8 ALL OTHERS=7dB
MNS RECEIVE J2 CH. 11
CH. 2 B5–B8
SHT 9A GAIN RCV5:RCV8 4
(SEE ILLUSTRATION ON LEFT) 8 H5–H8 x4 CH. 12
CH. 3 4 L5–L8 CH. 13
CH. 4 FROM MC ASM J1–J8 J24 4
8 SP4T X 4 CH. 14
CH. 5 SHT 9A #2
(SEE ILLUSTRATION ON LEFT) CH. 15
7dB J2
CH. 6 8
GAIN RCV9:RCV16 8 TO PEN PANEL J201
x8 SHT 9A CH. 16
CH. 7 (SEE ILLUSTRATION ON RIGHT)
1
CH. 8
NOTE:
EXCITE 12.x MGD/RRF/RF SUBSYSTEM 1 Switch positions shown in 16 Channel Receive mode.
16 CHANNEL SWITCH (1.5T)
SHEET 11 OF 14

Contact Function Allocation

I1 H1 G1 F1 E5 E3 E1 D1 C1 B1 A1 Pin Twisted Description Comments
with
E1 n/a Transmit signal up to 2kw (1.5T) or 4kw (3.0T) PEP. “A” Connector only. Not present in “B” Connector
E2 n/a Key blocked in receptacle C
E3 n/a Key blocked in receptacle A Blocked for “A”
E4 n/a Key blocked in receptacle B Blocked for “B”
E5 n/a Key blocked in receptacle D
E6 n/a Reflected power to 50 ohm load 2.5kw PEP, 50w RMS. “A” Connector only. Not present in “B” Connector
F1 G1 MC bias 1 MC T/R Bias Line 17 for “A”, 25 for “B”
I10 H10 G10 F10 E6 E4 E2 D4 C4 B4 A10

F9 F10 body transmit enable
F10 F9 body transmit enable return
Contact Function Allocation G1 F1 MC bias return 1 MC T/R Bias Line 17 for “A”, 25 for “B”
Pin Twisted Description Comments G2 F2 MC bias return 2 MC T/R Bias Line 18 for “A”, 26 for “B”
with
G3 F3 MC bias return 3 MC T/R Bias Line 19 for “A”, 27 for “B”
A1 A2 coil present
A2 A1 coil present return G4 F4 MC bias return 4 MC T/R Bias Line 20 for “A”, 28 for “B”
A3 A4 multiplexerSelect0 RS–422+ G5 F5 MC bias return 5 MC T/R Bias Line 21 for “A”, 29 for “B”
A4 A3 multiplexerSelect0 return RS–422– G6 F6 MC bias return 6 MC T/R Bias Line 22 for “A”, 30 for “B”
A5 A6 multiplexerSelect1 RS–422+ G7 F7 MC bias return 7 MC T/R Bias Line 23 for “A”, 31 for “B”
A6 A5 multiplexerSelect1 return RS–422– G8 F8 MC bias return 8 MC T/R Bias Line 24 for “A”, 32 for “B”
A7 A8 multiplexerSelect2 RS–422+ G9 n/a Reserved
A8 A7 multiplexerSelect2 return RS–422– G10 n/a Reserved
A9 A10 multiplexerSelect3 RS–422+ H1 n/a Reserved
A10 A9 multiplexerSelect3 return RS–422– H2 n/a Reserved
B1 n/a Key blocked in receptacle E H3 n/a Reserved
B2 n/a Key blocked in receptacle F H4 n/a Reserved
B3 n/a Key blocked in receptacle G H5 n/a Reserved
B4 n/a Key blocked in receptacle H H6 n/a Reserved
C1 n/a MC–1A,B or MC–9B Preamp out 1, no bias, DC blocked H7 n/a Reserved
D1 n/a MC–5A,B or MC–13B Preamp out 5, no bias, DC blocked I1 n/a Reserved
D2 n/a MC–6A,B or MC–14B Preamp out 6, no bias, DC blocked I2 I5 +15Vdc (auxiliary & preamp power)
D3 n/a MC–7A,B or MC–15B Preamp out 7, no bias, DC blocked I3 I6 +10Vdc (auxiliary & preamp power)
D4 n/a MC–8A,B or MC–16B Preamp out 8, no bias, DC blocked I4 n/a –15Vdc (auxiliary power)
I5 I2 Return for aux power
I6 I3 Return for aux power
I7 I8 coil ID (Dallas OneWire protocol) All coils MUST have coil ID.
I8 I7 coil ID return (Dallas OneWire protocol) All coils MUST have coil ID.
8 Channel Multicoil “A” and “B” Connector I9 I10 coil present’
SHEET 12 OF 14
I10 I9 coil present return’

RF SYSTEM CABINET
ÎÎÎÎÎÎÎÎÎÎÎÎ Î
ASC CHASSIS
Î ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ
Î ÎÎÎÎ
Î Î
ÎÎÎÎ
SLOT 6 – RF MNS AMPLIFIER I/F SLOT 13 UPM1 MNS RF DETECTOR BD
POWER MANAGEMENT CONTROL
J4 (Optional) J4 J105
Î
Î ÎÎ
ÎÎÎÎÎÎÎ
Î Î
ÎÎÎÎ
DEBUG CAN COMMUNICATION RF FORWARD A
NOT USED REG AD NOT USED
CONTROL FROM UPM (RF Lock) 1 FWD, 2 RFLCTD
Î
ÎÎÎÎÎÎÎÎ
Î Î Î
ÎÎÎ ÎÎ Î ÎÎÎÎ
ÎÎ
J5 UNBLANK J5
TO DRIVER MODULE J13 FORWARD A
DSP REG AD RF 50Ω
J123 SHT 5B J6
Î ÎÎÎÎ
Î
CONNECTOR I/F TO AMP
COMM/CONTROL J6
TO MNS J7 AND STATUS REFLECTED A1
SHT 14 REG AD RF 50Ω
ÎÎÎÎÎÎÎÎÎÎÎÎ Î Î
CONTROL
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ ÎÎÎÎÎÎÎÎÎÎ
Î ÎÎÎÎ
Î ÎÎÎÎ
Î
SLOT 8 – RF AMPLIFIER I/F
POWER MANAGEMENT J4
REG AD RF FORWARD B FROM MNS J12
J4
Î
Î ÎÎ
ÎÎÎÎÎÎÎ
Î Î
ÎÎÎÎ
DEBUG CAN COMMUNICATION SHT 14
NOT USED 1 FWD, 2 RFLCTD J5
J5 CONTROL FROM UPM (RF Lock)
Î
ÎÎÎÎÎÎÎÎ
Î Î Î
ÎÎÎ Î ÎÎÎÎ
Î
UNBLANK FORWARD B
TO DRIVER MODULE J14
REG AD RF 50Ω
SHT 5B DSP
J6 CONNECTOR I/F TO AMP J6
COMM/CONTROL REFLECTED B1
TO SRFD2 J18 AND STATUS REG AD RF 50Ω
SHT 7C
ÎÎÎ
Î Î ÎÎÎÎÎ
ÎÎ ÎÎÎÎ
Î Î
ÎÎÎÎ
SLOT 10 – UPM2 MNS RF DETECTOR BD SLOT 14 UPM1 NB RF DETECTOR BD
(Optional) CONTROL CONTROL
J103 J4 J4
ÎÎÎÎ Î ÎÎ ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ Î ÎÎÎÎ
Î
FORWARD A RF AD REG REG AD RF FORWARD A FROM SRFD2 J6
NOT USED
SHT 7C
1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD
ÎÎÎÎ
Î ÎÎÎ Î ÎÎ Î ÎÎÎÎ
ÎÎ
J5 J5
FORWARD A FORWARD A
50Ω RF AD REG REG AD RF 50Ω
ÎÎÎÎ ÎÎÎ Î Î
ÎÎÎÎ
J6 J6
REFLECTED A1 REFLECTED A1
ÎÎ Î
CONTROL CONTROL
ÎÎÎ
ÎÎÎÎÎÎÎ ÎÎ ÎÎÎÎ
Î ÎÎÎÎ
Î
J102 J4 J4
FROM MNS J1 FORWARD B RF RF FORWARD B FROM SRFD2 J5
BACKPLANE
AD REG REG AD
ÎÎÎÎ Î ÎÎÎÎÎÎÎ
ÎÎ Î ÎÎ
ÎÎÎÎÎÎÎ
Î Î
ÎÎÎÎ
SHT 14 SHT 7C
J5 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD J5
ÎÎÎÎ ÎÎÎ Î ÎÎÎÎ

Î
FORWARD B FORWARD B
J6 J6
REFLECTED B1 REFLECTED B1
ÎÎÎ
Î Î ÎÎÎÎÎÎÎ
SLOT 10 – UPM2 MNS RF DETECTOR BD SLOT 12 – UPM2 PROCESSOR BD
CONTROL
J4 CONTROL
ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
Î Î
FROM SRFD2 J8 FORWARD A RF AD REG FPGA
SHT 7C 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD
1 FWD, 2 RFLCTD
ÎÎÎÎ
Î ÎÎÎ Î ÎÎÎÎÎÎÎÎ
Î ÎÎ Î Î ÎÎÎÎ
Î
J5 REG
FORWARD A
50Ω RF AD REG 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD UNBLANK I/F J3
REG POWER
ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
TO DRIVER MODULE J11
J6 CONVERT & SHT 5B
REFLECTED A1 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD
50Ω RF AD REG REG
ACCUMILATE
ÎÎ ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ Î Î Î
ÎÎÎÎ
Î
CONTROL 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD DSP
REG
ÎÎÎ
ÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î
ÎÎÎÎ
Î
DEBUG J4
J4 CAN COMMUNICATION
FROM SRFD2 J7 FORWARD B RF NOT USED
AD REG
ÎÎ Î
SHT 7C
J5 1 FWD, 2 RFLCTD
ÎÎÎÎ ÎÎÎ ÎÎ
FORWARD B
50Ω RF AD REG SLOT 16 & 17 – ASC POWER SUPPLY
J6
ÎÎÎ
REFLECTED B1 5V @ 25A
50Ω RF AD REG
3.3V @ 30A
12.0V @ 5.5A
–12V @ 0.5A
SLOT 12 – UPM2 PROCESSOR BD
CONTROL
ÎÎ ÎÎ
ÎÎÎÎ Î
ÎÎÎÎÎÎÎÎÎ
Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
FPGA
1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD SLOT 18 – ASC INPUT PANEL
ÎÎÎ
ÎÎÎÎÎ Î ÎÎÎÎÎÎÎÎÎ
ÎÎ ÎÎÎÎÎÎÎÎ
Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
REG
J2
J3 UNBLANK I/F 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD FROM DRIVER MODULE J2
POWER REG CAN
ÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
TO DRIVER MODULE J12 SHT 5B
CONVERT & 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD
SHT 5B ACCUMILATE
REG J3
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î ÎÎ
ÎÎÎÎÎÎÎÎ ÎÎ Î
ÎÎÎÎÎ
DSP 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD CAN RF–DIF J23
SHT 5B
REG
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î
J4 DEBUG
CAN COMMUNICATION
NOT USED

ASC CHASSIS
SHEET 13 OF 14

RFS CABINET OR SYSTEM CABINET REAR PEDESTAL (MG3)

PENETRATION PANEL
(PP1)
DRIVER MODULE
MG3 A36 MG2 A16 MNS T/R ASM
J200 J200 J1 (16 CHANNEL (LOW PROFILE
J8 SWITCH) CARRIAGE ASSEMBLY)
J23 J2 NOTCH
HFD CABINET OR (RX) FILTER
ACGD CABINET J52 J123 J102 J103 J104 J105
J3 J3 J1 J1
(TX)
MG3 A17
(CABLE I/F)
POWER
DISTRIBUTION UNIT
J9 J3 J7 J1 J11 J12 J13
13,14 J8 J2 J83
GRN/YEL
1.5T MNS AMP
1.5T MNS AMP CABINET

MNS Interconnects
SHEET 14 OF 14

SECTION 2 – MGD/RRF/RF SUBSYSTEM SUPPLEMENTAL SCHEMATICS (1.5T)
AG
AF WJK 8 JAN 96
PCN 186807
AG DRL 2 FEB 97
PCN 197402

HV DYNAMIC DISABLE FILTER
FILTER 1
J92 J72
BD1
FRONT COIL
FILTER 2
J93 J73
BD2
FILTER 3
BODY HYBRID
FROM
J94 J74 DIRECT DRIVE
DRIVER MODULE DD
FILTER 4
J95 J75
BD3
REAR COIL
FILTER 5
J96 J76
BD4
NOTE: Connector shields are electrically isolated from

enclosure housing.











COOLING SYSTEM
TABLE OF CONTENTS
Water Chillers Subsystem Group Interconnect Diagrams
ILLUSTRATION PAGE 1–1
1 OUTDOOR TSCC & RCP
2 INDOOR WATER COOLED TSCC
3 INDOOR AIR COOLED TSCC
4 OUTDOOR TGWC & RCP
5 INDOOR WATER COOLED TGWC
6 INDOOR AIR COOLED TGWC
7 DUAL INDOOR MRCC
8 INDOOR MRCC
9 DUAL OUTDOOR MRCC
10 OUTDOOR MRCC
11 INDOOR GWHX
Note:
For all Chillers and Cooling System variations (SEE Vendor Manuals on MR Service Methods CDROM)
COOLING SYSTEM i
NOTES:
EXTERNAL INTERNAL EXTERNAL INTERNAL
TO BUILDING TO BUILDING 1
CUSTOMER FURNISHED. TO BUILDING TO BUILDING NOTES:
1
2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED CUSTOMER FURNISHED.
1 MAIN SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL). 2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED
DISCONNECT 1 MAIN SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL).
PANEL 992 TAC DISCONNECT
OUTDOOR 1 OUTDOOR PANEL
RCP 992 TAC
TSCC TGWC
1
1 941 J11 MSM1 RCP
1 2 2
941 J11 MSM1
MS5
1 2 2
1 1
1 2 2
1 TO FACILITY
1 2 2 MAGNET
TO WATER 1 2
1 2 2 SUPPLY MS5
MAGNET 1
1 2 2
NOTE: 1 NOTE: 2
D ONLY INTERCONNECTS SPECIFIC TO TSCC D ONLY INTERCONNECTS SPECIFIC TO TGWC
SUBSYSTEM EQUIPMENT SHOWN HERE. SUBSYSTEM EQUIPMENT SHOWN HERE.
ILLUSTRATION 1 – OUTDOOR TSCC & RCP SUBSYSTEM GROUP INTERCONNECT DIAGRAM ILLUSTRATION 4 – OUTDOOR TGWC & RCP SUBSYSTEM GROUP INTERCONNECT DIAGRAM
NOTES: NOTES:
1 CUSTOMER FURNISHED. 1 CUSTOMER FURNISHED.
2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED 2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED
FACILITY 1 MAIN SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL). SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL).
WATER 2 1 DISCONNECT
PANEL 3 FOR INDOOR WATER COOLED TSCC ONLY. 3 FOR INDOOR WATER COOLED TGWC ONLY.
SUPPLY FACILITY
INDOOR WATER 1 2 4 E&W PROVIDED CABLE.
3 WATER 992 TAC
SUPPLY
COOLED INDOOR
WATER 992 TAC
TSCC MSM1 3
941 J11 COOLED
TGWC 1
RCP 941 J11 MSM1
2
MS5 MR3
4
PD1 TO
TO 2
2 MAGNET FACILITY
MAGNET
WATER 1 2
NOTE: NOTE: MS5
SUPPLY
SUBSYSTEM EQUIPMENT SHOWN HERE. SUBSYSTEM EQUIPMENT SHOWN HERE. 2
ILLUSTRATION 2 – INDOOR WATER COOLED TSCC SUBSYSTEM GROUP INTERCONNECT DIAGRAM ILLUSTRATION 5 – INDOOR WATER COOLED TGWC SUBSYSTEM GROUP INTERCONNECT DIAGRAM
NOTES: NOTES:
1 CUSTOMER FURNISHED. 1 CUSTOMER FURNISHED.
MAIN 2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED MAIN 2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED
1 1
DISCONNECT SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL). DISCONNECT SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL).
PANEL PANEL
INDOOR INDOOR
992 TAC AIR 992 TAC
AIR
COOLED COOLED
TSCC MSM1 TGWC MSM1
941 J11 941 J11
2
MS5
FACILITY
WATER 1 2
TO TO SUPPLY MS5
2 2
MAGNET MAGNET
2
NOTE: NOTE:
SUBSYSTEM EQUIPMENT SHOWN HERE. SUBSYSTEM EQUIPMENT SHOWN HERE.
ILLUSTRATION 3 – INDOOR AIR COOLED TSCC SUBSYSTEM GROUP INTERCONNECT DIAGRAM ILLUSTRATION 6 – INDOOR AIR COOLED TGWC SUBSYSTEM GROUP INTERCONNECT DIAGRAM
COOLING SYSTEM 1–1

NOTES: EXTERNAL INTERNAL NOTES:

1 2 1
TO BUILDING TO BUILDING 1
CUSTOMER FURNISHED. CUSTOMER FURNISHED.
TO
2 THIS GROUP CONTAINS WATER LINES WHICH 1 2 THIS GROUP CONTAINS WATER LINES WHICH
GRADIENT 1 2 2
2 COIL SHALL BE ROUTED SEPARATE FROM SHALL BE ROUTED SEPARATE FROM
INDOOR 1 TO
ELECTRICAL LINES (I.E. POWER & SIGNAL). ELECTRICAL LINES (I.E. POWER & SIGNAL).
MRCC GRADIENT
1 NOTE: OUTDOOR 1 2
1
2 COIL NOTE:
RCP
D ONLY INTERCONNECTS SPECIFIC TO MRCC MRCC D ONLY INTERCONNECTS SPECIFIC TO MRCC
1 SUBSYSTEM EQUIPMENT SHOWN HERE. 1 SUBSYSTEM EQUIPMENT SHOWN HERE.
MAIN RCP
1
DISCONNECT 1
PANEL MAIN
1 1
DISCONNECT
RCP PANEL
INDOOR 1
RCP
MRCC 1 2
OUTDOOR
MRCC 1
MS5 1 2 2
1 2 ILLUSTRATION 9 –
MS5 DUAL OUTDOOR MRCC SUBSYSTEM
1 2 2
ILLUSTRATION 7 – DUAL INDOOR MRCC SUBSYSTEM GROUP INTERCONNECT DIAGRAM
1 GROUP INTERCONNECT DIAGRAM
NOTES:
NOTES: EXTERNAL INTERNAL
1 2 TO BUILDING TO BUILDING 1
1 CUSTOMER FURNISHED.
TO CUSTOMER FURNISHED.
2 THIS GROUP CONTAINS WATER LINES WHICH
GRADIENT 2 THIS GROUP CONTAINS WATER LINES WHICH 1
COIL 1 2 2 SHALL BE ROUTED SEPARATE FROM
INDOOR 1 2 SHALL BE ROUTED SEPARATE FROM
TO ELECTRICAL LINES (I.E. POWER & SIGNAL).
MRCC ELECTRICAL LINES (I.E. POWER & SIGNAL).
GRADIENT
1
1 2 2 COIL NOTE:
RCP NOTE: OUTDOOR 1
D ONLY INTERCONNECTS SPECIFIC TO MRCC
1 D ONLY INTERCONNECTS SPECIFIC TO MRCC MRCC
SUBSYSTEM EQUIPMENT SHOWN HERE.
MAIN SUBSYSTEM EQUIPMENT SHOWN HERE. 1
RCP
DISCONNECT
PANEL 1
MAIN
DISCONNECT
PANEL
FACILITY
WATER 1 2
MS5
SUPPLY FACILITY
2 WATER 1 2
MS5 ILLUSTRATIONI 10 –
SUPPLY
OUTDOOR MRCC SUBSYSTEM
ILLUSTRATION 8 – INDOOR MRCC SUBSYSTEM GROUP INTERCONNECT DIAGRAM 2
GROUP INTERCONNECT DIAGRAM
MR3
TO
4 2 GRADIENT
PD1
INDOOR COIL
WATER
COOLED
GWHX NOTES:
FACILITY 1 CUSTOMER FURNISHED.
WATER 1 2
2 THIS GROUP CONTAINS WATER LINES WHICH SHALL
SUPPLY
BE ROUTED SEPARATE FROM ELECTRICAL LINES
3 (I.E. POWER & SIGNAL).
3 FOR INDOOR WATER COOLED GWHX ONLY.
4 GWHX PROVIDED CABLE.
FACILITY
WATER NOTE:
1 2
SUPPLY MS5 D ONLY INTERCONNECTS SPECIFIC TO GWHX
SUBSYSTEM EQUIPMENT SHOWN HERE.
2
ILLUSTRATION 11 – INDOOR GWHX SUBSYSTEM GROUP INTERCONNECT DIAGRAM
COOLING SYSTEM 1–2

Signa Excite HD 1 - 5t

Hochgeladen von

Dokumentinformationen

Originalbeschreibung:

Originaltitel

Copyright

Verfügbare Formate

Dieses Dokument teilen

Dokument teilen oder einbetten

Freigabeoptionen

Stufen Sie dieses Dokument als nützlich ein?

Sind diese Inhalte unangemessen?

Copyright:

Verfügbare Formate

Signa Excite HD 1 - 5t

Hochgeladen von

Copyright:

Verfügbare Formate

Technical

SignaR EXCITE HD 1.5T

Copyrighte 2004 by General Electric Company, Inc.

File a report with

D Call 1–800–548–3366 and use option 8.

D Fill out a report on http://3.28.216.127/sctq/InstallFulfill/IFHome.htm

D THIS SERVICE MANUAL IS AVAILABLE IN ENGLISH ONLY.

D CE MANUEL DE MAINTENANCE N’EST DISPONIBLE QU’EN ANGLAIS.

D DIESES KUNDENDIENST–HANDBUCH EXISTIERT NUR IN

D ESTE MANUAL DE SERVICIO SÓLO EXISTE EN INGLÉS.

D ESTE MANUAL DE ASSISTÊNCIA TÉCNICA SÓ SE ENCONTRA

D NÃO TENTE REPARAR O EQUIPAMENTO SEM TER CONSULTADO E

D O NÃO CUMPRIMENTO DESTE AVISO PODE POR EM PERIGO A SEGURANÇA

D IL PRESENTE MANUALE DI MANUTENZIONE È DISPONIBILE

D SI PROCEDA ALLA MANUTENZIONE DELL’APPARECCHIATURA SOLO DOPO

D NON TENERE CONTO DELLA PRESENTE AVVERTENZA POTREBBE FAR

REV DATE PRIMARY REASON FOR CHANGE

LIST OF EFFECTIVE PAGES

2 – STANDARD CONVENTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1

PATIENT HANDLING GRADIENT

SYSTEM OPERATOR WORKSPACE

TAB ORGANIZATION FOR THIS DIRECTION

SECTION 2 – STANDARD CONVENTIONS

BOLD, DASHED MODULE or INTERFACE

A BB = Buffered Data or Broadband

G INT or INTR = Interrupt

PSU = Power Supply Unit SAG = Sagittal

(GOC COMPUTER CABINET) OPERATOR WORKSPACE TABLE

REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM

EXCITE 12.x OVERALL SYSTEM

(GOC COMPUTER CABINET) OPERATOR WORKSPACE TABLE

2 SERVICE PORT STEREO SPEAKERS

AUX INPUT STEREO RACK

REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM

EXCITE 12.x OVERALL SYSTEM

F/O  

!(.-  # - 8 GRADIENT CAB

RFS CABINET (MR2) NOTES:

RF/SYSTEM CABINET (SRFD II) (1.5T)

IPS MODULE IPS MODULE

BUCK/H–BRIDGE POWER BUCK/H–BRIDGE POWER

SCALEABLE RF DRIVER II (SRFD II) (1.5T)

EXCITE 12.x  

BODY QUADRATURE HYBRID ASM 4 ONLY PRESENT WITH TRM COILS.

MGD CHASSIS RRF CHASSIS DRIVER GP MODULE HIGH ORDER

MGD CHASSIS RRF CHASSIS DRIVER HIGH ORDER

1 HOS is optional. Terminator must be connected to

(GOC COMPUTER CABINET) OPERATOR WORKSPACE TABLE

2 SERVICE PORT STEREO SPEAKERS

AUX INPUT STEREO RACK

  

EXCITE 12.x OVERALL SYSTEM

OPERATOR WORKSPACE 1–1

(GOC COMPUTER CABINET) OPERATOR WORKSPACE TABLE

REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM

EXCITE 12.x OVERALL SYSTEM

OPERATOR WORKSPACE 1–2

OPERATOR WORKSPACE TABLE (OW1 A1)

OPERATOR WORKSPACE 1–3

OPERATOR WORKSPACE TABLE (OW1 A1)

SCAN CONTROL INTERFACE MODULE

   +

F/O

!(.- # - 8 GRADIENT CAB

EXCITE 12.x

+