Department of Electrical and Electronic Engineering

Faculty of Engineering
University Putra Malaysia
KEE 3117 Analog System
Take Home Test
Name:
Date of submission: 30th March 2004 10 a.m.
Please submit the question paper with your answer.
1. Calculate the dc bias values of Ic and Vc for the matched transistors of circuit shown
in figure 1. Assume Rc=18kΩ, V=18V, β=200, IQ=2mA. Calculate the common-
mode and differential mode gain for the circuit

Figure 1
2. Plot the transfer characteristics v01 and v02 vrs vI for the circuit shown in figure 2. If
the input vI is 2 Sin 2000t, plot vo1 and vo2.

Figure 2
3. Plot the transfer characteristics v0 vrs vI for the circuit shown in figure 3. If the input
vI is 2 Sin 2000t, plot vo.
 Figure 3
4. How will you get following output if V1, V2 and V3 are inputs?

5. Determine the transfer function for the network shown in figure 4.

Figure 4
6. Sketch and label the transfer characteristics v0 vrs vI for the circuit shown in figure 5
(a) and 5(b). Assume ideal opamp and zener voltages of Z1 and Z2 by Vz1 and Vz2.

Figure 5(a) Figure 5(b)

7. Find L(s), L(jw), the frequency for zero loop phase and R2/R1 for oscillation.
 Figure 6
8. Find the output voltage V0 in terms of input voltage Vs in figure 7.

Figure 7
9. Derive the transfer function for the circuit shown in figure 8. Find the high frequency
gain and the cutoff frequency. Design the circuit to obtain a high frequency gain of 40
dB, 3 dB cutoff frequency of 1 kHz and a high frequency input resistance of 1 Kohm.
What is the unity gain bandwidth of this amplifier?

Figure 8
10. The peak output for the comparator shown in figure 9 is ±10 V and R2 = 4R1. Show
the transfer characteristics and find the threshold voltage VTH and VTL when the
output will switch from one state to another state. If a 10 V peak triangular wave is
applied at the input of this circuit, draw the output waveform of this circuit.
 Figure 9
11. Two identical amplifier blocks, each having A = 200 and fh = 100 kHz are available
for designing an amplifier whose overall gain is to be 1000 and whose high frequency
cut off fh ≥ 2 MHz. Assume that two stages of amplifiers are non-interactive. What
range of feedback factor (β) will satisfy the design requirements?