INTRODUCTION TO MICROCOMPUTER

ARCHITECTURE
CHAPTER 1

Chapter 1 BETC3483 1
At the end of the class, you will be able:

to understand the evolution of microprocessor.

to describe the microprocessor system.

to explain about microprocessor, microcontroller, comparisons,

advantages, disadvantages and microcontroller families.

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TYPES OF COMPUTERS

Mainframe
Minicomputer

Workstation

Microcomputer

Embedded
System

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EVOLUTION OF COMPUTERS

Chapter 1 BETC3483 4
EVOLUTIONS OF CPUs

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Chapter 1 BETC3483 6
MICROPROCESSOR VS MICROCONTROLLER

VS

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MICROPROCESSOR

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Chapter 1 BETC3483 9
 SYSTEM ORGANIZATION
• Central Processing Unit (CPU)
• Memory
• Input/Output (I/O) circuitry CPU
• Buses
– Address bus
– Data bus
– Control bus

Address bus - carrying the address for the data inside the memory (24-bit)
Data bus - carrying the data in/out P (16-bit)
Control bus - carrying the signal which is used to control the devices and status of the devices.
(E.g.: read/write process)

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 CENTRAL PROCESSING UNIT (CPU)
• Directs the operation of the
other units by providing timing Control Unit
and control signals.
• Performs all the arithmetic and
logical operations.
• Holds values of internal Arithmetic Logic
operation, such as the address Unit
of the instruction being
executed and the data being
processed
• Accumulator, Program Counter
Register, Status Register Register

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MEMORY
Data lost upon power off – short term memory
Has two major types:
oStatic RAM – fast, easy to interface but small sizes
oDynamic RAM – Larger but requires refreshing operation, slow

RAM
Store permanent information, data still available after power off
Store critical information such as start up, restart, bios
configuration, initialization process
Small size, need RAM to download main program such in PC

ROM
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CONCEPT OF MEMORY

• We knew that total address bus for 68K

µp is 24 bit.

224 = 16 777 216 Byte

Last address for a memory location is:

224 – 1 = 16 777 215 Byte

= $FF FFFF

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INPUT / OUTPUT DEVICES

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BUS SYSTEM
(address bus - unidirectional)
- A bus which carries an address from the uP to the memory. (
to confirm the location of an address).
- The total of address bit is can be used to determine the total
memory can be accessed in a memory system.
- The address is a one way direction which is from CPU to
other devices only
(Data bus – bidirectional)
- A bidirectional system bus due to the data can be transferred
either to or from CPU.
- Data can be either input or output based on the process out or
into the CPU which is read or write.
- The size of the data is based on the total data bit is being

(Control bus – bidirectional)

- To bring the discrete signal which is used to synchronize the whole
operation for a microcomputer.
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BASIC OPERATION OF MICROCOMPUTER
Reset Start here when reset signal is received

1. Output instruction address onto address bus

Fetch 2. Read instruction pattern from memory onto data bus
3. Increment instruction pointer (program counter)

1. CPU received byte (Opcode) from data bus. (Opcode fetch)

Decode
2. Decode Opcode to generate signal.
3. Multibyte instruction :- fetch the next byte from memory.
4. Repeat the same procedure.

1. If necessary, read data from memory

Execute
2. Execute Instruction
3. If necessary, write results to memory

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 READ OPERATION

ADDRESS : 00000011 0 00001110

1 10000000
ADDRESS
ADDRESS : 00000011
BUS: 00000011 2 10101010
CPU 3 01010101
DATA : 01010101
DATA BUS : 01010101
𝟐𝑵
𝟐𝑵 − 𝟏

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 WRITE OPERATION
ADDRESS : 00000001

ADDRESS : 00000001 0 00001110

1 10000000
2 10101010
ADDRESS BUS: 00000001
CPU 3 01010101

DATA
DATA : 10000000
BUS : 10000000

𝟐𝑵
𝟐𝑵 − 𝟏

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Chapter 1 BETC3483 19
APPLICATIONS OF MC68000

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 SPECIFICATION OF MC68000
• 32-bit data and address registers
• 16-bit data bus (addressable memory 16 MB)
• 24-bit address bus
• 14-Addressing Modes
• Memory-Mapped I/O
• 24-bit Program Counter
• 56 Powerful Instructions Types
• Operations on 5 Main Data Types
• 7 interrupt levels
• Clock speeds: 4MHz to 12.5MHz
• Synchronous and asynchronous data transfer
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 CENTRAL PROCESSING UNIT (CPU)
Register : To
ALU : To
store
perform temporary
algorithm and data.
mathematical
operation.

Control Unit : To
control operation
by giving the
control signal and
the timing.

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REGISTER

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REGISTER D0
D1
D2
Data Register D3
D4
D5
D6
D7
31 0
A0 Data Register 32 bit : 8 (D0-D7)
A1
Address Register A2 Address Register 32 bit : 7 (A0-A6)
A3
A4 Stack Pointer (A7) : 2 (USP & SSP) 32 bit
A5
A6 Program Counter : 1 (PC) 32 bit
A7 USP Status register 16 bit: 1 (SR)
SSP
31 23 0
Program counter PC
15 0
Status register SR

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DATA REGISTER

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ADDRESS REGISTER

b) Register(An))
• The function is to stored the information for the address location for the data inside the memory.
• The address information is referred to the address located at the memory.
• It also work as a pointer – A7
• Consist of 7 registers (A0 – A6) with each of the register size at 32 bit.
• Byte operation is not allowed as the size of the address are16 bit (words) / 32 bit (long word).
• If the words operation is executed, the value for the address will be extended to 32 bit.

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STACK POINTER
c) (Stack Pointer (SP))
• Address Register at A7.
• The function is the same like other address register but the main function is to
execute the subroutine.
• There are 2 available stack pointer(each of the SP size at 32 bit)

i. Supervisor Stack Pointer (SSP)

ii. User Stack Pointer (USP)
- Special instruction such as STOP / RESET cannot be executed in this mode (use
to stop the user operation or the whole system)

• Only one stack pointer can be activated which is based either at supervisor or
user mode.
• The SP is giving the safety when the system is in operational

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PROGRAM COUNTER

• PC size at 32 bit and the function is to point the next address for the
instructions to be executed.
• To execute an instruction, the PC register will be filled with the address of
the instruction.
• When the instruction is being decoded by the control unit, the PC will be
add up, so it will keep pointing to the next instruction address.

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STATUS REGISTER (SR)
System Byte User Byte

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
T S I2 I1 I0 X N Z V C

CCR

 Status register can be divided into two:

a) (System Byte)
b) (User Byte)/(Condition Code Reg) (CCR)

 In supervisor mode, the whole content of the register can be read and write while
when in user mode, the whole content still can be read but only the lowest byte
from the SR can be written.

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STATUS REGISTER
System Byte User Byte

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
T S I2 I1 I0 X N Z V C

Overflow

Carry
C (carry) : Will set to 1 when there is overflow when add operation and borrow
from subtract operation.
V (overflow) :This flag is set, if an overflow occurs,
for example if the result of a signed operation is large enough to be
accommodated in a destination register..

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STATUS REGISTER
System Byte User Byte

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T S I2 I1 I0 X N Z V C

Zero
Negative
Extend
Z (zero) : will set to 1 when the operational result is zero

N (negative) : will set to 1 when the operational result is negative

X (extend) : will copy the C bit value for arithmetic operation

Note : CCR change based on the result of the instructions used

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STATUS REGISTER
System Byte User Byte

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
T S I2 I1 I0 X N Z V C

Interrupt
Mask

Interrupt mask (bit 8 – bit 10)

• Can be changed in supervisor mode to set the lowest interrupt mask for CPU
• Consist of 7 level of interrupt mask (0012 to 1112)
• E.g. : If the interrupt mask has the value 2 / 0102 then level 2 and 2 for the interrupt
mask will be ignored. Only interrupt level 3-7 is allowable.

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STATUS REGISTER
System Byte User Byte

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
T S I2 I1 I0 X N Z V C
Supervisor
S-Bit (Supevisor)
• Option to use user mode where (bit 13 = 0) / supervisor mode (bit 13 = 1)
• Supervisor Mode : Able to access the supervisor stack pointer (SSP)
: All the status register can be accessed
: All the instruction set can be used
• User Mode : Only able to access User Stack Pointer (USP)
: Only lower byte of the status register can be accessed
: There are instructions can’t be executed

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STATUS REGISTER
System Byte User Byte

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
T S I2 I1 I0 X N Z V C
Trace

T-Bit(Trace)
• Trace bit can be accessed in supervisor mode only.
• T Bit = 0 : All the instructions are executed per normal
• T Bit = 1 : 68k operational in trace mode
: Every after instructions, there will be one exceptional trace happens.
The CPU will execute the special routine for debugging.
With this exceptional, the value of the register will be monitored at t
he terminal.

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CPU ADDRESSING MODE

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MEMORY ORGANIZATION

8 bit 16 bit

$000000 1100 1010 $000000 1100 1010 1100 1101 $000001

$000001 1100 1101 $000002 1000 1100 1000 1100 $000003
$000002 1000 1100 $000004 $000005
$000003 1000 1100 $000006 $000007

$FFFFFE $FFFFFC $FFFFFD

$FFFFFF $FFFFFE $FFFFFF

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ADDRESSING BYTE IN MEMORY

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ADDRESSING WORD IN MEMORY

15 7 0

$000000 01110110 11101110 $000001

$000002 WORD 1 $000003

$000004 WORD 2 $000005

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THANK YOU
Chapter 1 BETC3483 39