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J. T. Andrews 1 , R. Choubey 1 , O P Choudhary 1 , N. Malviya 1 , A. Patel 1 , M. Kumar1 , S.

Chouksey 1 , J. Solanki1

1 National

MEMS Design Center, Department of Applied Physics, Shri G S Institute of

Technology & Science, Indore 452003 MP, India

Abstract

A logic gate is a device that performs a certain Boolean logic operation on one or more logical

inputs and produces a single logical output. The logic values are either "true or "false and are

represented as 1 and 0, respectively. In other words Logic gates are bistable devices, that is,

they may yield one of these two possible stable outputs. The relationship between the input logic

and output logic are obtained using Boolean algebra or from truth tables.

NAND logic gate is one of the important logic gate since it is a universal gate. Any logic

operation could be performed with various combination of NAND logics. All-optical logic

gates have received considerable attention in the field of optical networks, all-optical bit-pattern

recognition, all-optical biterror rate monitoring, all-optical packet address and payload

separation, all-optical label swapping, etc. [1]. Recently, efforts are made to demonstrate various

logic operation using all-optical circuits through three core photonic crystal structures [2],

photonic crystal based adder [3], optical circuit through Mach-Zhender interferometer [4]. Many

approaches have been proposed to achieve all-optical logic functions, based on the nonlinear

effects either in optical fibre or in semiconductor material. In the present work we propose a

simple and effective logic operation.

As shown in FIgure 1, the power output at output ports are function of wavelength and phase

difference induced by each of them. Accordingly, we design the following logic for the

demonstration of NAND gate.

1) Let us call optical signals of wavelengths lambda_1 and lambda_2 corresponding to bits '0'

and '1'.

2) When at ports 1 or 2, a signal of lambda_1, if applied, the output is obtained in both ports 3 and

4. We call port 3 as the output logic, this gives a finite output, that we call as logic '1' as shown in

Fig. 2a and 2b respectively.

3) When a signal of lambda_1, if applied at both input ports, the output corresponds to an output

of logic '1' as shown in Fig. 2c.

4) On the other hand if an input of lambda_2 is applied at both ports 1 and 2, the output at port 3

corresponds to a logic of '0' as represented in Fig. 2d. This is due to the additional path

difference of lambda_2/2 added to port 2.

The output corresponding to above cases are also shown in Fig. 3, demonstrating the NAND

logic. As discussed above, the operation of using appropriate lambda_1 and lambda_2 generates

a truth table corresponding to a NAND logic operation.

In conclusion we proposed a novel method for all optical logic operation using simple bi-

directional coupler with unequal length of waveguide. The simulated results shows that the logic

operation is possible. The truth table established shows the NAND logic operation. Since the

logic operations are performed with all optical circuits without the help of any electronic system,

ultrafst operations of the order of hundreds of THz could be possible.

Reference

[1] H. Chen, G. Zhu, Q. Wang, J. Jaques, J. Leuthold, A.B. Piccirilli, and N.K. Dutta, Alloptical

logic XOR using differential scheme and Mach-Zehnder interferometer, Electron. Lett., 38,

1271-127 (2002)

[2] S. C. Xavier, K. Arunachalam, E. Caroline, W. Johnson, Design of twodimensional photonic

crystal-based all-optical binary adder Opt. Eng.52, 025201, (2013).

[3] T.Chattopadhyay, Simultaneous logic operations and their inverse in a single circuit using

simple optical components, Optics laser Technology, (Elsevier), 48,35-43 (2013).

[4] X.-Q. Li, and Y. Xu, Optical sensing by using Photonic Crystal based MachZehnder

interferometer, Opt. Commun., in Press, 2013.

[5] R. G. Hunsperger, “Integrated Optics: Theory and Technology”, Springer, Berlin (2009).

Figure 1: The dual channel waveguide used a optical logic circuit to demonstrate NAND

operation.

Figure 2: Demonstration of NAND logic operations.

Figure 3: The input and output signals at ports 1,2 and 3,4. The signals corresponding to each

ports are shown in table 1 for better understanding of NAND operation.

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