540 views

Uploaded by HadeedAhmedSher

Bias stabilization and AC analysis I

- Chenming Hu Ch8 Slides
- Week14
- Week 7 resources
- Week8
- UPDA Electrical Engineering Exam Questions 2015 Part 2 - December 2015- اختبار الهندسة الكهربائية
- Week 10 resources
- Week12 resources
- Week1 resources
- Week4
- Week5 resources
- Week13
- Week3
- Week15
- Week2
- Week6
- 7. Bipolar Junction Transistor Characteristics.pdf
- Transistors Tutorial
- 5_BJT Small Signal
- Diode
- Bipolar Transistors Fundamentals.docx

You are on page 1of 31

Ghulam Ishaq Khan Institute of Engineering Sciences and Technology, TOPI 23460

hadeed@giki.edu.pk

April 9, 2018

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 1 / 31

1 Bias Stabilization

Determination of S(ICo )

Determination of S(VBE )

Determination of S(β)

2 BJT AC analysis

Common Emitter configuration

Common base configuration

Common collector configuration

Common emitter fixed bias configuration

Common emitter voltage divider configuration

Common base configuration

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 2 / 31

Bias Stabilization

parameters.

IN BJT circuits the collector current is sensitive to

β— It increases with rise in temperature

VBE — It decreases 2.5mV per degree Celsius rise

ICO —This reverse saturation current doubles every 10 degree Celsius

rise

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 3 / 31

Bias Stabilization

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 4 / 31

Bias Stabilization

Stabilization factor (S) for each parameter explained in slide 3 is given as.

S(ICO )

∆IC

S(ICO ) = (1)

∆ICo

S(VBE )

∆IC

S(VBE ) = (2)

∆VBE

S(β)

∆IC

S(β) = (3)

∆β

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 5 / 31

Bias Stabilization Determination of S(ICo )

Determination of S(ICo )

β+1

S= dIB

(8)

The derivation of expression for 1 − β( dI C

)

S(ICo ) requires calculus. To solve for the unknown ( dIdIB

),

C

Starting the procedure, consider the circuit below which is

actually a voltage divider biasing

IC = ICm ajority + ICm inority (4)

circuit with thevenin equivalent in

IC = βIB + (1 + β)ICO (5) place.

Derivating it w.r.t. IC .

dIB dICO

1=β + (1 + β) (6)

dIC dIC

dIB (1 + β)

1=β + (7)

dIC S

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 6 / 31

Bias Stabilization Determination of S(ICo )

Determination of S(ICo )

Applying the KVL on the input loop yields

Differentiating wrt IC .

dIB dIB

0 = Rth + (1 + )RE (11)

dIC dIC

dIB −RE

= (12)

dIC Rth + RE

Inserting (12) into (8)

Rth

1+ RE

SICO = (β + 1) Rth

(13)

(β + 1) + RE

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 7 / 31

Bias Stabilization Determination of S(ICo )

Determination of S(ICo )

RB

From (15) if the RE >>β then the expression can be simplified as

SICO ≈ β (14)

RB

For RE <<1 the expression is

SICO ≈ 1 (15)

However, the good designs have RB

larger than RE . This requires a

tradeoff between the two.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 8 / 31

Bias Stabilization Determination of S(ICo )

Determination of S(ICo )

For other configurations the SICO can be calculated as

Fixed biased configuration

SICO ≈ β (16)

RB

1+ RE

SICO ≈ (β + 1) RB

(17)

(β + 1) + RE

RB

1+ RE

SICO ≈ (β + 1) RB

(18)

(β + 1) + RE

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 9 / 31

Bias Stabilization Determination of S(ICo )

Example 4.35

Calculate the stability factor and

the change in IC from 25◦ C to

100◦ C for the transistor defined

by Fig.4 for the following

emitter-bias arrangements:.

The change in IC is given in (1), and the

RB

RE = 250 change is ICO is calculated using Fig.4

RB

RE = 10 ∆IC = (41.83)(19.9nA) = 0.83µA (20)

RB

RE = 0.01

Similarly the value of SICO for the other

Using the expression in (17) for two cases can be calculated

the first arrangement

50(1 + 250

SICO = = 41.38

50 + 250

(19)

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 10 / 31

Bias Stabilization Determination of S(VBE )

Determination of S(VBE )

−β

SVBE ≈ (21)

RB

−β

RE

SVBE ≈ (22)

β + RRBE

−β

RE

SVBE ≈ (23)

β + RRthE

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 11 / 31

Bias Stabilization Determination of S(VBE )

Determination of S(VBE )

−β

RC

SVBE = RB

(24)

β +R C

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 12 / 31

Bias Stabilization Determination of S(β)

Determination of S(β)

IC1

S(β) = (25)

β1

S(β) = = (26)

∆β β1 (β2 + RRBE )

S(β) = = (27)

∆β β1 (β2 + RRthE )

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 13 / 31

Bias Stabilization Determination of S(β)

Determination of S(β)

IC1 (RB + RC )

S(β) = (28)

β1 (RB + β2 RC

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 14 / 31

BJT AC analysis

BJT AC analysis

It is assumed that the currents and the voltages have the polarities as

shown below.

replacing capacitors with a short circuit and redrawing the circuit.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 15 / 31

BJT AC analysis

BJT AC analysis

short circuit.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 16 / 31

BJT AC analysis

BJT AC analysis

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 17 / 31

The re transistor model Common Emitter configuration

junction and the output is taken across the CE junction.

Recall that a forward biased junction in a BJT can be replaced with a

diode and the collector current can be expressed as a controlled current

source as shown below.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 18 / 31

The re transistor model Common Emitter configuration

offered by the diode in forward biased condition.

Where,

VT 26mV

re = = (29)

ID IE

The controlled current source represents the collector current.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 19 / 31

The re transistor model Common Emitter configuration

The resistance re can be reflected to the input side. Let Zi be the

impedance seen by the input side.

Vi Vbe

Zi = = (30)

Ib Ib

Vbe = Ie re = (Ic + Ib )re = (βIb + Ib )re = (β + 1)Ib re (31)

Vbe ((β + 1)Ib re

Zi = = = (β + 1)re ≈ βre (32)

Ib Ib

The equivalent circuit then looks like

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 20 / 31

The re transistor model Common Emitter configuration

The impedance seen by the load resistance can be calculated using the

output characteristics of common emitter amplifier.

The inverse of the slope provides the output resistance ro . Note that the

slope of all the lines if extended touch the x axis at a single point. It is

called Early Voltage (VA ). Early voltage is lager than the VCE therefore,

(VA ) can also be used to calculate the ro .

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 21 / 31

The re transistor model Common Emitter configuration

shown below.

The typical value of output resistance is in the range of 40k to 50k ohm.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 22 / 31

The re transistor model Common base configuration

configuration. The difference however is on two aspects. First, because

the emitter is input therefore its resistance is not reflected to base.

Secondly, the input current (Ie ) and output current (Ic ) is related by α.

The output characteristics of CB reveal that the ro is very high. There is

no phase shift in CB configuration.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 23 / 31

The re transistor model Common collector configuration

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 24 / 31

Use of re model in transistor circuits Common emitter fixed bias configuration

shown below.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 25 / 31

Use of re model in transistor circuits Common emitter fixed bias configuration

typically give in the datasheet.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 26 / 31

Use of re model in transistor circuits Common emitter fixed bias configuration

Zo = RC ||ro ≈ RC (34)

The gain Av is given as

Av = = (35)

Vi Vi

Vi Vi

Ib = =⇒ Vo = −β( )(Rc ||ro ) (36)

βre βre

(35) is then equal to

Av = = ≈ (37)

Vi re re

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 27 / 31

Use of re model in transistor circuits Common emitter fixed bias configuration

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 28 / 31

Use of re model in transistor circuits Common emitter voltage divider configuration

The CE voltage divider bias configuration is arranged for the AC analysis

as shown below.

R1 R2

R 0 = R1 ||R2 = (38)

R1 + R2

Zi = R 0 ||βre (39)

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 29 / 31

Use of re model in transistor circuits Common emitter voltage divider configuration

Zo = RC ||ro ≈ RC (40)

Av = = ≈ (41)

Vi re re

This shows that the gain is independent of the biasing configuration.

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 30 / 31

Use of re model in transistor circuits Common base configuration

Example 5.2

In order to solve for the circuit first

For the network shown find a)re b)Zi

determine if βRE >>10R2 . Because

c)Zo (ro = ∞Ω) and d)Av (ro = ∞Ω)

this condition is true therefore,

VCC R2

VB = = 2.81V (42)

R1 + R2

VE = VB −VBE = 2.81−0.7 = 2.11V

(43)

VE

IE = = 1.41mA (44)

RE

26mV

re = = 18.44Ω (45)

IE

Using (39) and (40) the Zi =1.35kΩ

and Zo =6.8kΩ. Gain Av is

calculated as -386.76 using (41).

Engr. Dr. Hadeed Ahmed Sher (FEE, GIKI) Week 11 Resources April 9, 2018 31 / 31

- Chenming Hu Ch8 SlidesUploaded byskarthikmtech
- Week14Uploaded byHadeedAhmedSher
- Week 7 resourcesUploaded byHadeedAhmedSher
- Week8Uploaded byHadeedAhmedSher
- UPDA Electrical Engineering Exam Questions 2015 Part 2 - December 2015- اختبار الهندسة الكهربائيةUploaded byMusa'b
- Week 10 resourcesUploaded byHadeedAhmedSher
- Week12 resourcesUploaded byHadeedAhmedSher
- Week1 resourcesUploaded byHadeedAhmedSher
- Week4Uploaded byHadeedAhmedSher
- Week5 resourcesUploaded byHadeedAhmedSher
- Week13Uploaded byHadeedAhmedSher
- Week3Uploaded byHadeedAhmedSher
- Week15Uploaded byHadeedAhmedSher
- Week2Uploaded byHadeedAhmedSher
- Week6Uploaded byHadeedAhmedSher
- 7. Bipolar Junction Transistor Characteristics.pdfUploaded byHarsh Saini
- Transistors TutorialUploaded byVivek Roy
- 5_BJT Small SignalUploaded byMelvin Davis
- DiodeUploaded byReen Lee
- Bipolar Transistors Fundamentals.docxUploaded byHemal Vyas
- 13001 600 V 200 mA.pdfUploaded byasuid
- 2n3906Uploaded byRodolfo Rodo
- JC501pUploaded byarcangel_pic
- Amplifiers Module 04Uploaded byWagner Jose Vicentin
- Rykov Tesis Prametros SUploaded bysebastian nasi
- Tip 31Uploaded byCytec Mendoza Informatica
- Chapter3_BJT(for IT Class)Uploaded byRohitRawat
- BR101 Data SheetsUploaded bytarpino
- CEE 321_7Uploaded byTolgahan Şusur
- Expt 5 Transistors I Methods and RnD 1Uploaded byKen Rubio

- Week 8Uploaded byHadeedAhmedSher
- Week 7Uploaded byHadeedAhmedSher
- Week 6Uploaded byHadeedAhmedSher
- Week 5Uploaded byHadeedAhmedSher
- Week 4Uploaded byHadeedAhmedSher
- Week_3Uploaded byMirza Azhar Haseeb
- Week_2Uploaded byMirza Azhar Haseeb
- Week_1Uploaded byMirza Azhar Haseeb
- Aqaid Salf SalaheenUploaded byHadeedAhmedSher
- KhutbaatUploaded byHadeedAhmedSher
- Week15Uploaded byHadeedAhmedSher
- Week13Uploaded byHadeedAhmedSher
- Week12 resourcesUploaded byHadeedAhmedSher
- Week 10 resourcesUploaded byHadeedAhmedSher
- Week6Uploaded byHadeedAhmedSher
- Week5 resourcesUploaded byHadeedAhmedSher
- Week4Uploaded byHadeedAhmedSher
- Week2Uploaded byHadeedAhmedSher
- Week3Uploaded byHadeedAhmedSher
- Week1 resourcesUploaded byHadeedAhmedSher
- Week 14Uploaded byHadeedAhmedSher
- Week 13Uploaded byHadeedAhmedSher
- Week 12Uploaded byHadeedAhmedSher
- Week 11Uploaded byHadeedAhmedSher
- Week10Uploaded byHadeedAhmedSher

- Temperature dependent electrical properties of n-ZnOp-Si heterojunction prepared by spray pyrolysis growth of ZnO thin film on p-Si.pdfUploaded byGiorgos Papageorgiou
- What are FPGA.docUploaded bysjo05
- Reconfigurable ComputingUploaded byसुधांशु जनवाड़कर
- Analysis of Free-space Optical System under Different Atmospheric ChannelUploaded byAnonymous kw8Yrp0R5r
- AT6356E_microIFEM_Piezo_4P4x.pdfUploaded bymilkicas266
- 1670.4-2004Uploaded byQuyet Thang Tran
- 3G Prepaid Datacard ServiceUploaded byfixvex
- DFCA Trial - Claro ArgentinaUploaded byMohammad Moniruzzaman
- hdrw720_17_dfu_aen.pdfUploaded byKenneth S.
- Elecom Engineering - Company Profile - 2010 - Telecommunication _With Few PagesUploaded byAdrian Anthony
- Digital Electronic ClockUploaded bygunvarrel
- ZTE UMTS Power Control Feature Guide U9.2Uploaded byRamesh Nikam
- Ba Scalance x 200 76Uploaded byHhaabbde Sybaritz
- Lecture 2marked.pptUploaded bynaufalhizamiar
- udldUploaded byNaymyo Inblac
- 5th Sem Trainer KitUploaded byjigs2k2
- What is RouterboardUploaded bynic123456456
- NIC Components NRSZ SeriesUploaded byNICComp
- Bill200707Uploaded byDr. Izzat Husain
- How to Make a RJ45 Cable TesterUploaded byapi-19710427
- WB AMR(GBSS16.0_02)Uploaded byCuongDola
- PWR DIVUploaded bydhan_anji
- GME GX 660 marine radio gx660-3_imUploaded byJohn Mustafa
- 12_OS8535CEN52GLA0_NSN UltraSite & Metrosite SurveillanceUploaded byGhaza Horra
- sources of harmonicsUploaded byDeepti Gupta
- Antod 201-Annex-EVUploaded byTechne Phobos
- CNT 4007 Assignment 4Uploaded byandrewsection287
- whitepaper_CAS.pdfUploaded byshimogapradeep
- JAN 2013Uploaded byRoy Ezmeer
- Esr Meter Dick Smith Kit k7204 by Bob Parker AssemblyUploaded byPete Sapwell