Specifications

Please visit Intel Core i5-4460 and Intel Xeon E3-1231 v3 pages for more detailed specifications
of both microprocessors.

Intel Core i5-4460 Intel Xeon E3-1231 v3

Market segment Desktop Server
Manufacturer Intel
Family Core i5 Xeon

Basic details
Model number i5-4460 E3-1231 v3
CPU part number CM8064601560722 CM8064601575332
CM8064601575384
Box part number BX80646I54460 BX80646E31231V3
BXC80646I54460
Introduction date May 11, 2014

CPU features
Core name Haswell Haswell LGA1150
Platform name Denlow
Microarchitecture Haswell
Technology (micron) 0.022
Data width (bits) 64
Socket Socket 1150
Frequency (MHz) 3200 3400
Turbo Frequency (MHz) 3400 / 3400 / 3300 / 3200 3800 / 3600
Clock Multiplier 32 34
L1 cache 128 KB (code) / 128 KB (data)
L2 cache (KB) 1024
L3 cache (KB) 6144 8192
Max temperature (°C) 72.72
TDP (Watt) 84 80
Cores 4
Threads 4 8
Multiprocessing 1

Instruction set extensions

AES / Advanced Encryption +
Standard
AMD64 / EM64T 64-bit +
technology
AVX / Advanced Vector +
Extensions
AVX2 / Advanced Vector +
 Extensions 2
F16C / 16-bit Floating-Point +
conversion
FMA3 / 3-operand Fused +
Multiply-Add
MMX +
SSE +
SSE2 +
SSE3 +
SSE4.1 +
SSE4.2 +
SSSE3 / Supplemental SSE3 +
TSX / Transactional - +
Synchronization Extensions

Supported technologies
Hyper-Threading - +
PowerNow! / Enhanced +
SpeedStep
Trusted Execution - +
Turbo Core / Turbo Boost +
Virtualization +
Virus Protection / Execute +
Disable bit

Integrated Graphics
GPU Type HD 4600 None

Integrated Memory Controller(s)

The number of controllers 1
Memory channels 2
Supported memory DDR3-1333, DDR3-1600
Maximum memory bandwidth 25.6
(GB/s)
Notes:

Rows with different specifications or features are highlighted.

For detailed specifications of "Intel Core i5-4460" or "Intel Xeon E3-1231 v3" parts please click
on the links in the table header.

CPUIDs
The table below compares support for x86 extensions and technologies, as well as individual
instructions and low-level features of the Intel Core i5-4460 and Intel Xeon E3-1231 v3
microprocessors. Information in this table was retrieved from actual processors using CPUID
instruction, and we also utilized internal timer to measure CPU frequency. Be aware that all
technologies, disabled in BIOS or by a virtual machine, will be shown as not supported.
Different steppings of Intel processors may also have slightly different features. In rare cases,
measured frequency may differ from official specifications.

CPUID 1 CPUID 2
Manufacturer Intel
CPU Family Core i5 Xeon
Model / Processor i5-4460 E3-1231 v3
Number
Measured Frequency 3601 MHz 3400 MHz
CWID version 0.5
Part number (supplied) CM8064601560722 BX80646E31231V3
Part number (guessed) CM8064601560722 CM8064601575332
S-Spec / Stepping Code SR1QK
Comment BX80646E31231V3 is a boxed
microprocessor
General information
Vendor GenuineIntel
Processor name (BIOS) Intel(R) Core(TM) i5-4460 Intel(R) Xeon(R) CPU E3-1231
CPU @ 3.20GHz v3 @ 3.40GHz
Cores 4
Logical processors 4 8
Processor type Original OEM Processor
CPUID signature 306C3
Family 6 (06h)
Model 60 (03Ch)
Stepping 3 (03h)
TLB/Cache details 64-byte Prefetching 64-byte Prefetching
Data TLB: 1-GB pages, 4-way Data TLB: 1-GB pages, 4-way
set associative, 4 entries set associative, 4 entries
Data TLB: 4-KB Pages, 4-way Data TLB: 4-KB Pages, 4-way
set associative, 64 entries set associative, 64 entries
Instruction TLB: 4-KByte Instruction TLB: 4-KByte
pages, 8-way set associative, pages, 8-way set associative, 64
128 entries entries
L2 TLB: 1-MB, 4-way set L2 TLB: 1-MB, 4-way set
associative, 64-byte line size associative, 64-byte line size
Shared 2nd-Level TLB: 4- Shared 2nd-Level TLB: 4-
KByte / 2-MB pages, 8-way KByte / 2-MB pages, 8-way
associative, 1024 entries associative, 1024 entries
Cache Details
L1 data: Associativity 8-way set associative
L1 data: Comments Direct-mapped
 L1 data: Line size 64 bytes
L1 data: Size 4 x 32 KB
L1 instruction: 8-way set associative
Associativity
L1 instruction: Direct-mapped
Comments
L1 instruction: Line size 64 bytes
L1 instruction: Size 4 x 32 KB
L2: Associativity 8-way set associative
L2: Comments Non-inclusive|Direct-mapped
L2: Line size 64 bytes
L2: Size 4 x 256 KB
L3: Associativity 12-way set associative 16-way set associative
L3: Comments Inclusive|Shared between all cores
L3: Line size 64 bytes
L3: Size 6 MB 8 MB
Instruction set extensions
AES +
AVX +
AVX2 +
BMI1 +
BMI2 +
F16C +
FMA +
MMX +
SSE +
SSE2 +
SSE3 +
SSE4.1 +
SSE4.2 +
SSSE3 +
TSX (HLE interface) - +
TSX (RTM interface) - +
Additional instructions
Advanced Bit +
manipulation
CLFLUSH +
CMOV +
CMPXCHG16B +
CMPXCHG8B +
Enhanced REP +
MOVSB/STOSB
FXSAVE/FXRSTORE +
INVPCID +
MONITOR/MWAIT +
 MOVBE +
PCLMULDQ +
POPCNT +
RD/WR FSGSBASE +
instructions
RDRAND +
RDTSCP +
SYSENTER/SYSEXIT +
XSAVE/XRESTORE +
states
XSETBV/XGETBV are - +
enabled
Major features
64-bit / Intel 64 +
Enhanced SpeedStep +
Hyper-Threading - +
Technology
Intel Trusted Execution - +
technology
Intel Virtualization +
NX bit/XD-bit +
On-chip Floating Point +
Unit
Turbo Boost +
Other features
1 GB large page support +
36-bit page-size +
extensions
64-bit debug store +
Advanced programmable +
interrupt controller
CPL qualified debug +
store
Clock modulation duty +
cycle extension
Debug store +
Debugging extensions +
Digital Thermal Sensor +
capability
Extended xAPIC support +
LAHF/SAHF support in +
64-bit mode
Machine check +
architecture
Machine check exception +
 Memory-type range +
registers
Model-specific registers +
Package thermal +
management
Page attribute table +
Page global extension +
Page-size extensions +
(4MB pages)
Pending break enable +
Perfmon and Debug +
capability
Physical address +
extensions
Power Limit Notification +
capability
Process context +
identifiers
Self-snoop +
Supervisor Mode +
Execution Protection
TSC rate is ensured to be +
invariant across all states
Thermal monitor +
Thermal monitor 2 +
Thermal monitor and +
software controlled clock
facilities
Time stamp counter +
Timestamp counter +
deadline
Virtual 8086-mode +
enhancements
xTPR Update Control +
+ - feature is supported
- - feature is not supported
Features, not supported by all processors in the table, are not displayed