Microelectronic Engineering 83 (2006) 92–95

www.elsevier.com/locate/mee

Improved performance of SiC MESFETs using

double-recessed structure
C.L. Zhu a, Rusli a,*
, C.C. Tin b, G.H. Zhang a, S.F. Yoon a, J. Ahn a

a
Microelectronics Centre, School of Electrical and Electronic Engineering, Nanyang Technological University,
Nanyang Avenue, Singapore 639798, Singapore
b
Department of Physics, Auburn University, AL 36849, USA

Available online 21 November 2005

Abstract

A double recessed SiC MESFET was proposed and its electrical performances were studied by numerical simulation. Our simulated
results showed that the saturation current of the double recessed structure is about 77% larger than that of the conventional structure.
However, their threshold voltages are comparable and are
9.2 and
8.4 V for the double recessed and conventional structure, respec-
tively. The output power density of the double recessed structure is about 37.5% larger than that of the conventional structure though its
breakdown voltage is lower. The cut-off frequency (fT) and the maximum oscillation frequency (fmax) of the double recessed structure are
15.3 and 70.6 GHz, respectively, which are higher than that of the conventional structure. Therefore, the double recessed 4H-SiC MES-
FET has superior DC and RF performances compared to the similar device based on the conventional structure.

2005 Elsevier B.V. All rights reserved.

Keywords: SiC; MESFET; Double recessed structure

1. Introduction degrade the device and circuit performance [3]. Some

SiC based MESFETs are emerging as a promising tech-
nology for high power microwave applications such as
transmitters for commercial and military communications
[1]. This is made possible due to the superior properties
of SiC and the relatively mature material growth and
device fabrication technology. High power 4H-SiC MES-
FETs must be able to sustain large drain current and have
high breakdown voltages. To allow for high drain current,
a large product of the channel doping and thickness (N · a)
is required. However, a higher channel doping concentra-
tion will lower the breakdown voltage, [2] and a thick chan-
nel layer will lead to a lower aspect ratio of gate length to
channel thickness (Lg/a) and result in short-channel and
drain-induced barrier lowering (DIBL) effects which will
*
Corresponding author. Tel.: +65 7995414; fax: +65 7920415.
E-mail address: erusli@ntu.edu.sg (Rusli).
researchers [4,5] suggested a buried-gate structure to sup-
press the trapping induced instabilities which will decrease
the electrical performance of the devices operated at con-
tinuous waveband (CW). However, the partial gate located
on the channel layer nearer to the source electrode will
result in a parasitic depletion region which reduces the
cut-off frequency and decrease the channel current [6].
In this work, we propose a double-recessed 4H-SiC
MESFET structure which allows a thicker channel and
yet maintains a larger Lg/a ratio. The first recess was
formed by reactive ion etching to define the channel in
the active layer, while the second recess was realized by
having half of the gate nearer to the source buried with a
certain depth into the channel layer. Therefore, the struc-
ture has lower and upper gates, which control a thinner
and a thicker part of the channel, respectively. The thicker
channel allows for higher drain saturation current and
lower source and drain impedances, whereas the thinner
channel ensures that the channel can be effectively

0167-9317/$ - see front matter
2005 Elsevier B.V. All rights reserved.
doi:10.1016/j.mee.2005.10.054
 C.L. Zhu et al. / Microelectronic Engineering 83 (2006) 92–95 93

controlled by the gate bias. The DC and RF performances
of the double recessed 4H-SiC MESFETs have been stud-
ied in detail and the results compared with those obtained
from the conventional channel recessed structure.
2. Device structure and simulation method
SiC MESFETs based on the conventional channel
recessed and double recessed structures are as shown in
Fig. 1. The double recessed structure in Fig. 1(b) has a
channel thickness of 0.25 lm, and is etched 0.05 lm
before metal deposition to form the second recessed gate.
As a result, the thickness of the channel layer underneath
the lower gate is 0.20 lm. To have a meaningful compar-
ison, the channel thickness of the MESFET based on the
conventional structure is also set at 0.20 lm. This ensures
that both devices will have comparable pinch-off volt-
ages. Nickel was chosen for the gate Schottky contact
with a work function of 5.1 eV. The other dimensions
of both devices are as follows: gate length of the device
Lg = 0.7 lm, gate-drain spacing Lgd = 1 lm, gate–source
spacing Lgs = 0.5 lm and channel doping Nd = 3 ·
1017 cm
3. The doping and thickness of the buffer layer
are 1.4 · 1015 cm
3 and 0.50 lm, respectively. The semi-
insulating substrate is modeled as a compensation-doped
(vanadium) semiconductor with a high concentration
(8 · 1016 cm
3) of deep level impurities. The activation
energy of vanadium acceptor is selected as 1.05 eV
[3,7]. A two- dimensional simulator, MEDICI [8] is used
in the simulation and the details of the models and sim-
ulation method are presented elsewhere [3].
design rules and are
9.2 and
8.4 V, respectively. The
simulated drain current (Id) versus the drain–source voltage
(Vds) for 4H-SiC MESFET with the double recessed struc-
ture under the gate bias (Vgs) from 0 to
10 V with a step
of
2 V are shown in Fig. 2(b). The corresponding charac-
teristics for the device with conventional recessed structure
are shown in Fig. 2(a) for comparison. It is found that the
saturation current (Isat) of the double recessed 4H-SiC
MESFETs at Vgs = 0 V is about 77% larger than that of
the conventional structure at Vgs = 0 V, arising from a
wider channel opening outside of the buried gate region.
Therefore, the double recessed structure provides a larger
Isat than the conventional structure while maintaining a
comparable Vt.
The three-terminal breakdown characteristics of the
devices were simulated with an applied Vgs = Vt, as
shown in Fig. 3. The drain current (Id) and the gate
leakage current (Ig) versus Vds are presented for both
double recessed and conventional structures. For both

3. Results and discussion

The threshold voltages (Vt) of the double recessed and

conventional structure are comparable according to the

a Source Drain

n+ Gate n+
N-Channel
P-Buffer

Semi-insulating substrate

b Source Drain

n+ Gate n+

N-Channel
P-Buffer

Semi-insulating substrate

Fig. 1. The cross-section of 4H-SiC MESFETs with: (a) conventional Fig. 2. Drain current versus drain voltage under different gate voltages
structure and (b) double recessed structure. with: (a) conventional structure and (b) double recessed structure.
94 C.L. Zhu et al. / Microelectronic Engineering 83 (2006) 92–95
Fig. 3. Simulated breakdown curves of 4H-SiC MESFETs with conven-
tional and double recessed structures.
structures, it is noted that the increased currents at the
drain electrodes mainly come from the leakage currents
at the gate electrodes when comparing Ig–Vds and Id–
Vds curves. This reveals that the breakdown of SiC MES-
FETs at the applied Vgs occurred between the gate and
the drain, instead of between the drain and the source.
It can be seen that there is a decrease in the breakdown
voltage (Vb) from 137 to 109 V for the double recessed
structure compared to the conventional recessed struc-
ture. This is consistent with the experimental results for
the buried gate structure [5]. A detailed investigation of
the current flowlines in the devices show that the gate
leakage currents mainly flow through the gate corner
nearer to the drain side due to the electric field crowding
at the corner. The decreasing of the breakdown voltage
for the double recessed structure is attributed to the
thicker channel which results in the vertical electrical
field more significant in the double recessed device com-
pared to the conventional one. Chang and Day [9] stud-
ied the gate leakage current and the breakdown voltage
in GaAs MESFETs using an analytic method and also
found that the breakdown voltage is higher for thinner
active layer.
The maximum theoretical output power density for a
Class A amplifier is given by the following equation [10]:
I sat ðV b
V knee Þ
P max ¼ ; ð1Þ
8 and conventional structure, respectively. The three-termi-
where Vknee is the knee voltage. According to the above
equation, the maximum output power density of the dou-
ble recessed and conventional recessed 4H-SiC MESFETs
can be calculated and are 5.5 and 4.0 W/mm, respectively.
Therefore, there is a significant improvement in the power
density of about 37.5%.
Fig. 4 shows the simulated small signal current gain h21,
maximum stable gain (MSG), maximum available gain
(MAG) and unilateral power gain (U) for 4H-SiC MES-
FETs with double recessed and conventional structures
Fig. 4. Simulated small-signal high frequency characteristics: h21, MSG/
MAG and U of 4H-SiC MESFETs with conventional and double recessed
structures under the bias conditions of Vg = 0 V and Vds = 30 V.
as a function of frequency under the bias conditions of
Vgs = 0 V and Vds = 30 V. The results show that the cut-
off frequency (fT) and the maximum frequency (fmax) of
the double recessed structure are 15.3 and 70.6 GHz,
respectively. However, for the conventional structure, fT
and fmax are 10.0 and 45.0 GHz, respectively. The increases
in fT and fmax for double recess structure may be attributed
to smaller effective gate length (Leff) compared to the con-
ventional structure. It should be noted that fT and fmax are
comparable for buried gate and conventional structure [5]
due to the parasitic depletion region formed by unburied
gate nearer to the source which is avoided in double
recessed structure.
4. Conclusion
The electrical performances of SiC MESFET with a
double recessed structure was simulated and compared
with the conventional recessed structure. The simulated
results showed that the saturation current and the output
power density of the double recessed structure are about
77% and 37.5% larger than that of the conventional
structure. However, their threshold voltages are compa-
rable and are
9.2 and
8.4 V for the double recessed
nal breakdown voltages of double recessed and conven-
tional structure are about 109 and 137 V, respectively,
which is consistent with the experimental results. The
cut-off frequency and the maximum oscillation frequency
of the double recessed structure are 15.3 and 70.6 GHz,
respectively, compared to 10.0 and 45.0 GHz for the con-
ventional structure. Therefore, the double recessed 4H-
SiC MESFET has superior DC and RF performances
compared to the similar device based on the conventional
structure.
 C.L. Zhu et al. / Microelectronic Engineering 83 (2006) 92–95
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