Digital Logic Notes

DEPARTMENT OF FRESHMAN
ENGINEERING PROGRAM
Basic Electronics (Mechanical Sciences) Course code:15EECF101
Unit II
Chapter 4:- Digital Logic
Contents
4.1 Introduction ............................................................................................................................ 4
4.1.1 Signal ............................................................................................................................... 4
4.1.2 Comparison of Analog and Digital Signal ........................................................................ 7
4.2 Number Systems ..................................................................................................................... 7
4.2.1 Decimal Number System ................................................................................................. 7
4.2.2 Binary Number System ................................................................................................... 8
4.2.3 Octal Number System ..................................................................................................... 8
4.2.4 Hexadecimal Number System ......................................................................................... 9
4.2.5 Decimal to binary conversion: ...................................................................................... 10
The steps to perform decimal to binary conversion are as follows .............................................. 10
4.2.6 Binary to Decimal conversion: ...................................................................................... 12
The steps to perform Binary to Decimal conversion are as follows ............................................. 12
4.2.7 Binary to Hexadecimal conversion:............................................................................... 13
The steps to perform Binary to Hexadecimal conversion are as follows ..................................... 13
4.2.8 Hexadecimal to Binary conversion:............................................................................... 13
4.2.9 Decimal to Hexadecimal conversion: ............................................................................ 14
The steps to perform Decimal to Hexadecimal conversion are as follows ................................... 14
4.2.10 Hexadecimal to Decimal conversion: ............................................................................ 15
The steps to perform Hexadecimal to Decimal conversion are as follows ................................... 15
4.2.11 Binary to Octal conversion: ........................................................................................... 16
Freshman Basic Electronics Team(2016-17) 1

ENGINEERING PROGRAM
The steps to perform Binary to Octal conversion are as follows .................................................. 16
4.3 BCD or Binary Coded Decimal ............................................................................................... 18
Table2. Representation Of Decimal Numbers, Binary and BCD numbers ........................................ 19
4.4 Binary to Gray Code and Viceversa ....................................................................................... 19
Table3. Binary to Gray Code ......................................................................................................... 20
4.4.1 Binary to gray code conversion..................................................................................... 20
4.4.2 Gray code to binary conversion .................................................................................... 21
4.5 Arithmetic Operations of Binary Number ............................................................................. 23
4.5.1 Binary Addition ............................................................................................................. 23
4.5.2 Binary Subtraction......................................................................................................... 24
4.6 Subtraction by 1’s Complement............................................................................................ 26
4.6.1 Subtraction by 2’s Complement.................................................................................... 27
4.7 Boolean Algebra .................................................................................................................... 29
4.7.1 De Morgan’s Theorem or Law: ..................................................................................... 30
4.8 Logic Gates ............................................................................................................................ 32
4.8.1 Universal Gates .................................................................................................................... 35
4.9 Combinational circuits .......................................................................................................... 39
4.9.1 Definition of Combinational logic circuits ............................................................................ 40
4.9.1 Half Adder: .................................................................................................................... 40
4.9.2 Full Adder: ..................................................................................................................... 41
4.9.3 Parallel Binary Adder..................................................................................................... 42
4.10 Sequential logic circuits ........................................................................................................ 44

ENGINEERING PROGRAM
4.11 Types of Sequential circuits .................................................................................................. 45
There are two types of Sequential circuits they are ......................................................................... 45
4.12 FLIP-FLOPS:- .......................................................................................................................... 45
4.12.1 Triggering of Flip-Flops:- ............................................................................................... 48
4.13 D Flip-Flop:- ........................................................................................................................... 51
4.14 JK Flip-Flop:- .......................................................................................................................... 52
4.15 Data Register:- ...................................................................................................................... 54
4.16 Binary Counter and Frequency Divider:-............................................................................... 54
4.17 Multiplexers .......................................................................................................................... 55

ENGINEERING PROGRAM
4.1 Introduction
In the modern world of electronics, the term Digital is generally associated with a computer
because the term Digital is derived from the way computers perform operation, by counting
digits. For many years, the application of digital electronics was only in the computer system.
But now-a-days, Digital Electronics is used in many other applications. Following are some
of the examples in which Digital electronics is heavily used.
 Industrial process control

 Military system
 Television
 Communication system
 Medical equipment
 Radar
 Navigation
4.1.1 Signal
Signal can be defined as a physical quantity, which contains some information. It is a
function of one or more than one independent variables. There are two types of signals they
are
 Analog Signal
 Digital Signal
Analog Signal:- An analog signal is defined as the signal having continuous values. Analog
signal can have infinite number of different values. In real world scenario, most of the things
observed in nature are analog. Examples of the analog signals are as follows
 Temperature
 Pressure
 Distance
 Sound
 Voltage
 Current
 Power

ENGINEERING PROGRAM
The graphical representation of Analog Signal (Temperature) is shown in the Figure 1
Figure 1: Graphical Representation Of Analog Signal
The circuits that process the analog signals are called as analog circuits or system. Examples
of the analog system are as follows
 Filter
 Amplifiers
 Television receiver
 Motor speed controller
Disadvantages:-
The disadvantages of Analog System are as follows
 Less accuracy
 Less versatility
 More noise effect
 More distortion
 More effect of weather
Digital Signal:- A digital signal is defined as the signal which has only a finite number of
distinct values. Digital signals are not continuous signals. In the digital electronic calculator,
the input is given with the help of switches. This input is converted into electrical signal
which have two discrete values or levels. One of these may be called low level and another is

ENGINEERING PROGRAM
called high level. The signal will always be one of the two levels. This type of signal is called
digital signal. The Graphical representation of the Digital Signal (Binary) is shown in the
Figure 2.
Figure 1: Graphical Representation Of Digital Signal
The circuits that process the digital signals are called digital systems or digital circuits.
Examples of the digital systems are as follows
 Registers
 Flip-flop
 Counters
 Microprocessors
Advantages:-
The Advantages of Digital System are as follows
 More accuracy
 More versatility
 Less distortion
 Easy communicate
 Possible storage of information

ENGINEERING PROGRAM
4.1.2 Comparison of Analog and Digital Signal
S.N. Analog Signal Digital Signal

1 Analog signal has infinite values. Digital signal has a finite number of values.
2 Analog signal has a continuous nature. Digital signal has a discrete nature.
Analog signal is generated by transducers Digital signal is generated by Analog to
3
and signal generators. Digital converter.
Example of analog signal − sine wave,
4 Example of digital signal − binary signal.
triangular waves.
4.2 Number Systems

A digital system can understand positional number system only where there are a few
symbols called digits and these symbols represent different values depending on the position
they occupy in the number.
A value of each digit in a number can be determined using
 The digit
 The position of the digit in the number
 The base of the number system (where base is defined as the total number of digits
available in the number system).
4.2.1 Decimal Number System

The number system that we use in our day-to-day life is the decimal number system. Decimal
number system has base 10 as it uses 10 digits from 0 to 9. In decimal number system, the
successive positions to the left of the decimal point represents units, tens, hundreds,
thousands and so on.
Each position represents a specific power of the base (10). For example, the decimal number
1234 consists of the digit 4 in the units position, 3 in the tens position, 2 in the hundreds
position, and 1 in the thousands position, and its value can be written as
(1×1000) + (2×100) + (3×10) + (4×l)

(1×103) + (2×102) + (3×101) + (4×l00)
1000 + 200 + 30 + 1 = 1234

ENGINEERING PROGRAM
As a computer programmer or an IT professional, it is necessary to understand the following

number systems which are frequently used in computers.
4.2.2 Binary Number System
The Characteristics of Binary Number System are:
 Uses two digits, 0 and 1.

 It is also called base 2 number system
 Each position in a binary number represents a 0 power of the base (2). Example: 20
 Last position in a binary number represents an x power of the base (2). Example: 2 x
where x represents the last position - 1.
Example
Binary Number: 101012
Calculating Decimal Equivalent −
Steps Binary Number Decimal Number

Step 1 101012 ((1 × 24) + (0 × 23) + (1 × 22) + (0 × 21) + (1 × 20))10
Step 2 101012 (16 + 0 + 4 + 0 + 1)10
Step 3 101012 2110
Note: 101012 is normally written as 10101.
4.2.3 Octal Number System
The Characteristics of Octal Number System are as follows:
 Uses eight digits, 0,1,2,3,4,5,6,7.

 It is also called base 8 number system
 Each position in an octal number represents a 0 power of the base (8). Example: 80
 Last position in an octal number represents an x power of the base (8). Example: 8x
where x represents the last position - 1.
Example
Octal Number − 125708

ENGINEERING PROGRAM
Step Octal Number Decimal Number

Step 1 125708 ((1 × 84) + (2 × 83) + (5 × 82) + (7 × 81) + (0 × 80))10
Step 2 125708 (4096 + 1024 + 320 + 56 + 0)10
Step 3 125708 549610
Note: 125708 is normally written as 12570.
4.2.4 Hexadecimal Number System
The Characteristics of Hexadecimal Number System are as follows:
 Uses 10 digits and 6 letters, 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F.

 Letters represents numbers starting from 10. A = 10, B = 11, C = 12, D = 13, E = 14,
F = 15.
 Also called base 16 number system.
 Each position in a hexadecimal number represents a 0 power of the base (16).
Example 160.
 Last position in a hexadecimal number represents an x power of the base (16).
Example 16x where x represents the last position - 1.
Example −
Hexadecimal Number: 19FDE16
Step Binary Number Decimal Number

Step 1 19FDE16 ((1 × 164) + (9 × 163) + (F × 162) + (D × 161) + (E × 160))10
Step 2 19FDE16 ((1 × 164) + (9 × 163) + (15 × 162) + (13 × 161) + (14 × 160))10
Step 3 19FDE16 (65536 + 36864 + 3840 + 208 + 14)10
Step 4 19FDE16 10646210
Note − 19FDE16 is normally written as 19FDE.

ENGINEERING PROGRAM
4.2.5 Decimal to binary conversion:
The steps to perform decimal to binary conversion are as follows
1. Consider the given decimal number before decimal point and divide successively by
2 until the number is not divisible by2 and at the same time write reminder for every
division at the RHS side.
2. Write all the remainder from bottom to top gives the binary equivalent number of
that given decimal number before decimal point.
3. For the conversion of fractional part of decimal number multiply it by 2 and write
the carry or if there is any digit goes beyond fractional point take out the carry and
multiply it until it reaches Zero or until sufficient accuracy is obtained.
4. Write all the carries generated from number of multiplication procedure from top to
bottom to get the binary equivalent of decimal fractional part.

ENGINEERING PROGRAM

ENGINEERING PROGRAM
4.2.6 Binary to Decimal conversion:
The steps to perform Binary to Decimal conversion are as follows
1. Count the number of binary digits before fractional, binary or radix point and put the
weight of each digit as 0, 1, 2 ... from right hand side to left hand side. Let N is the
total number of bits or digits; the last digit has a weight of (N-!)
2. Count the number of binary digit after the radix or binary point and put the weight of
each digit as-1,-2,-3....., from left hand side to right hand side. Let M is the number of
bits, last bit or digit has weight equal to 2-M.
3. Write the binary bit stream in generalized equation.
4. Finally add all the products, which give the number equivalent to the decimal
number system.
Example:
Convert (10110.110)2 in to decimal system
OR (10110.110)2 = (?)10
1 0 1 1 0 . 1 1 0
1*24 0*23 1*22 1*21 0*20 . 1*2-1 1*2-2 0*2-3
16 +0 +4 +2 +0 . 0.5 + 0.25 +0
22 . 75
Hence the result is

(10110.110)2 = (22.75)10

ENGINEERING PROGRAM
4.2.7 Binary to Hexadecimal conversion:
The steps to perform Binary to Hexadecimal conversion are as follows
1. Group the given binary digit or bits from RHS to LHS before binary or radix point 4
bits at a time. If the last group is not equal to 4 bits prefix the required number of 0’s
and the value will not change.
2. Write the corresponding Hexadecimal number for each group gives the Hexadecimal
representation of binary digits.
3. Group the given digit or bit from LHS to RHS after of radix point 4 bits at a time.
If the last group is not equal to 4 bits postfix the required number of 0’s and the
value will not change.
4. Write the corresponding Hexadecimal equivalent number for each group gives the
Hexadecimal representation of binary digits.
4.2.8 Hexadecimal to Binary conversion:
Since 24 is equal to 16, the number given in Hexadecimal system is to be written in binary
system by considering each Hexadecimal bit from LHS to RHS and is to be written in its
equivalent binary number. If the number is separated by Hexadecimal or radix point in given
Hexadecimal number then the Hexadecimal or radix point is placed exactly at that place in
binary number.
For the Hexadecimal number representation in binary number use only four binary bits.

ENGINEERING PROGRAM
Example:
(1ABC. 2F) 16 = (?) 2
Hexadecimal 1 A B C . 2 F
Decimal 1 10 11 12 . 2 15
Binary 0001 1010 1011 1100 . 0010 1111
1101010111100 . 00101111
Hence result is
(1ABC.2F) 16 = (1101010111100. 00101111) 2
4.2.9 Decimal to Hexadecimal conversion:
The steps to perform Decimal to Hexadecimal conversion are as follows
1. Consider the given decimal number before decimal point and divide successively by
‘16’ until the number is not divisible by’16’ and at the same time write reminder for
every division at the RHS ( in this we may get reminder from 0to 9 and A to F).
2. Write all the remainder from bottom to top gives the binary equivalent number of that
given decimal number before decimal point
3. For the conversion of fractional part of decimal number multiply it by ‘16’ and write
the carry or if there is any digit goes beyond fractional point take out the carry and
multiply
4. it until it reaches Zero or until sufficient accuracy is obtained.
5. Write all the carries generated from number of multiplication procedure from top to
bottom to get the Hexadecimal equivalent of decimal fractional part.

ENGINEERING PROGRAM
4.2.10 Hexadecimal to Decimal conversion:
The steps to perform Hexadecimal to Decimal conversion are as follows
1. Count the number of Hexadecimal digits before radix point and put the weight of each
digit as 0, 1, 2 ... from right hand side to left hand side. Let N is the total number of
bits or digits; the last digit has a weight of (N-!)
2. Count the number of Hexadecimal digit after the radix or binary point and put the
weight of each digit as-1,-2,-3....., from left hand side to right hand side. Let M is the
number of bits, last bit or digit has weight equal to 2-M.
3. Use the generalized equation for converting it to decimal equivalent
4. Finally add all the products terms, which gives the number equivalent to the decimal
number system.

ENGINEERING PROGRAM
Example;
Convert (ABC.CD) 16 in to decimal system OR (ABC.CD) 16 = (?)10
A B C . C D
A*162 B*161 C*160 . C*16-1 D*16-2
10*162 11*161 12*160 . 12*16-1 13*16-2

2560 176 12 . 0.75 0.050
2748 . 80
Hence result is
(ABC.CD) 16 = (2748.80)10
4.2.11 Binary to Octal conversion:
The steps to perform Binary to Octal conversion are as follows
1. Group the given binary digit or bits from RHS to LHS before binary or radix point
‘3’ bits at a time. If the last group is not equal to ‘3’ bits prefix the required number of
0’s and the value will not change.
2. Write the corresponding octal number for each group gives the octal representation
of binary digits.
3. Group the given digit or bit from LHS to RHS after of radix point ‘3’ bits at a time.
If the last group is not equal to ‘3’ bits postfix the required number of 0’s and the
value will not change.
4. Write the corresponding octal equivalent number for each group gives the octal
representation of binary digits.

ENGINEERING PROGRAM
Number Systems Chart:
Decimal Binary Octal Hexadecimal

0 0 0 0 0 0 0
1 0 0 0 1 1 1
2 0 0 1 0 2 2
3 0 0 1 1` 3 3
4 0 1 0 0 4 4
5 0 1 0 1 5 5
6 0 1 1 0 6 6
7 0 1 1 1 7 7
8 1 0 0 0 10 8
9 1 0 0 1 11 9
10 1 0 1 0 12 A
11 1 0 1 1 13 B
12 1 1 0 0 14 C

ENGINEERING PROGRAM
13 1 1 0 1 15 D
14 1 1 1 0 16 E
15 1 1 1 1 17 F
Table 1. Number System Chart
Hints for Conversion:
Others to Decimal ------ Multiply
Decimal to Others ----- Divide
Binary to Hexadecimal  Group of ‘4’
Binary to Octal--------------- Group of ‘3’
Hexadecimal to Octal -- Hexadecimal BinaryOctal
If we come across with a large binary number, that has to be converted to decimal,
we first convert number into Hexadecimal, then convert Hexadecimal to Decimal.
4.3 BCD or Binary Coded Decimal
BCD or Binary Coded Decimal is that number system or code which has the binary numbers or
digits to represent a decimal number. A decimal number contains 10 digits (0-9). Now the equivalent
binary numbers can be found out of these 10 decimal numbers. In case of BCD the binary number
formed by four binary digits, will be the equivalent code for the given decimal digits. In BCD we can
use the binary number from 0000-1001 only, which are the decimal equivalent from 0-9 respectively.
Suppose if a number have single decimal digit then it’s equivalent Binary Coded Decimal will be
the respective four binary digits of that decimal number and if the number contains two decimal digits
then it’s equivalent BCD will be the respective eight binary bits of the given decimal number. Four
for the first decimal digit and next four for the second decimal digit. It may be cleared from an
example. Let, (12)10 be the decimal number whose equivalent Binary coded decimal will be
00010010. Four bits from L.S.B is binary equivalent of 2 and next four is the binary equivalent of 1.
Table given below shows the binary and BCD codes for the decimal numbers 0 to 15. From
the table below, we can conclude that after 9 the decimal equivalent binary number is of four
bit but in case of BCD it is an eight bit number. This is the main difference between Binary

ENGINEERING PROGRAM
number and binary coded decimal. For 0 to 9 decimal numbers both binary and BCD is equal
but when decimal number is more than one bit BCD differs from binary.
Decimal number Binary number Binary Coded Decimal(BCD)
0 0000 0000
1 0001 0001
2 0010 0010
3 0011 0011
4 0100 0100
5 0101 0101
6 0110 0110
7 0111 0111
8 1000 1000
9 1001 1001
10 1010 0001 0000
11 1011 0001 0001
12 1100 0001 0010
13 1101 0001 0011
14 1110 0001 0100
15 1111 0001 0101
Table2. Representation Of Decimal Numbers, Binary and BCD numbers
4.4 Binary to Gray Code and Viceversa
Code is a symbolic representation of discrete information. Codes are of different types. Gray Code is
one of the most important codes. It is a non-weighted code which belongs to a class of codes called
minimum change codes. In this codes while traversing from one step to another step only one bit in
the code group changes. In case of Gray Code two adjacent code numbers differs from each other by
only one bit. The idea of it can be cleared from the table given below. As this code is not applicable in
any types of arithmetic operations but it has some applications in analog to digital converters and in
some input/output devices. Now let us concentrate on the table of Gray Code given below where we

ENGINEERING PROGRAM
can find the difference of binary code from gray code while traversing through the table for their
respective decimal numbers.
Table3. Binary to Gray Code
4.4.1 Binary to gray code conversion
Binary to gray code conversion is a very simple process. There are several steps to do this
types of conversions. Steps given below elaborate on the idea on this type of conversion.
1. The M.S.B. of the gray code will be exactly equal to the first bit of the given binary
number.

ENGINEERING PROGRAM
2. Now the second bit of the code will be exclusive-or of the first and second bit of the
given binary number, i.e if both the bits are same the result will be 0 and if they are
different the result will be 1.
3. The third bit of gray code will be equal to the exclusive-or of the second and third bit
of the given binary number. Thus the Binary to gray code conversion goes on. One
example given below can make your idea clear on this type of conversion.
Thus the equivalent gray code is 01101. Now concentrate on the example where the M.S.B.
of the binary is 0 so for it will be 0 for the most significant gray bit. Next, the XOR of the
first and the second bit is done. The bits are different so the resultant gray bit will be 1. Again
move to the next step, XOR of second and third bit is again 1 as they are different. Next,
XOR of third and fourth bit is 0 as both the bits are same. Lastly the XOR of fourth and fifth
bit is 1 as they are different. That is how the result of binary to gray code conversion of
01001 is done whose equivalent gray code is 01101.
4.4.2 Gray code to binary conversion
Gray code to binary conversion is again very simple and easy process. Following steps can
make your idea clear on this type of conversions.
1. The M.S.B of the binary number will be equal to the M.S.B of the given gray code.
2. Now if the second gray bit is 0 the second binary bit will be same as the previous or
the first bit. If the gray bit is 1 the second binary bit will alter. If it was 1 it will be 0 and if
it was 0 it will be 1.
3. This step is continued for all the bits to do Gray code to binary conversion.

ENGINEERING PROGRAM
One example given below will make your idea clear.
The M.S.B of the binary will be 0 as the M.S.B of gray is 0. Now move to the next gray bit.
As it is 1 the previous binary bit will alter i.e it will be 1, thus the second binary bit will be 1.
Next look at the third bit of the gray code. It is again 1 thus the previous bit i.e the second
binary bit will again alter and the third bit of the binary number will be 0. Now, 4th bit of the
given gray is 0 so the previous binary bit will be unchanged, i.e 4th binary bit will be 0. Now
again the 5th grey bit is 1 thus the previous binary bit will alter, it will be 1 from 0. Therefore
the equivalent Binary number in case of gray code to binary conversion will be (01001).

ENGINEERING PROGRAM
4.5 Arithmetic Operations of Binary Number

The arithmetic operations of binary numbers includes namely, addition, subtraction of
binary numbers.
4.5.1 Binary Addition
Binary addition is preformed in the same manner as decimal addition.

The rules of binary addition are as follows:
0+0=0
0+1=1
1+0=1
1 + 1 = 0 with a carry-over
of 1
“Carry-overs” of binary addition are performed in the same manner as in decimal addition.
With the help of the above rules addition of three or more binary numbers can be worked out
but this has little use in digital computers.
For addition of fractional binary numbers, the binary point of the two numbers are placed one
below the other just like the decimal points and the usual rules are followed.
Find the sum of the following numbers:

i) 10101 and 11011
Solution:
10101 and 11011

1 1 1 1 Carry overs
10101
11011
110000
ii) 11001 and 111

Solution:
11001 and 111
1 1 1 1 Carry overs
11001
111

ENGINEERING PROGRAM
100000
iii) 10101.101 and 1101.011
Solution:
10101.101 and 1101.011
11 11 11 Carry overs
10101.101
1101.011
100011.000
iv) 111.0111 and 10011.001
Solution:
111.0111 and 10011.001
111 11 Carry overs
111.0111
10011.001
11010.1001
4.5.2 Binary Subtraction
Binary subtraction is also similar to that of decimal subtraction with the difference that when
1 is subtracted from 0, it is necessary to borrow 1 from the next higher order bit and that bit is
reduced by 1 (or 1 is added to the next bit of subtrahend) and the remainder is 1.
Thus the rules of binary subtraction are as follows:

ENGINEERING PROGRAM
0-0=0
1-0=1
1-1=0
0 - 1 = 1 with a borrow of 1
For fractional numbers, the rules of subtraction are the same with the binary point properly
placed.
Subtract the following numbers:

i) 101 from 1001
Solution:
101 from 1001
1 Borrow
1001
101
100
ii) 111 from 1000
Solution:
111 from 1000
1 Borrow
1000
111
0001
iii) 1010101.10 from 1111011.11
Solution:
1010101.10 from 1111011.11

1 Borrow
1111011.11
1010101.10
100110.01

ENGINEERING PROGRAM
iv) 11010.101 from 101100.011
Solution:
11010.101 from 101100.011
1 1 1 Borrow
101100.011
11010.101
10001.110
4.6 Subtraction by 1’s Complement
In subtraction by 1’s complement we subtract two binary numbers using carried by 1’s
complement.
The steps to be followed in subtraction by 1’s complement are:

i) Write down 1’s complement of the subtrahend.
ii) Add this with the minuend.
iii) If the result of addition has a carry over then it is dropped and an 1 is added in the last bit.
iv) If there is no carry over, then 1’s complement of the result of addition is obtained to get
the final result and it is negative.
Evaluate:
(i) 110101 – 100101
Solution:
1’s complement of 10011 is 011010. Hence
Minued - 110101
1’s complement of subtrahend - 011010
Carry over - 1 001111
1
010000
The required difference is 10000
(ii) 101011 – 111001

Solution:
1’s complement of 111001 is 000110. Hence
Minued - 101011
1’s complement - 000110
110001
Hence the difference is – 1 1 1 0

ENGINEERING PROGRAM
(iii) 1011.001 – 110.10

Solution:
1’s complement of 0110.100 is 1001.011 Hence
Minued - 1011.001
1’s complement of subtrahend - 1001.011

Carry over - 1 0100.100
1
0100.101
Hence the required difference is 100.101
(iv) 10110.01 – 11010.10

Solution:
1’s complement of 11010.10 is 00101.01
10110.01
00101.01
11011.10
Hence the required difference is – 00100.01 i.e. – 100.01
4.6.1 Subtraction by 2’s Complement

With the help of subtraction by 2’s complement method we can easily subtract two binary
numbers.
The operation is carried out by means of the following steps:

(i) At first, 2’s complement of the subtrahend is found.
(ii) Then it is added to the minuend.
(iii) If the final carry over of the sum is 1, it is dropped and the result is positive.
(iv) If there is no carry over, the two’s complement of the sum will be the result and it is
negative.
The following examples on subtraction by 2’s complement will make the procedure
clear:
Evaluate:
(i) 110110 - 10110
Solution:
The numbers of bits in the subtrahend is 5 while that of minuend is 6. We make the number
of bits in the subtrahend equal to that of minuend by taking a `0’ in the sixth place of the
subtrahend.

ENGINEERING PROGRAM
Now, 2’s complement of 010110 is (101101 + 1) i.e.101010.

Adding this with the minuend.
1 10110 Minuend
1 01010 2’s complement of subtrahend
Carry over 1 1 00000 Result of addition
After dropping the carry over we get the result of subtraction to be 100000.
(ii) 10110 – 11010

Solution:
2’s complement of 11010 is (00101 + 1) i.e. 00110. Hence
Minued - 10110
2’s complement of subtrahend - 0 0 1 1 0
Result of addition - 11100
As there is no carry over, the result of subtraction is negative and is obtained by writing the
2’s complement of 11100 i.e.(00011 + 1) or 00100.
Hence the difference is – 100.
(iii) 1010.11 – 1001.01

Solution:
2’s complement of 1001.01 is 0110.11. Hence
Minued - 1010.11
2’s complement of subtrahend - 0 1 1 0 . 1 1
Carry over 1 0001.10
After dropping the carry over we get the result of subtraction as 1.10.
(iv) 10100.01 – 11011.10

Solution:
2’s complement of 11011.10 is 00100.10. Hence
Minued - 10100.01
2’s complement of subtrahend - 0 1 1 0 0 . 1 0
Result of addition - 11000.11
As there is no carry over the result of subtraction is negative and is obtained by writing the
2’s complement of 11000.11.
Hence the required result is – 00111.01.

ENGINEERING PROGRAM
4.7 Boolean Algebra

Boolean algebra is a system of mathematical logic developed by George Boole. The Laws of
Boolean algebra are used to simplify and evaluate logic expression. Operations like addition
(+), Subtraction (-), Multiplication (×) and Division (÷) are used to evaluate arithmetic
expression. Logical expressions have their own operations: i.e. AND (.), OR(=) and NOT ( '
or ¯¯ ).
Three basic binary operations are

ENGINEERING PROGRAM
4.7.1 De Morgan’s Theorem or Law:

“De Morgan’s theorem states that the inversion bar of an expression may be broken at any
point and the operation at that point is replaced by its opposite (ie., AND is replaced by OR
or vice versa)”.

ENGINEERING PROGRAM

ENGINEERING PROGRAM
4.8 Logic Gates

A logic gate is an Electronic circuit which makes Logical decisions The most commonly used
logic gates are NOT, OR, AND, NOR and NAND gates. In addition to these EX-OR and EX-
NOR gates are other types, which can be constructed using Basic gates NOT, OR and AND.
Digital systems are said to be constructed by using logic gates. These gates are the AND, OR,
NOT, NAND, NOR, EXOR and EXNOR gates. The basic operations are described below
with the aid of truth tables.
1) AND gate
The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are
high. A dot (.) is used to show the AND operation i.e. A.B. Bear in mind that this dot is
sometimes omitted i.e. AB

ENGINEERING PROGRAM
2)OR gate
The OR gate is an electronic circuit that gives a high output (1) if one or more of its inputs
are high. A plus (+) is used to show the OR operation.
3)NOT gate
The NOT gate is an electronic circuit that produces an inverted version of the input at its
output. It is also known as an inverter. If the input variable is A, the inverted output is
known as NOT A. This is also shown as A', or A with a bar over the top, as shown at the
outputs. The diagrams below show two ways that the NAND logic gate can be configured to
produce a NOT gate. It can also be done using NOR logic gates in the same way.
4)NAND gate
This is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The
outputs of all NAND gates are high if any of the inputs are low. The symbol is an AND gate
with a small circle on the output. The small circle represents inversion.

ENGINEERING PROGRAM
5)NOR gate
This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs
of all NOR gates are low if any of the inputs are high.The symbol is an OR gate with a small
circle on the output. The small circle represents inversion.
6)EXOR gate
The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both, of
its two inputs are high. An encircled plus sign ( ) is used to show the EOR operation.
7)EXNOR gate
The 'Exclusive-NOR' gate circuit does the opposite to the EOR gate. It will give a low output
if either, but not both, of its two inputs are high. The symbol is an EXOR gate with a small
circle on the output. The small circle represents inversion.

ENGINEERING PROGRAM
4.8.1 Universal Gates
The NAND and NOR gates are called universal functions since with either one the AND and
OR functions and NOT can be generated.
Note: A function in sum of products form can be implemented using NAND gates by
replacing all AND and OR gates by NAND gates. A function in product of sums form can be
implemented using NOR gates by replacing all AND and OR gates by NOR gates.

ENGINEERING PROGRAM

ENGINEERING PROGRAM

ENGINEERING PROGRAM

ENGINEERING PROGRAM
4.9 Combinational circuits
Logic circuits are divided into two types:

1. Combinational Logic circuit
2. Sequential Logic Circuit

ENGINEERING PROGRAM
4.9.1 Definition of Combinational logic circuits
The circuit in which outputs depends on only present value of inputs as shown in Fig. So,it
is possible to describe each output as a function of inputs by using Boolean expression. No
memory element involved. No clock input. Circuit is implemented by using logic gates. The
propagation delay depends on, delay of logic gates. Examples of combinational logic
circuits are: Full adder, subtractor, decoder, code converter, multiplexers etc.
COMBINATIONAL
INPUT CIRCUIT OUTPUT
Figure 3: Combinational Logic Circuit
4.9.1 Half Adder:
A logic circuit for the addition of two-one-bit binary numbers is referred to as an “Half
Adder”. The Half Adder accepts two binary digits at its input and produces two binary
digits at its output i.e., a “SUM” bit and a “CARRY” bit.

ENGINEERING PROGRAM
4.9.2 Full Adder:
Full Adder is a Combinational logic circuit which performs the addition of three binary bits.
It consists of three inputs and two outputs

ENGINEERING PROGRAM
4.9.3 Parallel Binary Adder
An n-bit adder is a circuit which adds two n-bit numbers say A&B. In addition an n-bit adder
will have another single bit input which is added to the two numbers called the carry-in (Cin).
The output of the n-bit adder is an n-bit SUM (S) and a CARRY- OUT (Cout) bit.

ENGINEERING PROGRAM
Figure 4: Block diagrams of Half Adder and Full Adder:
The carry out bit of one stage of full adder is used as carry-in i.e. Input to the next stage.
In general, an n-bit binary parallel adder can be built out of ‘n’ full adder blocks (or with
‘n-1’ full adder block and one half adder block).

ENGINEERING PROGRAM
4.10 Sequential logic circuits

Sequential Circuit is the logic circuit in which output depends on present value of
inputs at that instant of time and past history of circuit i.e. previous output as indicated
in Fig. The past output is stored by using memory device. The key to build storage
circuits is feedback. The internal data stored in circuit is called as state. Hence such
circuits are also called Finite state machines . Devices in this class include flip-flops,
counters, monostables, latches, and more complex devices such as microprocessors.
Sequential logic devices usually respond to inputs when a separate trigger signal
transitions from one level to another. The trigger signal is usually referred to as the
clock(CK) signal. The clock signal can be a periodic square wave or an aperiodic
collection of pulses.

ENGINEERING PROGRAM
Sequential Logic Circuit
4.11 Types of Sequential circuits

There are two types of Sequential circuits they are
1.Synchronous:
– These circuits are controlled by a master clock
– Inputs are sampled at specific clock intervals & hence the state as well as
outputs change at these clock intervals
2. Asynchronous:
– Are not controlled by any clock pulses
– Output responds immediately to change in inputs
4.12 FLIP-FLOPS:-
A flip-flop is a sequential logic device that can perform this function. The flip-flop is called a
bistable device, because it has two and only two possible stable output states: 1 (high) and 0
(low). It has the capability to remain in a particular output state (i.e., storing a bit) until input

ENGINEERING PROGRAM
signals cause it to change state. This is the basis of all semiconductor information storage and
processing in digital computers; in fact, flip-flops perform many of the basic functions critical
to the operation of almost all digital devices.
Figure 5: Symbol Of SR flipflop
A fundamental flip-flop, an SR flip-flop, is schematically shown in Figure5.S is the set input,

R is the reset input, and Q and Q bar are the complementary outputs. Most flip-flops include
both outputs, where one output is the inverse (NOT) of the other. The RS flip-flop operates
based on the following rules:
1) As long as the inputs S and R are both 0, the outputs of the flip-flop remain
unchanged.
2) When S is 1 and R is 0, the flip-flop is set to Q=1 and Q=0.
3) When S is 0 and R is 1, the flip-flop is reset to Q=0 and Q=1
4) It is “not allowed” (NA) to place a 1 on S and R simultaneously because the output
will be unpredictable.
A truth table is a valuable tool for describing the functionality of a flip-flop. The truth table
for a basic RS flip-flop is given in Table. The first row shows the memory state where the
flip-flop retains the last value set or reset. Qo is the value of the output Q before the indicated
input conditions were established; 1 is logic high and 0 is logic low. The NA in the last row
indicates that the input condition for that row is not allowed. Because we are precluded from
applying the S=1, R=1 input condition, the RS flip-flop is seldom used in actual designs.

ENGINEERING PROGRAM
Other more versatile flip-flops that avoid the NA limitation are presented in subsequent
sections.
To understand how flip-flops and other sequential logic circuits function, we will look at the
internal design of an RS flip-flop illustrated in Figure. It consists of combinational logic gates
with internal feedback from the outputs to the inputs of the NAND gates. Figure illustrates
the timing of the various signals, which are affected by very short propagation delays through
the NAND gates. Immediately after signal R transitions from 0 to 1, the inputs to the lower
NAND gate are 0 and Q, which is still 1. This changes Q to 1 after a slight propagation delay
Δt1. Feedback of Q to the top NAND gate drives Q to 0 after a slight delay Δt2. Now the flip-
flop is reset, and it remains in this state even after R returns to 0.

ENGINEERING PROGRAM
The set operation functions in a similar manner. The propagation delays Δt1 and Δt2 are
usually in the nanosecond range. All sequential logic devices depend on feedback and
propagation delays for their operation.
4.12.1 Triggering of Flip-Flops:-

Flip-flops are usually clocked; that is, a signal designated “clock” coordinates or
synchronizes the changes of the output states of the device. This allows the design of
complex circuits such as a microprocessor where all system changes are triggered by a
common clock signal. This is called synchronous operation because changes in state are
coordinated by the clock pulses. The outputs of different types of clocked flip-flops can
change on either a positive edge or a negative edge of a clock pulse. These flip-flops are
termed edge-triggered flip-flops. Positive edge triggering is indicated schematically by a
small angle bracket on the clock input to the flip-flop (see Figure 6.8a ). Negative edge
triggering is indicated schematically by a small circle and angle bracket on the clock input
(see Figure 6.8b ). The function of the edge-triggered RS flip-flop is defined by the following
rules:
1) If S and R are both 0 when the clock edge is encountered, the output state remains
unchanged.
2) If S is 1 and R is 0 when the clock edge is encountered, the flip-flop output is set to 1.
If the output is at 1 already, there is no change.
3) If S is 0 and R is 1 when the clock edge is encountered, the flip-flop output is reset to
0. If the output is at 0 already, there is no change.
4) S and R should never both be 1 when the clock edge is encountered.

ENGINEERING PROGRAM
The truth table for a positive edge-triggered RS flip-flop is given in Table. The up-arrow ↑ in
the clock (CK) column represents the positive edge transition from 0 to 1. The NA in the
second to last row indicates that the input condition for that row is not allowed. As long as
there is no positive edge transition, the values of S and R have no effect on the output as
shown by the X symbols in the last row of the table. An example timing diagram is shown in
Figure . The output is reset (Q=0) at the first positive edge of the clock signal, where R =1
and S=0, and the output is set (Q=1) at the second positive edge, where S=1 and R= 0.
There are special devices that are not edge triggered in the way just described. An important
example is called a latch. Its schematic symbol is shown in Figure. The output Q tracks the
input D as long as CK is high. When a negative edge occurs (i.e., when CK goes low), the
flip-flop will store (latch) the value that D had at the negative edge, and that value will be
retained at the output. Because the output follows the input when the clock is high, we say the
latch is transparent during this time.

ENGINEERING PROGRAM
The latch can also be referred to as a positive-level-triggered device. The truth table for a
latch is given in Table, and a timing diagram example is shown in Figure. Note how the
output (Q) tracks the input (D) while the clock level is high (CK=1). The X in the last row of
the table indicates that the value of D has no effect on the output as long as CK is low.
Asynchronous Inputs:-
Flip-flops may have preset and clear functions that instantaneously override any other inputs.
They are called asynchronous inputs, because their effect may be asserted at any time. They
are not triggered by a clock signal. The preset input is used to set or initialize the output Q of

ENGINEERING PROGRAM
the flip-flop to high (1). The clear input is used to clear or reset the output Q of the flip-flop
to low (0). The small inversion symbols shown at the asynchronous inputs in Figure are
typical of most devices and imply that the function is asserted when the asynchronous input
signal is low. Such an input is referred to as an active low input. Both preset and clear should
not be asserted simultaneously. Either of these inputs can be used to define the state of a flip-
flop after power-up; otherwise, at power-up the output of a flip-flop is uncertain.
4.13 D Flip-Flop:-
The D flip-flop, also called a data flip-flop, has a single input D whose value is stored and
presented at the output Q at the edge of a clock pulse. A positive edge-triggered D flip-flop is
illustrated in Figure, and its truth table is given in Table. Unlike a latch, a D flip-flop does not
exhibit transparency. The output changes only when triggered by the appropriate clock edge
(in this case, a positive edge).

ENGINEERING PROGRAM
4.14 JK Flip-Flop:-
The JK flip-flop is similar to the RS flip-flop where the J is analogous to the S (set) input
and the K is analogous to the R (reset) input. The major difference is that the J and K inputs
may both be high simultaneously. This state causes the output to toggle, which means the
output changes value (i.e., a 1 would become 0, and a 0 would become 1). The schematic
representation and truth table for a negative edge triggered JK flip-flop are shown in above
Figure and Table .The first two rows of the table describe the preset or clear functions that
can be used to initialize the output of the flip-flop. Recall that these features are active low
and override the other inputs. The third row precludes presetting and clearing simultaneously.
The symbol ↓ represents the negative edge of the clock signal, which causes the change in the

ENGINEERING PROGRAM

ENGINEERING PROGRAM
output. The last row describes the memory feature of the flip-flop in the absence of a negative
edge. The JK flip flop has a wide range of applications, and all flip-flops can easily be
constructed from it with proper external wiring. The T (toggle) flip-flop serves as a good
example of this. The symbol for a positive edge-triggered T flip-flop and the equivalent JK
flip-flop implementation are shown in Figure. The T flip-flop simply toggles the output every
time it is triggered. The preset and clear functions are necessary to provide direct control over
the output because the T input alone provides no mechanism for initializing the output value.
The truth table is given in above Table.
4.15 Data Register:-
Figure shows a 4-bit data register that uses negative edge-triggered D flip-flops to transfer
data from four data lines to the outputs of four AND gates. It does this in two distinct steps.
First, the data values Di are transferred to the outputs. Q of the flip-flops on the negative edge
of the load signal. Then a pulse on the read line presents the data at the register outputs Ri of
the AND gates. Data registers are used in microprocessors to hold data for arithmetic
calculations. Data registers can be cascaded to store as many bits as are required.
4.16 Binary Counter and Frequency Divider:-
Figure shows a 4-bit binary counter consisting of four negative edge-triggered toggle flip-
flops connected in sequence. The timing diagram is also shown for the first 10 input pulses.

ENGINEERING PROGRAM
The four output bits Bi change according to the binary number counting sequence, counting
from 0 (B 3 B 2 B 1 B 0 _ 0000), to 1 (B 3 B 2 B 1 B 0 =0001),etc., to 15 (B 3 B 2 B 1 B 0
=1111), and then returning back to 0. This circuit may also be used as a frequency divider.
Output B0 is a divide-by-2 output because its frequency is 1/2 the input pulse train frequency.
B1 , B2 , and B3 are divide-by _4, _ 8, and _ 16 outputs, respectively.
4.17 Multiplexers
A multiplexer (MUX) is a device allowing one or more low-speed analog or digital input
signals to be selected, combined and transmitted at a higher speed on a single shared
medium or within a single shared device. Thus, several signals may share a single device
or transmission conductor such as a copper wire or fiber optic cable. A MUX functions
as a multiple-input, single-output switch.
In telecommunications the combined signals, analog or digital, are considered a single-
output higher-speed signal transmitted on several communication channels by a
particular multiplex method or technique. With two input signals and one output signal,
the device is referred to as a 2-to-1 multiplexer; with four input signals it is a 4-to-1
multiplexer; etc.

ENGINEERING PROGRAM
A multiplexer has
– 2 n data inputs
– n control inputs
– 1 output
A multiplexer routes (or connects) the selected data input to the output.
The value of the control inputs determines the data input that is selected.
sel Io I1 out
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1

ENGINEERING PROGRAM

Digital Logic Notes

Hochgeladen von

Dokumentinformationen

Copyright

Verfügbare Formate

Dieses Dokument teilen

Dokument teilen oder einbetten

Freigabeoptionen

Stufen Sie dieses Dokument als nützlich ein?

Sind diese Inhalte unangemessen?

Copyright:

Verfügbare Formate

Digital Logic Notes

Hochgeladen von

Copyright:

Verfügbare Formate

DEPARTMENT OF FRESHMAN

Basic Electronics (Mechanical Sciences) Course code:15EECF101

4.1.1 Signal ............................................................................................................................... 4

4.1.2 Comparison of Analog and Digital Signal ........................................................................ 7

4.2 Number Systems ..................................................................................................................... 7

4.2.1 Decimal Number System ................................................................................................. 7

4.2.2 Binary Number System ................................................................................................... 8

4.2.3 Octal Number System ..................................................................................................... 8

4.2.4 Hexadecimal Number System ......................................................................................... 9

4.2.5 Decimal to binary conversion: ...................................................................................... 10

The steps to perform decimal to binary conversion are as follows .............................................. 10

4.2.6 Binary to Decimal conversion: ...................................................................................... 12

The steps to perform Binary to Decimal conversion are as follows ............................................. 12

4.2.7 Binary to Hexadecimal conversion:............................................................................... 13

The steps to perform Binary to Hexadecimal conversion are as follows ..................................... 13

4.2.8 Hexadecimal to Binary conversion:............................................................................... 13

4.2.9 Decimal to Hexadecimal conversion: ............................................................................ 14

The steps to perform Decimal to Hexadecimal conversion are as follows ................................... 14

4.2.10 Hexadecimal to Decimal conversion: ............................................................................ 15

The steps to perform Hexadecimal to Decimal conversion are as follows ................................... 15

4.2.11 Binary to Octal conversion: ........................................................................................... 16

Freshman Basic Electronics Team(2016-17) 1

Basic Electronics (Mechanical Sciences) Course code:15EECF101

The steps to perform Binary to Octal conversion are as follows .................................................. 16

4.3 BCD or Binary Coded Decimal ............................................................................................... 18

Table2. Representation Of Decimal Numbers, Binary and BCD numbers ........................................ 19

4.4 Binary to Gray Code and Viceversa ....................................................................................... 19

Table3. Binary to Gray Code ......................................................................................................... 20

4.4.1 Binary to gray code conversion..................................................................................... 20

4.4.2 Gray code to binary conversion .................................................................................... 21

4.5 Arithmetic Operations of Binary Number ............................................................................. 23

4.5.1 Binary Addition ............................................................................................................. 23

4.5.2 Binary Subtraction......................................................................................................... 24

4.6 Subtraction by 1’s Complement............................................................................................ 26

4.6.1 Subtraction by 2’s Complement.................................................................................... 27

4.7 Boolean Algebra .................................................................................................................... 29

4.7.1 De Morgan’s Theorem or Law: ..................................................................................... 30

4.8 Logic Gates ............................................................................................................................ 32

4.8.1 Universal Gates .................................................................................................................... 35

4.9 Combinational circuits .......................................................................................................... 39

4.9.1 Definition of Combinational logic circuits ............................................................................ 40

4.9.1 Half Adder: .................................................................................................................... 40

4.9.2 Full Adder: ..................................................................................................................... 41

4.9.3 Parallel Binary Adder..................................................................................................... 42

4.10 Sequential logic circuits ........................................................................................................ 44

Freshman Basic Electronics Team(2016-17) 2

Basic Electronics (Mechanical Sciences) Course code:15EECF101

4.11 Types of Sequential circuits .................................................................................................. 45

There are two types of Sequential circuits they are ......................................................................... 45

4.12 FLIP-FLOPS:- .......................................................................................................................... 45

4.12.1 Triggering of Flip-Flops:- ............................................................................................... 48

4.13 D Flip-Flop:- ........................................................................................................................... 51

4.14 JK Flip-Flop:- .......................................................................................................................... 52

4.15 Data Register:- ...................................................................................................................... 54

4.16 Binary Counter and Frequency Divider:-............................................................................... 54

4.17 Multiplexers .......................................................................................................................... 55

Freshman Basic Electronics Team(2016-17) 3

Basic Electronics (Mechanical Sciences) Course code:15EECF101

 Industrial process control

Freshman Basic Electronics Team(2016-17) 4

Basic Electronics (Mechanical Sciences) Course code:15EECF101

The graphical representation of Analog Signal (Temperature) is shown in the Figure 1

Figure 1: Graphical Representation Of Analog Signal

The disadvantages of Analog System are as follows

124 023 122 121 020 . 12-1 12-2 02-3

A162 B161 C160 . C16-1 D*16-2

10162 11161 12160 . 1216-1 13*16-2