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 Introduction

MOS capacitor (metal–oxide–semiconductor) is an important electrical component , which is used


in most semiconductor devices (Fig. 1). It forms an essential part of a MOSFET which in turn is an important
device used in large-scale integration. MOS capacitor consists of a semiconductor body or substrate, an
insulator film, such as SiO2, and a metal electrode called a gate. Simply said it is and oxide film between a
P-type or N-type substrate and a metal plate.
Normally, the capacitance value of a capacitor doesn't change with values of voltage applied
across its terminals. MOS capacitor have different properties. The capacitance of the MOS capacitor
depends upon the voltage applied on the gate terminal.
MOS Capacitors are Single Layer Capacitors (SLCs) that use silicon dioxide to produce small, high
Q, temperature stable, high breakdown voltage, low leakage capacitors.
When analyzing MOS capacitors we consider two conditions: ideal and real.

 Ideal MOS capacitor

The MOS structure is considered ideal, as defined in SZE [1], if the following three conditions are
met:
1. The work function of metal (WM) and work function of semiconductor (WS) are equal, WM
= WS. This implies that in the three materials, all energy levels are equal, when there is no
voltage applied to the structure. This can be seen in flat band characteristic of the ideal
MOS capacitor (Fig. 2).
2. There exists no charge in the oxide and at the Si–SiO2 connection. This means that the
electric field is equal to zero in the whole capacitor, in the absence of applied voltage. The
only charges that can exist in the structure under any biasing conditions are those in the
semiconductor and those with the equal but opposite sign on the metal surface adjacent
to the insulator.
3. There is no carrier transport through the insulator under DC biasing conditions, or the
resistivity of the insulator is infinite.
The flat band voltage of a MOS capacitor is defined as the voltage at which there is no charge on
the capacitor plates. This means that there is no static electric field across the oxide.

 Real (Non-ideal) MOS capacitor

Experimental results are not the same as for the ideal MOS device. This fluctuations are caused
by the presence of the oxide charges and the work function difference that exists in practice, but are not
taken into account in the theoretical study of an ideal MOS capacitor.
Early studies of the MOS devices showed that the threshold voltage VTH and the flat band voltage
VFB could be affected by these charges. The understanding of the origin and nature of these charges is
very important if they are to be controlled or minimized during device processing [2, 3]. Final result of the
presence of any charge in the oxide induces a charge of opposite polarity in the silicon. The amount of
charge induced will be inversely proportional to the distance of the charge from the silicon surface. Thus,
an ion residing in the oxide very near the Si–SiO2 interface will reflect all of its charge in the silicon, while
an ion near the oxide outer surface will cause little or no effect in the silicon. The charge is measured in
terms of the net charge per unit area at the silicon surface. Most oxide charge evaluations can be made
using the capacitance voltage (C–V) method. This method is simple and rapid [4, 5].
In the real MOS structure, the work function of the metal and the work function of the silicon are
different [6, 7]. For this reason, there exists an electric field in the oxide and in the top layer of the silicon
even in the absence of an applied voltage (Fig. 9). The effect of a work function difference may cause a
shift of the actual C–V curve with respect to the ideal one (Fig. 10).
Non-ideal effects in MOS capacitors include fixed charge, mobile charge and charge in surface
states. All three types of charge can be identified by performing a capacitance-voltage measurement.
Fixed charge in the oxide simply shifts the measured curve. A positive fixed charge at the oxide-
semiconductor interface shifts the flat band voltage by an amount which equals the charge divided by the
oxide capacitance. The shift reduces linearly as one reduces the position of the charge relative to the gate
electrode and becomes zero if the charge is located at the metal-oxide interface. A fixed charge is caused
by ions which are incorporated in the oxide during growth or deposition.
The flat band voltage shift due to mobile charge is described by the same equation as that due to
fixed charge. However the measured curves differ since a positive gate voltage causes mobile charge to
move away from the gate electrode, while a negative voltage attracts the charge towards the gate. This
causes the curve to shift towards the applied voltage. One can recognize mobile charge by the hysteresis
in the high frequency capacitance curve when sweeping the gate voltage back and forth.
Charge due to electrons occupying surface states also yields a shift in flat band voltage. However
as the applied voltage is varied, the Fermi energy at the oxide-semiconductor interface changes also and
affects the occupancy of the surface states. The interface states cause the transition in the capacitance
measurement to be less abrupt. The combination of the low frequency and high frequency capacitance
allows to calculate the surface state density. This method provides the surface state density over a limited
(but highly relevant) range of energies within the bandgap. Measurements on n-type and p-type
capacitors at different temperatures provide the surface state density throughout the bandgap.

 Electrostatics and carrier transport of MOS Capacitors

In the following section electrostatic behavior of MOS capacitor under bias will be described.
There are three different bias voltages. This means that a MOS capacitor has three operating
modes [6]. Accumulation, depletion and inversion cases may occur when a MOS capacitor is biased
depending on the type of the substrate and bias direction (Fig. 3).

 Accumulation
Accumulation occurs when one applies a voltage, which is less than the flat band voltage. The
minority carriers on the gate attract majority carriers from the substrate to the oxide semiconductor
interface. When an external voltage is applied to the silicon surface in MOS capacitor, the carrier density
changes accordingly in its surface region. With large negative bias applied to the gate, holes are attracted
by the negative charges. This creates a layer called accumulation layer (Fig. 4). The high concentration of
these holes will form the second electrode of a parallel plate capacitor with first electrode at the gate. In
these conditions the capacitance of the structure under accumulation conditions must be approximately
equal to the capacitance of the oxide [7]. Accumulation mode can be seen in Fig. 5.
 Depletion
As a more positive voltage than the flat band voltage is applied, a negative charge builds up in the
semiconductor. When negative charges are removed from the gate, holes leave the accumulation layer
until the silicon will be neutral everywhere. This applied gate bias is called the flat band voltage. As the
bias on the gate is made more positive with respect to flat band, holes are repelled and a region is formed
at the surface which is depleted of carriers (Fig. 6). So this is called a depletion layer. Under depletion
conditions, the Fermi level near the silicon surface will move to a position closer to the center of the
forbidden region as illustrated in Fig. 7 (c). Increasing the positive voltage VG will increase the width of the
surface depletion region, and the capacitance will decrease. This is due to the capacitance on the surface
depletion region will add in series to the capacitance across the oxide.
 Inversion
As the potential across the semiconductor increases beyond twice the bulk potential, another
type of negative charge emerges at the oxide-semiconductor interface: this charge is due to minority
carriers, which form a so-called inversion layer. With increasingly applying positive voltage, the surface
depletion region will continue to widen until the onset of surface inversion is observed (n-type), an
inversion layer is formed. Fermi level near the silicon surface will now lie close to the bottom of conduction
band. The build-up of inversion layer is a threshold phenomenon. The threshold condition marks the
equality of the concentration of minority carriers to the doping concentration. At the onset of inversion,
the depletion layer width reaches a limit. Since the charge density in the inversion layer may or may not
be able to follow the AC variation of the applied gate voltage, it follows that the capacitance under
inversion conditions will be a function of frequency. Inversion mode can be seen in Fig. 8.
Inversion can be split into weak and strong inversion. Weak inversion begins as soon as (EF-Ei )>0,
and the minority carrier concentration increases exponentially. Strong inversion occurs when the minority
carrier concentration is equal to the substrate doping. Beyond this point most of the additional negative
charges consist of the charge Qn in a very narrow n-type inversion. The depletion width is at its maximum
at strong inversion since a small increase in band bending result in a very large increase in Qn.

- Low frequency Capacitance


This case, illustrated in Fig. 9, corresponds to the thermal equilibrium in which the increase in the
gate charge is balanced by the substrate charge. It arises when the frequency of the small signal is
sufficiently low (typically less than 10 Hz). The low frequency capacitance of the structure, CLF, is
equivalent to that of the oxide layer:
CLF = Cox
- High Frequency Capacitance

The case illustrated in Fig. 9, corresponds to the higher frequencies of the applied small signal
(typically above 105 Hz). The increase of charge in the metal side is now balanced by the substrate charge
since the minority carriers can no longer adjust their concentrations. It follows that the high frequency
capacitance of the MOS structure, CHF, is given:
1 1 1
= +
Chf Cox CDlim
Electrostatic under biased conditions can be seen in Fig. 10. Charge movement is
represented in Fig. 11.

 I-V and C-V curves of MOS capacitor

The I-V Characteristic Curves, which is short for Current-Voltage Characteristic Curves or
simply I-V curves of an electrical device or component, are a set of graphical curves which are used to
define its operation within an electrical circuit.
First, we look at current-voltage characteristic of a MOS capacitor. I-V measurements in this case
are for a temperature range from 20 K to 300 K. The I-V curves at selected temperatures can be seen in
Fig. 12.
In the accumulation regime, an explicit temperature dependence can easily be observed. Also a
series resistance effect can be seen, after about 1 volts at all temperatures. In the inversion, however, a
weaker dependence on temperature is visible.
The typical capacitance-voltage (C-V) characteristics of a MOS capacitor with n-type body is given
in Fig. 13. The flat band voltage (Vfb) separates the accumulation region from the depletion region. The
threshold voltage (Vth) separates the depletion region from the inversion region. It is clearly visible that
the curve splits into two after a certain voltage, depending upon the frequency (high or low) of AC voltage
applied at the gate. This voltage is called the threshold voltage (Vth) of MOS capacitor.

 Applications of MOS capacitors

The MOS capacitor is not a widely used device in itself. However, it is part of the MOS transistor
which is by far the most widely used semiconductor device.
Control of the electrical properties of the MOS system has been one of the major factors that
have led to stable and high performance silicon integrated circuits. The MOS capacitors are also the
most useful devices in semiconductor surface research. A MOS-C is also used as a basic device in many
applications such as EEPROMs, DRAMs, optical sensors, solar cells etc. The simplicity of fabrication are
among the main advantages of these structures. Ultra-thin oxide MOS capacitors are used in the
production of high density memory elements recently.
High linearity switched-capacitor (SC) stages are constructed entirely from MOS transistors. The
proposed circuits use the gate-to-channel capacitance of MOSFET's for realizing all capacitors. As a result,
they can be fabricated in any inexpensive basic digital CMOS technology, and the chip area occupied by
the capacitors can be reduced. A number of different SC stages have been designed and fabricated using
the proposed techniques.

These included:
- SC amplifiers
- gain/loss stages
- data converters
Both the simulations and the experimental results obtained indicate that very high linearity can
be achieved in these circuits using basic CMOS technology.
They are used in many sensors. Some of them are combustible gas sensors, MOS capacitor
hydrogen sensors for harsh environment applications, ionizing radiation sensors, etc.
MOS Capacitors are also used for applications in RF, microwave, and GHz ranges.
Most common applications are in:
- Hybrid circuits
- Bias Networks
- Test and Measurement equipment
- Aerospace
- TOSA and ROSA applications
Appendix

Figure 1: MOS Capacitor

Figure 2: Energy band diagram of unbiased ideal MOS capacitor

Figure 3: Biasing Metal-Oxide-Semiconductor diode with p-type


substrate: (a) accumulation; (b) depletion; (c) inversion [1]
Figure 4: Accumulation layer

Figure 5: Schematic representation of accumulation


mode of work: a) biasing condition b) charge
distribution c) energy band diagram

Figure 6: Depletion layer


Figure 7: Schematic representation of depletion mode
of work: a) biasing condition b) charge distribution c)
energy band diagram

Figure 8: Schematic representation of inversion


mode of work: a) biasing condition b) charge
distribution c) energy band diagram
Figure 9: Typical ideal C-V curve showing three modes
of work

Figure 10: Electrostatics under bias

Figure 11: Charges


Figure 12: I-V curve under different temperature conditions

Figure 13: C-V curve of MOS capacitor


Reference
[1] S. M. Sze, Physics of Semiconductor Devices, John Wiley & Sons, 2 ed., 1981.
[2] Goetzberger, A., Sze, S.M.: Metal-insulator-semiconductor (MIS) physics. In: Wolfe, R. (ed.) Applied
Solid State Science. Academic Press, New York (1969)
[3] Deal, B.E.: The current understanding of charges in the thermally oxidized silicon structure. J.
Electrochem. Soc. 121, 198–205 (1974)
[4] Terman, M.: An investigation of surface states at silicon–silicon oxide interface employing metal oxide
silicon diodes. Solid St. Elect. 5, 285–299 (1962)
[5] Snow, E.H., Grove, A.S., Deal, B.E., et al.: Ion transport phenomena in insulating films. J. Appl. Phys. 36,
1664–1673 (1965)
[6] B. Van Zeghbroeck, Principles of Semiconductor Devices, 2004.
[7] Nicollian, E.H., Brews, J.R.: MOS Physics and Technology. Wiley, New York (1982)

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