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1 Number Representations
1. (r)‐ and (r‐1)‐complement
a) How do you calculate the (r)‐ and the (r‐1)‐complement of a number digit‐wise?
b) Prove the mathematical correctness. The definition of the complements is given as
follows:
̅
̅ 1
How does the method work in case of r=2?
2. Number of digits needed for converting a number between number systems of different
radix
Approximate the number of digits to represent an n digit decimal number in binary
representation (without a sign).
3. Extending 2`s complement numbers
The value X of a n digit 2`s complement number is calculated as follows:
∗2 ∗2
What does this equation mean? How can this representation be extended to an (n+1)‐digit
number or even a number with more bits? Explain the mechanism with an example.
Exercises – Selected Topics in VLSI Design
4. Fixed point octal number
Convert the decimal values 283.75 and ‐283.75 to (r)‐ and (r‐1)‐complement. Use radix r=8,
k=4 integer and m=2 fractional digits.
5. Fixed point binary number
a) Convert the decimal values 283.75 and ‐283.75 to (r)‐ and (r‐1)‐complement. Use radix
r=2, k=10 integer and m=2 fractional digits.
b) How do you save a fractional number into a 12‐bit memory? Take the complement
representations from part a). What about the binary point?
6. Signed‐Digit‐Numbers
Find one possible signed‐digit representation with radix r=2, r=4 and r=16 for the decimal
values 3, 6, 17 and 27.
7. Canonical signed digit representation and modified booth encoding
Calculate the canonical signed digit representation and the modified booth encoding for the
values of the previous problem for a 6 digit representation. Use radix r=2 only.
8. Number system comparison
Please describe the difference between a one’s complement‐, a signed‐digit‐ and a carry‐
save‐representation. Use radix r=2 only.
Exercises – Selected Topics in VLSI Design
2 Number Overflow and Rounding
9. Overflow in 2’s complement
a) Please sketch the overflow characteristic of a 2’s complement number.
b) Is it possible to detect an overflow in a standard addition or multiplication if only knowing
the result? Please give rules to detect an overflow in an addition or subtraction while using
two’s or one’s complement numbers. Carry‐in and Carry‐out of the sign‐bit are available for
that decision.
c) Show different possibilities to detect an overflow considering 2’s complement numbers.
Furthermore show possibilities to avoid an overflow without using special hardware.
10. Rounding
a) List and explain three ways to round. What are their properties?
b) How can the “Round‐to‐nearest‐even” algorithm be implemented for 2`s complement
numbers? Describe this implementation with pseudo‐code, VHDL or C!
11. Rounding and overflow
Assume a 64‐bit fixed point number (1 sign bit, 3 integer bits) is transformed into a 16‐bit
number with the same format.
a) In which range of values the 64 bit number has to be so that no rounding failure happens?
b) If the 64‐bit value is out of that range of values how can a catastrophic failure possibly be
avoided?
c) Plot the needed “transfer function”.
d) Show a circuit to realize this transfer function considering 2’s complement and carry save
number representations. The overflow is signaled by OV=1.
12. Pseudo and real overflow
Explain the difference between a pseudo and a real overflow for an own example
considering carry save numbers and show how the overflow‐correction method works.
Exercises – Selected Topics in VLSI Design
3 Adders
13. (7,3)‐Counter
a) What is a (m,n)‐counter? What is its purpose?
b) Sketch a linear implementation of a (7,3)‐counter. Please determine the operational time
of the critical path. Consider the definition of the operational time given in the lecture.
c) Please sketch an tree implementation of a (7,3)‐counter. Also determine the critical path.
14. Carry‐Skip Adder (CSKA)
a) What is the basic idea of a carry‐skip adder?
b) Please specify the distribution of the block sizes of a CSKA.
c) Explain the block sizes.
15. Carry‐Select Adder (CSEL)
a) What is the basic idea of a carry select adder?
b) Please derive the equation for an optimal block size of a CSEL. Use the size ratios given in
the lecture.
c) Please use a CSEL with an optimized block size and determine the maximum operational
time.
d) Compare the criteria of the optimal block sizes of CSKA and CSEL.
16. Conditional Sum Adder (CSUM)
Please sketch an 8‐bit CSUM.
Exercises – Selected Topics in VLSI Design
4 Adder Realizations
17. Brent‐Kung Carry‐Lookahead Adder
Please sketch a Brent‐Kung Carry‐Lookahead Adder. (Literature: Brent, Kung, IEEE Transactions on
Computers, Vol C‐31, No 3, March 1982)
18. CSEL with variable block sizes: e.g. 7 6 5 4 3 2 1
a) Assume an increasing block size of 1 for every block. Please derive a formula for kopt,var for a given
number of bits n.
b) Determine the latency TCSEL,var.
c) Compare the results with a CSEL with a fixed parameter k.
19. Carry Completion Adder (asynchronous or self‐timed)
a) What does asynchrony or self‐timed mean?
b) Please determine the logical equation for the carry‐completion signal.
c) Show that the following equation is correct using examples:
20. 4:2‐compressor
a) Please sketch a 4:2‐compressor containing full adders.
b) Show how a 4:2‐compressor can be optimized using parallelized XORs.
Exercises – Selected Topics in VLSI Design
5 Applied Adders
21. ADD / SUB 4 bit 2’s complement operands
Please sketch an addition / subtraction unit of 4 bit 2’s complement operands.
22. INC / DEC 4 bit 2’s complement operands
Please sketch an incrementing / decrementing unit of 4 bit 2’s complement operands.
23. LSB first serial adder
Compare the realization of a LSB first serial adder for n‐bit operands with the conventional RCA
implementation. Consider the characteristics.
24. Digit Online adder for CS‐operands
Please develop an implementation of a Digit Online adder using the schematic of a CS‐adder.
25. Digit Online adder for SD‐operands
Please develop an implementation of a Digit Online adder considering SD‐operands.
26. Timing comparison LSB‐first / MSB‐first
Please sketch the timing for the computation of a function of your own choice (e.g. ) for a
conventional (LSB‐first) and a Digit‐Online (MSB‐first) implementation. Show the important
differences.
Exercises – Selected Topics in VLSI Design
6 Multiplication and Division
27. Recursive multiplication
Comprehend the recursive multiplication algorithm (shift and add) for two 6‐bit operands.
28. Restoring Division
Please divide using the Restoring Divisions algorithm considering 8/4‐bit operands.
29. Non‐Restoring Division
Please divide using the Non‐Restoring Divisions algorithm considering 8/4‐bit operands.
30. Division Rest
Please show that the rest Ri of a 2’s complement array division tends to zero with an example.