CompactRIO and LabVIEW TM TM

Development Fundamentals

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Course Manual

May 2007 Edition

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Course Software Version 8.2

Part Number 324516A-01

CompactRIO and LabVIEW Fundamentals Course Manual

Copyright
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Contents

Student Guide
A. NI Certification .....................................................................................................vii
B. Course Description ...............................................................................................viii
C. What You Need to Get Started .............................................................................viii
D. Installing the Course Software..............................................................................ix

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E. Course Goals.........................................................................................................x
F. Course Conventions ..............................................................................................x

Lesson 1
Introduction
A. CompactRIO .........................................................................................................1-2
B. Applications ..........................................................................................................1-3
C. Application Architecture.......................................................................................1-4
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D. Components ..........................................................................................................1-6
E. R Series Expansion System ..................................................................................1-11
F. Star-Fabric High-Speed PCI Interface System .....................................................1-12
G. Accessories ...........................................................................................................1-14
Exercise 1-1
Exercise 1-2
Exercise 1-3
Concept: Analyze Project Specifications .........................................1-15
Concept: Selecting CompactRIO Components ................................1-18
Concept: CompactRIO Specifications..............................................1-22
H. Operation ..............................................................................................................1-24
Exercise 1-4 Concept: CompactRIO Installation and Operating Manuals............1-29

Lesson 2
Configuring CompactRIO
A. Detect the Remote Target .....................................................................................2-2
B. Configure Network Settings .................................................................................2-3
C. View Devices and Interfaces ................................................................................2-7
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D. Add/Remove Software..........................................................................................2-7
Exercise 2-1 Configure a CompactRIO System ....................................................2-12

Lesson 3
Implementing Application Architecture
A. Create a Project .....................................................................................................3-2
B. Add the CompactRIO Target ................................................................................3-4
C. Add I/O Modules ..................................................................................................3-7
D. Add FPGA I/O Items ............................................................................................3-10
Exercise 3-1 Build a CompactRIO Project............................................................3-15

© National Instruments Corporation iii CompactRIO and LabVIEW Fundamentals Course Manual
Contents

Lesson 4
FPGA
A. Introduction...........................................................................................................4-2
B. Defining FPGA Logic with LabVIEW .................................................................4-5
C. FPGA VI Development Process ...........................................................................4-9
D. Developing the FPGA VI .....................................................................................4-10
E. Modular Code .......................................................................................................4-21
F. Testing with the Emulator.....................................................................................4-22

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G. Interactive Front Panel Communication ...............................................................4-23
Exercise 4-1 Build an FPGA VI and Test it with the Emulator ............................4-25
H. Wiring the Modules ..............................................................................................4-30
I. Compiling the FPGA VI .......................................................................................4-31
J. Downloading to Flash Memory ............................................................................4-36
Exercise 4-2 Compile and Test an FPGA VI ........................................................4-40

Lesson 5
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Real-Time Controller
A. Introduction...........................................................................................................5-2
B. The LabVIEW Real-Time Application Development Course..............................5-3
C. Deterministic Operating Systems .........................................................................5-5
D. Timing Methods....................................................................................................5-7
E. Developing an RT Host VI ...................................................................................5-9
F. Rebooting the CompactRIO RT Controller ..........................................................5-20
Exercise 5-1 Build and Test a Simple RT Host VI................................................5-21
G. Reusing Code in Multiple Targets ........................................................................5-27
Exercise 5-2
Reuse LabVIEW Example Code to Monitor Chassis Temperature .........................5-30
H. Converting Binary Representations ......................................................................5-36
Exercise 5-3 Convert Binary Representation to Engineering Units ......................5-41
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Lesson 6
Windows PC Host
A. Overview...............................................................................................................6-2
B. Network-Shared Variable Communications .........................................................6-3
Exercise 6-1 Build and Test a Simple Windows Host VI .....................................6-8

Lesson 7
Data Transfer and Synchronization
A. Race Conditions ....................................................................................................7-2
B. Buffering and Synchronization .............................................................................7-7
C. FPGA FIFOs .........................................................................................................7-8
D. Handshaking .........................................................................................................7-19
E. Interrupts ...............................................................................................................7-21
Exercise 7-1 Interrupt FPGA VI............................................................................7-25

CompactRIO and LabVIEW Fundamentals Course Manual iv ni.com

 Contents

Exercise 7-2 Interrupt RT Host VI ........................................................................7-29

F. Direct Memory Access .........................................................................................7-32
G. NI 9233 Data Acquisition .....................................................................................7-43
H. Accelerometer Data ..............................................................................................7-47
Exercise 7-3 DMA FIFO FPGA VI.......................................................................7-48
Exercise 7-4 DMA FIFO RT Host VI ...................................................................7-60
I. Fan Speed Control ................................................................................................7-68
Exercise 7-5 PID Control FPGA VI ......................................................................7-71

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Exercise 7-6 PID Control RT Host VI...................................................................7-78
Exercise 7-7
Build and Test a Networked Fan Speed Control Application (Optional) ................7-88

Lesson 8
FPGA Wizard (Optional)
A. Generated Core Code for the FPGA VI................................................................8-2
B. Generated Core Code for the Host VI ..................................................................8-2

Appendix A
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C. Timing Engines.....................................................................................................8-3
D. Using the Wizard ..................................................................................................8-12
Exercise 8-1
Exercise 8-2
Build an Application with the FPGA Wizard...................................8-19
Modify Code Generated by the FPGA Wizard ................................8-25

Additional Information and Resources

Course Evaluation
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© National Instruments Corporation v CompactRIO and LabVIEW Fundamentals Course Manual

Implementing Application Architecture
3
CompactRIO applications can be complex because they include many items
and interfaces. They include VIs for Windows, real-time, and FPGA. They

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also include I/O modules and channels. They might have special libraries for
variables to communicate over the internet. This lesson teaches you how to
use the LabVIEW Project Explorer to design and implement an architecture
for CompactRIO applications that organizes these items in a logical and
efficient manner.

Topics
mp A. Create a Project
B. Add the CompactRIO Target
C. Add I/O Modules
D. Add FPGA I/O Items
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© National Instruments Corporation 3-1 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

A. Create a Project

You learned a little about application architecture in the Application

Architecture section of Lesson 1, Introduction. This lesson covers it in more
detail. You must use the LabVIEW Project Explorer to implement the
architecture for a CompactRIO application. The Project Explorer was
introduced in the LabVIEW Basics I: Introduction course.

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To create a CompactRIO project, open LabVIEW and select an Empty
Project, as shown in Figure 3-1. Save the project in an appropriate location
on the host computer. The project root name changes to the title of the file.

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Figure 3-1. Select Empty Project

An example CompactRIO project is shown in Figure 3-2. The top line is the
project root. The label on the project root includes the filename for the
project. Right-click the project root and select New»Targets and Devices
to add an RT target, such as CompactRIO, to the project. Notice that the
Windows PC computer, shown as My Computer, and the RT targets you add

CompactRIO and LabVIEW Fundamentals Course Manual 3-2 ni.com

 Lesson 3 Implementing Application Architecture

to the project are located below the project root and are indented to show
their position in the architecture hierarchy.

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Windows PC CompactRIO System Reconfigurable
FPGA
Windows Network Normal Inter-Thread Time-Critical FPGA LabVIEW
Host VI Communication Priority VI Communication Interface VI Interface FPGA VI

Enterprise Data Storage

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for Windows

Figure 3-2. CompactRIO Project Window Example

LabVIEW Real-Time

Each project can have multiple targets, representing the host computer as
well as real-time, FPGA, and PDA systems. In this course you have three
LabVIEW
FPGA

targets in the project, the Windows PC (My Computer), the CompactRIO

real-time controller (an RT target), and the FPGA. The My Computer item
resides under the project root. Notice that it is indented one level. The
cRIO-9012 item is also indented one level below the root. By default, the
heading for an RT target, such as CompactRIO, is the name of the target as
specified in MAX. My Computer and CompactRIO are at the same level in
the project, but the FPGA item is indented one level below the CompactRIO
RT target. Right-click a target and select Properties to configure the
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settings of the target.

A project can contain LabVIEW files, such as VIs, custom controls,

type definitions, and templates, as well as supporting files, such as
documentation, data files or configuration files organized into folders and
libraries. VIs and libraries that you add to a target appear under the target in
the Project Explorer window.

The location of a VI in the Project Explorer hierarchy tree is important. You

place a VI in a target in the Project Explorer by right-clicking the target and
adding the VI. The VI becomes targeted to that system and has palettes
appropriate to the target. Consequently, the software architecture mirrors the
hardware architecture in the project as shown in Figure 3-3. If you want a
VI to run on the Windows PC host computer, right-click My Computer and
select Add»VI. It appears in the project indented below the My Computer

© National Instruments Corporation 3-3 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

item. Place any VIs that run on the RT controller under the CompactRIO
target, and place the FPGA VI under the FPGA target.

Windows PC CompactRIO System Reconfigurable

FPGA
Windows Network Normal Inter-Thread Time-Critical FPGA LabVIEW
Host VI Communication Priority VI Communication Interface VI Interface FPGA VI

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Enterprise Data Storage

LabVIEW LabVIEW Real-Time LabVIEW

for Windows FPGA

mp Figure 3-3. Application Architecture Relationship to the VIs

in the Project Explorer Tree

B. Add the CompactRIO Target

To create the CompactRIO target in the Project Explorer window, right-click
the project root, and select New»Targets and Devices as shown in
Figure 3-4. This places the target at the same level as the My Computer host
PC in the project tree.
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 Lesson 3 Implementing Application Architecture

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mp Figure 3-4. Adding a New Target in the Project Explorer

The targets and devices that are available depend on the target you select.
For example, if you select My Computer, the Add Targets and Devices
dialog box lists only targets and devices that are available on the local
computer. If you select another target it lists targets and devices that are
available for the target you selected. If you select the project root, you can
add top-level targets that are not contained by other targets, such as My
Computer.

The Add Targets and Devices dialog box shown in Figure 3-5 includes the
following components:
• Targets and Devices—Specifies the type of target or device you want
to add to the project.
– Existing target or device—Displays all targets and devices on the
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local subnet.
– Existing device on remote subnet—Displays device types that a
remote subnet supports. Select a device from the list and enter an IP
address for the device to add the device to the project.
– New target or device—Displays targets and devices that you can
create without a physical target or device present. This option allows
you to develop a project without CompactRIO hardware connected
to the Host PC.

© National Instruments Corporation 3-5 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

• IP address—Specifies the IP address of the device you want to add to

the project. This option is available only if you select Existing device on
remote subnet.

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Figure 3-5. Existing Targets in the Add Targets Dialog Box

Expand the Real-Time CompactRIO folder, and select the appropriate

target, as shown in Figure 3-5, click OK, and save the project.

If no CompactRIO hardware is available, you can simulate hardware in a

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project.

Complete the following steps to simulate hardware in a project:

1. Open and save a new project.
2. Right-click the project and select New»Targets and Devices.
3. Select New target or device in the dialog box and select one of the
CompactRIO controllers.
4. Click OK, and save the project.

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 Lesson 3 Implementing Application Architecture

C. Add I/O Modules

After adding the CompactRIO target to the project, you can add the I/O
modules. Expand the CompactRIO target to show the FPGA Target as
shown in Figure 3-6.

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mp Figure 3-6. Add I/O Modules to the Project

Complete the following steps to add I/O modules to the project:

1. Right-click the FPGA Target and select New»C Series Modules,
as shown in Figure 3-7.
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Figure 3-7. Add C Series Modules to the Project

© National Instruments Corporation 3-7 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

2. Expand the C Series Module directory in the Add Targets and Devices
on FPGA Target dialog box.
3. Click Continue in the Warning dialog box shown in Figure 3-8.

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Figure 3-8. Discovering C Series Modules Warning Dialog Box

4. Press <Ctrl> to select multiple modules displayed in the Add Targets

and Devices on FPGA Target dialog box displays, as shown in
Figure 3-9.
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Figure 3-9. Add Targets and Devices on FPGA Target Dialog Box

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 Lesson 3 Implementing Application Architecture

5. After selecting the modules, click OK, and save the project. The
modules are displayed in the Project Explorer window similar to
Figure 3-10.

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mp Figure 3-10. Project Explorer with C Series Modules

6. Right-click any of the modules and select Properties to display and

change the properties of the module. Figure 3-11 shows that the name
and slot properties can be changed for the NI 9211 module.
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© National Instruments Corporation 3-9 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

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Figure 3-11. Module Properties Dialog Box

D. Add FPGA I/O Items

Next, add specific FPGA I/O items (channels) to the project. Each I/O
module has channels specific to it that are different from other modules. You
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can search the LabVIEW Help for module-specific information. Select
Help»Search the LabVIEW Help and enter the module number to find
information on the channels specific to that module. Figure 3-12 shows an
example of the information available for the NI 9211 module.

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 Lesson 3 Implementing Application Architecture

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Figure 3-12. LabVIEW Help Display of NI 9211 Module Available Channels

Right-click an FPGA I/O module and select New»FPGA I/O, as shown in

Figure 3-13 to display the New FPGA I/O dialog box shown in Figure 3-14.
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Figure 3-13. Add a New FPGA I/O Item (Channel)

© National Instruments Corporation 3-11 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

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mp Figure 3-14. New FPGA I/O Dialog Box

Use the FPGA dialog box to specify the I/O resources you want to use in the
Project Explorer window and to edit the names of the I/O items you select.
This dialog box includes the following components:
• Available Resources—Displays the I/O resources available for the
FPGA target. The FPGA target you right-click in the Project Explorer
window determines the I/O resources that appear in the Available
Resources tree.
• Add—Adds the I/O resources you select in the Available Resources tree
to the list of FPGA I/O items in the New FPGA I/O table.
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• Remove—Removes the FPGA I/O items you select in the New FPGA
I/O table from the table. The FPGA I/O item returns to the Available
Resources tree.
• New FPGA I/O—Displays the I/O resources you add to the table from
the Available Resources tree. Each FPGA I/O item that appears in this
table appears in the Project Explorer window when you click the OK
button. Contains the following options:
– Name—Displays the name of the FPGA I/O item that appears in the
Project Explorer window. You can change the name of the FPGA I/O
item by typing in the Name column in the New FPGA I/O table, by
typing in the Name string control in the FPGA I/O Properties dialog
box, or by right-clicking the FPGA I/O item in the Project Explorer
window and selecting Rename.

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 Lesson 3 Implementing Application Architecture

– Resource—Displays the I/O resource on the FPGA target that you

selected from the Available Resources tree in the New FPGA I/O
table. The Resource corresponds to an I/O resource on the FPGA
target. You can change the resource by right-clicking the FPGA item
in the Project Explorer window and selecting Select Resource.
– Place new I/O in folders—Organizes the FPGA I/O items in folders
according to FPGA I/O type in the Project Explorer window.

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You can select multiple resources by pressing the <Ctrl> key and clicking
additional resources. You also can select an entire group of I/O resources by
clicking the top-level I/O type or folder, if available.

After adding I/O items, save the project. An example project is shown in
Figure 3-15. Notice the project tree separates the I/O into Analog Input,
Digital Line Input, and Analog Output folders. The NI 9211 has Analog
Input for the Thermocouple, CJC, and Autozero. The NI 9233 has Analog
mp Input for Y Acceleration, X Acceleration, and Tachometer. It also has
Digital Line Outputs for Start and Stop.
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Figure 3-15. Project Explorer with FPGA I/O Items (Channels)

© National Instruments Corporation 3-13 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

You can reuse items among different FPGA targets in a Project Explorer
window. However, the new FPGA target might not support the same
functionality as the previous FPGA target, so you must update the item
properties to match the functionality and resources of the new FPGA target.
For example, if you copy an FPGA I/O item between two different FPGA
targets, you must verify the FPGA target to which you copied the FPGA I/O
item supports the same I/O resource to which the FPGA I/O item was
assigned in the first FPGA target.

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 Lesson 3 Implementing Application Architecture

Exercise 3-1 Build a CompactRIO Project

Goal
Implement the course CompactRIO application architecture with the
LabVIEW Project Explorer.

Scenario

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Build a project for a condition monitoring application. The application
monitors the temperature, vibration, and speed of the fan. It also controls
fan speed. The project includes a Windows PC host, a CompactRIO RT
controller host, an FPGA target, and three I/O modules (NI 9211, NI 9233,
and NI 9263). The NI 9211 I/O items include a J-type thermocouple in
channel 0, an autozero channel, and a cold junction compensation (CJC)
channel. The NI 9233 I/O items include two channels for X- and Y-axis
acceleration and a third channel for a tachometer signal. The NI 9263 has

Design
mp one FPGA I/O item, AO0, for the fan speed control signal.

Use LabVIEW Project Explorer to build a tree with a Windows PC and a

CompactRIO RT controller in the project at the same level in the hierarchy.
Add an FPGA as a target under the CompactRIO RT controller. Add the I/O
modules under the FPGA target.

The NI 9211 module has three channels. Channel TC0 is the thermocouple
signal input. The CJC and Autozero channels retrieve data stored on the
NI 9211 for data conversion/scaling. The Autozero and CJC values convert
the thermocouple signal accurately from binary values to temperature units.
These channels are internal-only sensors on the NI 9211 and are not
physically visible or accessible on the module. The conversion normally
takes place in the RT host VI to conserve space on the FPGA and to use
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floating-point math capabilities available on the controller. The conversion
is discussed in Lesson 5, Real-Time Controller.

The NI 9233 has five channels. Channel AI0 is the Y-axis accelerometer
signal input. Channel AI1 is the X-axis accelerometer signal input. Channel
AI2 is the tachometer signal input. The digital line outputs are Start and
Stop.

The NI 9263 has one channel. Channel AO0 is the output signal for fan
speed control.

The NI 9211 module and channels are used in the first phase, and all of the
modules and channels are used in the second phase. You create a copy of this
project to use for the first phase.

© National Instruments Corporation 3-15 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

Implementation
1. Connect power to the CompactRIO and connect the Ethernet crossover
cable between the CompactRIO and the PC.

In the following steps you build the project shown in Figure 3-16.

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Figure 3-16. Temperature Monitor Project

2. Create a project.

❑ Open LabVIEW from the desktop or select Start»Programs»

LabVIEW 8.20.

❑ Select Empty Project from the Getting Started window.

❑ Select File»Save Project and save the project as

C:\Exercises\CompactRIO Fundamentals\Temperature
Monitor\Temperature Monitor.lvproj. The name of the
project root changes from Untitled Project 1 to the title of the file.

CompactRIO and LabVIEW Fundamentals Course Manual 3-16 ni.com

 Lesson 3 Implementing Application Architecture

❑ Notice that the project contains the root and the My Computer item.

3. Create the CompactRIO target.

❑ Right-click the Temperature Monitor project and select New»

Targets and Devices to display the Add Targets and Devices dialog
box.

❑ Expand Real-Time CompactRIO.

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❑ Select the cRIO-9012 target.

❑ Click OK.

❑ Save the project.

4. Add the I/O modules to the project.

mp ❑ Expand the cRIO-9012 target.

❑ Right-click the FPGA Target.

❑ Select New»C Series Modules.

❑ Expand the C Series Module item in the Add Targets and Devices
on FPGA Target dialog box.

❑ Hold down the <Ctrl> key and select all three modules.

Note You do not need all three to monitor temperature, but you are building a project
that supports later exercises.

❑ Click OK.
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❑ Save the project.

5. Add specific FPGA I/O items (channels) to the project.

❑ Right-click the FPGA Target and select New»FPGA I/O to display

the New FPGA I/O dialog box.

❑ Add a channel for the thermocouple signal input.

– Expand Analog Input item.

– Expand the NI 9211 item.

© National Instruments Corporation 3-17 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

– Hold down the <Ctrl> key and select TC0, CJC, and Autozero.
Do not click Add. You select all the items first, and then add
them at the end.

❑ Add channels for the Y-axis acceleration, X-axis acceleration, and

Tachometer signal inputs.

– Expand the NI 9233 item.

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– Hold down the <Ctrl> key and select AI0, AI1, and AI2.

❑ Add two digital output channels for starting and stopping the
NI 9233.

– Expand the Digital Line Output item.

– Expand the NI 9233 item.

mp – Hold down the <Ctrl> key and select Start and Stop.

❑ Add an analog output channel for controlling the fan speed.

–
Expand the Analog Output item.

Expand the NI 9263 item.

– Hold down the <Ctrl> key and select AO0.

❑ Click the Add button to add all of the I/O channels as shown in
Figure 3-17.
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 Lesson 3 Implementing Application Architecture

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mp ❑ Click OK.
Figure 3-17. Selected FPGA I/O Items

6. Save the project.

End of Exercise 3-1

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© National Instruments Corporation 3-19 CompactRIO and LabVIEW Fundamentals Course Manual
Sa
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 Lesson 3 Implementing Application Architecture

Self Review: Quiz

1. Which of the following targets does a CompactRIO project typically
have in the Project Explorer window?
a. Targets for each I/O module
b. PCI Bus target
c. FPGA

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d. RT controller
e. Windows PC
f. My Computer
2. My Computer and the RT controller are at the same level in the Project
Explorer window.
a. True
mp b. False
3. Which Targets and Devices option allows you to develop a project
without CompactRIO hardware connected to the PC?
a. Existing Target or Device
b. Existing device on remote subnet
c. New target or device
4. Under which target do I/O modules reside?
a. FPGA
b. PCI Bus
c. Windows PC
d. RT controller
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© National Instruments Corporation 3-21 CompactRIO and LabVIEW Fundamentals Course Manual
Sa
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 Lesson 3 Implementing Application Architecture

Self Review: Quiz Answers

1. Which of the following targets does a CompactRIO project typically
have in the Project Explorer window?
a. Targets for each I/O module
b. PCI Bus target
c. FPGA

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d. RT controller
e. Windows PC
f. My Computer

Note The Windows PC is the My Computer target.

mp 2. My Computer and the RT controller are at the same level in the Project
Explorer window.
a. True
b. False
3. Which Targets and Devices option allows you to develop a project
without CompactRIO hardware connected to the PC?
a. Existing Target or Device
b. Existing device on remote subnet
c. New target or device
4. Under which target do I/O modules reside?
a. FPGA
b. PCI Bus
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c. Windows PC
d. RT controller

© National Instruments Corporation 3-23 CompactRIO and LabVIEW Fundamentals Course Manual
Lesson 3 Implementing Application Architecture

Notes

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CompactRIO and LabVIEW Fundamentals Course Manual 3-24 ni.com