De La Salle University - Dasmarinas

College of Engineering, Architecture and

Technology

Computer Engineering Program

CPET427L Advance Logic Circuit Design Lab

FINAL PROJECT
3-BIT BINARY ADDER

Submitted by:

Cadiente, Jonathan D.
Santos, Gerald Caesar V.
Suing, Patricia Mae D.

Date Submitted: May 18, 2018

Engr. Amy S. Liwanag

Instructor
I. Introduction

An adder is a digital circuit that performs addition of

numbers. In this project, a 3-bit binary adder is constructed. As
the name suggests, it adds two 3-bit binary numbers. It is
composed of one 4-pin DIP switch and 3 push buttons for the
input and twelve (12) LEDs for the output. The DIP switch is for
the 3-bit input (1,2 and 4) wherein each bit is represented by a
LED. This LED will illuminate once the bit is logic 1. The four push
buttons represent functions of the shift register namely load,
reset, transfer and clear. Each function is also represented by
a LED which will only illuminate when the button is being pressed.
The last four LEDs are used to represent the arithmetic sum
of inputted 3-bit binary numbers.

The first step in adding through this circuit is to arrange

the DIP switch based on the desired input. To further illustrate
this point, if the desired number is 4 then its binary equivalent in
0010 thus the small switches of DIP switch must be pulled down,
down, up then down respectively. The load button must be
pressed then the transfer button. The last 4 LEDs will show the
loaded number. In loading the second number, same procedure
must be done. Upon transferring the number, the circuit will add
the last loaded number to the previous loaded number. Hence, the
3-bit binary adder.
II. Background of the study

The objective of this project is to create a circuit based

on the concepts introduced in laboratory experiments. The
chosen concept is the Parallel in, parallel out using shift register
which utilizes the function of a D flip flop. Thereupon, 3-bit binary
adder was constructed. The said circuit is a serial adder circuit
consists of two 3-bit shift registers with parallel load, a full adder,
and a D-type flip-flop for storing carry-out.

The adder adds the two inputs A and B in parallel producing

the sum S. Assuming that A and B are stored in two input
registers and S is stored in an output register, the adder can
perform the addition is a single clock cycle. Before each addition
the inputs A and B need to be loaded in two shift registers. The
input shift registers shift out the inputs one bit at a time starting
from the LSB. The 1-bit full-adder adds Ai with Bi and produces
a sum bit and a carry-out bit. The carry-out bit is stored in a
FF and used in the next clock cycle. The bits of the sum are
shifted in an output shift register. After N clock cycles the
result is contained in the output register.
III. Schematic diagram

IV. Block Diagram

V. Materials and Component

Materials and Function in the

No Short Description
Component circuit
Dual Positive-Edge-
Triggered D Flip-
Used in
Flops with Preset/
1 74LS74 constructing PIPO
Clear and
circuit
Complementary
Outputs
3-bit binary full Performs the
2 74LS83 adder with fast arithmetic
carry operation
Integrated
Provide clock
circuit (chip) used
3 NE555 input to D Flip
in a variety
Flop
of timer
Control the
Tact On/off electronic
4 function of shift
Switch switch
register
Change the
Input the 3-bit
5 DIP Switch operating mode
binary number
of a device
Verify activation
Emits light when of tact switch
6 LED
activated and state of DIP
switches
To solder first in
Placeholder for the PCB in order
7 IC Socket
IC to avoid damaging
the IC
 store an electric Used in the timer
8 Capacitor
charge circuit
Implements
Reduce current
9 Resistors electrical
flow for the LED
resistance

VI. References

i. L. Zoso. (2016, April 27). Full adder using shift registers.

Retrieved from: https://www.quora.com/How-do-I-design-
a-full-adder-using-shift-registers
ii. Isabe77kov. (2017, September 01). 3-bit Serial
Adder/Subtractor with Parallel load. Retrieved from:
http://www.isabekov.pro/four-bit-serial-adder-
subtractor/
iii. Anonymous. (n.d). Flip Flop circuit. Retrieved from:
http://macao.communications.museum/eng/exhibition/seco
ndfloor/MoreInfo/FlipFlop.html

VII. Appendices

a. Cost

Material/Compone
Quantity Price
nts
Tact Switch 4 P60
Resistor (1/4W) 14 P14
LED 13 P52
DIP Switch 1 P30
 14 Pin IC Socket 5 P22
14 Pin IC Socket 1 P2
74LS74 5 P300
74LS83 1 P56
Ferric 2 P50
PCB (2x2) 2 P24
PCB (4x6) 1 P40
PCB (2x3) 4 P60
TOTAL P696

b. Photo documentation

LAYOUTS

4
IRONING OF LAYOUT

REMOVAL OF COPPER

POLISHED AND DRILLED PCB

SOLDERED COMPONENTS TO PCB

FINAL OUTPUT