Beruflich Dokumente
Kultur Dokumente
Equipment
V200R003C10
Hardware Description
Issue 01
Date 2014-01-31
and other Huawei trademarks are trademarks of Huawei Technologies Co., Ltd.
All other trademarks and trade names mentioned in this document are the property of their respective holders.
Notice
The purchased products, services and features are stipulated by the contract made between Huawei and the
customer. All or part of the products, services and features described in this document may not be within the
purchase scope or the usage scope. Unless otherwise specified in the contract, all statements, information,
and recommendations in this document are provided "AS IS" without warranties, guarantees or representations
of any kind, either express or implied.
The information in this document is subject to change without notice. Every effort has been made in the
preparation of this document to ensure accuracy of the contents, but all statements, information, and
recommendations in this document do not constitute a warranty of any kind, express or implied.
Website: http://www.huawei.com
Email: support@huawei.com
Related Version
The following table lists the product version related to this document.
Intended Audience
This document describes the equipment structure, chassis structure, and board classification.
This document also describes each board of these classes in details.
This document helps you get the detailed information about the equipment hardware.
Symbol Conventions
Symbol Description
Symbol Description
Command Conventions
Convention Description
GUI Conventions
Convention Description
Convention Description
Change History
Updates between document issues are cumulative. Therefore, the latest document issue contains
all updates made in previous issues.
Contents
5.9.4 Specifications...........................................................................................................................................................104
5.10 AND2ML1A/AND2ML1B - 16 Channels E1 Interface Board................................................................................104
5.10.1 Front Panel.............................................................................................................................................................105
5.10.2 Functions and Features..........................................................................................................................................107
5.10.3 Working Principle and Signal Flow......................................................................................................................108
5.10.4 Technical Specifications........................................................................................................................................110
5.11 AND1MD1A/AND1MD1B - 32 Channels E1 Interface Board...............................................................................111
5.11.1 Front Panel.............................................................................................................................................................111
5.11.2 Functions and Features..........................................................................................................................................114
5.11.3 Working Principle and Signal Flow......................................................................................................................115
5.11.4 Technical Specifications........................................................................................................................................117
5.12 AND1MO1C - 8 Channels T1 Interface Board .......................................................................................................118
5.12.1 Front Panel.............................................................................................................................................................118
5.12.2 Functions and Features..........................................................................................................................................119
5.12.3 Working Principle and Signal Flow......................................................................................................................120
5.12.4 Technical Specifications........................................................................................................................................122
5.13 AND1AVD8A - 8 Channels ADSL2+ Service Interface Board..............................................................................123
5.13.1 Front Panel.............................................................................................................................................................123
5.13.2 Functions and Features..........................................................................................................................................124
5.13.3 Working Principle and Signal Flow......................................................................................................................125
5.13.4 Technical Specifications .......................................................................................................................................127
5.14 AND1AVD8B - 8 Channels VDSL2 Service Interface Board.................................................................................127
5.14.1 Front Panel.............................................................................................................................................................127
5.14.2 Functions and Features..........................................................................................................................................128
5.14.3 Working Principle and Signal Flow......................................................................................................................129
5.14.4 Technical Specifications .......................................................................................................................................131
5.15 AND1SHD4 - 4 Channels G.SHDSL Service Interface Board ...............................................................................131
5.15.1 Front Panel.............................................................................................................................................................131
5.15.2 Functions and Features..........................................................................................................................................132
5.15.3 Working Principle and Signal Flow......................................................................................................................133
5.15.4 Technical Specifications .......................................................................................................................................134
5.16 AND1SHD4I - 4 Channels G.SHDSL Interface Board for IMA Mode ..................................................................135
5.16.1 Front Panel.............................................................................................................................................................135
5.16.2 Functions and Features..........................................................................................................................................136
5.16.3 Working Principle and Signal Flow......................................................................................................................137
5.16.4 Technical Specifications .......................................................................................................................................139
5.17 TNC1PIU - Power Interface Board..........................................................................................................................139
5.17.1 Front Panel.............................................................................................................................................................139
5.17.2 Functions and Features..........................................................................................................................................141
5.17.3 Working Principle and Signal Flow......................................................................................................................141
5.17.4 Technical Specifications........................................................................................................................................142
10 Cables.........................................................................................................................................260
10.1 Power Supply Cables and Ground Cables................................................................................................................261
10.1.1 -48 V Power Supply Cables...................................................................................................................................261
10.1.2 AC Power Cables...................................................................................................................................................262
10.1.3 PGND Cables........................................................................................................................................................263
10.2 Management Cables.................................................................................................................................................264
10.3 Alarm Input/Output Cables......................................................................................................................................265
10.4 Clock Cables.............................................................................................................................................................266
10.4.1 External Clock Cables...........................................................................................................................................266
10.4.2 Clock Bridging Cables...........................................................................................................................................268
10.5 Service Cables..........................................................................................................................................................270
10.5.1 Ethernet Cables......................................................................................................................................................270
10.5.2 75-Ohm 8 x E1 Cables...........................................................................................................................................274
10.5.3 120-Ohm 8 x E1 Cables.........................................................................................................................................275
10.5.4 75-Ohm 16 x E1 Cables.........................................................................................................................................278
10.5.5 120-Ohm 16 x E1 Cables.......................................................................................................................................281
10.5.6 xDSL Cables..........................................................................................................................................................284
10.6 Optical Fibers...........................................................................................................................................................286
11 Equipment Support.................................................................................................................288
11.1 Cabinet Support........................................................................................................................................................289
11.1.1 APM30H Outdoor Cabinet....................................................................................................................................289
11.1.2 IMB Network Cabinet...........................................................................................................................................290
11.1.3 19-inch Open Rack................................................................................................................................................292
11.1.4 N63E Cabinet........................................................................................................................................................293
11.2 Power Distribution Equipment.................................................................................................................................294
11.2.1 Power Distribution.................................................................................................................................................294
11.2.2 EPS30-4815AF Power System..............................................................................................................................295
11.2.3 27S48D Power System..........................................................................................................................................300
11.2.4 HW-100-48AC14D-1 Power System....................................................................................................................302
11.2.5 Lead-Acid Battery.................................................................................................................................................303
11.3 Heater........................................................................................................................................................................304
12 Quick Reference.......................................................................................................................306
12.1 Indicators..................................................................................................................................................................307
12.2 Dimensions and Weight............................................................................................................................................315
12.3 Power Consumption.................................................................................................................................................318
12.4 Interface Specifications............................................................................................................................................321
12.4.1 Specifications of STM-1 Optical Interfaces..........................................................................................................321
12.4.2 Specifications of FE Optical Interfaces.................................................................................................................323
12.4.3 Specifications of GE Optical Interfaces................................................................................................................325
12.4.4 Specifications of 10GE Optical Interfaces............................................................................................................330
12.4.5 Specifications of GE and FE Electrical Interfaces................................................................................................332
12.4.6 Specifications of E1 Electrical Interfaces..............................................................................................................332
12.4.7 Specifications of T1 Electrical Interfaces..............................................................................................................333
12.4.8 Specifications of the ADSL2+ Interface...............................................................................................................333
12.4.9 Specifications of the VDSL2 Interface..................................................................................................................334
12.4.10 Specifications of the G.SHDSL Interface............................................................................................................334
The ATN 910 uses the chassis of 1 U high (1 U = 44.45 mm) and supports multiple installation
modes, which facilitates flexible deployment.
The ATN 910 can be flexibly deployed with high reliability and scalability. It has the following
features:
l One power board provides two –48 V or –60 V DC power inputs, ensuring redundancy
backup of input power.
l The fan board provides three fans, ensuring proper heat dissipation even when a fan is
faulty.
l Two slots can be flexibly configured with service boards.
1.1 Appearance
The ATN 910 provides 6 slots and all boards are swappable. The ATN 910 provides six slots
and all boards are swappable. A chassis has a mounting ear at each side and can be installed in
different cabinets and racks.
1.1 Appearance
The ATN 910 provides 6 slots and all boards are swappable. The ATN 910 provides six slots
and all boards are swappable. A chassis has a mounting ear at each side and can be installed in
different cabinets and racks.
Figure 1-1 shows the appearance of the ATN 910 that has boards fully configured.
Figure 1-1 Appearance of the ATN 910 that has boards fully configured
Figure 1-2 shows the appearance of the ATN 910 that does not have boards fully configured.
Figure 1-2 Appearance of the ATN 910 that does not have boards fully configured
Table 1-1 describes priorities of slots where boards supported by the ATN 910 can be inserted.
TNC1PIU slot 5 -
ANC1FAN slot 6 -
Note: The ANC2CXPI or ANC2CXPL each house two slots. Slot 1 and slot 2 house one
ANC2CXPI or ANC2CXPL.
As shown in Table 1-2, ATN 910 supports various mounting ears and can be installed in multiple
types of cabinets.
ATN 910 provides three installation positions for mounting ears. Users can determine an
installation position for mounting ears based on the depth of the cabinet. Figure 1-4 shows the
installation positions of mounting ears. Position 1 shows a pair of mounting ears delivered with
ATN 910.
Already installed
mounting ears
Determine an installation position for mounting ears based on the cabinet depth. The following
figures show the installation dimensions when mounting ears are installed in different positions.
Unit: mm
220
31.8
465.1
224
208
132.5
Unit: mm
220
25
515
241.5
225.5
150
Unit: mm
220
31.8
566.7
217.5
201.5
126
NOTE
When installing the ATN 910 in the cabinet, reserve 80 mm space at the front of the panel for cabling.
l Heat dissipation holes of air intake and exhaust vents on ATN 910 must be kept clean and
unblocked.
l A distance of at least 50 mm must be reserved at the air intake/exhaust vent on ATN 910
to ensure good ventilation.
l Filler panels must be installed on unused slots. In addition, on ATN 910, heat must be
dissipated by drawing in air from the left and expelling out the air from the right.
l The ambient temperature of ATN 910 must be within the range of -20°C to +60°C. When
ATN 910 is installed in a cabinet, temperature inside the cabinet must be within the
temperature range and the air duct of the cabinet must be consistent with that of ATN 910.
Label Position
Figure 1-9 shows positions of labels on the chassis.
1类激光产品
Class 1 Laser Product
N14036
合格证/QUALIFICATION CARD
この装置は、クラスA情報技術装置です。この 装置を家庭環境で
使用すゐと電波妨害を 引き起こすことがぁります。この場合には使用
者が適切な対策を講ずゐよぅ 要求されゐことがぁります。 VCCI-A
HUAWEI
中国制作
华为技术有限公司 中国制造
华为技术有限公司
HUAW EI TEC HNOLOGIES CO.,L TD. M ADE IN C HIN A
HUAWE I TE CHNO LG I E S CO. , LTD. MADE IN CHINA
Label Description
There are labels on the chassis and boards. See Table 1-3.
Backplane bar code label The bar code of the backplane will be
retrieved by ATN 910 as the equipment
serial number (ESN).
Fan warning label The label suggests that do not touch the fan
leaves when the fan is rotating.
合格证/QUALIFICATION CARD
Qualification label The equipment is qualified.
HUAWEI
华为技术有限公司 中国制造
HUAWEI TECHNOLOGIES CO.,LTD. MADE IN CHINA
ATN 910
Product nameplate label The label suggests the product name and
(General) certification.
电源额定值 POWER RATING: -48--60V;4A
1类激光产品
N14036 Class 1 Laser Product
この装置は、クラスA情報技術装置です。この装置を家庭環境で使用すゐ
と電波妨害を引き起こすことがぁります。この場合には使用者が適切な対策
を講ずゐよぅ要求されゐことがぁります。 VCCI-A
华为技术有限公司 中国制造
HUAWEI TECHNOLGIES CO.,LTD. MADE IN CHINA
ATN 910
电源额定值 POWER RATING: -48--60V;4A
Product nameplate label The label suggests the product name and
This device complies with Part 15 of the FCC Rules.Operation is
subject to the following two conditions:(1)this device may not cause
harmful interference,and(2)this device must accept any interference
(North America) certification.
received,including interference that may cause undesired operation.
この装置は、クラスA情報技術装置です。この装置を家庭環境で使用 1类激光产品
すゐと電波妨害を引き起こすことがぁります。この場合には使用者が適 Class 1 Laser Product
切な対策を講ずゐよぅ要求されゐことがぁります。 V C C I ------ A
N14036 C
UL US I.T.E.
65JJ
LISTED E210619
华为技术有限公司 中国制造
HUAWEI TECHNOLGIES CO.,LTD. MADE IN CHINA
The ATN 910I uses the chassis of 1 U high (1 U = 44.45 mm) and supports multiple installation
modes, which facilitates flexible deployment.
2.1 Appearance
The ATN 910I integrates boards and modules, which are not swappable. A chassis has a
mounting ear at each side and can be installed in different cabinets and racks.
2.4 Panel
There are indicators, buttons, and interfaces on the ATN 910I panel.
2.1 Appearance
The ATN 910I integrates boards and modules, which are not swappable. A chassis has a
mounting ear at each side and can be installed in different cabinets and racks.
The following figures show the appearance of the ATN 910I of different models.
Figure 2-9 describes the functional block diagram of the ATN 910I.
To other function
modules
Communication control
module To other function
modules
4 x GE optical signals
4 x FE electrical signals
FE pinch board
Transmit Direction
After buffering and scheduling the service packets, the service scheduling and processing
module performs coding/decoding and serial/parallel conversion. Then the interfaces on the
panel send Ethernet electrical/optical signals and E1 signals out.
Receive Direction
The service access interfaces on the panel receive Ethernet electrical/optical signals and E1
signals. Then the service scheduling and processing module performs serial/parallel conversion
and coding/decoding, and buffers and schedules service packets.
Clock Module
The clock module provides the following functions:
l Provides a working clock for each module on the board.
l Supports synchronous Ethernet and the SSM protocol.
l Supports IEEE 1588v2.
l Supports the 1588 ACR clock.
NOTE
Only some models of the ATN 910I support the 1588 ACR clock. For details, see 2.1 Appearance.
Power Module
The power module supplies power for other modules.
NOTE
The ATN 910I supports AC and DC power supplies. For details about power supplies supported by each
product model, see 2.1 Appearance.
Fan Module
The fan module implements heat dissipation for the system.
2.4 Panel
There are indicators, buttons, and interfaces on the ATN 910I panel.
Figure 2-10 Appearance of the ATN 910I panel (ATN 910I DC is used as an example)
PWR STAT ALM ETH/OAM CLK TOD ALMI/ALMO
Indicator
The ATN 910I provides the following indicators:
System indicator
Interface indicator
l LINK/ACT, green or orange, which indicates the connection status/data transceiving status
on the SFP interface.
l LINK indicator, green, which indicates the connection status of a service port
l ACT indicator, orange, which indicates the receive/transmit status of a service port
Button
There is only one RST button on the ATN 910I for resetting the device.
The RST button can also be used to delete passwords and configuration files on the ATN 910I.
Once you press the RST button, the device starts to reset. Then you press and hold down the
RST button 25s to 35s until the PWR, STA, and ALM indicators blink green. Then release the
RST button so that the device starts to automatically delete passwords and configuration files.
If you keep holding down the RST button (approximately 10s) until the three indicators are not
blinking green simultaneously, the device only resets and does not delete the passwords and
configuration files.
Interface
Table 2-3 describes the interfaces on the ATN 910I and their functions.
ETH/OAM RJ-45 10M/100M interface that can For details, see 10.2
function as an NM interface or Management Cables.
console interface
CLK RJ-45 Clock input/output interface For details, see 10.4 Clock
Cables.
TOD RJ-45 Time input/output interface For details, see 10.4 Clock
Cables.
GE0 to GE3 SFP GE service signal input/output For details, see 10.6
interface Optical Fibers or 10.5.1
Ethernet Cables.
FE/GE0 to SFP FE/GE service signal input/ For details, see 10.6
FE/GE3 output interface Optical Fibers or 10.5.1
Ethernet Cables.
FE/GE4 to RJ-45 FE/GE service signal input/ For details, see 10.5.1
FE/GE7 output interface Ethernet Cables.
E1 (0 to 15) Anea 96 E1 service signal input/output For details, see 10.5.4 75-
interface Ohm 16 x E1 Cables and
10.5.5 120-Ohm 16 x E1
Cables.
NOTE
The SFP interface can connect to cables only after an optical module or an electrical module is installed.
The ATN 910I-E device's E1 interface type is DB44. For information about cables to the E1 interface, see
10.5.2 75-Ohm 8 x E1 Cables and 10.5.3 120-Ohm 8 x E1 Cables.
As shown in Table 2-5, the three groups of interfaces on the ATN 910I are controlled by the
license (LANFGEPAYG01 and LANFCOMBO01).
Pin Assignments
7 Unspecified
87654321 3 Unspecified
6 Unspecified
7 Unspecified
8 Unspecified
1 Unspecified Unspecified
2 Unspecified Unspecified
1 Boolean input
2 Ground end
4 Boolean input
5 Ground end
6 Ground end
4 Unspecified
5 Unspecified
7 Unspecified
8 Unspecified
1 Rx0 25 Tx0
2 26
3 Rx1 27 Tx1
4 28
5 Rx2 29 Tx2
6 30
7 Rx3 31 Tx3
8 32
9 Rx4 33 Tx4
10 34
11 Rx5 35 Tx5
12 36
13 Rx6 37 Tx6
14 38
15 Rx7 39 Tx7
16 40
17 Rx8 41 Tx8
18 42
19 Rx9 43 Tx9
20 44
21 R x 10 45 T x 10
22 46
23 R x 11 47 T x 11
24 48
49 R x 12 73 T x 12
50 74
51 R x 13 75 T x 13
52 76
53 R x 14 77 T x 14
54 78
55 R x 15 79 T x 15
56 80
As shown in Table 2-11, ATN 910I supports various mounting ears and can be installed in
multiple types of cabinets.
ATN 910I has many models. Among the models, ATN 910I-B and ATN 910I-E use the natural
heat dissipation mode while the other models dissipate heat by blowing air from left to right.
Figure 2-12 shows the ATN 910I air duct.
l Heat dissipation holes of air intake and exhaust vents on ATN 910I must be kept clean and
unblocked.
l A clearance of at least 50 mm must be reserved at the air intake/exhaust vent on ATN 910I
to ensure good ventilation.
l The ambient temperature of the ATN 910I-TC DC must be within the range of -40°C to
65°C, and that of ATN 910I in other models must be within the range of -20°C to +60°
C.ATN 910I When ATN 910I is installed in a cabinet, temperature inside the cabinet must
be within the permitted temperature range and the air duct of the cabinet must be consistent
with that of ATN 910I.
l When ATN 910I is installed in a cabinet, temperature inside the cabinet must be within the
temperature range and the air duct of the cabinet must be consistent with that of ATN 910I.
For details about temperature range by each product model, see 2.1 Appearance.
l ATN 910 I devices that use the natural heat dissipation mode cannot be stacked, and a 1 U
clearance must be reserved between them.
Label Position
Figure 2-13 shows positions of labels on the chassis.
N14036
合格证/QUALIFICATION CARD
1类激光产品
Class 1 Laser Product
HUAWEI 华为技 术有 限公 司 中 国 制造
华为 技术 有限 公司 中国 制作 HUAW EI TECHN OLGIES CO .,L TD. M ADE IN CHINA
HU AW EI TE CH N OL OGIE S CO.,LTD . MAD E IN C HINA
Label Description
There are labels on the chassis. See Table 2-12.
Backplane bar code label The bar code of the backplane will be
retrieved by ATN device as the equipment
serial number (ESN).
HUAWEI
华为技术有限公司 中国制造
HUAWEI TECHNOLOGIES CO.,LTD. MADE IN CHINA
Product nameplate label The label suggests the product name and
certification.
The ATN 910B uses the chassis of 1 U high (1 U = 44.45 mm) and supports multiple installation
modes, which facilitates flexible deployment.
3.1 Appearance
The ATN 910B integrates boards and modules, which are not swappable. A chassis has a
mounting ear at each side and can be installed in different cabinets and racks.
3.4 Panel
There are indicators, buttons, and interfaces on the ATN 910B panel.
3.1 Appearance
The ATN 910B integrates boards and modules, which are not swappable. A chassis has a
mounting ear at each side and can be installed in different cabinets and racks.
Table 3-1 describes multiple models of the ATN 910B.
Figure 3-1 and Figure 3-2 show the appearance of the ATN 910B of different models.
Figure 3-3 uses ATN 910B-A as an example to show the working principle and signal flow of
ATN 910B.
To other function
modules
Communication control
module To other function
modules
16 x E1 signals
ANG1MO1 pinch board
Transmit Direction
After buffering and scheduling the service packets, the service scheduling and processing
module performs coding/decoding and serial/parallel conversion. Then the interfaces on the
panel send Ethernet electrical/optical signals and E1 signals out.
Receive Direction
The service access interfaces on the panel receive Ethernet electrical/optical signals and E1
signals. Then the service scheduling and processing module performs serial/parallel conversion
and coding/decoding, and buffers and schedules service packets.
Clock Module
The clock module provides the following functions:
Power Module
The power module supplies power for other modules.
Fan Module
The fan module implements heat dissipation for the system.
3.4 Panel
There are indicators, buttons, and interfaces on the ATN 910B panel.
Indicator
The ATN 910B provides the following indicators:
System indicator
Interface indicator
l LINK/ACT, green or orange, which indicates the connection status/data transceiving status
on the SFP interface and XFP interface.
l LINK indicator, green, which indicates the connection status of a service port
l ACT indicator, orange, which indicates the receive/transmit status of a service port
Button
There is only one RST button on the ATN 910B for resetting the device.
The RST button can also be used to delete passwords and configuration files on the ATN 910B.
Once you press the RST button, the device starts to reset. Then you press and hold down the
RST button 10s to 12s until the PWR, STA, and ALM indicators blink green. Then release the
RST button so that the device starts to automatically delete passwords and configuration files.
If you keep holding down the RST button (approximately 10s) until the three indicators are not
blinking green simultaneously, the device only resets and does not delete the passwords and
configuration files.
Interface
Table 3-3 describes the interfaces on the ATN 910B and their functions.
ETH/OAM RJ-45 10M/100M interface that can For details, see 10.2
function as an NM interface or Management Cables.
console interface
CLK RJ-45 Clock input/output interface For details, see 10.4 Clock
Cables.
TOD RJ-45 Time input/output interface For details, see 10.4 Clock
Cables.
OUT32 XFP 10GE service signal input/ For details, see 10.6
IN32 — output interface Optical Fibers.
OUT33
IN33 (ATN
910B-A)
OUT24
IN24 —
OUT25
IN25 (ATN
910B-A)
FE/GE16 SFP FE/GE service signal input/ For details, see 10.6
— FE/ output interface Optical Fibers or 10.5.1
GE23 (ATN Ethernet Cables.
910B-A)
FE/GE0 —
FE/GE15
(ATN
910B-B)
FE/GE23 RJ-45 FE/GE service signal input/ For details, see 10.5.1
— FE/ output interface Ethernet Cables.
GE31 (ATN
910B-A)
FE/GE16
— FE/
GE23 (ATN
910B-B)
E1 (0–15) DB44 E1 service signal input/output For details, see 10.5.2 75-
(ATN interface Ohm 8 x E1 Cables and
910B-A) 10.5.3 120-Ohm 8 x E1
Cables.
Pin Assignments
7 Unspecified
3 Unspecified
6 Unspecified
7 Unspecified
8 Unspecified
1 Unspecified Unspecified
2 Unspecified Unspecified
1 Boolean input
2 Ground end
4 Boolean input
5 Ground end
6 Ground end
44 23 30
37 R1 14 T1
22 29
36 R2 13 T2
21 28
35 R3 12 T3
20 27
34 R4 11 T4
19 26
33 R5 10 T5
18 25
32 R6 9 T6
17 24
31 R7 8 T7
16 7
As shown in Table 3-10, ATN 910B supports various mounting ears and can be installed in
multiple types of cabinets.
≥50 mm
≥50 mm
l Heat dissipation holes of air intake and exhaust vents on ATN 910B must be kept clean
and unblocked.
l A clearance of at least 50 mm must be reserved at the air intake/exhaust vent on ATN 910B
to ensure good ventilation.
l The ambient temperature of ATN 910B must be within the range of -40 °C to +65 °C. When
ATN 910B is installed in a cabinet, temperature inside the cabinet must be within the
permitted temperature range and the air duct of the cabinet must be consistent with that of
ATN 910B.
Label Position
Figure 3-6 shows positions of labels on the chassis.
N14036
合格证/QUALIFICATION CARD
1类激光产品
Class 1 Laser Product
HUAWEI 华为技 术有 限公 司 中 国 制造
华为 技术 有限 公司 中国 制作 HUAW EI TECHN OLGIES CO .,L TD. M ADE IN CHINA
HU AW EI TE CH N OL OGIE S CO.,LTD . MAD E IN C HINA
Label Description
There are labels on the chassis. See Table 3-11.
Backplane bar code label The bar code of the backplane will be
retrieved by ATN device as the equipment
serial number (ESN).
合格证/QUALIFICATION CARD
Qualification label The equipment is qualified.
HUAWEI
华为技术有限公司 中国制造
HUAWEI TECHNOLOGIES CO.,LTD. MADE IN CHINA
Product nameplate label The label suggests the product name and
certification.
The ATN 950B uses the chassis of 2 U high (1 U = 44.45 mm) and supports multiple installation
modes, which facilitates flexible deployment.
The ATN 950B can be flexibly deployed with high reliability and scalability. It has the following
features:
4.1 Appearance
The ATN 950B provides 11 slots and all boards are swappable. A chassis has a mounting ear at
each side and can be installed in different cabinets and racks.
4.1 Appearance
The ATN 950B provides 11 slots and all boards are swappable. A chassis has a mounting ear at
each side and can be installed in different cabinets and racks.
Figure 4-1 shows the appearance of the ATN 950B that has boards fully configured.
Figure 4-1 Appearance of the ATN 950B that has boards fully configured
Figure 4-2 shows the appearance of the ATN 950B that does not have boards fully configured.
Figure 4-2 Appearance of the ATN 950B that does not have boards fully configured
Figure 4-3 shows the slot distribution of the ATN 950B equipped with the AND1CXPA or
AND1CXPB board.
Figure 4-3 Slot distribution of the ATN 950B equipped with AND1CXPA or AND1CXPB
SLOT 7 SLOT 8
SLOT
10 SLOT 5 (10GE/GE) SLOT 6 (10GE/GE)
SLOT
11 SLOT 3 (10GE/4 x GE) SLOT 4 (10GE/4 x GE)
SLOT
9 SLOT 1 (8 x GE) SLOT 2 (8 x GE)
NOTE
When ATN 950B is equipped with the AND1CXPA board, each of slots 3 and 4 has a bandwidth of 4 x
GE and does not support 10GE interface boards.
Figure 4-4 shows the slot distribution of the ATN 950B equipped with the AND2CXPB/
AND2CXPE board.
Figure 4-4 Slot distribution of the ATN 950B equipped with AND2CXPB/AND2CXPE
SLOT 7 SLOT 8
SLOT
10 SLOT 5 (10GE/4 x GE) SLOT 6 (10GE/4 x GE)
SLOT
11 SLOT 3 (10GE/4 x GE) SLOT 4 (10GE/4 x GE)
SLOT
9 SLOT 1 (10GE/8 x GE) SLOT 2 (10GE/8 x GE)
Table 4-1 describes priorities of slots where boards supported by the ATN 950B can be inserted.
AND1EX1 slot 5-6 (working with the slot 5 - slot 6 - slot 3 - slot 4
AND1CXPA)
slot 3-6 (working with the
AND1CXPB)
slot 1-6 (working with the
AND2CXPB/
AND2CXPE)
AND1FAN slot 11 -
As shown in Table 4-2, ATN 950B supports various mounting ears and can be installed in
multiple types of cabinets.
ATN 950B provides three installation positions for mounting ears. Users can determine an
installation position for mounting ears based on the depth of the cabinet. Figure 4-5 shows the
installation positions of mounting ears. Position 1 shows a pair of mounting ears delivered with
ATN 950B.
Already installed
mounting ears
Determine an installation position for mounting ears based on the cabinet depth. The following
figures show the installation dimensions when mounting ears are installed in different positions.
Unit: mm
220
76.2
465.1
224
208
132.5
Unit: mm
220
50
515
241.5
225.5
150
Unit: mm
220
76.2
566.7
218
202
126.5
NOTE
When installing the ATN 950B in the cabinet, reserve 80 mm space at the front of the panel for cabling.
l Heat dissipation holes of air intake and exhaust vents on ATN 950B must be kept clean
and unblocked.
l A distance of at least 50 mm must be reserved at the air intake/exhaust vent on ATN 950B
to ensure good ventilation.
l Filler panels must be installed on unused slots. In addition, on ATN 950B, heat must be
dissipated by drawing in air from the left and expelling out the air from the right.
l The ambient temperature of ATN 950B must be within the range of -20°C to +65°C (When
the device is equipped with AND1CXPAs or AND1CXPBs, the ambient temperature must
range from -20ºC to 60ºC). When ATN 950B is installed in a cabinet, temperature inside
the cabinet must be within the temperature range and the air duct of the cabinet must be
consistent with that of ATN 950B.
Label Position
Figure 4-10 shows positions of labels on the chassis.
1类激光产品
Class 1 Laser Product
N14036
合格证/QUALIFICATION CARD
この装置は、クラスA情報技術装置です。この装置を家庭環境で
使用すゐと電波妨害を引き起こすことがぁります。この場合には使用
者が適切な対策を講ずゐよぅ要求されゐことがぁります。 VCCI -A
Label Description
There are labels on the chassis and boards. See Table 4-3.
Backplane bar code label The bar code of the backplane will be
retrieved by ATN 950B as the equipment
serial number (ESN).
Fan warning label The label suggests that do not touch the fan
leaves when the fan is rotating.
合格证/QUALIFICATION CARD
Qualification label The equipment is qualified.
HUAWEI
华为技术有限公司 中国制造
HUAWEI TECHNOLOGIES CO.,LTD. MADE IN CHINA
Product nameplate label The label suggests the product name and
certification.
Board Structure
Figure 5-1 shows the structure of a board (using the AND1EG4F board as an example).
Different boards provide different indicators, buttons, and ports; not all boards support a daughter
board. For details, see the description of each board.
l Front panel, including the captive screws, ejector levers, indicators, buttons, and interfaces.
– Captive screws: secure the board in the subrack.
– Ejector levers: used for inserting or removing the board. Bar codes are also attached on
the ejector levers.
NOTE
The ejector lever on the left side of the front panel of a board is attached with a label marking the bar code
of the board. The bar code of a control board will be retrieved by ATN 910 as the equipment serial number
(ESN).
The ESN is used for applying for a license. ATN 910 automatically reads the bar code of the backplane or
control board as the device ESN. Generally, the bar code of the backplane takes precedence over that of
the control board.
Board Naming
NOTE
The preceding only describes how to roughly identify a board. For details on board specifications, see board
descriptions.
A board name mainly consists of the board functional version and short name. A short name can
roughly identify a board. The short name of a control board, power board, and fan board is CXPx,
PIU, and FAN respectively. The following mainly describes how to quickly identify a physical
interface board through the short name of a board.
As shown in Figure 5-2, the short name of a board consists of an abbreviated board name and
an extended name. An abbreviated board name includes the board type, interface quantity, and
interface rate. When boards have the same abbreviated board name, they can be differentiated
using extended names. An extended name does not have special meanings and can be omitted.
ML1A
Extended name
Interface rate
Interface quantity
Board type
l Board type M indicates an E-carrier or T-carrier interface board. The interface quantity is
represented using O, L or D, indicating 8, 16 or 32 respectively. The interface rate is
represented using 1, indicating E1 or T1.
l Board type AVD indicates an ADSL2+, VDSL2, or ADSL2+/VDSL2 interface board. The
interface quality is represented using an Arabic numeral, but the interface rate is not
represented.
l Board type SHD indicates a G.SHDSL interface board. The interface quality is represented
using an Arabic numeral, but the interface rate is not represented.
l Board type E indicates an Ethernet interface board. The interface quality is represented
using an Arabic numeral. The interface rate is represented using F or G, indicating FE or
GE respectively. Extended name F or T is used to indicate an optical interface or electrical
interface respectively.
NOTE
For the name of an Ethernet interface board, the interface rate and quantity rate are in an order opposite
to those for the names of other boards. For example, in EG4F (a name of an Ethernet interface board),
interface rate G comes before interface quantity 4.
Board Relationship
A control board mainly implements system control and service grooming, and receives and
processes various services by working with physical interface boards. A power board provides
power inputs for the system. A fan board blows air to dissipate heat generated during system
operation. Figure 5-3 shows the board relationship.
FE FE
EF8F/EF8T EF8F/EF8T
GE GE
EG2/EG4F EG2/EG4F
E1 E1
ML1/ML1A/ML1B Service ML1/ML1A/ML1B
E1 processing and E1
MD1A/MD1B switching module MD1A/MD1B
T1 T1
MO1C MO1C
ADSL2+
AVD8A
VDSL2
AVD8B
G.SHDSL
SHD4/SHD4I
Control board
CXPI/CXPL
NOTE
The control board of the ATN 910 also provides the E1 interface and Ethernet service interface. For details
about applications of the service interface boards, see the E1 service interface board, and the Ethernet
service interface board.
The physical interface boards are classified into the following types based on the service access
mode: Ethernet service interface boards, E1/T1 service interface boards, and xDSL service
interface boards.
Table 5-2 Ethernet service interface boards supported by the ATN 910
Table 5-3 E1/T1 service interface boards supported by the ATN 910
Table 5-4 xDSL service interface boards supported by the ATN 910
Power Board
Power boards lead in power for supplying power to the device. For details about power
distribution, see Power Distribution.
Ethernet service interface boards are widely used in various network environments. They can
accept base station services on the user side, and transmit services upstream on the network side.
The Ethernet service interface board supports Layer 2 services, Layer 3 services, and hybrid
transmission of Layer 2 and Layer 3 services. (When the main interface is in Layer 2 mode,
configure the sub-interface to transmit Layer 2/Layer 3 services.)
Table 5-7 shows the Ethernet service interface boards supported by the ATN 910 and the
differences between the boards.
ATM
Figure 5-4 shows the application of the E1 service interface board using the ATM protocol.
Figure 5-4 Application of the E1 service interface board using the ATM protocol
An ATN device uses the E1 service interface board on the user side to support ATM over E1.
When the ATM service access rate is between E1 and E3, multiple E1 links are bound into an
IMA group to increase service bandwidth. On the network side, the E1 service interface board
implements ATM service emulation and transparently transmits the ATM services over the
packet switched network (PSN), such as MPLS or Ethernet. For detailed information, see the
chapter "ATM IMA application" in the Feature Description.
PPP
Figure 5-5 and Figure 5-6 show the applications of the E1/T1 service interface board using the
PPP protocol.
Figure 5-5 Application of the E1/T1 service interface board using the PPP protocol (user side)
Figure 5-6 Application of the E1 service interface board using the PPP protocol (network side)
The ATN device uses the E1/T1 service interface board to support IP/MPLS services carried
over ML-PPPs on both user side and network side. For example, in the Offload scenario, services
(such as voice service) that require high reliability can be carried over an SDH network through
E1 private lines using ML-PPP.
NOTE
An independent PPP link cannot carry service. PPP links must be added to an ML-PPP group to carry
services.
TDM
Figure 5-7 shows the application of the E1/T1 service interface board using the TDM protocol.
Figure 5-7 Application of the E1 service interface board using the TDM protocol
The ATN device uses the E1 service interface board to access the TDM service, encapsulate the
service signals into packets, and transparently transmit the packets through PWs over the PSN
network. This achieves CES service emulation. For detailed information, see the chapter "CES
application" in the Feature Description.
Interface type E1 E1 E1 E1 T1
Number of 16 16 16 32 8
interfaces
Link-layer ATM, PPP, ATM, PPP, ATM, PPP, ATM, PPP, PPP, TDM
protocols TDM TDM TDM TDM
Minimum 1 2 1 1 -
number of
timeslots in CE1
mode
When no optical fiber is available, an ATN device can use the xDSL interface board to transmit
base station services upstream through the existing copper lines.
Figure 5-8 shows the position of the xDSL service interface board on a network.
l ADSL2+: has a long delay and asymmetric upstream and downstream bandwidth. The
downstream bandwidth is higher than the upstream bandwidth. Therefore, the ADSL2+ is
suitable to carry data services, especially HSDPA services.
l VDSL2 is compatible with ADSL2+. VDSL2 has symmetrical upstream and downstream
bandwidths, and 100 Mbit/s transmission in a short distance within 300 m. It is suitable to
carry voice services, data services, and video services.
l G.SHDSL: has a stable delay and symmetric upstream and downstream bandwidth.
Compared with the ADSL2+, the G.SHDSL is suitable to carry high-priority services, such
as voice services.
The combination of ADSL2+ line and G.SHDSL line meets requirements on data and voice
services access. In addition, the Offload is also an important scenario in the mobile
communication network. In other words, the received base station services are classified and
transmitted by ATN devices. Traditional voice services (2G, 3G R99 CS) are transmitted using
the E1 private line to ensure high QoS, low delay, and high reliability. High-bandwidth packet
services, such as HSDPA services with low requirements on delay, are backhauled using the
xDSL technology. For detailed information, see the chapter "xDSL application" in the Feature
Description.
Table 5-9 shows the xDSL service interface boards supported by ATN devices and the
differences between the boards.
Number of 8 8 4 4
interfaces
Number of binding 4 4 1 1
groups
Working mode ATM mode ATM mode ATM mode IMA mode
PTM mode EFM mode
Indicators
The following indicators are present on the front panel of the ANC1CXPI:
l STAT indicator, red, green, or orange, which indicates the working status
l PROG indicator, red or green, which indicates the running status of the program
l SYNC indicator, red or green, which indicates the clock synchronization status
l SRV indicator, which is reserved for later use
l CRIT indicator, red, which indicates critical alarms
l MAJ indicator, orange, which indicates major alarms
l MIN indicator, yellow, which indicates minor alarms
l GE L/A0 to GE L/A1, FE L/A0 to FE L/A3 indicators, orange or green, which indicate the
connection status of the port
NOTE
l Five pairs of Link and ACT indicators located above ETH/OAM interfaces and four FE service
interfaces on the ANC2CXPI, which indicate the connection status of the Ethernet interface.
l Five pairs of Link and ACT indicators located above ETH/OAM interfaces and four FE service
interfaces on the ANC2CXPL, which indicate the connection status of the Ethernet interface.
Buttons
The following buttons are present on the front panel of the ANC1CXPI:
l RST button, which is used for warm reset of the board. When you press the RST button
and then release it, the board is reset (warm).
l CF RCV button, which is used to restore the configuration data from the CF card. When
you hold down the CF RCV button for five seconds, the equipment automatically restores
the configuration data from the CF card.
l LAMP button, which is used to test the indicators. When you press the LAMP button,
except the service port indicators on the AND1EF8T, AND1EF8F, AND1AVD8A,
AND1SHD4, AND1SHD4I, all the board indicators on the NE are on.
Interfaces
Table 5-10 lists the types and usage of the interfaces on the ANC2CXPI/ANC2CXPL.
ANC2CXPI ETH/OAM RJ-45 10M/100M interface for NM network For details, see 10.2
ANC2CXPL port or NM serial port Management Cables.
ANC2CXPI CLK0/ RJ-45 External time/clock input/output For details, see 10.4
ANC2CXPL TOD0 interface Clock Cables.
CLK1/
TOD1
ANC2CXPI GE0, GE1 SFP Input/output interface for GE optical/ For details, see 10.6
ANC2CXPL electrical signals Optical Fibers and
10.5.1 Ethernet
Cables.
ANC2CXPI FE0 to FE3 SFP Input/output interface for FE optical For details, see 10.6
signals Optical Fibers.
ANC2CXPL FE/GE0 to SFP Input/output interface for FE/GE For details, see 10.6
FE/GE3 optical signals Optical Fibers and
10.5.1 Ethernet
Cables.
ANC2CXPI FE4 to FE7 RJ-45 Input/output interface for FE electrical For details, see 10.5.1
signals Ethernet Cables.
ANC2CXPL FE/GE4 to RJ-45 Input/output interface for FE/GE For details, see 10.5.1
FE/GE7 electrical signals Ethernet Cables.
7 Unspecified
7 Unspecified Input negative for the time Output negative for the
information time information
(RS422 level) (RS422 level)
8 Unspecified Input positive for the time Output positive for the
information time information
(RS422 level) (RS422 level)
NOTE
The CLK0/TOD0 and CLK1/TOD1 interfaces can be configured so that they can work in one of the preceding three working
modes.
2 Grounding end
5 Grounding end
6 Grounding end
4 Unspecified
5 Unspecified
7 Unspecified
8 Unspecified
Figure 5-11 shows the block diagram for the working principle (using an ANC2CXPL as an
example).
Figure 5-11 Block diagram for the working principle of the ANC1CXPL
NMS
Alarm signal
signal
Control and Management bus Interface
communication boards
module
Management bus
2 x GE signals
Service
4 x FE/GE optical signals grooming and Service bus
Interface
processing boards
4 x FE/GE electrical signals module
3.3V Interface
Power 12V boards
Each module Working power supply FAN
on the board supply -48V/-60V
System
module power supply
-48V/-60V System
power supply
l Provides two interfaces for inputting and outputting the external clock/time.
l Provides one NM serial port or NM network port for communicating with the NMS,
managing the equipment, and querying the equipment.
l Reserves one alarm input/output interface.
Clock Module
This module performs the following functions:
l Provides the system clock signals and processes the clock signals from the service boards
and the external clock/time interfaces.
l Provides the working clock for each module on the CXPI.
l Supports the synchronous Ethernet and the SSM protocol.
l Supports the IEEE 1588V2 protocol.
l Supports the 1588 ACR clock.
ON DIP
CF Card
The size of the CF card on ANC2CXPI/ANC2CXPL is 512 MB. The CF card is used to backup
data and load packages.
DIP Switch
NOTICE
l This operation should be executed with caution. Use it under the guidance of technical
personnel.
l After the configuration file is deleted, reset the DIP switches to 0, 0, 0, and 0. In this way,
you do not need to delete the configuration file at each startup.
l The numeral indicates 1, and the letter indicates 0.
l The device password is deleted when the configuration file is deleted.
You can use the DIP switches to delete the configuration file loaded on the device.
Set DIP switches on ANC2CXPI/ANC2CXPL to 1, 1, 0, and 1. During startup, the device deletes
the loaded configuration file based on the DIF switch status.After the password is deleted, you
are required to enter a new password when a PC is connected to the device through the console
interface.
NOTE
If no PC is connected to the device through the console interface, you can check whether the password is
deleted based on the indicator status. The password is deleted at the stage when the BIOS is guiding the
upper-layer software during the device startup. At this stage, the green PROG indicator is on for 300 ms
and off for 300 ms.
To reset the DIP switches to 0, 0, 0, and 0, you are advised to remove the board after the STAT and PROG
indicators become green.
Interface Specifications
l For the specifications of the FE electrical interface, see Table 5-18.
l For the specifications of the FE/GE electrical interface, see Table 5-19.
l For the specification of the swappable FE optical/electrical modules supported at an FE
(SFP) interface, see Table 5-20 and Table 5-22.
l For the specifications of the swappable GE optical/electrical modules supported at a GE
(SFP) interface, see Table 5-21 and Table 5-23.
l For the specifications of the swappable FE/GE optical/electrical modules supported at an
FE/GE (SFP) interface, see Table 5-20, Table 5-21, Table 5-22, and Table 5-23.
NOTE
The specifications of an SFP interface on a board depend on the optical/electrical module on the board.
For the specifications of the optical/module modules on a board, see 9 Swappable Optical/Electrical
Modules.
Other Specifications
Board dimensions (mm): 20.3 (H) x 226.0 (D) x 388.4 (W)(0.80 in.×8.90 in.×15.29 in.)
Indicator
The following indicators are present on the front panel of the AND1EG4T board:
l STAT indicator, red, green, or orange, which indicates the working status
l LINK indicator, green, which indicates the connection status of the port
l ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
There are four LINK indicators and eight ACT indicators. One LINK indicator and one ACT indicator are
present above each FE/GE service interface.
Interfaces
On the AND1EG4T board, four interfaces are present. Table 5-24 lists the types and usage of
the interfaces.
4 Unspecified
5 Unspecified
7 Unspecified
8 Unspecified
Table 5-27 lists the functions and features of the AND1EG4T board.
Interface function Supports signals at 10 Mbit/s, 100 Mbit/s and 1000 Mbit/s.
Figure 5-14 shows the functional block diagram of the AND1EG4T board.
Management bus
Management bus Clock signals
l In the receive direction, it receives FE/GE services through FE/GE ports on the front panel,
performs O/E conversion, serial/parallel conversion, and coding/decoding, and then sends
the service packets to the service processing module.
l In the transmit direction, it receives the service packets from the service processing module,
performs coding/decoding, parallel/serial conversion, and E/O conversion, and then sends
the service packets through FE/GE ports on the front panel.
l In the receive direction, it receives and buffers service packets from the interface conversion
module. Then, it schedules the service packets based on the service access capability of the
EG4T board and access bandwidth configurations at each port. Finally, it sends the service
packets through backplane interfaces.
l In the transmit direction, it receives service packets from the control board, identifies the
destination ports for the packets, buffers and schedules them based on the service access
capability of the board and bandwidth configurations at each port. Finally, it sends the
service packets to the service access module.
l It extracts synchronous Ethernet clock signals.
l It extracts and inserts IEEE 1588v2 packets.
Management Module
This module works with the control board to manage and control each module on the board.
Clock Module
This module performs the following functions:
l Provides the working clock for each module on the EG4T board.
l Supports synchronous Ethernet and the SSM protocol.
l Supports the IEEE 1588v2 protocol.
l Supports the 1588 ACR clock.
l 3.3 V
l 3.0 V
l 2.5 V
l 1.2 V
Interface Specifications
Table 5-28 lists the specifications of the electrical interfaces on the AND1EG4T board.
Physical Specifications
Board dimensions (mm): 20.32 (height) x 225.75 (depth) x 193.8 (width)(0.80 in.×8.89 in.×7.63
in.)
Indicator
The following indicators are present on the front panel of the AND1EF8T:
l STAT indicator, red, green, or orange, which indicates the working status
l LINK indicator, green, which indicates the connection status of the port
l ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
There are eight LINK indicators and eight ACT indicators. One LINK indicator and one ACT indicator
are present above each FE service interface.
Interface
Table 5-29 lists the types and usage of the interfaces on the AND1EF8T.
FE0 - FE7 RJ45 Input/output interfaces For details, see For details, see
for FE electrical signals Table 5-30. 10.5.1
Ethernet
Cables.
NOTE
The FE0 to FE7 interfaces support auto-adaptation to a straight-through cable or a crossover cable.
4 Unspecified
5 Unspecified
7 Unspecified
8 Unspecified
Figure 5-16 shows the block diagram for the functions of the AND1EF8T.
Clock signals
Clock signals
Clock Clock signals
CXP
module
Clock Module
This module performs the following functions:
Interface Specifications
Table 5-32 lists the specifications of the electrical interfaces of the AND1EF8T.
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.×8.89 in.×7.63 in.)
Indicators
The following indicators are present on the front panel of the AND1EG2.
l STAT indicator, red, green, or orange, which indicates the working status
l LINK0 to LINK1 indicators, green, which indicate the connection status of the port
l ACT0 to ACT1 indicators, yellow, which indicate the data transceiving status of the port
Interfaces
Two SFP interfaces are present on the AND1EG2. Table 5-33 list the types and usage of the
interfaces on the AND1EG2.
Figure 5-18 shows the block diagram for the functions of the AND1EG2.
Management bus
2 x GE signals Interface Service bus Control CXP
conversion driver Service bus
module module CXP
Clock signals
Clock signals
Clock Clock signals
CXP
module
Clock module
This module performs the following functions:
Interface Specifications
For information about the swappable optical modules supported by SFP interfaces on the
AND1EG2 board, see Table 5-35. The interface specifications depend on the optical modules
on the board. For details on the optical modules, see 9 Swappable Optical/Electrical
Modules.
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W) (0.80 in. x 8.89 in. x 7.63 in.)
Indicators
The following indicators are present on the front panel of the AND1EG4F:
l STAT indicator, red, green, or orange, which indicates the working status
l L/A0 to L/A3 indicators, green or orange, which indicate the port connection status and
data transmit/receive status
Interfaces
There are four SFP interfaces on the AND1EG4F. Table 5-36 lists the types and usage of the
interfaces.
Figure 5-20 Block diagram for the working principle of the AND1EG4F
Backplane
Management bus
Management bus Clock signals
Transmit Direction
The service packets from the control board are sent to the service processing module through
the backplane-side interface of the AND1EG4F. The service processing module identifies the
destination interfaces for the packets, and buffers and schedules the packets. Then, the service
processing module sends the processed packets to the service access module, where coding/
decoding, serial/parallel conversion, and E/O conversion are performed. Finally, the service
access module outputs the packets through the FE/GE interfaces on the front panel.
Receive Direction
The FE/GE interfaces on the front panel receive FE/GE service signals. Then, the service access
module performs O/E conversion, serial/parallel conversion, and coding/decoding on the
services, and then sends the services to the service processing module. The service processing
module buffers the service packets, schedules the packets based on the service access capability
of the EG4F and the access bandwidth setting at each interface, and finally outputs the packets
through the backplane-side interface.
l In the receive direction, this module receives the FE/GE services from the interfaces on the
front panel, performs O/E conversion, serial/parallel conversion, and coding/decoding, and
then sends the services to the service processing module.
l In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, serial/parallel conversion, and E/O
conversion on the packets, and then outputs the packets through the FE/GE interfaces on
the front panel.
l In the receive direction, this module receives and buffers the service packets from the
interface conversion module. Then, this module schedules packets from different interfaces
based on the access capability of the EG4F and the access bandwidth settings at these
interfaces. Finally, this module outputs the packets through the backplane-side interface.
l In the transmit direction, this module receives service packets from the control board,
identifies the destination interfaces of the packets, and buffers and schedules the packets
based on the access capability of the EG4F and the access bandwidth setting at each
interface. Finally, this module outputs the packets to the service access module.
l This module extracts the synchronous Ethernet clock.
l This module extracts and inserts IEEE 1588 V2 packets.
Management Module
This module is used with the control board to manage and control each module on the EG4F.
Clock Module
This module performs the following functions:
l 3.3 V
l 3.0 V
l 2.5 V
l 1.2 V
Interface Specifications
For information about the swappable FE/GE optical/electrical modules supported by SFP
interfaces on the AND1EG4F board, see Table 5-38, Table 5-39, Table 5-40, Table 5-40, and
Table 5-41. The interface specifications depend on the optical/electrical modules on the board.
For details on the optical/electrical modules, see 9 Swappable Optical/Electrical Modules.
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W) (0.80 in. x 8.89 in. x 7.63 in.)
Indicators
The following indicators are present on the front panel of the AND1EF8F:
l STAT indicator, red, green, or orange, which indicates the working status
l LINK0 to LINK7 indicators, green, which indicate the connection status of the port
Interfaces
Eight SFP interfaces are present on the AND1EF8F. Table 5-42 lists the types and usage of the
interfaces.
IN0 - IN7 LC When a two-fiber bidirectional optical For details, see 10.6
module is used, this interface is used as Optical Fibers.
an input interface for the FE optical
signal.
Figure 5-22 shows the block diagram for the functions of the AND1EF8F.
Clock signals
Clock Module
This module performs the following functions:
Interface Specifications
For information about the swappable FE/GE optical/electrical modules supported by SFP
interfaces on the AND1EF8F board, see Table 5-44 and Table 5-45. The interface specifications
depend on the optical/electrical modules on the board. For details on the optical/electrical
modules, see 9 Swappable Optical/Electrical Modules.
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W) (0.80 in. x 8.89 in. x 7.63 in.)
Weight (kg): 0.55(1.21 lb)
Power consumption (W, room temperature): 12.9
NOTE
The AND1ML1 and AND1ML1A have the same functions and features except for the matched impedance
(AND1ML1: 75 ohms E1; AND1ML1A: 120 ohms E1).
Figure 5-24 shows the appearance of the front panel of the AND1ML1A.
Indicators
The following indicators are present on the front panel of the AND1ML1/AND1ML1A:
l STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There is one Anea 96 interface on the front panel of the AND1ML1/AND1ML1A. Table
5-46 lists the type and usage of the interface. For cables corresponding to the interfaces, see
10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120-Ohm 16 x E1 Cables.
Table 5-46 Type and usage of the interface on the front panel of the ML1
1 Rx0 25 Tx0
2 26
3 Rx1 27 Tx1
4 28
5 Rx2 29 Tx2
6 30
7 Rx3 31 Tx3
8 32
9 Rx4 33 Tx4
10 34
11 Rx5 35 Tx5
12 36
13 Rx6 37 Tx6
14 38
15 Rx7 39 Tx7
16 40
17 Rx8 41 Tx8
18 42
19 Rx9 43 Tx9
20 44
21 R x 10 45 T x 10
22 46
23 R x 11 47 T x 11
24 48
49 R x 12 73 T x 12
50 74
51 R x 13 75 T x 13
52 76
53 R x 14 77 T x 14
54 78
55 R x 15 79 T x 15
56 80
Maximum number of E1 16
links in each IMA group
Figure 5-25shows the block diagram for the working principle of the AND1ML1/AND1ML1A.
Figure 5-25 Block diagram for the working principle of the AND1ML1/AND1ML1A
Backplane
Serial
Management bus
management
bus
Management bus Control module CXP
In Transmit Direction
The AND1ML1/AND1ML1A first distributes the signals in Ethernet packets from the backplane
to different protocol processing chips according to the service types. The system-side processing
module decapsulates the concatenated services and buffers the services in queues. Then, this
module schedules the egress queues according to the service types, processes and converts the
services, and finally sends the services to the line-side processing module. The line-side
processing module performs coding, dejitter, pulse shaping, and line driving for the services,
and finally sends the services to E1 interfaces.
In Receive Direction
The line processing module performs impedance match, signal equalization, signal level
conversion, clock data recovery, dejitter, and decoding for the accessed E1 signals. Then, the
signals are sent into the system-side processing module, which frames the signals, encapsulates
the IMA, CES, and ML-PPP services in PWE3, and schedules PWs. Finally, this module sends
the signals in Ethernet packets to the backplane interface module.
Control Module
This module controls the reading and writing on the chip, resets the chip, and detects faults in
the chip. When used with the control board, this module controls the board.
Clock Module
This module provides various clock signals for the board to operate normally, detects clocks,
and selects the line recovery clock.
5.9.4 Specifications
The technical specifications of the AND1ML1/AND1ML1A include the interface
specifications, dimensions, weight, and power consumption.
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.×8.89 in.×7.63 in.)
NOTE
The mapping impedance of an interface on the AND2ML1A is 75 ohm, and the mapping impedance of an
interface on the AND2ML1B is 120 ohm. Except the difference of mapping impedance, the functions and
features of the AND2ML1A and AND2ML1B are the same.
Indicators
The following indicators are present on the front panel of the AND2ML1A/AND2ML1B:
l STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There is one Anea 96 interface on the front panel of the AND2ML1A/AND2ML1B. Table
5-50 lists the type and usage of the interfaces. 10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120-
Ohm 16 x E1 Cables list the cables corresponding to the interfaces.
Table 5-50 Type and usage of the interfaces on the front panel of the AND2ML1A/AND2ML1B
1 Rx0 25 Tx0
2 26
3 Rx1 27 Tx1
4 28
5 Rx2 29 Tx2
6 30
7 Rx3 31 Tx3
8 32
9 Rx4 33 Tx4
10 34
11 Rx5 35 Tx5
12 36
13 Rx6 37 Tx6
14 38
15 Rx7 39 Tx7
16 40
17 Rx8 41 Tx8
18 42
19 Rx9 43 Tx9
20 44
21 R x 10 45 T x 10
22 46
23 R x 11 47 T x 11
24 48
49 R x 12 73 T x 12
50 74
51 R x 13 75 T x 13
52 76
53 R x 14 77 T x 14
54 78
55 R x 15 79 T x 15
56 80
Maximum number of E1 16
links in each IMA group
-48V/-60V System
3.3V Power
Clock . . power supply
. .
supply
module . .
-48V/-60V
1V module System
power supply
System clocks
Line clocks CXP
CXP
Transmit Direction
The service signals from the control board are sent to the service processing module. The service
processing module performs PWE3 decapsulation and PW scheduling for the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols, performs
the E1 framing function, and sends the service signals to the service access module. The service
access module performs encoding and line drive for the signals and outputs the signals through
the backplane-side interfaces.
Receive Direction
The board accesses service signals through the backplane-side interfaces, and then the signals
are sent to the service access module. The service access module performs interference isolation,
lightning-proof, impedance matching, level conversion, signal balancing, decoding, and then
sends the processed signals to the service processing module. The service processing module
performs E1 framing, processes service signals based on the IMA/ATM, CES, and ML-PPP
protocols, implements PWE3 encapsulation and PW scheduling, and sends the signals to the
control board through the backplane-side interfaces.
l In the receive direction, this module isolates common mode interference, protects circuits
against transient failures, matches the impedance in the receive direction with the internal
impedance, and performs level conversion, balancing, and decoding for the service signals.
Finally, this module sends the processed signals to the service processing module.
l In the transmit direction, this module receives the service signals from the service
processing module, encodes the signals, drives the line, and outputs the service signals
through the backplane-side interfaces.
l This module recovers the line clock.
l In the receive direction, this module receives the signals from the service access module
and performs E1 framing. This module also identifies protocol types of the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols (for
example, addition and deletion of IMA group members, VP/VC switching and
concatenation of ATM cells, vacant slot compression of CES services, and setup of ML-
PPP groups). Then, this module performs PWE3 encapsulation and PW scheduling, Finally,
this module converts the processed signals to high-rate signals, and then sends the signals
to the control board through the backplane-side interfaces.
l In the transmit direction, this module receives the high-rate signals from the control board
through the backplane-side interfaces and recovers low-rate service signals. Then, this
module performs PWE3 decapsulation, identifies different protocols and processes the
service signals, and completes E1 framing. Finally, this module sends the processed signals
to the service access module.
Management Module
This module manages and controls each module on the board.
Clock Module
This module performs the following functions:
l When used with the control board, processes the recovered line clock.
l Provides the working clock for each module on the board.
Interface Specifications
Table 5-53 lists the specifications of the interfaces on the AND2ML1A/AND2ML1B.
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.×8.89 in.×7.63 in.)
NOTE
The mapping impedance of an interface on the AND1MD1A is 75 ohms, and the mapping impedance of
an interface on the AND1MD1B is 120 ohms. Except the difference of mapping impedance, the functions
and features of the AND1MD1A and AND1MD1B are the same.
Indicators
The following indicators are present on the front panel of the AND1MD1A/AND1MD1B:
l STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There are two Anea 96 interfaces on the front panel of the AND1MD1A/AND1MD1B. Table
5-54 lists the type and usage of the interfaces. 10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120-
Ohm 16 x E1 Cables list the cables corresponding to the interfaces.
Table 5-54 Type and usage of the interfaces on the front panel of the AND1MD1A/AND1MD1B
1 Rx0 25 Tx0
2 26
3 Rx1 27 Tx1
4 28
5 Rx2 29 Tx2
6 30
7 Rx3 31 Tx3
8 32
9 Rx4 33 Tx4
10 34
11 Rx5 35 Tx5
12 36
13 Rx6 37 Tx6
14 38
15 Rx7 39 Tx7
16 40
17 Rx8 41 Tx8
18 42
19 Rx9 43 Tx9
20 44
21 R x 10 45 T x 10
22 46
23 R x 11 47 T x 11
24 48
49 R x 12 73 T x 12
50 74
51 R x 13 75 T x 13
52 76
53 R x 14 77 T x 14
54 78
55 R x 15 79 T x 15
56 80
Transmit Direction
The service signals from the control board are sent to the service processing module. The service
processing module performs PWE3 decapsulation and PW scheduling for the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols, performs
the E1 framing function, and sends the service signals to the service access module. The service
access module performs encoding and line drive for the signals and outputs the signals through
the backplane-side interfaces.
Receive Direction
The board accesses service signals through the backplane-side interfaces, and then the signals
are sent to the service access module. The service access module performs interference isolation,
lightning-proof, impedance matching, level conversion, signal balancing, decoding, and then
sends the processed signals to the service processing module. The service processing module
performs E1 framing, processes service signals based on the IMA/ATM, CES, and ML-PPP
protocols, implements PWE3 encapsulation and PW scheduling, and sends the signals to the
control board through the backplane-side interfaces.
l In the receive direction, this module isolates common mode interference, protects circuits
against transient failures, matches the impedance in the receive direction with the internal
impedance, and performs level conversion, balancing, and decoding for the service signals.
Finally, this module sends the processed signals to the service processing module.
l In the transmit direction, this module receives the service signals from the service
processing module, encodes the signals, drives the line, and outputs the service signals
through the backplane-side interfaces.
l This module recovers the line clock.
l In the receive direction, this module receives the signals from the service access module
and performs E1 framing. This module also identifies protocol types of the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols (for
example, addition and deletion of IMA group members, VP/VC switching and
concatenation of ATM cells, vacant slot compression of CES services, and setup of ML-
PPP groups). Then, this module performs PWE3 encapsulation and PW scheduling, Finally,
this module converts the processed signals to high-rate signals, and then sends the signals
to the control board through the backplane-side interfaces.
l In the transmit direction, this module receives the high-rate signals from the control board
through the backplane-side interfaces and recovers low-rate service signals. Then, this
module performs PWE3 decapsulation, identifies different protocols and processes the
service signals, and completes E1 framing. Finally, this module sends the processed signals
to the service access module.
Management Module
This module manages and controls each module on the board.
Clock Module
This module performs the following functions:
l When used with the control board, processes the recovered line clock.
l Provides the working clock for each module on the board.
Interface Specifications
Table 5-57 lists the specifications of the interfaces on the AND1MD1A/AND1MD1B.
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.×8.89 in.×7.63 in.)
Indicator
The following indicators are present on the front panel of the AND1MO1C board:
l STAT indicator, red, green, or orange, which indicates the working status
Port Name
Table 5-58 lists the number of interfaces, types, and usage of the interfaces on the AND1MO1C
board.
87654321 3 Unspecified
6 Unspecified
7 Grounding terminal
8 Grounding terminal
Table 5-60 lists the functions and features of the AND1MO1C board.
Figure 5-32 shows the functional block diagram of the AND1MO1C board.
-48V/-60V System
3.3V Power
Clock 3.3V . power supply
2.5V .
supply
module 1.8V .
-48V/-60V
1.2V module System
1V power supply
System clocks
Line clocks CXP
CXP
l In the receive direction, this module receives signals from the service access module and
frames E1 signals. Then it identifies the protocol type of the signals and processes the
signals accordingly. For example, if the protocol type is ML-PPP, this module creates an
ML-PPP group. After that, it performs PWE3 encapsulation and schedules PWs. Finally,
this module converts the signals into high-rate signals and sends them to the control board
through backplane interfaces.
l In the transmit direction, this module receives high-rate service signals from the control
board through backplane interfaces and recovers low-rate service signals. Then it performs
PWE3 decapsulation, identifies the protocol type, and processes the signals accordingly.
Finally, this module frames T1 signals and sends the signals to the service access module.
Management Module
This module manages and controls other modules on the board.
Clock Module
This module performs the following functions:
l Works with the control board to process the recovered line clock signals.
l Provides working clock signals for each module on the board.
Interface Specifications
Table 5-61 lists the specifications of interfaces on the AND1MO1C board.
Item Specification
Code B8ZS
Item Specification
Physical Specifications
Board dimensions (mm): 20.32 (height) x 225.75 (depth) x 193.8 (width)
Front Panel
Figure 5-33 shows the appearance of the front panel of the AND1AVD8A.
Indicators
The following indicators are present on the front panel of the AND1AVD8A.
l STAT indicator, red, green, or orange, which indicates the working status
NOTE
There are eight LINK indicators, which are present above each service interface.
Interfaces
There are eight ADSL2+ interfaces on the front panel of the AND1AVD8A. Table 5-62 lists
types and usage of these interfaces.
1 Unspecified
2 Unspecified
87654321 3 Unspecified
4 TIP
5 RING
6 Unspecified
7 Unspecified
8 Unspecified
Figure 5-34 Block diagram for the working principle of the AND1AVD8A
Backplane
8 x ADSL2+ signals Service signals Service Service signals
Service Access
processing CXP
Module
module
Management
Management bus
module CXP
12V
. -48V/-60V
PIU
To each module on the AVD8A . Power supply
. module -48V/-60V
1.2V PIU
Transmit Direction
The control board sends signals to the service processing module through the backplane-side
interfaces. When receiving the service signals, the service processing module encapsulates the
service packets in ETHOA mode, and then sends the packets to the service access module, where
encoding and D/A conversion are performed. Finally, the signals are output through the
backplane-side interfaces.
Receive Direction
The service access module accesses ADSL2+ service signals through the backplane-side
interfaces. The service access module performs A/D conversion and decoding on the signals,
and then sends the signals to the service processing module. The service processing module
decapsulates the service packets in ETHOA mode, and then sends the processed packets to the
control board.
Management Module
When used with the system control board, this module manages and controls each module on
the AND1AVD8A.
Clock Module
This module performs the following functions:
l Receives the NTR clock from the service access module, and processes the clock when
used with the control board.
l Provides the working clock to each module on the AND1AVD8A.
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.8 (W)(0.80 in.×8.89 in.×7.63 in.)
Weight (kg): 0.50(1.10 lb)
Power consumption at room temperature (W):19.6 W
Front Panel
Figure 5-35 shows the appearance of the front panel of the AND1AVD8B.
Indicators
The following indicators are present on the front panel of the AND1AVD8B.
l STAT indicator, red, green, or orange, which indicates the working status
NOTE
There are eight LINK indicators, which are present above each service interface.
Interfaces
There are eight ADSL2+/VDSL2 interfaces on the front panel of the AND1AVD8B. Table
5-66 lists types and usage of these interfaces.
1 Unspecified
2 Unspecified
87654321 3 Unspecified
4 TIP
5 RING
6 Unspecified
7 Unspecified
8 Unspecified
Supports Vectoring.
Figure 5-36 Block diagram for the working principle of the AND1AVD8B
Backplane
8 x VDSL2 signals Service signals Service Service signals
Service Access
processing CXP
Module
module
Management
Management bus
module CXP
Clock signals
Working clock signals Clock C
module CXP
To each module on the AVD8B
12V
. -48V/-60V
PIU
To each module on the AVD8B . Power supply
. module -48V/-60V
1.2V PIU
Transmit Direction
The control board sends signals to the service processing module through the backplane-side
interfaces. When receiving the service signals, the service processing module encapsulates the
service packets, and then sends the packets to the service access module, where encoding and
D/A conversion are performed. Finally, the signals are output through the backplane-side
interfaces.
Receive Direction
The service access module accesses ADSL2+/VDSL2 service signals through the backplane-
side interfaces. The service access module performs A/D conversion and decoding on the signals,
and then sends the signals to the service processing module. The service processing module
decapsulates the service packets, and then sends the processed packets to the control board.
l In the receive direction, this module accesses ADSL2+/VDSL2 service signals through the
backplane-side interfaces, performs amplification, filtering, A/D conversion, balancing,
decoding, and verification on the signals, and then sends the signals to the service
processing module.
l In the transmit direction, this module receives the service signals from the service
processing module, performs framing, encoding, D/A conversion, filtering, amplification,
and line driving on the signals, and outputs the signals through the backplane-side
interfaces.
l In the receive direction, this module receives signals from the service access module,
extracts ATM/PTM cells, and rearranges service packets. Then, this module works with
the control board to decapsulate the service packets. Finally, this module outputs the high-
rate service packets through the backplane-side interfaces.
l In the transmit direction, this module receives the service packets accessed through the
backplane-side interfaces, and encapsulates the service packets into ATM/PTM cells. In
this manner, this module encapsulates the service packets when working with the control
board. Finally, this module outputs the service packets to the service access module.
Management Module
When used with the system control board, this module manages and controls each module on
the AND1AVD8B.
Clock Module
This module performs the following functions:
l Receives the NTR clock from the service access module, and processes the clock when
used with the control board.
l Provides the working clock to each module on the AND1AVD8B.
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.8 (W)(0.80 in.×8.89 in.×7.63 in.)
Indicators
l STAT indicator, red, green, or orange, which indicates the working status
l LINK0/LINK1/LINK2/LINK3 indicators, green, which indicate the port connection status.
Interfaces
Table 5-70 lists the types of the interfaces on the AND1SHD4 and their respective usage.
SHDSL0 - RJ-11 Accesses the first 4 x G.SHDSL For details, see 10.5.6
SHDSL3 services. xDSL Cables.
1 Unspecified
2 Unspecified
3 TIP
4 RING
6543 21
5 Unspecified
6 Unspecified
Figure 5-38 Block diagram for the working principle of the AND1SHD4
Backplane
Clock signals
Each module Clock signals
Clock module CXP
of the board
Service
Parallel/serial
Signal bus
Service bus converting CXP
4 x G.SHDSL voltage Service module
and encapsulation Logic
signals
performs and bundling Management control Serial management bus
bus unit CXP
protection module
module Status signal
CXP
Interface converting and control
Service access module
module
The system control board controls and manages the board through the serial management bus.
In addition, the logic control unit detects alarms and reports them to the control board through
the serial management bus.
Clock Module
The clock module provides working clock for each module on the AND1SHD4.
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.×8.89 in.×7.63 in.)
Indicator
The following indicators are present on the front panel of the AND1SHD4I:
l STAT indicator, red, green, or orange, which indicates the working status
l LINK0, LINK1, LINK2 and LINK3 indicators, green, which indicate the port connection
status.
Interface
Table 5-74 lists the types of the interfaces on the AND1SHD4I and their respective usage.
SHDSL0- RJ-11 Input and output G.SHDSL For details, see 10.5.6
SHDSL3 signals. xDSL Cables.
1 Unspecified
2 Unspecified
3 TIP
4 RING
6 5 4 3 2 1
5 Unspecified
6 Unspecified
Figure 5-40 Block diagram for the working principle of the AND1SHD4I
Management and Backplane
control bus
Service signals
IMA processing IMA service signals CXP
module ATM cells
Serial
Interface management bus
converting and CXP
control module
4 x G.SHDSL signals Service access IMA service signals
Status signal bus
module Management CXP
and control bus
processes the ATM cells and work with the IMA processing module to inversely multiplex the
ATM signals as IMA signals. Finally, the service access module sends the packets to the
G.SHDSL interfaces.
l In the receive direction, this module converts the serial packets to parallel packets, and
sends the parallel packets to the interface converting and control module.
l In the transmit direction, this module receives the IMA service signals from the interface
converting and control module, converts the serial IMA service signals to parallel IMA
service signals, and finally sends the parallel IMA service signals to the G.SHDSL
interfaces.
l In addition, this module extracts the NTR clock signals from the G.SHDSL service signals
received and sends the clock signals to the clock module.
l In the receive direction, this module receives the IMA service signals from the service
access module, converts the IMA service signals, and sends the service signals to the IMA
processing module, which multiplexes the service signals. Then, this module receives the
ATM cells from the IMA processing module, decapsulates the ATM frames, converts the
parallel signals to serial signals, converges the signals to one channel service signal, and
finally sends the service signal to the backplane.
l In the transmit direction, this module receives the service signal from the backplane,
converts the serial signal to parallel signal, encapsulates the service signal into ATM
frames, and sends the ATM cells to the IMA processing module, which inversely
multiplexes the ATM signals. Then, this module receives IMA signals from the IMA
processing module and finally sends the IMA signals to the service access module.
l In addition, this module works with the control board to manage and control each module
on the AND1SHD4I.
l In the receive direction, this module receives the IMA service signals from the interface
converting and control module, multiplexes the service signals as ATM signals, and finally
sends the ATM signals to the interface converting and control module, which converges
the signals.
l In the transmit direction, this module receives the service signals from the backplane after
the interface converting and control module processes the service signals. Then, this module
inversely multiplexes the ATM signals and sends the IMA service signals to the interface
converting and control module.
Clock Module
This module performs the following functions:
l Selects a clock source from the four channels of NTR clock signals and uploads the clock
signals to the control board.
l Provides working clock signals for each module on the SHD4I board.
l 3.3 V
l 1.8 V
l 1.5 V
l 1.2 V
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.82 (W)(0.80 in.×8.89 in.×7.63 in.)
Indicators
The following indicator is present on the front panel of the PIU.
PWRA/PWRB, green, which indicates the power supply status. When PWRA/PWRB is on and
green, it indicates that power is accessed.
For details on indications of indicators, see 12.1 Indicators.
Interfaces
The PIU accesses two power supplies. Table 5-78 lists the types of the interfaces on the PIU
and their respective usage. For cable corresponding to the interfaces, see 10.1 Power Supply
Cables and Ground Cables.
Label
Operation warning label: indicates the following precautions , which should be taken for removal
or insertion of the PIU board.
NOTICE
Multiple power supplies are accessed for the equipment. When powering off the equipment,
make sure that these power supplies are disabled.
Do not remove or insert the board with power on.
Power access PIU accesses two -48 V DC or -60 V DC power supplies for the
equipment.
Power protection The PIU protects the power supply against overcurrent and short
circuit. In this way, the overcurrent is prevented from shocking
board and components on it.
Surge protection The PIU protects the equipment against lightning and reports an
alarm if the protection fails.
Figure 5-42 Block diagram for the working principle of the PIU
Backplane
Each board
-48 V/-60 V Surge protection and failure
detection module
Board in-position
CXP
signals
Board in-position module
Indicators
The following indicators are present on the front panel of the FAN:
Handle
The handle is used for pushing the FAN into or pulling the FAN out of the chassis during board
replacement.
Label
The following labels are present on the front panel of the FAN:
Figure 5-44 shows the block diagram for the working principle of the FAN.
Figure 5-44 Block diagram for the working principle of the ANC1FAN
Fans x 3
12 V Backplane
12 V 12V
Start-delay module
CXP
Fan-speed signals
Fan-speed
reporting module CXP
Start-delay Module
This module has the function of provides start-delay to the power supply for fans and protects
fans against overcurrent.
Appearance
Figure 5-45 shows the appearance of a filler panel.
Valid Slots
A filler panel can be housed in any of slots 3-4 of a chassis.
l Performs electromagnetic shielding and ensures that the chassis meets the requirement of
electromagnetic radiation.
l Prevents foreign substances from getting into the chassis.
l Prevents internal voltage from being exposed.
l Ensures proper ventilation of cooling current inside the chassis.
ATN 910I has integrated with boards that are not swappable.
ATN 910B has integrated with boards that are not swappable.
working with the AND1CXPA/AND1CXPB) and in any of slots 1 to 6 (when working with the
AND2CXPB/AND2CXPE).
Board Structure
Figure 8-1 shows the structure of a board (using the AND1EM4F board as an example).
Different boards provide different indicators, buttons, and ports; not all boards support a daughter
board. For details, see the description of each board.
l Front panel, including the captive screws, ejector levers, indicators, buttons, and interfaces.
– Captive screws: secure the board in the subrack.
– Ejector levers: used for inserting or removing the board. Bar codes are also attached on
the ejector levers.
NOTE
The ejector lever on the left side of the front panel of a board is attached with a label marking the bar code
of the board (for a control board, the bar code label is above the ejector level on the front panel). The bar
code of a control board will be retrieved by ATN 950B as the equipment serial number (ESN).
The ESN is used for applying for a license. ATN 950B automatically reads the bar code of the backplane
or control board as the device ESN. Generally, the bar code of the backplane takes precedence over that
of the control board.
Board Naming
NOTE
The preceding only describes how to roughly identify a board. For details on board specifications, see board
descriptions.
A board name mainly consists of the board functional version and short name. A short name can
roughly identify a board. The short name of a control board, power board, and fan board is CXPx,
PIU, and FAN respectively. The following mainly describes how to quickly identify a physical
interface board through the short name of a board.
As shown in Figure 8-2, the short name of a board consists of an abbreviated board name and
an extended name. An abbreviated board name includes the board type, interface quantity, and
interface rate. When boards have the same abbreviated board name, they can be differentiated
using extended names. An extended name does not have special meanings and can be omitted.
ML1A
Extended name
Interface rate
Interface quantity
Board type
l Board type M indicates an E-carrier interface board. The interface quantity is represented
using L or D, indicating 16 or 32 respectively. The interface rate is represented using 1,
indicating E1.
l Board type C indicates a CPOS interface board. The interface quantity is represented using
Q, indicating 4. The interface rate is represented using 1, indicating STM-1.
l Board type P indicates a POS interface board. The interface quantity is represented using
Q, indicating 4. The interface rate is represented using 1, indicating STM-1.
l Board type E indicates an Ethernet interface board. The interface quality is represented
using an Arabic numeral. The interface rate is represented using M or X, indicating FE/GE
or 10GE respectively. Extended name F or T is used to indicate an optical interface or
electrical interface respectively.
NOTE
For the name of an Ethernet interface board, the interface rate and quantity rate are in an order opposite
to those for the names of other boards. For example, in EM4F (a name of an Ethernet interface board),
interface rate M comes before interface quantity 4.
Board Relationship
A control board mainly implements system control and service grooming, and receives and
processes various services by working with physical interface boards. A power board provides
power inputs for the system. A fan board blows air to dissipate heat generated during system
operation. Figure 8-3 shows the board relationship.
Control and
User side management module Network side
Clock module
FE/GE FE/GE
EM4F/EM4T EM4F/EM4T
FE/GE FE/GE
EM8F/EM8T EM8F/EM8T
10GE 10GE
EX1 EX1
E1 Service E1
ML1/ML1A/ML1B ML1/ML1A/ML1B
processing and
E1 switching module E1
MD1A/MD1B MD1A/MD1B
CPOS CPOS
STM-1 STM-1
CQ1B CQ1B
POS POS
STM-1 STM-1
PQ1 PQ1
Control board
CXPA/CXPB/CXPE
ATN 950B is equipped with active and standby control boards, which form a hot backup. A dual
feeding and selective receiving mechanism is used for service interaction between physical
interface boards and the two control boards.
The physical interface boards are classified into the following types based on the service access
mode: Ethernet service interface boards, E1 service interface boards, STM-1 service
interface boards.
Table 8-2 Ethernet service interface boards supported by the ATN 950B
Table 8-3 E1 service interface boards Supported by the ATN 950B and Valid Slots
Table 8-4 STM-1 service interface boards supported by the ATN 950B
Power Board
Power boards lead in power for supplying power to the device. For details about power
distribution, see Power Distribution.
The Ethernet service interface board supports Layer 2 services, Layer 3 services, and hybrid
transmission of Layer 2 and Layer 3 services. (When the main interface is in Layer 2 mode,
configure the sub-interface to transmit Layer 2/Layer 3 services.)
Table 8-7 shows the Ethernet service interface boards supported by the ATN 950B and the
differences between the boards.
ATM
Figure 8-4 shows the application of the E1 service interface board using the ATM protocol.
Figure 8-4 Application of the E1 service interface board using the ATM protocol
An ATN device uses the E1 service interface board on the user side to support ATM over E1.
When the ATM service access rate is between E1 and E3, multiple E1 links are bound into an
IMA group to increase service bandwidth. On the network side, the E1 service interface board
implements ATM service emulation and transparently transmits the ATM services over the
packet switched network (PSN), such as MPLS or Ethernet. For detailed information, see the
chapter "ATM IMA application" in the Feature Description.
PPP
Figure 8-5 shows the application of the E1 service interface board using the PPP protocol.
Figure 8-5 Application of the E1 service interface board using the PPP protocol (user side)
The ATN device uses the E1 service interface board to support IP services carried over ML-
PPPs on user side.
NOTE
An independent PPP link cannot carry service. PPP links must be added to an ML-PPP group to carry
services.
An ML-PPP does not support MPLS services.
TDM
Figure 8-6 shows the application of the E1 service interface board using the TDM protocol.
Figure 8-6 Application of the E1 service interface board using the TDM protocol
The ATN device uses the E1 service interface board to access the TDM service, encapsulate the
service signals into packets, and transparently transmit the packets through PWs over the PSN
network. This achieves CES service emulation. For detailed information, see the chapter "CES
application" in the Feature Description.
Interface type E1 E1 E1
Number of 16 16 32
interfaces
Interface clock Master clock mode Master/slave clock mode Master/slave clock mode
mode
Link-layer ATM, PPP, TDM ATM, PPP, TDM ATM, PPP, TDM
protocols
Minimum 2 1 1
number of
timeslots in CE1
mode
Figure 8-7 and Figure 8-8 show the applications of STM-1 service interface boards on a
network.
Figure 8-7 Application of the STM-1 service interface board (user side)
Node B
POS/CPOS STM-1
CXP PIC
MSTP Board
Node B
Figure 8-8 Application of the STM-1 service interface board (network side)
STM-1 POS/CPOS
PIC CXP
Board
The AND2CQ1B on the ATN 950B is used as the STM-1 service interface board, which provides
four CPOS interfaces. Each CPOS interface supports 63 E1 channels. The supported services
are almost the same as those of the E1 service interface board.
On ATN 950B, AND2PQ1 and AND2CQ1B are the interface boards that support STM-1
services. The AND2PQ1 board provides 4 POS interfaces. It uses the SONET as the physical-
layer protocol and PPP to control links at the data link layer. The AND2PQ1 board runs IP
services at the network layer. The AND2CQ1B board provides 4 CPOS interfaces. The CPOS
physical ports are no longer used as service ports, but the channelized 63 E1 channels are used
as synchronization serial ports that support the same services as an E1 service interface board.
l The AND2PQ1 board can be used on the user or network side. It carries IP services over
POS interfaces.
l The AND2CQ1B board can be used on the user or network side. It supports ML-PPP and
carries IP services over E1 channels on CPOS interfaces.
l The AND2CQ1B board on the user side can access and converge ATM and TDM services
over E1 channels on CPOS interfaces. It implements service emulation and transparent
transmission over a packet switched network, achieving ATM PWE3 and TDM PWE3
(CES) services.
NOTE
Services supported by the E1 channel on the CPOS interface are basically the same as those provided by
the E1 service interface board. The differences are listed as follows:
l The E1 channel of the AND2CQ1B supports IP and MPLS services carried over ML-PPPs; the E1
service interface board only supports IP services.
l The E1 channel of the AND2CQ1B does not support fractional E1; the E1 service interface board
supports fractional E1 when the TDM protocol is used.
Indicator
The following indicators are present on the front panel of the AND1CXPA/AND1CXPB:
l STAT indicator, red, green, or orange, which indicates the working status
l PROG indicator, red or green, which indicates the running status of the program
l SYNC indicator, red or green, which indicates the clock synchronization status
l ACTX indicator, green, which indicates the cross-connection or clock active/standby status
l ACTC indicator, green, which indicates the active/standby system control board
For details on meanings of indicators, see 12.1 Indicators.
Button
The following buttons are present on the front panel of the AND1CXPA/AND1CXPB:
Interface
Table 8-10 lists the types and usage of the interfaces on the AND1CXPA/AND1CXPB.
7 Unspecified
87654321 3 Unspecified
6 Unspecified
7 Unspecified
8 Unspecified
1 Unspecified Unspecified
2 Unspecified Unspecified
87654321 3 Negative input for the 1pps Negative output for the 1pps
signal signal
(RS422 level) (RS422 level)
6 Positive input for the 1pps Positive output for the 1pps
signal signal
(RS422 level) (RS422 level)
2 Grounding end
5 Grounding end
6 Grounding end
Auxiliary interface function Provides one 10 Mbit/s or 100 Mbit/s auto-sensing Ethernet
NM interface or Console interface for communication with
the NMS.
Tact switches Provides two tact switches. When you rotate the ejector levers
to remove the board, the two tact switches are triggered to
start the active/standby protection switching.
NOTE
When you rotate only one ejector lever, the protection switching is not triggered. The protection switching
is triggered only when you rotate the two ejector levers.
Figure 8-11 shows the block diagram for the working principle of the AND1CXPA/
AND1CXPB.
Management
bus
Service signals
PICs
Under-voltage/over- Service processing and
Service
voltage detection bus grooming module
communication bus
The other CXP
-48V/-60V System
power supply
-48V/-60V System
Power supply power supply
module 12V
FAN
3.3V
Interface cards
l The CPU control unit works with the logic control unit to detects alarms and hardware
faults, control boards, process overhead, and manage the equipment.
l The logic control unit provides interfaces through which the CPU control unit connects to
other chips on the board. The logic control unit specifies the working states of chips,
initializes chips, and operates the register. In addition, the logic control unit achieves log
control on active/standby switching, monitors the working state of the board, and detects
the states of other boards.
l Provides working clock signals for the key chips on the AND1CXPA/AND1CXPB.
l Supports the physical-layer clock synchronization, and provides system clock signals for
each boards.
l Processes the IEEE 1588V2 protocol to achieve clock/time synchronization.
l Supports the 1588 ACR clock.
l Supports the NTP clock.
1 2 3 4
ON DIP
CF Card
DIP Switch
CF Card
The size of the CF card on AND1CXPA/AND1CXPB is 512 MB. The CF card is used to backup
data and load packages.
DIP Switch
You can use the DIP switches to delete the configuration file loaded on the device.
NOTICE
l This operation should be executed with caution. Use it under the guidance of technical
personnel.
l After the configuration file is deleted, reset the DIF switches to 0, 0, 0, and 0. In this way,
you do not need to delete the configuration file at each startup.
l The numeral indicates 1, and the letter indicates 0.
l The device password is deleted when the configuration file is deleted.
Indicator
The following indicators are present on the front panel of the AND2CXPB/AND2CXPE:
l STAT indicator, red, green, or orange, which indicates the working status
l PROG indicator, red or green, which indicates the running status of the program
l SYNC indicator, red or green, which indicates the clock synchronization status
l ACTX indicator, green, which indicates the cross-connection or clock active/standby status
l ACTC indicator, green, which indicates the active/standby system control board
Button
The following buttons are present on the front panel of the AND2CXPB/AND2CXPE:
Interface
Table 8-17 lists the types and usage of the interfaces on the AND2CXPB/AND2CXPE.
7 Unspecified
87654321 3 Unspecified
6 Unspecified
7 Unspecified
8 Unspecified
1 Unspecified Unspecified
2 Unspecified Unspecified
87654321 3 Negative input for the 1pps Negative output for the 1pps
signal signal
(RS422 level) (RS422 level)
6 Positive input for the 1pps Positive output for the 1pps
signal signal
(RS422 level) (RS422 level)
2 Grounding end
5 Grounding end
6 Grounding end
Auxiliary interface function Provides one 10 Mbit/s or 100 Mbit/s auto-sensing Ethernet
NM interface or Console interface for communication with
the NMS.
Tact switches Provides two tact switches. When you rotate the ejector levers
to remove the board, the two tact switches are triggered to
start the active/standby protection switching.
NOTE
When you rotate only one ejector lever, the protection switching is not triggered. The protection switching
is triggered only when you rotate the two ejector levers.
Figure 8-15 shows the block diagram for the working principle of the AND2CXPB/
AND2CXPE.
Management
bus
Service signals
PICs
Under-voltage/over- Service processing and
Service
voltage detection bus grooming module
communication bus
The other CXP
-48V/-60V System
power supply
-48V/-60V System
Power supply power supply
module 12V
FAN
3.3V
Interface cards
l The CPU control unit works with the logic control unit to detects alarms and hardware
faults, control boards, process overhead, and manage the equipment.
l The logic control unit provides interfaces through which the CPU control unit connects to
other chips on the board. The logic control unit specifies the working states of chips,
initializes chips, and operates the register. In addition, the logic control unit achieves log
control on active/standby switching, monitors the working state of the board, and detects
the states of other boards.
l Provides working clock signals for the key chips on the AND2CXPB/AND2CXPE.
l Supports the physical-layer clock synchronization, and provides system clock signals for
each boards.
l Processes the IEEE 1588V2 protocol to achieve clock/time synchronization.
l Supports the 1588 ACR clock (supported by AND2CXPE).
l Supports the NTP clock.
1 2 3 4
ON DIP
拨码开关
You can use the DIP switches to delete the configuration file loaded on the device.
Set DIP switches on AND2CXPB/AND2CXPE to 1, 1, 0, and 1. During startup, the device
deletes the loaded configuration file based on the DIF switch status.
NOTICE
l This operation should be executed with caution. Use it under the guidance of technical
personnel.
l After the configuration file is deleted, reset the DIF switches to 0, 0, 0, and 0. In this way,
you do not need to delete the configuration file at each startup.
l The numeral indicates 1, and the letter indicates 0.
l The device password is deleted when the configuration file is deleted.
Indicator
The following indicators are present on the front panel of the AND1EM4T:
l STAT indicator, red, green, or orange, which indicates the working status
l LINK indicator, green, which indicates the connection status of the port
l ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
Above each service interface, there is a service port connection status indicator (LINK) and a service port
transmit/receive status indicator (ACT).
Interface
Table 8-23 lists the types and usage of the interfaces on the AND1EM4T.
Figure 8-18 shows the block diagram for the functions of the AND1EM4T.
Management bus
Management bus Clock signals
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the AND1EM4T. The service processing module
identifies the destination interfaces for the packets, and buffers and schedules the packets. Then,
the service processing module sends the processed packets to the service access module, where
coding/decoding and serial/parallel conversion are performed. Finally, the service access module
outputs the packets through the GE/FE interfaces on the front panel.
Receive Direction
The GE/FE interfaces on the front panel receive GE/FE service signals. Then, the service access
module performs serial/parallel conversion and coding/decoding on the services, and then sends
the services to the service processing module. The service processing module buffers the service
packets, schedules the packets, and finally outputs the packets through the backplane-side
interface.
l In the receive direction, this module receives the GE/FE services from the interfaces on the
front panel, performs serial/parallel conversion and coding/decoding, and then sends the
services to the service processing module.
l In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, and serial/parallel conversion on the
packets, and then outputs the packets through the GE/FE interfaces on the front panel.
l This module extracts the synchronous Ethernet clock.
l In the receive direction, this module receives and buffers the service packets from the
interface conversion module. Then, this module schedules packets from different
interfaces. Finally, this module outputs the packets through the backplane-side interface.
l In the transmit direction, this module receives service packets from the AND1CXPA/
AND1CXPB, identifies the destination interfaces of the packets, and buffers and schedules
the packets based on the access capability of the EM4T and the access bandwidth setting
at each interface. Finally, this module outputs the packets to the service access module.
l This module extracts and inserts IEEE 1588 V2 packets.
Management Module
This module is used with the CXP to manage and control each module on the EM4T.
Clock Module
This module performs the following functions:
l 3.3 V
l 3.0 V
l 2.5 V
l 1.2 V
Interface Specifications
Table 8-26 lists the specifications of the electrical interfaces on the AND1EM4T board.
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.44
Power consumption (W, room temperature): 10.4
Ambient temperature: –20 ºC to +65 ºC
Indicator
The following indicators are present on the front panel of the AND1EM8T:
l STAT indicator, red, green, or orange, which indicates the working status
l LINK indicator, green, which indicates the connection status of the port
l ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
Above each service interface, there is a service port connection status indicator (LINK) and a service port
transmit/receive status indicator (ACT).
Interface
Table 8-27 lists the types and usage of the interfaces on the AND1EM8T.
Figure 8-20 shows the block diagram for the functions of the AND1EM8T.
Management bus
Management bus Clock signals
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the AND1EM8T. The service processing module
identifies the destination interfaces for the packets, and buffers and schedules the packets. Then,
the service processing module sends the processed packets to the service access module, where
coding/decoding and serial/parallel conversion are performed. Finally, the service access module
outputs the packets through the GE/FE interfaces on the front panel.
Receive Direction
The GE/FE interfaces on the front panel receive GE/FE service signals. Then, the service access
module performs serial/parallel conversion and coding/decoding on the services, and then sends
the services to the service processing module. The service processing module buffers the service
packets, schedules the packets, and finally outputs the packets through the backplane-side
interface.
l In the receive direction, this module receives the GE/FE services from the interfaces on the
front panel, performs serial/parallel conversion and coding/decoding, and then sends the
services to the service processing module.
l In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, and serial/parallel conversion on the
packets, and then outputs the packets through the GE/FE interfaces on the front panel.
l This module extracts the synchronous Ethernet clock.
l In the receive direction, this module receives and buffers the service packets from the
interface conversion module. Then, this module schedules packets from different
interfaces. Finally, this module outputs the packets through the backplane-side interface.
l In the transmit direction, this module receives service packets from the AND1CXPA/
AND1CXPB, identifies the destination interfaces of the packets, and buffers and schedules
the packets based on the access capability of the EM8T and the access bandwidth setting
at each interface. Finally, this module outputs the packets to the service access module.
l This module extracts and inserts IEEE 1588 V2 packets.
Management Module
This module is used with the CXP to manage and control each module on the EM8T.
Clock Module
This module performs the following functions:
l Provides the working clock for each module on the EM8T.
l Supports the synchronous Ethernet and SSM protocols.
l Supports the IEEE 1588 V2 protocol.
l Supports the 1588 ACR clock.
Interface Specifications
Table 8-30 lists the specifications of the electrical interfaces on the AND1EM8T board.
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Indicator
The following indicators are present on the front panel of the AND1EM4F:
l STAT indicator, red, green, or orange, which indicates the working status
l L/A0 to L/A3 indicators, green or orange, which indicate the port connection status and
data transmit/receive status
Interface
Four SFP interfaces are present on the EM4F. Table 8-31 lists the types and usage of the
interfaces on the EM4F.
Figure 8-22 shows the block diagram for the functions of the AND1EM4F.
Management bus
Management bus Clock signals
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the EM4F. The service processing module identifies the
destination interfaces for the packets, and buffers and schedules the packets. Then, the service
processing module sends the processed packets to the service access module, where coding/
decoding, serial/parallel conversion, and E/O conversion are performed. Finally, the service
access module outputs the packets through the GE/FE interfaces on the front panel.
Receive Direction
The GE/FE interfaces on the front panel receive GE/FE service signals. Then, the service access
module performs O/E conversion, serial/parallel conversion, and coding/decoding on the
services, and then sends the services to the service processing module. The service processing
module buffers the service packets, schedules the packets, and finally outputs the packets through
the backplane-side interface.
l In the receive direction, this module receives the GE/FE services from the interfaces on the
front panel, performs O/E conversion, serial/parallel conversion, and coding/decoding, and
then sends the services to the service processing module.
l In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, serial/parallel conversion, and E/O
conversion on the packets, and then outputs the packets through the GE/FE interfaces on
the front panel.
l This module extracts the synchronous Ethernet clock.
l In the receive direction, this module receives and buffers the service packets from the
service access module. Then, this module schedules packets from different interfaces.
Finally, this module outputs the packets through the backplane-side interface.
l In the transmit direction, this module receives service packets from the AND1CXPA/
AND1CXPB, identifies the destination interfaces of the packets, and buffers and schedules
the packets. Finally, this module outputs the packets to the service access module.
l This module extracts and inserts IEEE 1588 V2 packets.
Management Module
This module is used with the AND1CXPA/AND1CXPB to manage and control each module on
the EM4F.
Clock Module
This module performs the following functions:
l 3.3 V
l 3.0 V
l 2.5 V
l 1.2 V
For information about the swappable optical/electrical FE/GE optical modules supported at SFP
interfaces on the AND1EM4F board, see Table 8-33, Table 8-34, Table 8-35, and Table
8-36. The interface specifications depend on the optical/electrical modules on the board. For
details on the specifications of optical/electrical modules, see 9 Swappable Optical/Electrical
Modules.
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.44
Power consumption (W, room temperature): 12.0
Ambient temperature: –20 ºC to +65 ºC
Appearance
Figure 8-23 shows the appearance of the front panel of the EM4C board.
Indicators
The following indicators are present on the front panel of the EM4C board:
l STAT indicator, red, green, or orange, which indicates the working status
l Status indicators (L/A0 to L/A3), green or orange, which indicate the port connection status
and data receiving and transmission status
l LINK indicator, green, which indicates the port connection status
l ACT indicator, yellow, which indicates the data receiving and transmission status of the
port
NOTE
There are four LINK indicators and four ACT indicators on the EM4C board. One LINK indicator and one
ACT indicator are present above each FE/GE electrical interface (RJ-45).
Interfaces
Table 8-37 describes the types and functions of the interfaces on the EM4C board.
OUT0 IN0 to SFP FE/GE signal input/output For details, see 10.6 Optical
OUT3 IN3 interfaces Fibers.
FE/GE0 to FE/ RJ-45 FE/GE electrical signal input/ For details, see 10.5.1 Ethernet
GE3 output interfaces Cables.
NOTE
The four SFP interfaces and four electrical interfaces are numbered from 0 to 3. Each SFP interface
corresponds to the electrical interface with the same number and the two interfaces are considered as a
group (for example, OUT0 IN0 and FE/GE0). The two interfaces in each group cannot be used at the same
time.
Table 8-40 describes the functions and features of the EM4C board.
Basic functions Provides four FE/GE SFP interfaces and four FE/GE electrical
interfaces.
AND1EM4C
1 x GE
SFP ETH
SFP Module CLK
SFP 1 x GE
ETH 4 x GE Signal
SFP Module CLK selection CXP
Service
RJ-45 1 x GE logic
ETH
RJ-45 CLK
Module CLK CXP
RJ-45
1 x GE
RJ-45 ETH
Module CLK
Control Control
logic CXP
Logic Module
-48V/-60V PIU
Clock Power
Module Module -48V/-60V
PIU
ETH Module
The Ethernet processing module performs the following functions:
Logic Module
The logic module includes a service logic and a control logic.
Clock Module
The clock module provides the working clock for each module on the board.
Power Module
The power module provides a DC voltage for each module on the board.
Interface Specifications
l For the specifications of FE/GE electrical interfaces, see Table 8-41.
l For information about the swappable FE/GE optical modules supported at FE/GE (SFP)
interfaces, see Table 8-42 and Table 8-43. The interface specifications depend on the
optical/electrical modules on the board. For details on the specifications of optical/electrical
modules, see 9 Swappable Optical/Electrical Modules.
Physical Specifications
Dimensions (mm): 20.32 (H) x 193.80 (W) x 225.75 (D)
Weight (kg): 0.46
Indicator
The following indicators are present on the front panel of the AND1EM8F:
l STAT indicator, red, green, or orange, which indicates the working status
l L/A0 to L/A7 indicators, green or orange, which indicate the port connection status and
data transmit/receive status
Interface
Eight SFP interfaces are present on the EM8F. Table 8-44 lists the types and usage of the
interfaces on the EM8F.
Figure 8-26 shows the block diagram for the functions of the AND1EM8F.
Management bus
Management bus Clock signals
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the EM8F. The service processing module identifies the
destination interfaces for the packets, and buffers and schedules the packets. Then, the service
processing module sends the processed packets to the service access module, where coding/
decoding, serial/parallel conversion, and E/O conversion are performed. Finally, the service
access module outputs the packets through the GE/FE interfaces on the front panel.
Receive Direction
The GE/FE interfaces on the front panel receive GE/FE service signals. Then, the service access
module performs O/E conversion, serial/parallel conversion, and coding/decoding on the
services, and then sends the services to the service processing module. The service processing
module buffers the service packets, schedules the packets, and finally outputs the packets through
the backplane-side interface.
l In the receive direction, this module receives the GE/FE services from the interfaces on the
front panel, performs O/E conversion, serial/parallel conversion, and coding/decoding, and
then sends the services to the service processing module.
l In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, serial/parallel conversion, and E/O
conversion on the packets, and then outputs the packets through the GE/FE interfaces on
the front panel.
l This module extracts the synchronous Ethernet clock.
l In the receive direction, this module receives and buffers the service packets from the
service access module. Then, this module schedules packets from different interfaces.
Finally, this module outputs the packets through the backplane-side interface.
l In the transmit direction, this module receives service packets from the AND1CXPA/
AND1CXPB, identifies the destination interfaces of the packets, and buffers and schedules
the packets. Finally, this module outputs the packets to the service access module.
l This module extracts and inserts IEEE 1588 V2 packets.
Management Module
This module is used with the AND1CXPA/AND1CXPB to manage and control each module on
the EM8F.
Clock Module
This module performs the following functions:
l 3.3 V
l 3.0 V
l 2.5 V
l 1.8 V
l 1.2 V
Interface Specifications
For information about the swappable FE/GE optical/electrical modules supported at SFP
interfaces on the AND1EM8F board, see Table 8-46, Table 8-47, Table 8-48, and Table
8-49. The interface specifications depend on the optical/electrical modules on the board. For
details on the specifications of optical/electrical modules, see 9 Swappable Optical/Electrical
Modules.
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Indicator
The following indicators are present on the front panel of the AND1EX1:
l STAT indicator, red, green, or orange, which indicates the working status
l L/A indicators, green or orange, which indicate the port connection status and data transmit/
receive status
For details on meanings of indicators, see 12.1 Indicators.
Interface
One XFP interface is present on the AND1EX1. Table 8-50 lists the types and usage of the
interfaces on the AND1EX1.
Figure 8-28 shows the block diagram for the functions of the AND1EX1.
Management bus
Management bus Clock signals
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the EX1. The service processing module buffers and
schedules the packets. Then, the service processing module sends the processed packets to the
service access module, where coding/decoding, and serial/parallel conversion are performed.
Finally, the service access module outputs the packets through the 10 GE interface on the front
panel.
Receive Direction
The 10 GE interface on the front panel receives 10 GE service signals. Then, the service access
module performs serial/parallel conversion, and coding/decoding on the services, and then sends
the services to the service processing module. The service processing module buffers and
schedules the service packets, and finally outputs the packets through the backplane-side
interface.
Management Module
This module is used with the AND1CXPA/AND1CXPB to manage and control each module on
the EX1.
Clock Module
This module performs the following functions:
l 5.0 V
l 3.3 V
l 1.8 V
l 1.2 V
Interface Specifications
For information about the swappable optical modules supported at XFP interfaces on the
AND1EX1 board, see Table 8-52. The interface specifications depend on the optical modules
on the board. For details on the specifications of optical modules, see 9 Swappable Optical/
Electrical Modules.
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Indicator
The following indicators are present on the front panel of the AND2CQ1B board:
l STAT indicator, red, green, or orange, which indicates the working status
l LOS1 to LOS4 indicators, red or green, which indicate the port status
Interfaces
Four SFP interfaces are present on the front panel of the AND2CQ1B board. Table 8-53 lists
the types and usage of the interfaces. For details on fiber connections to these interfaces, see
10.6 Optical Fibers.
Table 8-53 Types and usage of the interfaces on the AND2CQ1B board
The E1 channel supports the serial interface in the E1 and CE1 modes.
The serial interface supports the ATM, TDM, and PPP protocols.
The E1 channel supports the serial interface in the E1 and CE1 modes.
Maximum number of E1 32
links supported by each
IMA group
Figure 8-30 shows the functional block diagram of the AND2CQ1B board.
Upstream Direction
In the receive direction, the SDH processing module accesses 4 x channelized STM-1 services
through the interface on the front panel. This module decapsulates the VC-12 timeslots from the
STM-1 signals, recovers the E1 signals, processes the overhead bytes, pointers, and alarm
signals, and sends the processed signals to the logic processing module. Then, the logic
processing module rearranges the E1 frames, processes the rearranged signals, and sends the
signals to the data processing module for PWE3 encapsulation and PW scheduling. Finally, the
signals are sent to the main control board through the interface on the backplane.
Transmit Direction
In the transmit direction, the data processing module receives the signals from the the main
control board, identifies the signals, performs the PWE3 decapsulation, and then sends the
signals to the logic processing module. The logic processing module processes various signals,
schedules queues, and sends the processed signals to the SDH processing module. The SDH
processing module maps the E1 signals to the VC-12 timeslots, multiplexes the VC-12 timeslots
to the STM-1 signals, adds the overhead bytes and pointers, processes the alarm signals, and
sends out the STM-1 signals through the interface on the front panel.
l In the receive direction, this module recovers clock or data from the received 4 channels
STM-1(VC12) signals, align frames, descrambles signals, processes SOHs, adjusts
pointers, processes POHs. Then it sends the signals to the logic processing module over a
bus for further processing.
l In the transmit direction, this module receives service signals from the logic processing
module, reframes VC-3 or VC-4 signals, adds overheads and pointers, processes alarms,
and sends 4 channels STM-1(VC12) signals to other boards through the interfaces on the
front panel.
l This module performs LMSP protection switching to protect services against failures.
l This module extracts and recovers the line clock.
l In the receive direction, this module receives the signals from the SDH processing module,
rearranges the frames of the E1 signals, performs processing and suppression of timeslots
of the CES services. Then, the processed signals are sent to the data processing module.
l In the transmit direction, this module receives the signals from the data processing module,
and sends the processed signals to the SDH processing module.
l In the receive direction, this module obtains PW information about the service, encapsulates
signals in PWE3, schedules PWs, and sends the signals to main control board through the
backplane-side interfaces.
l In the transmit direction, this module receives service signals from main control board,
determines the service signal type, decapsulates PWE3 signals, and schedules the signals.
Management Module
This module works with main control board to manage and control other modules on the board.
Clock Module
This module performs the following functions:
l 3.3 V
l 3.0 V
l 2.5 V
l 1.5 V
l 1.2 V
l 1.0 V
l 0.75 V
Interface Specifications
For information about the swappable optical modules supported by SFP interfaces on the
AND2CQ1B board, see Table 8-55. The interface specifications depend on the optical modules
on the board. For details on the optical modules, see 9 Swappable Optical/Electrical
Modules.
Other Specifications
Board dimensions (mm): 20.32 (H) x 193.80 (W) x 225.75 (D)
Weight (kg): 0.47
Power consumption (W): 11.50
Ambient temperature: –20 ºC to +65 ºC
Appearance
Figure 8-31 shows the appearance of the front panel of the PQ1 board.
Indicators
The following indicators are present on the front panel of the PQ1 board:
l STAT indicator, red, green, or orange, which indicates the working status
l LOS0, LOS1, LOS2, and LOS3, red or green, which indicate the port status
Interfaces
There are four SFP interfaces on the PQ1 board. Table 8-56 describes the types and functions
of the interfaces. For details on the required optical fibers, see 10.6 Optical Fibers.
Table 8-57 describes the functions and features of the PQ1 board.
AND2PQ1
STM-1
SFP
Signal selection
STM-1
SFP 4 x VC4 Service 4 x VC4 1 x GE
Data CXP
SDH logic Module
STM-1 Module
SFP
STM-1
SFP
Control Control
logic CXP
Logic
Module
-48V/-60V
Power PIU
Clock
Module -48V/-60V PIU
Module
Logic Module
The service logic of the logic module transparently transmits VC-4 services.
The control logic works with the system control boards to manage and control each module on
the board.
Clock Module
The clock module provides the working clock for each module on the board.
Power Module
The power module provides a DC voltage for each module on the board.
Interface Specifications
For information about the swappable optical modules supported at SFP interfaces on the
AND2PQ1 board, see Table 8-58. The interface specifications depend on the optical modules
on the board. For details on the specifications of optical modules, see 9 Swappable Optical/
Electrical Modules.
Other Specifications
Dimensions (mm): 20.32 (H) x 193.80 (W) x 225.75 (D)
Weight (kg): 0.47
Power consumption (W): 11.50
Ambient temperature: –20 ºC to +65 ºC
NOTE
The AND1ML1 and AND1ML1A have the same functions and features except for the matched impedance
(AND1ML1: 75 ohms E1; AND1ML1A: 120 ohms E1).
Figure 8-34 shows the appearance of the front panel of the AND1ML1A.
Indicators
The following indicators are present on the front panel of the AND1ML1/AND1ML1A:
l STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There is one Anea 96 interface on the front panel of the AND1ML1/AND1ML1A. Table
8-59 lists the type and usage of the interface. For cables corresponding to the interfaces, see
10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120-Ohm 16 x E1 Cables.
Table 8-59 Type and usage of the interface on the front panel of the ML1
1 Rx0 25 Tx0
2 26
3 Rx1 27 Tx1
4 28
5 Rx2 29 Tx2
6 30
7 Rx3 31 Tx3
8 32
9 Rx4 33 Tx4
10 34
11 Rx5 35 Tx5
12 36
13 Rx6 37 Tx6
14 38
15 Rx7 39 Tx7
16 40
17 Rx8 41 Tx8
18 42
19 Rx9 43 Tx9
20 44
21 R x 10 45 T x 10
22 46
23 R x 11 47 T x 11
24 48
49 R x 12 73 T x 12
50 74
51 R x 13 75 T x 13
52 76
53 R x 14 77 T x 14
54 78
55 R x 15 79 T x 15
56 80
Maximum number of E1 16
links in each IMA group
Figure 8-35shows the block diagram for the working principle of the AND1ML1/AND1ML1A.
Figure 8-35 Block diagram for the working principle of the AND1ML1/AND1ML1A
Backplane
Serial
Management bus
management
bus
Management bus Control module CXP
In Transmit Direction
The AND1ML1/AND1ML1A first distributes the signals in Ethernet packets from the backplane
to different protocol processing chips according to the service types. The system-side processing
module decapsulates the concatenated services and buffers the services in queues. Then, this
module schedules the egress queues according to the service types, processes and converts the
services, and finally sends the services to the line-side processing module. The line-side
processing module performs coding, dejitter, pulse shaping, and line driving for the services,
and finally sends the services to E1 interfaces.
In Receive Direction
The line processing module performs impedance match, signal equalization, signal level
conversion, clock data recovery, dejitter, and decoding for the accessed E1 signals. Then, the
signals are sent into the system-side processing module, which frames the signals, encapsulates
the IMA, CES, and ML-PPP services in PWE3, and schedules PWs. Finally, this module sends
the signals in Ethernet packets to the backplane interface module.
Control Module
This module controls the reading and writing on the chip, resets the chip, and detects faults in
the chip. When used with the control board, this module controls the board.
Clock Module
This module provides various clock signals for the board to operate normally, detects clocks,
and selects the line recovery clock.
8.13.4 Specifications
The technical specifications of the AND1ML1/AND1ML1A include the interface
specifications, dimensions, weight, and power consumption.
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.×8.89 in.×7.63 in.)
NOTE
The mapping impedance of an interface on the AND3ML1A is 75 ohm, and the mapping impedance of an
interface on the AND3ML1B is 120 ohm. Except the difference of mapping impedance, the functions and
features of the AND3ML1A and AND3ML1B are the same.
Indicators
The following indicators are present on the front panel of the AND3ML1A/AND3ML1B:
l STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There is one Anea 96 interface on the front panel of the AND3ML1A/AND3ML1B. Table
8-63 lists the type and usage of the interfaces. 10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120-
Ohm 16 x E1 Cables list the cables corresponding to the interfaces.
Table 8-63 Type and usage of the interfaces on the front panel of the AND3ML1A/AND3ML1B
1 Rx0 25 Tx0
2 26
3 Rx1 27 Tx1
4 28
5 Rx2 29 Tx2
6 30
7 Rx3 31 Tx3
8 32
9 Rx4 33 Tx4
10 34
11 Rx5 35 Tx5
12 36
13 Rx6 37 Tx6
14 38
15 Rx7 39 Tx7
16 40
17 Rx8 41 Tx8
18 42
19 Rx9 43 Tx9
20 44
21 R x 10 45 T x 10
22 46
23 R x 11 47 T x 11
24 48
49 R x 12 73 T x 12
50 74
51 R x 13 75 T x 13
52 76
53 R x 14 77 T x 14
54 78
55 R x 15 79 T x 15
56 80
Maximum number of E1 16
links in each IMA group
-48V/-60V System
3.3V Power
Clock . . power supply
. .
supply
module . .
-48V/-60V
1V module System
power supply
System clocks
Line clocks CXP
CXP
Transmit Direction
The service signals from the control board are sent to the service processing module. The service
processing module performs PWE3 decapsulation and PW scheduling for the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols, performs
the E1 framing function, and sends the service signals to the service access module. The service
access module performs encoding and line drive for the signals and outputs the signals through
the backplane-side interfaces.
Receive Direction
The board accesses service signals through the backplane-side interfaces, and then the signals
are sent to the service access module. The service access module performs interference isolation,
lightning-proof, impedance matching, level conversion, signal balancing, decoding, and then
sends the processed signals to the service processing module. The service processing module
performs E1 framing, processes service signals based on the IMA/ATM, CES, and ML-PPP
protocols, implements PWE3 encapsulation and PW scheduling, and sends the signals to the
control board through the backplane-side interfaces.
Management Module
This module manages and controls each module on the board.
Clock Module
This module performs the following functions:
l When used with the control board, processes the recovered line clock.
l Provides the working clock for each module on the board.
Interface Specifications
Table 8-66 lists the specifications of the interfaces on the AND3ML1A/AND3ML1B.
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.×8.89 in.×7.63 in.)
NOTE
The mapping impedance of an interface on the AND2MD1A is 75 ohm, and the mapping impedance of an
interface on the AND2MD1B is 120 ohm. Except the difference of mapping impedance, the functions and
features of the AND2MD1A and AND2MD1B are the same.
Indicators
The following indicators are present on the front panel of the AND2MD1A/AND2MD1B:
l STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There are two Anea 96 interfaces on the front panel of the AND2MD1A/AND2MD1B. Table
8-67 lists the type and usage of the interfaces. 10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120-
Ohm 16 x E1 Cables list the cables corresponding to the interfaces.
Table 8-67 Type and usage of the interfaces on the front panel of the AND2MD1A/AND2MD1B
1 Rx0 25 Tx0
2 26
3 Rx1 27 Tx1
4 28
5 Rx2 29 Tx2
6 30
7 Rx3 31 Tx3
8 32
9 Rx4 33 Tx4
10 34
11 Rx5 35 Tx5
12 36
13 Rx6 37 Tx6
14 38
15 Rx7 39 Tx7
16 40
17 Rx8 41 Tx8
18 42
19 Rx9 43 Tx9
20 44
21 R x 10 45 T x 10
22 46
23 R x 11 47 T x 11
24 48
49 R x 12 73 T x 12
50 74
51 R x 13 75 T x 13
52 76
53 R x 14 77 T x 14
54 78
55 R x 15 79 T x 15
56 80
Transmit Direction
The service signals from the control board are sent to the service processing module. The service
processing module performs PWE3 decapsulation and PW scheduling for the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols, performs
the E1 framing function, and sends the service signals to the service access module. The service
access module performs encoding and line drive for the signals and outputs the signals through
the backplane-side interfaces.
Receive Direction
The board accesses service signals through the backplane-side interfaces, and then the signals
are sent to the service access module. The service access module performs interference isolation,
lightning-proof, impedance matching, level conversion, signal balancing, decoding, and then
sends the processed signals to the service processing module. The service processing module
performs E1 framing, processes service signals based on the IMA/ATM, CES, and ML-PPP
protocols, implements PWE3 encapsulation and PW scheduling, and sends the signals to the
control board through the backplane-side interfaces.
l In the receive direction, this module isolates common mode interference, protects circuits
against transient failures, matches the impedance in the receive direction with the internal
impedance, and performs level conversion, balancing, and decoding for the service signals.
Finally, this module sends the processed signals to the service processing module.
l In the transmit direction, this module receives the service signals from the service
processing module, encodes the signals, drives the line, and outputs the service signals
through the backplane-side interfaces.
l This module recovers the line clock.
l In the receive direction, this module receives the signals from the service access module
and performs E1 framing. This module also identifies protocol types of the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols (for
example, addition and deletion of IMA group members, VP/VC switching and
concatenation of ATM cells, vacant slot compression of CES services, and setup of ML-
PPP groups). Then, this module performs PWE3 encapsulation and PW scheduling, Finally,
this module converts the processed signals to high-rate signals, and then sends the signals
to the control board through the backplane-side interfaces.
l In the transmit direction, this module receives the high-rate signals from the control board
through the backplane-side interfaces and recovers low-rate service signals. Then, this
module performs PWE3 decapsulation, identifies different protocols and processes the
service signals, and completes E1 framing. Finally, this module sends the processed signals
to the service access module.
Management Module
This module manages and controls each module on the board.
Clock Module
This module performs the following functions:
l When used with the control board, processes the recovered line clock.
l Provides the working clock for each module on the board.
Interface Specifications
Table 8-70 lists the specifications of the interfaces on the .
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.×8.89 in.×7.63 in.)
Weight (kg): 0.49(1.08 lb)
Power consumption (W, room temperature): 12.1
Ambient temperature: –20 ºC to +65 ºC
Indicators
The following indicator is present on the front panel of the PIU.
PWR, green, which indicates the power supply status. When PWR is on and green, it indicates
that power is accessed.
Interfaces
The PIU accesses one power supply. Table 8-71 lists the types of the interfaces on the PIU and
their respective usage. For cable corresponding to the interfaces, see 10.1 Power Supply Cables
and Ground Cables.
Label
Operation warning label: indicates the following precautions , which should be taken for removal
or insertion of the PIU board.
NOTICE
Multiple power supplies are accessed for the equipment. When powering off the equipment,
make sure that these power supplies are disabled.
Before removing the PIU board, ensure that all power inputs are disconnected from the board.
Power access Each of the two PIU accesses one -48 V DC (or -60 V DC) power
supply for the equipment.
Power protection The PIU protects the power supply against overcurrent and short
circuit. In this way, the overcurrent is prevented from shocking
board and components on it.
Surge protection The PIU protects the equipment against lightning and reports an
alarm if the protection fails.
Power backup Two PIUs for a hot backup. One PIU is capable of supplying power
for the entire chassis.
Figure 8-42 shows the block diagram for the working principle of the PIU.
Figure 8-42 Block diagram for the working principle of the PIU
Backplane
-48 V/-60 V Communication unit
module Each board
Board in-position
signals
Slot ID module CXP
Slot ID signals
Board in-position module CXP
Slot ID Module
This module reports the slot ID information to the control board.
8.16.4 Specifications
The technical specifications of the PIU cover the board dimensions, weight, power consumption,
and input voltage.
Indicators
The following indicators are present on the front panel of the FAN:
The CRIT, MAJ, and MIN indicators on the front panel of the FAN indicate the current alarm
severity of the subrack.
Handle
The handle is used for pushing the FAN into or pulling the FAN out of the chassis during board
replacement.
Label
The following labels are present on the front panel of the FAN:
Figure 8-44 shows the block diagram for the working principle of the FAN.
Figure 8-44 Block diagram for the working principle of the AND1FAN
Fans x 6
12 V
12 V
12 V
CXP
Start-delay Combiner
Filter module
CXP
12 V Combiner/
12 V
soft-start module
12 V power shut signals
Communication unit
module Inter-board communication bus
CXP
Start-delay/Combiner Module
This module provides start delay to the combined two 12 V power supplies and protecting fans
against overcurrent.
Filter Module
This module filters the LC low frequency to enhance the EMC feature of the system.
8.17.4 Specifications
The technical specifications of the FAN cover the board dimensions, weight, power
consumption, and input voltage.
Table 8-74 lists the technical specifications of the FAN.
Appearance
Figure 8-45 shows the appearance of a filler panel.
Valid Slots
The filler panel of a control board can be housed in slot 7 or 8 of a chassis and the filler panel
of an interface board can be housed in any of slots 1-6 of a chassis. Table 8-75 provides the
dimensions of the filler panel for a control board and dimensions of the filler panel for an interface
board.
Type Dimensions (H x W x D)
l Performs electromagnetic shielding and ensures that the chassis meets the requirement of
electromagnetic radiation.
l Prevents foreign substances from getting into the chassis.
l Prevents internal voltage from being exposed.
l Ensures proper ventilation of cooling current inside the chassis.
The ATN device does not provide optical interfaces, whereas the panel provides interfaces for
installing optical modules. The optical modules receive and transmit optical signals and convert
electrical and optical signals. The interfaces for installing optical modules can also be used for
installing electrical modules to transmit electrical signals.
9.1 Overview
Optical and electrical modules for ATN devices are hot swappable. Optical modules transmit
services using optical signals over fibers and electrical modules transmit services using electrical
signals over Ethernet cables.
9.1 Overview
Optical and electrical modules for ATN devices are hot swappable. Optical modules transmit
services using optical signals over fibers and electrical modules transmit services using electrical
signals over Ethernet cables.
Classification
Optical modules for ATN devices can be classified as follows:
Electrical modules for ATN devices are all SFP modules, which are used to support FE or GE
services.
Appearance
Optical and electrical modules have different appearance because they use different packaging
and cable interfaces.
SFP and eSFP optical modules have the same appearance. Currently eSFP optical modules are
used on most of ATN devices. Figure 9-1 shows the eSFP optical module appearance.
Single-fiber Two-fiber
bidirectional bidirectional
Application
An optical or electrical module can be used at an optical interface if its packaging and service
rate can match the interface.
Packaging:
Service rate:
In most cases, an optical or electrical module can be used at an optical interface if its packaging and service
rate can match the interface. Certain boards may not support electrical modules. For information about the
modules that a board supports, see the Functions and Features topic for the board.
Item Specification
Item Specification
Item Specification
100BASE-FX 100BASE-FX
STM-1 STM-1
(15 km) (10 km)
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 9-2, 34060363 and
34060364 are used together.
Item Specification
Item Specification
Table 9-4 Technical specifications of the FE/GE optical interface (single-fiber bidirectional)
Item Specification
1000BASE-BX40-U 1000BASE-BX40-D
(40 km) (40 km)
Item Specification
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 9-4, 34060638 and
34060639 are used together.
Item Specification
Working 770 to 860 1270 to 1360 1260 to 1360 1500 to 1580 For details,
wavelength see
range (nm) wavelength
allocation of
1000BASE-
CWDM
optical
interfaces
and related
optical
module code.
Item Specification
Minimum 0 -3 -3 -3 -9
overload
(dBm)
Minimum 9 9 9 9 8.2
extinction
ratio (dB)
Table 9-6 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical module code
Item Specification
Item Specification
Working Tx: 1260 to Tx: 1480 to Tx: 1260 to Tx: 1480 to Tx: 1260 to Tx: 1480 to
wavelength 1360 1500 1360 1500 1360 1500
range (nm) Rx: 1480 to Rx: 1260 to Rx: 1480 to Rx: 1260 to Rx: 1480 to Rx: 1260 to
1500 1360 1500 1360 1500 1360
Mean -9 to -3 -9 to -3 -3 to 5 -3 to 5 -2 to 4 -2 to 4
launched
optical power
(dBm)
Minimum -3 -3 -3 -3 -3 -3
overload
(dBm)
Minimum 6 6 6 6 9 9
extinction
ratio (dB)
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 9-7, 34060470 and
34060475 are used together, 34060595 and 34060596 are used together, and 34060539 and 34060540 are
used together.
Item Specification
Item Specification
Minimum overload -3 -3 -3
(dBm)
Minimum extinction 9 9 9
ratio (dB)
Item Specification
1000BASE-BX10-U 1000BASE-BX10-D
(10 km) (10 km)
Item Specification
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 9-9, 34060644 and
34060676 are used together.
Item Specification
Mean -6 to -1 -1 to 2 0 to 4 0 to 4 -1 to 2 -1 to 3
launched
optical
power
(dBm)
Item Specification
Minimum 0.5 -1 -7 -9 0 -9
overload
(dBm)
Table 9-11 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical
module code
Table 9-12 Wavelength allocation of 1000BASE-DWDM optical interfaces and related optical
module code
Item Specification
Item Specification
Item Specification
RJ-45 electrical interface Compliance with IEEE 802.3 Compliance with IEEE 802.3
specification
10 Cables
This chapter describes various optical fibers and cables used on the equipment.
Power cables need to be produced on site. The power cables are made of DC connectors, single
cord end terminals, and wires. Figure 10-1 shows the appearance of the power cable intended
for a 1 U chassis. Table 10-1 provides the technical specifications of the power cable for a 1 U
chassis. Figure 10-2 shows the appearance of the power cable intended for a 2 U chassis. Table
10-2 provides the technical specifications of the power cable for a 2 U chassis.
screwdriver
-48V cable
(blue)
0 V cable
(black)
2 U DC connector
Table 10-1 Technical specifications of the power cable intended for a 1 U chassis
2.5 mm2 Electronic/Electric wire, 450 V/ Bare crimp terminal, single cord end
(0.004 in.2) 750V, H07Z, K, 2.5 mm2(0.004 terminal, 2.5 mm2(0.004 in.2), 12.5 A, tin
power cable in.2), blue/black green, fire plating, 8 mm(0.31 in.) deep, blue
and terminal resistant cable with low smoke
and no halogen
Table 10-2 Technical specifications of the power cable intended for a 2 U chassis
4 mm2 (0.006 Electronic/Electric wire, 450 V/ Bare crimp terminal, single cord end
in.2) power 750V, H07Z, K, 4 mm2(0.006 terminal, 4 mm2(0.006 in.2), 20 A, tin
cable and in.2), blue/black green, fire plating, 10 mm(0.39 in.) deep, gray
terminal resistant cable with low smoke
and no halogen
Appearance
Figure 10-3 shows an AC input power cable of an ATN device.
Technical Specifications
Cable Item Description
Fireproof class CM
Note 1: A power cable is named in the format of "Connector 1 Type-Cable Material Type-
Connector 2 Type".
Note 2: The specifications of power cables for inputting the mains vary in different countries
or regions. In this document, the AC power cables complying with international standards are
considered as examples.
PGND cables are made of wires and OT terminals. Figure 10-4 shows the appearance of a PGND
cable. The technical specifications of the PGND cable are listed in Table 10-3.
Electronic/Electric wire, 450 V/750 V, H07Z, General terminal, OT, 6 mm2(0.009 in.2), tin
K, 4 mm2(0.006 in.2), yellow green, fire plating, pre-insulated ring terminal,
resistant cable with low smoke and no 12-10AWG, yellow
halogen
Ethernet cables are classified into straight-through cables and crossover cables, and are used for
communication between the equipment and the NMS computer. The NM interface on the
equipment is adaptive to a straight-through cable or a crossover cable.
Figure 10-5 shows an RJ45 connector used at the end of the Ethernet cable.
When the cable is connected to the ETH/OAM interface, the pin assignment of the RJ45
connector is as listed in Table 10-4.
Item Specification
Cable type Twisted-Pair Cable, 100 ohm,Category 5e UTP, 0.51 mm(0.0200 in.),
24AWG, 8 Cores, PANTONE 430U
At one end of the alarm input/output cable, the RJ-45 connector is used to connect to the ALMI/
O interface on the equipment; at the other end, a connector (made as required on site) is used to
connect to the external equipment or the equipment that monitors all the alarms.
Structure
Figure 10-6 shows the structure of the alarm input/output cable.
8 W
X1
Pin Assignment
Table 10-6 lists the pin assignment of the alarm input/output alarm cable connector.
Technical Specifications
Table 10-7 lists the technical specifications of the alarm input/output cable.
Item Specification
Cable type Twisted-Pair Cable, 100 ohm, Category 5e, 0.52 mm, 24AWG, 8 Cores, 4
Pairs, PANTONE 430U
The external clock cables can be connected to the CLK, and TOD interfaces on an ATN device.
Structure
Figure 10-7 shows the structure of the RJ45 connector used on the external clock cable.
Pin Assignment
The external clock cables must be made on the equipment installation site. When the CLK
interfaces are used as external clock interfaces, the pin assignment of the RJ45 connector is as
listed in Table 10-8; when the TOD interfaces are used as external time interfaces, the pin
assignment of the RJ45 connector is as listed in Table 10-9.
Table 10-8 Pin assignment of the RJ45 connector (external clock mode)
6 Green Unspecified
8 Brown Unspecified
Table 10-9 Pin assignment of the RJ45 connector (external time mode)
Technical Specifications
Table 10-10 and Table 10-11 lists the technical specifications of the external clock cable.
Item Specification
Number of Eight
cores
Item Specification
Number of Eight
cores
Structure
Figure 10-8 shows the structure of the 120-to-75-ohm clock bridging cables.
8 A
W5 Heat-shrink tube W2
1
W3
X1
W4
30 m
Pin Assignment
Table 10-12 lists the pin assignment of the clock bridging cable connector.
X1.2 White
X1.5 White
X1.6 White
X1.8 Brown
Technical Specifications
Table 10-13 lists the technical specifications of the clock bridging cables.
Item Specification
120-ohm cable Twisted-Pair Cable, 120 ohm, SEYVP, 0.4 mm(0.02 in.), 26AWG, 4Pairs,
type Pantone 430U
Ethernet cables are also referred to as network cables and can be classified into straight-through
cables and crossover cables according to the connection sequence of the copper cores in the
cables.
A network cable with a shield layer is a shielded cable and that without a shield layer is a non-
shielded cable.
The Ethernet service interfaces on the equipment are adaptive to the straight-through cables and
crossover cables. Hence, you can connect either type of the network cables to the Ethernet service
interfaces as required.
Structure
Figure 10-9 shows the appearance of the shield layer.
RJ45 connectors are used at both ends of a network cable. Figure 10-11 shows an RJ45 connector
and Figure 10-12 shows the structure of the network cable.
W 8
8
1 1
X1 X2
NOTE
For a crossover cable, pins 1 and 2 of the RJ45 connector at one end must be cross-connected to pins 3 and
6 of the RJ45 connector at the other end respectively.
Pin Assignment
Table 10-14 and Table 10-15 list the pin assignment of the network cable connector.
straight-through Cable
Technical Specifications
Table 10-16 lists the technical specifications of the shielded cable.
Item Specification
Number of Eight
cores
Item Specification
Number of Eight
cores
Use the DB44 connector at one end to connect the cable to the 75-ohm 8 x E1 electrical interface
board. Use a connector to connect the other end to the digital distribution frame (DDF). The
connector should be made according to the on-site requirements.
Structure
Figure 10-13 shows the structure of the 75-ohm 8 x E1 cable.
Pos.1
A
Main label
Pin Assignment
Table 10-18 lists the pin assignment of the 75-ohm 8 x E1 cable connector.
38 Ring 1 R0 34 Ring 9 R4
23 Tip 19 Tip
37 Ring 3 R1 33 Ring 11 R5
22 Tip 18 Tip
36 Ring 5 R2 32 Ring 13 R6
21 Tip 17 Tip
35 Ring 7 R3 31 Ring 15 R7
20 Tip 16 Tip
15 Ring 2 T0 11 Ring 10 T4
30 Tip 26 Tip
14 Ring 4 T1 10 Ring 12 T5
29 Tip 25 Tip
13 Ring 6 T2 9 Ring 14 T6
28 Tip 24 Tip
12 Ring 8 T3 8 Ring 16 T7
27 Tip 7 Tip
Technical Specifications
Item Specification
Cable type Coaxial Cable, SYFVZP-LC 75-1-1*16, 75–ohm, 13.10 mm, 1.2
mm, 0.254 mm, Pantone Warm Gray 1U
Fireproof class CM
Number of cores 16
Use the DB44 connector at one end to connect the cable to the 120-ohm E1 electrical interface
board. Use a connector to connect the other end to the DDF. The connector should be made
according to the on-site requirements.
Structure
Figure 10-14 shows the appearance of the 120-ohm 8 x E1 cable and Figure 10-15 shows the
structure of the cable.
Pos.44
A
W1
X
W2
Pin assignment
Table 10-20 lists the pin assignment of the 120-ohm 8 x E1 cable connector.
Core Core
15 Blue R0 38 Blue T0
30 White 23 White
14 Orange R1 37 Orange T1
29 White 22 White
13 Green R2 36 Green T2
28 White 21 White
12 Brown R3 35 Brown T3
27 White 20 White
11 Grey R4 34 Grey T4
26 White 19 White
10 Blue R5 33 Blue T5
25 Red 18 Red
9 Orange R6 32 Orange T6
24 Red 17 Red
8 Green R7 31 Green T7
7 Red 16 Red
Shell External braid shield layer Shell External braid shield layer
Technical Specifications
Item Specification
Item Specification
Fireproof class CM
At one end of the 75-ohm 16 x E1 cable, the Anea96 connector is used to connect the 75-ohm
E1 electrical interface on the board; the other end is connected to the digital distribution frame
(DDF). Make the connector as required on site.
NOTE
The 75-ohm 16 x E1 cable of other types of ATN equipment cannot be used for the ATN 910I. Otherwise,
the device cannot correctly identify the impedance.
Structure
Figure 10-16 shows the appearance of the 75-ohm 16 x E1 cable and Figure 10-17 shows the
structure of the cable.
Main label
1
W
X1 A
View A Pos.96
Cable Connector, Anea, 96PIN,
Female Connector
Pos .1
Pin Assignment
Table 10-22 lists the pin assignment of the 75-ohm 16 x E1 cable connector.
1 Tip 1 R0 25 Tip 2 T0
2 Ring 26 Ring
3 Tip 3 R1 27 Tip 4 T1
4 Ring 28 Ring
5 Tip 5 R2 29 Tip 6 T2
6 Ring 30 Ring
7 Tip 7 R3 31 Tip 8 T3
8 Ring 32 Ring
9 Tip 9 R4 33 Tip 10 T4
10 Ring 34 Ring
11 Tip 11 R5 35 Tip 12 T5
12 Ring 36 Ring
13 Tip 13 R6 37 Tip 14 T6
14 Ring 38 Ring
15 Tip 15 R7 39 Tip 16 T7
16 Ring 40 Ring
17 Tip 17 R8 41 Tip 18 T8
18 Ring 42 Ring
19 Tip 19 R9 43 Tip 20 T9
20 Ring 44 Ring
22 Ring 46 Ring
24 Ring 48 Ring
50 Ring 74 Ring
52 Ring 76 Ring
54 Ring 78 Ring
56 Ring 80 Ring
Technical Specifications
Item Specification
Item Specification
Diameter of the shield 12.4 mm(0.49 in.) - 1.6 mm(0.06 in.) - 0.26 mm(0.01 in.)
layer - diameter of the
internal insulation
layer - diameter of the
internal conductor
Number of cores 32
Available length 5 m, 10 m, 15 m, 20 m, 25 m, 30 m, 35 m, 40 m, 45 m, 50 m
16.40 ft.,32.80 ft.,49.21 ft.,65.62 ft.,82.02 ft.,98.42 ft.,114.83 ft.,
131.23 ft.147.64 ft.,164.04 ft.
At one end of the a 120-ohm 16 x E1 cable, the Anea96 connector is used to connect the 120-
ohm E1 electrical interface on the board; the other end is connected to the DDF. Make the
connector as required on site.
Structure
Figure 10-18 shows the appearance of the 120-ohm 16 x E1 cable and Figure 10-19 shows the
structure of the cable.
Main label
1
W
X1 A
View A Pos.96
Cable Connector, Anea, 96PIN,
Female Connector
Pos .1
Pin assignment
Table 10-24 lists the pin assignment of the 120-ohm 16 x E1 cable connector.
2 Blue 26 Orange
3 White R1 27 White T1
4 Green 28 Brown
5 White R2 29 Red T2
6 Grey 30 Blue
7 Red R3 31 Red T3
8 Orange 32 Green
9 Red R4 33 Red T4
10 Brown 34 Grey
11 Black R5 35 Black T5
12 Blue 36 Orange
13 Black R6 37 Black T6
14 Green 38 Brown
15 Black R7 39 Yellow T7
16 Grey 40 Blue
18 Blue 42 Orange
19 White R9 43 White T9
20 Green 44 Brown
22 Grey 46 Blue
24 Orange 48 Green
50 Brown 74 Grey
52 Blue 76 Orange
54 Green 78 Brown
56 Grey 80 Blue
Technical Specifications
Item Specification
Cable Trunk Cable, 120 ohm, 16E1, 0.4 mm(0.02 in.), Anea 96F,
120CC32P0.4P430U(S), +45deg
Item Specification
Cable type Twisted-Pair Cable, 120 ohm, SEYVP, 0.4 mm(0.02 in.), 26AWG,
32Pairs, Pantone 430U
The connectors at both ends of the cable applicable to the AND1SHD4, and AND1SHD4I are
RJ-11 connectors.
The connectors at both ends of the cable applicable to the AND1AVD8A are RJ-45 connectors.
Structure
Figure 10-20 shows the structure of the telephone wire used as an xDSL cable.
6 W 6
1 1
X1 X2
15 m
1 Main label
8 W 8
1 1
X1 X2
15 m
Pin Assignment
Table 10-26 lists the pin assignment of the ADSL cable connector and Table 10-27 lists the pin
assignment of the G.SHDSL cable connector.
Technical Specifications
Table 10-28 lists the technical specifications of the xDSL cable (telephone wire).
Item Specification
RJ-11 Connector X1/ Network Interface Connector, 6-Bit 4PIN, Crystal Model
X2 Connector, Matching 26-28AWG
RJ-45 Connector X1/ Network Interface Connector, 8-Bit 8PIN, Shielded, Crystal Model
X2 Connector
Number of cores 2
Indoor optical fibers include single-mode optical fibers and multi-mode optical fibers. The
appearances of a single-mode optical fiber and a multi-mode optical fiber are the same, but their
colors are different. The single-mode optical fiber is yellow, and the multi-mode optical fiber is
orange.
LC/PC connectors are used at both ends of the optical fiber shown in Figure 10-21. For an optical
fiber that connects an optical port on an ATN device to an optical port of another type on the
peer device, an LC/PC connector is used at one end and a connector of another type is used at
the other end. Table 10-29 lists the common optical connectors.
11 Equipment Support
ATN devices can work with various equipment to implement various applications.
11.3 Heater
The ATN 910I-TC DC operates at a temperature that ranges from -40ºC to 65ºC. When the
temperature falls below -20ºC, the heater starts working.
The APM30H is an outdoor cabinet with heat exchangers. It supports AC power supply and DC
power distribution, and can provide a 7 U installation space for user devices. Figure 11-1 and
Figure 11-2 show the appearance and internal structure of an APM30H outdoor cabinet.
7U
Table 11-1 lists the technical specifications of the APM30H outdoor cabinet.
Item Specifications
A small-sized IMB network cabinet has a compact structure and occupies only a little installation
space. In addition, it can be installed on an uneven wall with an undulation smaller than 10 mm,
so it has low requirements on site selection.
The IMB network cabinet provides a 3 U installation space for user devices. The internal 2 U
installation space is for an ATN device and the external 1 U installation space is for a power
supply device. Figure 11-3 and Figure 11-4 show the appearance and structure of an IMB
network cabinet.
Table 11-2 lists the technical specifications of the IMB network cabinet.
Item Specifications
Item Specifications
A 19-inch open rack provides a 45 U installation space for user devices. Figure 11-5 shows the
appearance of a 19-inch open rack.
Table 11-3 lists the technical specifications of the 19-inch open rack.
Item Specifications
The N63E-22 cabinet has a height of 2.2 m. Figure 11-6 shows the appearance of a N63E-22
cabinet.
Item Specifications
Available space 83 SU
DC Scenario
The rated voltage and current of ATN 910 are -48 V/-60 V DC and 4 A, respectively.
The rated voltage and current of an ATN 910I DC device are -48 V/-60 V DC and 1.5 A,
respectively.
NOTE
An ATN 910I AC device using AC power supplies cannot be used in the DC scenario.
The rated voltage and current of ATN 910B are -48 V/-60 V DC and 4 A, respectively.
The rated voltage and current of ATN 950B are -48 V/-60 V DC and 8 A, respectively.
In DC scenarios, an ATN device can be directly used under the rated voltage of -48 V/-60 V DC
or used with a 27S48D power system under the rated voltage of +24 V DC. Figure 11-7 and
Figure 11-8 show the power distribution for an ATN device.
Figure 11-7 Power distribution for an ATN device under the voltage of -48 V/-60 V DC
-48 V DC/-60 V DC
ATN
-48 V DC/-60 V DC
NOTE
For the capacity of circuit breakers or fuses on an ATN device, refer to the Quick Installation Guide of the
ATN device.
Figure 11-8 Power distribution for an ATN device under the voltage of +24 V DC
-48 V DC
+24 V DC
27S48D -48 V DC ATN
+24 V DC
AC Scenario
The input AC voltage of An ATN 910I AC device is from 100 V to 240 V AC and the rated
current is 0.6 A.An ATN 910I AC device can be directly used in AC scenarios. Figure 11-9
shows the power distribution for an ATN 910I AC device.
220 V AC ATN
When using AC power supplies, the ATN DC device can be used with an EPS30-4815AF power
system. Figure 11-10 shows the power distribution for an ATN DC device.
-48V DC
Lead-acid
battery
Appearance
Figure 11-11 and Table 11-5 show the appearance and structure of an EPS30-4815AF,
respectively.
NOTICE
Interfaces on the monitoring module are reserved temporarily. Do not use these interfaces.
Otherwise, the power system may be reset or damaged.
Component Description
Monitoring module Detects the status of the power system and storage batteries. Two
RS232/RS485 communication interfaces and one DB50
interface are reserved on the monitoring module.
AC/DC power distribution Provides AC power input interface, load interfaces, storage
frame battery interface, and replaceable fuses.
Indicators
Indicators for the rectifier and monitoring modules are present on the front panel of the
EPS30-4815AF. Table 11-6 and Table 11-7 list the indications of indicators for the rectifier
and monitoring modules respectively.
Note 1: When a severe fault occurs, the indicator (red) is on and the indicators (yellow and green) are off. The
indicators (yellow and green) are on only when the indicator (red) is off.
Note 2: The indicator (yellow) is always on when communication on a rectifier module is interrupted, a rectifier
module is overheated or endures overcurrent or undercurrent, or a rectifier module is disabled.
Interfaces
Table 11-8 lists types and usage of the interfaces on the front panel of the EPS30-4815AF.
Table 11-9 Relationships of the load output interfaces, interface for connecting to the storage
batteries, and fuses
DIP Switch
There is a DIP switch on the monitoring module of the EPS30-4815AF. Figure 11-12 shows
the default setting and location of the DIP switch.
NOTICE
Do not change the default setting of the DIP switch. Otherwise, the EPS30-4815AF is affected.
The DIP switch indicates eight bits in binary format (on: 1; off: 0). The default value of the eight
bits is 00000100. The functions of the eight bits are as follows:
l The first five bits indicate the local and remote power addresses. Bit 5 is the highest bit and
bit 1 is the lowest bit.
l Bit 6 sets the baud rate of communication between the monitoring module and equipment.
When bit 6 is 1, the baud rate is 9600 bit/s; when bit 6 is 0, the baud rate is 19200 bit/s.
l Bits 7 and 8 are reserved.
Technical Specifications
Table 11-10 lists the technical specifications of the EPS30-4815AF.
Item Specification
Maximum input 10 A
current
Frequency 50/60 Hz
Capacity 40 Ah
Number of 4
batteries
Appearance
Figure 11-13 shows the appearance of a 27S48D power system.
Functions
The 27S48D power system accepts power in the range of 19 V to 30 V, and outputs -53.5 V
rated voltage and 7 A rated current.
In terms of electrical performance and structure, the 27S48D power system is divided into two
independent -53.5 V/5.6 A power modules. They are separated using an output diode and
installed in the same cabinet. Their currents are combined into a 7 A one through power
distribution, and the 7 A current is supplied to equipment. The 27S48D power system provides
functions such as short-circuit protection, overcurrent protection, output overvoltage protection,
and overheat protection.
Indicator
Table 11-11 lists the meaning of each 27S48D power indicator status.
Interface
Table 11-12 lists the types and functions of 27S48D power interfaces.
Technical Specifications
Table 11-13 lists the technical specifications of the 27S48D power system.
Item Value
Maximum input 20 A
current
Output current 7A
Weight < 7 kg
Appearance
Figure 11-14 shows the appearance of the HW-100-48AC14D-1 power system.
Functions
The HW-100-48AC14D-1 power system supports AC power ranging from 90 V to 264 V, and
outputs -48 V DC power in natural heat dissipation mode. The output power is 100 W. This
power system supports protection against output overcurrent, output undervoltage, output short
circuit, and overtemperature.
Technical Specifications
Table 11-14 provides the technical specifications of the HW-100-48AC14D-1 power system.
Item Specifications
Maximum input 2A
current
Dimensions (H x W x D) 40 mm x 171 mm x 72 mm
Weight < 1 kg
Appearance
Figure 11-15 shows the appearance of a lead-acid battery.
NOTE
The appearance, dimensions, and weight of lead-acid batteries are provided only for reference and those
of the delivered batteries prevail.
Technical Specifications
Table 11-15 shows the technical specifications of the lead-acid battery.
Item Specifications
Weight ≤ 15 kg
11.3 Heater
The ATN 910I-TC DC operates at a temperature that ranges from -40ºC to 65ºC. When the
temperature falls below -20ºC, the heater starts working.
The dimensions of the heater (without mounting ears) are 420 mm (width) x 250 mm (depth) x
41.6 mm (height). Figure 11-16 shows the heater.
l When the temperature in the cabinet is lower than +1ºC (with ±6ºC offset considered), the
heater starts working. When the temperature in the cabinet is higher than +15ºC (with ±3ºC
offset considered), the heater stops working.
l The rated heating power of the heater is 330 W.
12 Quick Reference
12.1 Indicators
This topic describes the names of various indicators and their indications.
12.1 Indicators
This topic describes the names of various indicators and their indications.
Index of Indicators
For boards and their indicators, see Boards and Their Indicators.
For combination of indicators in different start statuses on the system control board, see
Description of the Start Status Indicator Combination on the System Control Board.
ANC2CXPI/ANC2CXPL STAT, PROG, SYNC, SRV, CRIT, MAJ, MIN, L/A0, L/A1,
LINK, and ACT
AND1EG4T STAT
AND1MO1C STAT
AND1AVD8A/ STAT
AND1AVD8B
AND1ML1/ML1A STAT
AND2ML1A/ML1B STAT
AND1MD1A/MD1B STAT
ANC1FAN FAN
AND1EM4T STAT
AND1EM8T STAT
AND1EX1 L/A
AND1ML1/ML1A STAT
AND3ML1A/ML1B STAT
AND2MD1A/MD1B STAT
AND1PIU PWR
On for 100 ms and off for Loading of the board software is in process.
100 ms alternately (green)
On for 300 ms and off for The BIOS is guiding the upper-layer software.
300 ms alternately (green)
On (green) l The clock works in free-run mode and the system clock
priority list is not set. By default, the system clock priority
list contains only internal sources.
l The clock works in locked mode and is tracing a clock source
other than the internal sources in the priority list.
l The system clock is working in time synchronization mode,
and the PTP time and system clock are in the tracing state.
Status Indication
On (red) l The system clock priority list is set. All the clock sources,
however, are lost except for the internal clock sources. The
clock works in holdover mode or free-run mode.
l The system clock is working in time synchronization mode,
but no synchronization source is available. The system clock
and PTP time are working in holdover or free-run mode.
On for 100 ms and off for 100 ms alternately The data of the equipment is backed up in
(green) batch.
Status Indication
Status Indication
Description of the Start Status Indicator Combination on the System Control Board
Table 12-1 describes the status and meaning of the start status indicator combination of the ATN
910 control board from the time when it is powered on to the time when it is working
properly.Table 12-2 describes the status and meaning of the start status indicator combination
of the ATN 950B control board from the time when it is powered on to the time when it is
working properly.
SN Status Indicator
STAT PROG
3 The BIOS is started, and guides and loads Off Blinking (green)
the board software.
SN Status Indicator
STAT PROG
SN Status Indicator
SN Status Indicator
NOTE
The STAT and ALM indicators on the ATN 910I and ATN 910B provide the system status indication as
well as the DCN availability indication. By default, after the ATN is powered on and automatically goes
online in DCN mode, The STAT and ALM indicators are both blinking green for 3s, indicating that the
ATN has gone online. Then the STAT and ALM indicators restore the system status indication, and the
status indication lasts for 3s. After the DCN availability indication and status indication are alternately
displayed for 10 minutes, the STAT and ALM indicators no longer provide the DCN availability indication
and only provide the status indication.
Table 12-3 provides the weight and dimensions of the boards for ATN 910.
Table 12-4 provides weight and dimensions of the boards for ATN 950B.
DC 4GE(O)+4GE/FE(O)+4GE/FE
(E)+16E1
NOTE
ATN 910I boards are not swappable. Table 12-5 provides the weight and dimensions of an integrated ATN
910I chassis.
NOTE
ATN 910B boards are not swappable. Table 12-6 provides the weight and dimensions of an integrated
ATN 910B chassis.
Table 12-7 provides the power consumption of each board on ATN 910.
ANC2CXPI 28.0 W
ANC2CXPL 29.5 W
AND1EF8T 9.0 W
AND1EF8F 12.9 W
AND1EG2 6.1 W
AND1EG4F 13.2 W
AND1ML1/AND1ML1A 13.1 W
AND1EG4T 10.0 W
AND2ML1A/AND2ML1B 9.5 W
AND1MD1A/AND1MD1B 12.1 W
AND1MO1C 10.6 W
AND1AVD8A/AND1AVD8B 19.6 W
AND1SHD4 7.4 W
AND1SHD4I 7.5 W
TNC1PIU 0.5 W
Table 12-8 provides the power consumption of each board on ATN 950B.
AND1CXPA/AND1CXPB 27.3 W
AND2CXPB/AND2CXPE 28.5 W
AND1EM4T 10.4 W
AND1EM8T 21.1 W
AND1EX1 13.1 W
AND1EM4F 12.0 W
AND1EM8F 18.9 W
AND2CQ1B/AND2PQ1 11.50 W
AND1ML1/AND1ML1A 13.1 W
AND3ML1A/AND3ML1B 9.5 W
AND2MD1A/AND2MD1B 12.1 W
TND1PIU 0.5 W
DC 4GE(O)+4GE/FE(O)+4GE/FE(E)+16E1 32.5 W
NOTE
ATN 910I boards are not swappable. Table 12-9 provides the power consumption of an integrated ATN
910I chassis.
NOTE
ATN 910B boards are not swappable. Table 12-10 provides the power consumption of an integrated ATN
910B chassis.
NOTE
An ATN device does not directly provide optical interfaces. Instead, it provides optical modules, which
support optical interfaces. Therefore, the optical interface specifications actually refer to the specifications
of interfaces on optical modules on an ATN device.
Item Specification
Item Specification
Item Specification
100BASE-FX 100BASE-FX
STM-1 STM-1
(15 km) (10 km)
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-12, 34060363 and
34060364 are used together.
Item Specification
Item Specification
Item Specification
Item Specification
Item Specification
100BASE-FX 100BASE-FX
STM-1 STM-1
(15 km) (10 km)
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-15, 34060363 and
34060364 are used together.
Item Specification
Table 12-17 Technical specifications of the FE/GE optical interface (single-fiber bidirectional)
Item Specification
1000BASE-BX40-U 1000BASE-BX40-D
(40 km) (40 km)
Item Specification
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-17, 34060638 and
34060639 are used together.
Item Specification
Working 770 to 860 1270 to 1360 1260 to 1360 1500 to 1580 For details,
wavelength see
range (nm) wavelength
allocation of
1000BASE-
CWDM
optical
interfaces
and related
optical
module code.
Item Specification
Minimum 0 -3 -3 -3 -9
overload
(dBm)
Minimum 9 9 9 9 8.2
extinction
ratio (dB)
Table 12-19 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical module code
Item Specification
Item Specification
Working Tx: 1260 to Tx: 1480 to Tx: 1260 to Tx: 1480 to Tx: 1260 to Tx: 1480 to
wavelength 1360 1500 1360 1500 1360 1500
range (nm) Rx: 1480 to Rx: 1260 to Rx: 1480 to Rx: 1260 to Rx: 1480 to Rx: 1260 to
1500 1360 1500 1360 1500 1360
Mean -9 to -3 -9 to -3 -3 to 5 -3 to 5 -2 to 4 -2 to 4
launched
optical power
(dBm)
Minimum -3 -3 -3 -3 -3 -3
overload
(dBm)
Minimum 6 6 6 6 9 9
extinction
ratio (dB)
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-20, 34060470 and
34060475 are used together, 34060595 and 34060596 are used together, and 34060539 and 34060540 are
used together.
Item Specification
Minimum overload -3 -3 -3
(dBm)
Minimum extinction 9 9 9
ratio (dB)
Item Specification
1000BASE-BX10-U 1000BASE-BX10-D
(10 km) (10 km)
Item Specification
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-22, 34060644 and
34060676 are used together.
Item Specification
Item Specification
Mean -6 to -1 -1 to 2 0 to 4 0 to 4 -1 to 2 -1 to 3
launched
optical
power
(dBm)
Minimum 0.5 -1 -7 -9 0 -9
overload
(dBm)
Table 12-24 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical
module code
Table 12-25 Wavelength allocation of 1000BASE-DWDM optical interfaces and related optical
module code
Table 12-26 and Table 12-27 list specifications of GE and FE electrical interfaces, respectively.
Item Specifications
Item Specifications
Item Specification
Item Specification
Code B8ZS
AC Alternating Current
CC Continuity Check
DC Direct Current
FE Fast Ethernet
GE Gigabit Ethernet
GND Ground
IP Internet Protocol
PW Pseudo Wire