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Evaluation Board For

AD768x/AD769x/AD794x/AD798x
Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin
FEATURES
Versatile analog signal conditioning circuitry AD768x/AD769x/AD794x/AD798x is available at
On-board reference, crystal oscillator and buffers www.analog.com and should be consulted when utilizing this
16-bit Parallel Buffered Outputs evaluation board.
Ideal for DSP and data acquisition card interfaces
The evaluation board is ideal for use with either Analog Devices
Analog and digital prototyping area for breadbording the
target system EVAL-CONTROL BRD2/BRD3 (EVAL-CONTROL BRDx),
Stand-alone operation or Eval control board compatibility DSP based controller board, to run the Analog devices
PC software for control and data analysis evaluation software and to develop a specific application using
LabVIEW1 driver to develop custom application LabVIEW, or as a stand-alone evaluation board.

The EVAL-CONTROL BRDx is sold separately from the


GENERAL DESCRIPTION evaluation board, is required to run the evaluation software, is
not required in stand alone mode and can be reused with many
The EVAL-AD76XXCB 8/10-Pin is an evaluation board for the Analog Devices ADCs.
AD768x/AD769x/AD794x/AD798x 8 and 10-pin PulSAR high
resolution ADCs (see the Ordering Guide at the end of this
document for a product list).

The evaluation board is designed to demonstrate the ADC's 1


Labview is a trademark of National Instruments.
performance and to provide an easy to understand interface for
a variety of system applications. A full description of the

Figure 1.

Rev. Pr G
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com
registered trademarks are the property of their respective owners. Fax: 781.326.8703 © 2007 Analog Devices, Inc. All rights reserved.
EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data

TABLE OF CONTENTS
Detailed Description .................................................................... 3 Use as a Standalone Evaluation Board........................................4

Using the EVAL-AD768x/AD769x/AD794xCB Software ...... 3 Ordering Guide .......................................................................... 18

Testing Methods ........................................................................... 3 ESD Caution................................................................................ 18

REVISION HISTORY
03/07—PrG Version

02/06—PrF Version

05/05—PrE Version

Rev. Pr G | Page 2 of 18
Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin
Detailed Description low distortion AC source.

The EVAL-AD76XXCB 8/10-Pin includes a 5V ultrahigh As an option, an ADG739 multiplexer can be used in front of
precision reference (ADR435), and a signal conditioning circuit the ADC to demonstrate performances for multichannel
with two opamps (ADA4841-x) and digital logic. The board applications.
interfaces with a 96-way connector for the EVAL-CONTROL
BRDx and a 26-pin IDC connector for the serial output A second ADC can be mounted on the board to demonstrate
interface. the daisy-chain feature.

The evaluation board is a four-layer board carefully laid out and Using the Software
tested to demonstrate the specific high accuracy performance of This configuration requires to use the EVAL-CONTROL BRDx
the AD768x/ AD769x/AD794x/AD798x. Figure 2 through to interface the evaluation board with the PC.
Figure 5 show the schematics of the evaluation board. The Software Description
layouts of the board are shown in the following figures:
The evaluation board comes with software for analyzing the
Figure 6: Top-Side Silk-Screen AD768x/AD769x/AD794x/AD798x. One can perform a
Figure 7: Top-Side Layer histogram to determine code transition noise, and Fast Fourier
Transforms (FFT's) to determine the Signal-to-Noise Ratio
Figure 8: Ground Layer
(SNR), Signal-to-Noise-plus-Distortion (SINAD) and Total-
Figure 9: Shield Layer Harmonic-Distortion (THD). The AC performances can also
Figure 10: Bottom-Side Layer been evaluated after digital filtering (averaging) with enhanced
resolution (up to 32 bits). The front-end PC software has four
Figure 11: Bottom-Side Silk-Screen
screens:
The evaluation board has a flexible design that enables the user Figure 12 is the Setup Screen where sample rate, number of
to choose among many different board configurations. A samples are selected.
description of each selectable jumper is listed in Table 1, and the
available test points are listed in Table 2. Figure 13 is the Histogram Screen, which allows the code
distribution for DC input and computes the mean and standard
The evaluation board is configured in the factory with the deviation.
front-end amplifiers U6 and U7 set to a gain of 1. The board is
Figure 14 is the FFT Screen, which performs an FFT on the
set to be powered through the EVAL-CONTROL BRDx.
captured data, computes SNR, SINAD and THD.
Buffered conversion data is available at the output parallel bus
Figure 15 is the time domain representation of the output.
BD on U3 and on the 96-pin connector P3 and is valid during
When the on-board conversion (CNV) generation is used, a
the falling edge of BBUSY on P3. Activity of the ADC turns on
the on-board LED synchronous FFT can be achieved by synchronizing an external
AC generator with the 10MHz Fsync signal (J4) a 10 MHz
Power Supplies and Grounding signal, exact division of master clock (MCLK).
The evaluation board has two power supply blocks:
Figure 16 is the FFT Screen when averaging is used.
-SJ1 for the digital interface circuitry and the digital section of Software Installation (executable)
the ADC.
There is no need to have LabVIEW installed to run the
-SJ2 for the analog section including the signal conditioning executable.
and the reference voltage circuitry.
Double-click on Setup.exe in the LabVIEW exe folder from the
These offer flexibility to evaluate the ADC and the surrounding CD-ROM shipped with the evaluation board (do not use the
circuitry with any power supply combination. CD shipped with the EVAL-CONTROL BRDx) and follow the
installation instructions.
Analog Input Ranges and Multiplexing
The analog front-end amplifier circuitry U6 and U7 allows Developing your own application using LabVIEW
flexible configuration changes such as positive or negative gain, You need LabVIEW 7.1 or above to do this. Install the
input range scaling, filtering, addition of a DC component, and executable first, copy the folder LabVIEW VI and run the ADC
the use of different op-amp and supplies. vi example.vi

The factory configuration of the analog input of U6 and U7 is Testing Methods


set at midscale. This allows a transition noise test without any Histogram
other equipment. An FFT test can be done by applying a very To perform a histogram test, apply a DC signal to the input. It is

Rev. Pr G | Page 3 of 18
EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data
advised to filter the signal to make the DC Source noise Use as a Standalone Evaluation Board
compatible with that of the ADC. C26 and C41 provide this
filtering. You have the option of using the evaluation board as a stand-
alone. This method does not require the EVAL-CONTROL
AC Testing BRDx, nor does it require use of the accompanied software. The
To perform an AC test, apply a sinusoidal signal to the ADC serial interface signals are available on P1 (26-pin
evaluation board. Low distortion, better than 100dB, is required connector).
to allow true evaluation of the part. One possibility is to filter
the input signal from the AC source. There is no suggested
band-pass filter but consideration should be taken in the choice.
Decimated Testing (Averaging)
This test can be run with a shorted input to evaluate dynamic
range or as the AC test.
Setup Requirements
• EVAL-CONTROL BRDx (ADSP2189)
• EVAL-AD76XXCB 8/10-Pin evaluation board
• Power supply (AC 12V/1A source could be bought from
Analog Devices – sold separately from the EVAL-
CONTROL BRDx)
• Parallel port cable (provided with the evaluation control
board)

• AC source (low distortion)


• DC source (low noise)
• Band-pass filter (value based on the signal frequency, low
distortion)

Rev. Pr G | Page 4 of 18
Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin
Table 1. Jumper Description
Default position with
Jumper the control board
Designation ( Factory settings) Function
JP1 AMP+ Selection of the IN+ analog signal of U1 and U8, ADC0 and ADC1.
Position AMP+ = the signal present on JP13, buffered through U6.
Position not in AMP+ = optional multiplexer output, DB, is used.
JP2 AMP- Selection of JP3 source.
Position AMP- = the signal present on JP25, buffered through U7.
Position not in AMP- = optional multiplexer output, DA, is used.
JP3 Unip or Diff (see text) Selection of the IN− analog signal of U1.
Position Unip = single-ended ADC: AD7683, AD7685, AD7694, AD7942, AD7946, AD7980.
Position Diff = true differential ADC: AD7684, AD7687, AD7688, AD7690, AD7691, AD7693,
AD7982.
JP4 ADR43X Selection of the reference voltage.
Position ADR43X = on board 5V reference voltage is used.
Position VDD = the ADC reference is coming from the VDD supply.
JP5 BUF Selection of the reference voltage.
Positon NO BUF = refence present on JP4 (ADR43X or VDD) is selected
Position BUF = buffered reference present on JP4 (ADR43X or VDD) is selected. This buffer
(AD8032) can help to filter the VDD when used as the reference voltage.
JP6 −5V Selection for negative supply, VDRV.
JP7 7V Selection for positive supply, VDRV+.
JP8 12 V Selection for reference circuit supply, VREF.
JP9 VDD Selection for digital output interface voltage, VIO.
JP10 +VA, Selection for ADC, U1 and U8 supply VDD.
+2.5V (for AD798x)
JP11 3.3 V Selection for FPGA output interface voltage VIO. Must be set at VIO or 3.3V which ever is the
lowest.
JP13 BUF+ Selection of JP1 source
BUF+ = U6 amplifier output.
SMB+ = direct input from J1, AIN+ (SMB plug).
DIF+ = optional differential amplifer + output.
JP25 BUF- Selection of JP2 source
BUF- = U7 amplifier output.
SMB- = direct input from J2, AIN-(SMB plug).
DIF- = optional differential amplifer - output.

Table 2. EVAL-AD768x/AD769x/AD794xCB Test Points


Test Point Mnemonic Available Signal
TP1 GND Ground
TP2 GND Ground
TP3 SIG+ ADC Analog input IN+
TP4 GND Ground
TP5 REF ADC Reference input
TP6 SDI ADC (U1) SDI signal
TP7 CNV ADC CNV signal
TP8 SCK ADC SCK signal
TP9 SDO ADC (U1) SDO signal
TP10 SDO2 ADC (U8) SDO signal
TP11 BBUSY Parallel ADC data valid
TP12 GND Ground
TP13 SIG- ADC Analog input

Rev. Pr G | Page 5 of 18
1 2 3 4 5 6

U5B
VREF+
AD158X
3 1
VREF+ IN OUT
C60 VREF+

GND
C27
NOTE: .1uF

2
EITHER U5A OR U5B C25

2
IS USED AT A TIME GND R6 R37 .1uF
GND
10K
6 GND GND TP5

+VIN
A VOUT A
VDD REF 6 VCM
A
REF 7

8
U5A U2B VCM
ADR43X JP4 2 5
A C8
U2A 1
3 5 R4 3 JP5 10uF
AD8032AR

GND
2.5/3v
TEMP TRIM C6 AD8032AR

4
10K REF
C28 C29

4
8
C59
.1uF .1uF GND
1uF R9 GND
C64 C9 TP4
EVAL-AD76XXCB 8/10-Pin

1uF

VIO VDD
GND GND
VDRV+

C20 NOTE: R38 R39


VDRV+
NOTE: EITHER C1 OR C30, C2 OR C31 0.0 0.0
.1uF GND C4 OR C32
R2 ANY PASSIVE COMPONENTS WITHOUT VALUE
C19 ARE USED AT A TIME
BUF+ ARE NOT POPULATED
REF
GND R3
49.9
NOTE:

5
B B
EITHER U6A OR U6B 4
IS USED AT A TIME R57
U6B 1
SMB+ C30 C31 C32 C4
3
JP13 C1 C2
SMB+

2
AIN+ AMP+ TP3 .1uF .1uF
BUF+
SIG+

7
J1 R1 DIF+ IN1 1 2 10
2 DIF+ SIG+ IN1 GND
R75 U1B
SMB+ U6A 6 R48 R53
SIG+ 3 9 SDI
REF

R5 R31
VDD

3 IN+ SDI SDI


OVDD

0 33 0 8 SCK
VCM 5 SCK SCK

4
0.0 R10 49.9 C40 4 7 SDO
C34 JP1 2.7nF-NPO IN- SDO SDO
6 CNV
GND

590 DB CNV CNV


GND C22 GND 5
C53 R7 VDRV-
C26 10pF-NPO
.1uF 590 .1uF
GND

GND

Rev. Pr G | Page 6 of 18
NOTES:
1. U1B:AD7685,AD7686,AD7687
AD7688,AD7946 OR AD7947
C R35 R44 VDRV+ C37 C
2. U1A:AD7683,AD7684,

Figure 2. Schematic (Analog section)


AD7942 OR AD7944
.1uF GND
C36 3. EITHER U1A OR U1B
R43 IS USED AT A TIME

GND R42
NOTE:

5
49.9
EITHER U7A OR U7B 4
IS USED AT A TIME 1 R63 REF
U7B
3

2
AIN-
JP25

7
J2 R59
1
8

GND SMB- 2 SMB-


R64 AMP- SIG- U1A
TP12 R61 6 BUF-
R34 U7A TP13 IN2 7
3 0 DIF- IN2 SCK
DIF- 2
REF
VDD

VCM 5 IN+

4
R60 0.0 49.9 R47 R54 6
C35 SIG- SDO
IN- 3
590 JP2 0 IN-
GND 33 5
GND

C52 C42 DIFF CNV


R29 C41 VDRV- 10pF-NPO
590 DA SIG- JP3
4

.1uF .1uF C39


2.7nF-NPO
VDRV-
SGL GND
D D
GND
GND GND
EVAL-AD768XCB
JP3 NOTES:
SGL:AD7683, 7685, 7686, 7942, 7946, 7694
DIFF:AD7684, 7687, 7688,7690, 7691, 7693, 7982 ANALOG
1/11/2007 Rev. : 7 M.M

1 2 3 4 5 6
Preliminary Technical Data
1 2 3 4 5 6

VIO 3.3V

R16 SDI C7
TP6 1K 1K .1uF
6 CONFIG 1K
CASC
JP14 125 DATA 1
DATA DATA U5 R23 GND
SDI 2 4
R58
SDI SDI
EPC1441 CS R62
R17 128 DCLK 2 3
A 10K DCLK DCLK OE A
VIO
P2B 105 CONF_D
CONF_D
A32 +VA 56 STATUS
R18 CNV STATUS
B32 53 CONFIG
+VA TP7 GND CONFIG
C32 4
CE
A31 -VA JP17 33
MSEL GND
B31 CNV 1 U3 P2A
-VA CNV CNV
C31 +12V 123 BD0 BD15 C19
R19 BD0
C30 VIO EPF6010T(144) 122 BD1 BD14 C18
+12V 10K BD1
A8 118 BD2 BD13 B18
BD2
B8 VDIG 114 BD3 BD12 A18
VDIG BD3
R20 SCK
Preliminary Technical Data

C8 -12V 112 BD4 BD11 B17


TP8 BD4
A30 109 BD5 BD10 B15
GND BD5
A4 JP15 107 BD6 BD9 B14
BD6
A12 JP23 SCK 13 106 BD7 BD8 B13
SCK SCK BD7
A16 3.3V 97 BD8 BD7 B11
R21 BD8
A20 JP24 94 BD9 BD6 B10
3.3V 10K BD9
B4 SCKIN 14 87 BD10 BD5 B9
SCKIN SCKIN BD10
B12 84 BD11 BD4 B7
BD11
B16 72 BD12 BD3 B6
BD12
B20 81 BD13 BD2 B5
GND BD13
C4 82 BD14 BD1 B3
BD14
C12 73 BD15 BD0 B2
BD15
C16 95 AD2 AD2 C14
B SDO2 AD2 B
C20 96 AD1 AD1 A14
TP10 AD1 TP11
B26 93 AD0 AD0 C15
AD0
B27 85 BBUSY D1 BCS C10
BBUSY
B28 SDO2 16 BBUSY C17
SDO2 SDO2 49.9 R30
B29 49 ADCOK BBUSY BRD A9
ADCOK
B30 BWR C9
C21 J4 FSYNC RESETD A17
49.9 R36
C22 VIO 131 CONTROL B1
FSYNC
C23 DT0 A5
C24 TFS0 A6
SDO 10K R27
C25 R22 108 BCS DSPCLK A19
TP9 BCS
C26 47K DR0 C5
10K R24
C29 JP16 130 CONTROL SCLK0 C7
CONTROL
A21 SDO 10 RFS0 C6
SDO SDO 10K R40
A22 43 RESETS
RESETS
R25
86 RESETD
10K R14
RESETD
P2C 3.3V
B25 111
10K R15 GND
BRD
BRD

Rev. Pr G | Page 7 of 18
B24 3.3V
B23 GND R8 110 BWR
10K R32
10K BWR
B22 3.3V
10K R41
B21 44 M3 P1
MODE3
C A29 23 DCLK C
CSVDDI CSVDDI 10K R26 1 2

Figure 3. Schematic (Digital Section)


A26 45 M2 CONF_D
MODE2 3 4
A25 21 CONFIG M0
DIN DIN 10K R28 BSDO 5 6
A24 46 M1 STATUS M1
R13 MODE1 TP17 7 8
A23 DATA
10K 10K R33 9 10
47 M0 SCK +12V
MODE0 11 12
50 BSD0 BSD0 -VA
GND BSD0 GND 13 14
26 TP14 SDO2
C2 15 16
GND 12 TP15 SDO M2
GND C1 17 18
83 TP16 SDI VDD
C0 19 20
113 SCLK0 CNV
SCLK0 21 22
116 TFS0 VIO M3
TFS0 23 24
115 RFS0 RESETS
RFS0 25 26
121 DT0
DT0
22 117 DR0
DOUT DOUT DR0 GND
71 DSPCLK 3.3V
DSPCLK
132 3 4
MCLK OUT VDIG TP2 TP1
GND GND
U4
3.3V C3
1 2 .1uF
VDIG GND
VIO
GND
JP11
D VFPGA 3.3V D
3.3V
EVAL-AD768XCB
D2 C17 C18 C10 C48 C51 C54 C55 C56 C11 C12 C15 C16
2 1 .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF
K A
GND GND
DIGITAL
1/11/2007 Rev. : 7 M.M

1 2 3 4 5 6
EVAL-AD76XXCB 8/10-Pin
1 2 3 4 5 6

A A

VDRV- JP6 -VA


U9
VDRV-
C21 ADP3334ACP 3.3v
10uF VDIG 8 1
VDIG IN OUT

7 2 C61 R45
GND IN OUT 140K
EVAL-AD76XXCB 8/10-Pin

4 3

GND
SD
NC FB
+12V C57
VREF+ JP8

5
6
1uF
VREF+ R46
C23 SJ2 78.7K
VREF+ -VA 1
10uF +VA -VA -5V

GND +VA 2 +5V


+VA GND
JP7 JP10
2
VDRV+ +12V 3 +12V
3 VDD VDD +12V
5 VDDI
VDRV+ 4
4
C14 1 VDDE
C24 VDD
10uF 10uF 5 GND
VDRV+
B
VDD B
SJ1
GND 3
GND VIO E
JP9 VIO
U12 2 1
DGND
+12V ADP3334ARM 7V 3.3V 2 4
VIO
8 1 1 3
IN OUT 3.3V C13
C49 R55 10uF
7 2
IN OUT
90.4k
4 3 GND

GND
SD
NC FB
C33

5
6
1uF
R56
60.4k

U10
+12V ADP3334ACP
GND 8 1 VDDI 3.3V C63
U14 IN OUT
+12V ADP3334ARM 2.5V 3.3V

Rev. Pr G | Page 8 of 18
7 2 C62 R49
8 1 IN OUT 154K
IN OUT .1uF GND
4 3
2

GND
SD
7 2 R77 NC FB
IN OUT C73 C58 U6
106.1k CSVDDI
C 1uF 8 6
5
1uF 6 C
4 3 A CS CSVDDI

Figure 4. Schematic (Power Section)


GND
SD
C72 NC FB VR2
VDD

1uF 100K 1 4 SCK


CLK SCK

5
6
R76 7 5 DIN
GND

R52 B SDI DIN


94.5k
GND GND
3

GND 63.4K AD5160

GND
GND

NOTE:
EITHER VR2 OR AD5160
ARE USED AT A TIME

D D
EVAL-AD768XCB

POWER
1/11/2007 Rev. : 7 M.M

1 2 3 4 5 6
Preliminary Technical Data
1 2 3 4 5 6

VIO VDD

VIO VDD
JP12 NOTES:
POSITION A : AD7685,AD7686,AD7683,AD7946,AD7942 R50 R51
POSITION NOT A: AD7687,AD7688,AD7684,AD7947,AD7944

REF
A A
REF
C67
R69 R73
JP26 DIF+
DIF+
SMB+
SMB+ R72 0
BUF+ GND
BUF+ VDRV+
C50 C44 C45 C46 C47 0 C69

3
C43 R67 VDRV+ .1uF GND
1 U13
IN-
4
1 2 10 R68 R78 OUT+
GND 8
U8B VCM IN+ R74
R66 0 499 OUT- 5 DIF-
Preliminary Technical Data

3 9 SDO DIF-

REF
VDD
IN2 IN+ SDI SDO C68 2

OVDD
8 590 VCM 0
DIFF SCK VDRV-

6
IN1 4 7 JP18 SCK C71
IN- SDO SCK R71 R70 C70
UNI 6 JP27 R65 590 590

GND
CNV JP19 590
JP12 SDO2 .1uF GND
SDO2 VDRV-
5
GND JP20 CNV GND
CNV GND

GND

U7
3 14
4 13 SCKIN
B SCKIN B
5 12
6 11 VIO VDD

ADUM1402 C65 C66


C5
NOTE: .1uF
EITHER U7 OR JP18,JP19,20
ARE USED AT A TIME GND GND
14

SIG+ 4
SIG+ S1A
SIG- 5
VDD

SIG- S2A
VCM 6
VCM S3A
REF JP21 7
S4A
8 DA
NOTE: GND DA DA
EITHER C43 OR C50, C44 OR C45 U11
13
C46 OR C47 S1B

1
8
12
U8A ARE USED AT A TIME S2B
11 9 DB
7 S3B DB DB
SCK JP22
2

REF
VDD

Rev. Pr G | Page 9 of 18
IN+ 10
6 GND S4B
SDO VIO
3 GND
IN-
SYNC
DIN
SCK
DOUT
GND

GND
CNV
2
3
1

C ADG739 C
16
15

4
CNV R11 R12

Figure 5. Schematic (Option Section)


590 1K
DIN GND
GND DIN

SCK DOUT
DOUT

C38
100pF

GND

D D
EVAL-AD768XCB

OPTION
1/11/2007 Rev. : 7 M.M

1 2 3 4 5 6
EVAL-AD76XXCB 8/10-Pin
EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data

Figure 6. Top-Side Silk-Screen (Not to Scale).

Figure 7. Top-Side (Not to Scale).

Rev. Pr G | Page 10 of 18
Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin

Figure 8. Ground Layer (Not to Scale).

Figure 9. Shield Layer (Not to Scale).

Rev. Pr G | Page 11 of 18
EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data

Figure 10. Bottom-Side Layer (Not to Scale).

Figure 11. Bottom-Side Silk-Screen (Not to Scale).

Rev. Pr G | Page 12 of 18
Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin
1) The Run button starts the software. This button 2) The part under evaluation is chosen from this
must be pressed first. menu. The device must be selected second.

3) Input configurations are chosen here. The available choices


are: Interface Mode, ADC (use help (F1) to see the description
of each parameter).

This is the performance window.

These controls are for locking and resetting the display 4) This window is used to select the
axis to the data minimum and maximum values. test type, number of samples (in
K), and conversion mode
(continuous or burst). For the test
type choose from either:
6) These gives direct access to datasheets and evaluation
documentation. Histogram test
AC Test
Decimated AC Test
5) This window allows the samples to be taken once (F3) or continuous (F4).
Also selects: Help screen, Save data to Excel (F5), Print (F8) and Quit (F10).
The Help menu shows a description of the functionality of the chosen
d
Figure 12. Setup Screen

Rev. Pr G | Page 13 of 18
EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data

The results are displayed in this chart. Also, the cursor


(yellow) can be dragged it to a desired location where the
X-axis values and the Y-axis value will be displayed.

These control the choice of chart type and X-units. This window shows the ADC range and LSB
Chart type selection of Histogram or Time and X-units value in Volts.
of hexadecimal or Volts.

Different measurements are displayed here. The DC


value, Transition Noise and other values

Figure 13. Histogram Screen

Rev. Pr G | Page 14 of 18
Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin

The results are displayed in this chart. Also, the cursor


(yellow) can be dragged it to a desired location where the
X-axis values and the Y-axis value will be displayed.

AC test results are displayed here. Also the


These control the chart type choice of Frequency
choice of viewing the amplitude of a certain
domain or Time domain and X axis units.
FFT component can be selected from the
FFT component menu.

Choice of either a Kaiser window or a Blackmann-


Harris window from the is menu.

Figure 14. FFT Screen

Rev. Pr G | Page 15 of 18
EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data

The AC test can also be displayed in the Time Domain as shown below.

To view the Time domain output, select Time in this menu.

Figure 15. Time-Domain Screen

Rev. Pr G | Page 16 of 18
Preliminary Technical Data EVAL-AD76XXCB 8/10-Pin

The results are displayed in this chart. Also, the cursor


(yellow) can be dragged it to a desired location where the
X-axis values and the Y-axis value will be displayed.

The decimation ratio (Dratio) and number of


Ksamples are entered here.

The Nyquist frequency is displayed here as:


AC test results with decimated averaging are shown
FSAMPLE
here. The SNR indicator also represents the FNYQUIST =
dynamic range when no signal is present. 2 * D RATIO

Figure 16. Decimated (Averaging) Screen

Rev. Pr G | Page 17 of 18
EVAL-AD76XXCB 8/10-Pin Preliminary Technical Data
The term AD768x/AD769x/AD794x/AD798x is used in this document to represent all the ADCs listed in the ordering guide.

ORDERING GUIDE
Evaluation Board Model Product
EVAL-AD7683CBZ AD7683BRMZ
EVAL-AD7684CBZ AD7684BRMZ
EVAL-AD7685CBZ AD7685CRMZ
EVAL-AD7686CBZ AD7686CRMZ
EVAL-AD7687CBZ AD7687BRMZ
EVAL-AD7688CBZ AD7688BRMZ
EVAL-AD7690CBZ AD7690BRMZ
EVAL-AD7691CBZ AD7691BRMZ
EVAL-AD7693CBZ AD7693BRMZ
EVAL-AD7694CBZ AD7694BRMZ
EVAL-AD7942CBZ AD7942BRMZ
EVAL-AD7946CBZ AD7946BRMZ
EVAL-AD7980CBZ AD7980BRMZ
EVAL-AD7982CBZ AD7982BRMZ
EVAL-CONTROL BRD2 Controller Board
EVAL-CONTROL BRD3 Controller Board

ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

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