Beruflich Dokumente
Kultur Dokumente
-1
Assignment
James Lock
Assignment objectives
The 555 Timer IC is an integrated circuit (chip) implementing a variety of a timer and
multivibrator applications.( ref http://en.wikipedia.org/wiki/555_timer_IC).
Below is the Pin output of the 555 timer.
Pin Description
1 Negative supply
2 Trigger Input
3 Output Signal
4 Reset Input
5 Voltage Control
6 Threshold Input
7 Discharge Path
8 Positive Supply
The positive and negative supply pins are self-explanatory, although it's worth noting that
some variants of the 555 won't function reliably or at all if there isn't a sizable decoupling
cap nearby. It's a good idea to put 10µF across these pins in any design.
Pin 3 exposes the output signal, the timing signal generated by the IC. Most standard 555
timers can sink (connect to ground) and source (connect to the positive supply) loads up
to 200mA. Some are limited to 20mA and some will have different capabilities when
sinking or sourcing current.
The reset input is used to reset the timer or prevent it from operating. A falling edge on
this pin forces the output signal low and the circuit remains disabled as long as the reset
input is low. Many applications don't require this function and will just tie this pin
directly to the positive supply. Occasionally a design will leave it floating (not connected
to anything) .
The trigger and threshold inputs are responsible for producing the timing. When the
voltage level presented to the trigger input is less than 1/3 of the supply voltage then the
output signal will be driven high, and if the voltage level on the threshold input exceeds
2/3 of the supply then the output is driven low again. Alone this may not be useful, but if
these pins are connected to a RC circuit then the exponential voltage curve of a charging
capacitor will set the output signal high for a reasonably precise and repeatable period of
time.
Pin 5 allows the threshold voltage which is normally 2/3 of the positive supply to be
adjusted. This pin connects directly into the comparator which means that the applied
voltage directly effects the voltage level on the threshold input (pin 6) required to drive
the output low and therefore also effects the period of the output signal. If the pin is to
remain unused unnecessary noise into the comparator circuit may be introduced. To
avoid this it should be bypassed with a 10nF capacitor.
Finally, pin 7 is connected to ground whenever the output is low. the actual purpose of
this pin is to provide a discharge path for an RC circuit attached to the trigger and
threshold inputs. However it may also be used as a second output which is open-collector
and inverted from pin 3.
The 555 has three operating modes which are Monostable, Astable and Bistable.
Monostable
.
Whilst in this function the 555 timer acts as a one shot ,switch debouncing application. A
diagramme of the 555 timer in monostable operation can be found below.
During this mode R1 will be between 10k and 14m, the timing cap C should be between
100pF and 1000uF and the R2 prevents false triggering.
The 555 timer will do nothing until a low pulse is applied to
The trigger pin ( number 2),the low pulse is usually provided by connecting to ground via
A switch or transistor. The width of the pulse received is determined by the time constant
Of a RC circuit ( a circuit consisting of a capacitor C and resistor R).
The pulse will stop when the capacitor charge equals 2/3 of the supply voltage.
By adjusting the values of R and C it is possible to widen or shorten the the trigger
Pulse. Below is a diagramme showing the relationships of the trigger signal, the voltage
on C and the pulse width in monostable mode. Example uses for this kind of circuit
includes an electronic lock or light sensitive alarm.
Astable mode
Bistable mode
The circuit is called a bistable because it is stable in two states: output high and output
low. Because of this it is also known as a “flip flop” circuit.
Bistable mode is a less common configuration in 555 timer designs where the circuit has
two stable states but doesn't actually producing any timing signals.(ref
www.ehobbycorner.com/pages/tut_timer.html)
Bistable mode can also be defined as a mode in a 555 timer which changes from 1 to 0 or
from 0 to1 when a current is applied. The timer will remain in this transitioned state until
a new input is received.
Below is a diagramme of a circuit in Bistable state.
(ref www.ehobbycorner.com/pages/tut_timer.html)
The "set" and "reset" inputs to this circuit are active low and must be held close to the
positive supply voltage when not asserted, with pull-up resistors if necessary. A falling
edge on the set input will cause the output signal to be driven high until another falling
edge on the reset input returns the output low. The circuit will remain in either state
indefinitely and is therefore bistable. The threshold input is connected to ground to ensure
that it can never reset the circuit as it would in a normal timing application. (ref
www.ehobbycorner.com/pages/tut_timer.html)
The output of the standard 555 timer is up to 200Ma, which is higher than most IC`s and
is sufficient to supply many output transducers including LED`s ( with resisters in
series),low current lamps, piezo transducers, loudspeakers (with capacitor in series) and
with protection from diodes relay coils and some motors. The output voltage does not
reach 0v and +Vs if large current is flowing in the circuit. To achieve this you need to
connect a transister.
The ability to both sink and source current means that two devises can be connected to
the output so that one is on when the output is low and the other is on when the output is
high. This arrangement could be used for flashing LED`s at a level crossing. Below is and
example figure of a speaker circuit using the 555 timer:
LEDs typically consume only 20mA, so they can be connected directly to the 555 Output
via the usual current limiting resistor.
LAMPS
Small low voltage lamps may be connected directly to the 555 Output, although it is best
to switch them using a relay or transistor. You can of course control several lamps, and
higher voltage lamps, using an appropriate relay.
These must be switched via a relay or transistor, because of the high current they
consume. The maximum current consumed by the relay coil itself is 200mA. Note that Vs
need not be the same voltage as that used to power the 555 - it can be the voltage that the
device requires, such as 12V for a motor, providing the limits of the relay or transistor are
not exceeded.
The original IBM personal computer used a quad timer 558 in monostable (or "one-shot")
mode to interface up to two joysticks to the host computer. (ref
www.wikipedia.org/555timer). Within the joystick interface circuit of the IBM PC, the
capacitator (C) of the RC network was generally a 10 nF capacitor. The resistor (R) of the
RC network is made up by the potentiomenter inside the joystick with an external
resistor of 2.2 kilohms. The joystick potentiometer then acts as a variable resistor. when
moving the joystick, the resistance of the joystick increases from a small value up to
about 100 kilohms. The joystick operated at 5 V.
Software running in the host computer started the process of determining the joystick
position by writing to a special address (ISA bus I/O address 201h). This would result in
a trigger signal to the quad timer, which would cause the capacitor (C) of the RC network
to begin charging and cause the quad timer to output a pulse. The width of the pulse was
determined by how long it took the C to charge up to 2/3 of 5 V (or about 3.33 V), which
was in turn determined by the joystick position.
Software running in the host computer measured the pulse width to determine the
joystick position. A wide pulse represented the full-right joystick position, for example,
while a narrow pulse represented the full-left joystick position(ref
www.wikipedia.org/555timer)
The relationship between the trigger signal, capacitor voltage and the output pulse
representing joystick position is shown by the diagram in the monostable section of this
report.
FET`s consist of a gate, drain, and source terminal that correspond roughly to the base,
collector, and emitter of BJT`s Aside from the JFET, all FETs also have a fourth terminal
called the body, base, bulk, or substrate. This fourth terminal serves to Bias the transistor
into operation; it is rare to make non-trivial use of the body terminal in circuit designs,
but its presence is important when setting up the physical layout of an IC.
The names of the terminals refer to their uses or functions. The gate permits electrons to
flow through or blocks their passage by creating or removing a channel between the
source and drain. Electrons flow from the source terminal towards the drain terminal if
influenced by an applied voltage. The body refers to the bulk of the semiconductor in
which the gate, source and drain lie. Usually the body terminal is connected to the highest
or lowest voltage within the circuit, depending on type. The body terminal and the source
terminal are sometimes connected together since the source is also sometimes connected
to the highest or lowest voltage within the circuit, however there are several uses of FETs
which do not have such a configuration, such as transmission gates and cascode circuits.
(ref wikipedia.org/FET)
By design, most of the BJT collector current is due to the flow of charges injected from a
high-concentration emitter into the base where they are minority carriers that diffuse
toward the collector (ref www.wikipedia.org), because of this BJT`s are classified as
minority carriers.
As mentioned previously the FET relies on an electric field which controls the shape and
conductivity of a channel of a type of charge carrier in the semiconductor material. As
mention previously FETs are unipolar transistors which contrasts single-carrier-type
operation with the dual-carrier-type operation of BJT. The idea of the FET predates the
BJT, but wasn`t implemented until after BJT`s due to the ease of manafacture of BJT`s
and the limitations of the semiconductor materials used.
Another contrasting factor between the two transistors can be illustrated by the fact that
The Bipolar Junction Transistor (BJT) is an active device. Which means, it is a current
controlled valve. The base current (IB) controls the collector current (IC).
The Field Effect Transistor (FET) is an active device. In simple terms, it is a voltage
controlled valve. The gate-source voltage (VGS) controls the drain current (ID).
The FET is a three terminal device like the BJT, but operates by a different principle. The
three terminals are called the source, drain, and gate. The voltage applied to the gate
controls the current flowing in the source-drain channel. No current flows through the
gate electrode, thus the gate is essentially insulated from the source-drain channel.
Because no current flows through the gate, the input impedance of the FET is extremely
large (in the range of 1010–1015 Ω). The large input impedance of the FET makes them an
excellent choice for amplifier inputs.
The two common families of FETs, the junction FET (JFET) and the metal oxide
semiconductor FET (MOSFET) differ in the way the gate contact is made on the source-
drain channel.
The JFET is the simplest form of FET, In the JFET gate-channel contact is a reverse
biased pn junction. The gate-channel junction of the JFET must always be reverse biased
otherwise it may behave as a diode. All JFETs are depletion mode devices—they are on
when the gate bias is zero (VGS = 0).
In the MOSFET the gate-channel contact is a metal electrode separated from the channel
by a thin layer of insulating oxide. MOSFETs have very good isolation between the gate
and the channel, but the thin oxide is easily damaged (punctured!) by static discharge
through careless handling. MOSFETs are made in both depletion mode (on with zero
biased gate, VGS = 0) and in enhancement mode (off with zero biased gate).
FET`s can perform the functions that the BJT can do with the exception that the bias
conditions and characteristics are different. Therefore applications should be chosen in
accordance with the advantages and draw backs.
Despite the advantages of the FET over the BJT it does have a major disadvantage as its
product of gain and bandwidth is smaller and it is easily damaged by static electricity.
The circuit symbol is shown below in Figure 1
.
I +
D
D = Drain IG
G = Gate D
G
S = Source
+ S VDS V DD
+
VGG VGS IS
–
-
-
The characteristic curves of a FET look similar in shape to those of a BJT, but since the
FET has a different basis of operation, the curves are given in terms of other parameters.
This concludes the report on the 555 timer, BJT and FET. Below is a list of all external
references used.
Bibliography
http://www.antonine-
education.co.uk/Electronics_AS/Electronics_Module_1/Topic_11/topic_11__555_timer_circuit.htm
http://www.markallen.com/teaching/ucsd/147a/lectures/lecture4/6.php
http://www.electronics-lab.com/articles/basics/components/555astable.htm
www.eculabs.com
http://www.toolingu.com/definition-460350-34786-bistable.html
www.ehobbycorner.com/pages/tut_timer.html
http://en.wikipedia.org/wiki/555_timer_IC
http://www.eleinmec.com/article.asp?
http://www.kpsec.freeuk.com/555timer.htm
http://web.iku.edu.tr/courses/ee/ee425/PDF/_EE%20425_Exp_7.pdf