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ACT510 Rev 2, 21-Feb-14

ActiveQRTM Quasi-Resonant PWM Controller

FEATURES exceeds the latest ES2.0 efficiency standard with


good margin.
• Quasi-Resonant Operation
ACT510 integrates comprehensive protection. In
• Adjustable up to 150kHz Switching case of over temperature, over voltage, winding
Frequency short, current sense resistor short, open loop and
• Accurate OCP/OLP Protection overload conditions, it would enter into auto restart
mode including Cycle-by-Cycle current limiting.
• Integrated Patented Frequency Foldback
Technique ACT510 is to achieve no overshoot and very short
rise time even with a big capacitive load (4000µF)
• Integrated Patented Line and Primary with the built-in fast and soft start process.
Inductance Compensation
The Quasi-Resonant (QR) operation mode can
• Built-in Soft-Start Circuit improve efficiency, reduce EMI and further reduce
• Line Under-Voltage, Thermal, Output Over- the components in input filter.
voltage, Output Short Protections ACT510 is ideal for applications up to 60 Watts.
• Current Sense Resistor Short Protection
Figure 1:
• Transformer Winding Short Protection
Simplified Application Circuit
• 100mW Standby Power
• Complies with Global Energy Efficiency and
CEC Average Efficiency Standards
• Tiny SOT23-6 Packages

APPLICATIONS
• AC/DC Adaptors/Chargers for Cell Phones,
Cordless Phone, PDAs, E-books
• Adaptors for Portable Media Player, DSCs,
Set-top boxes, DVD players, records
• Linear Adapter Replacements

GENERAL DESCRIPTION
The ACT510 is a high performance peak current
mode PWM controller. ACT510 applies ActiveQRTM
and frequency foldback technique to reduce EMI
and improve efficiency. ACT510’s maximum
switching frequency is set at 150kHz. Very low
standby power, good dynamic response and
accurate voltage regulation is achieved with an
opto-coupler and the secondary side control circuit.
The idle mode operation enables low standby
power of 100mW with small output voltage ripple.
By applying frequency foldback and ActiveQRTM
technology, ACT510 increases the average system
efficiency compared to conventional solutions and

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Active-Semi Proprietary―For Authorized Recipients and Customers Copyright © 2014 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
ACT510
Rev 2, 21-Feb-14

ORDERING INFORMATION

PACKING
PART NUMBER TEMPERATURE RANGE PACKAGE PINS TOP MARK
METHOD

ACT510US-T -40°C to 85°C SOT23-6 6 TUBE & REEL FSET

PIN CONFIGURATION

SOT23-6
ACT510US

PIN DESCRIPTIONS

PIN NAME DESCRIPTION


Current Sense Pin. Connect an external resistor (RCS) between this pin and ground to set peak
1 CS
current limit for the primary switch.
2 GND Ground.
3 GATE Gate Drive. Gate driver for the external MOSFET transistor.
4 VDD Power Supply. This pin provides bias power for the IC during startup and steady state operation.
Valley Detector Pin. Connect this pin to a resistor divider network from the auxiliary winding to
5 VDET
detect zero-crossing points for valley turn on operation.
6 FB Feedback Pin. Connect this pin to optocouplers’s collector for output regulation.

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ActiveQRTM is a trademark of Active-Semi.
ACT510
Rev 2, 21-Feb-14

ABSOLUTE MAXIMUM RATINGSc


PARAMETER VALUE UNIT
FB, CS, VDET to GND -0.3 to + 6 V
VDD, GATE to GND -0.3 to + 28 V

Maximum Power Dissipation (SOT23-6) 0.45 W

Operating Junction Temperature -40 to 150 ˚C

Junction to Ambient Thermal Resistance (θJA) 220 ˚C/W


Storage Temperature -55 to 150 ˚C
Lead Temperature (Soldering, 10 sec) 300 ˚C
c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods.

ELECTRICAL CHARACTERISTICS
(VDD = 13V, LM = 0.54mH, RCS = 1.37Ω, VOUT = 5V, NP = 81, NS = 5, NA = 12, TA = 25°C, unless otherwise specified.)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT


Supply
VDD Turn-On Voltage VDDON VDD Rising from 0V 11.16 12 12.84 V
VDD Turn-Off Voltage VDDOFF VDD Falling after Turn-on 6.6 7.4 8.2 V
VDD Over Voltage Protection VDDOVP VDD Rising from 0V 25 V
Start Up Supply Current IDDST VDD = 10V, before VDD Turn-on 8 15 µA
VDD = 15V, after VDD Turn-on ,FB
IDD Supply Current IDD 0.6 mA
floating
IDD Supply Current at Standby IDDSTBY FB = 1.3V 0.4 mA

IDD Supply Current at Fault IDDFAULT Fault mode, FB Floating 280 µA

Feedback
FB Pull up Resistor RFB 15 kΩ
CS to FB Gain ACS 3 V/V

VFB at Max Peak Current 3 + VBE V

FB Threshold to Stop Switching VFBBM1 0.7 + VBE V

FB Threshold to Start Switching VFBBM2 0.75 + VBE V

Output Overload Threshold 3.5 + VBE V


OverLoad/Over Voltage Blanking
TOVBLANK 320 ms
Time

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ActiveQRTM is a trademark of Active-Semi.
ACT510
Rev 2, 21-Feb-14

ELECTRICAL CHARACTERISTICS CONT’D


(VDD = 13V, LM = 0.54mH, RCS = 1.37Ω, VOUT = 5V, NP = 81, NS = 5, NA = 12, TA = 25°C, unless otherwise specified.)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT


Current Limit
CS Current Limit Threshold VCSLIM 0.91 0.96 1.01 V

OLP Limit 95 100 105 %

Leading Edge Blanking Time TCSBLANK 160 200 240 ns

GATE DRIVE
Gate Rise Time TRISE VDD = 10V, CL = 1nF 200 250 ns
Gate Falling Time TFALL VDD = 10V, CL = 1nF 115 200 ns

Gate Low Level ON-Resistance RONLO ISINK = 30mA 7 Ω

Gate High Level ON-Resistance RONHI ISOURCE = 30mA 40 Ω


GATE = 25V, before VDD
Gate Leakage Current 1 µA
turn-on
Oscillator
Maximum Switching Frequency fMAX 132 147 161 kHz

Switching Frequency Foldback fMIN FB = 2.3V + VBE fMAX/3 kHz

Maximum Duty Cycle DMAX 65 75 %

Valley Detection

ZCD Threshold Voltage VDETTH 100 mV


After valley detection time
window, if no valley de-
Valley Detection Time Window 5 µs
tected, forcedly turn-on
main switch
VDET Leakage Current 1 µA

Protection

CS Short Waiting Time 1 µs

CS Short Detection Threshold 0.115 V

CS Open Threshold Voltage 1.73 V

Abnormal OCP Blanking Time 150 ns

Thermal Shutdown Temperature 135 ˚C

Line UVLO IVDETUVLO 0.2 mA

Line OVP IVDETOVP 2 mA

VDET Over Voltage Protection VDETVOOVP 2.72 V

VDET Vo Short Threshold VDETVOshort 0.58 V

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ActiveQRTM is a trademark of Active-Semi.
ACT510
Rev 2, 21-Feb-14

FUNCTIONAL BLOCK DIAGRAM

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ActiveQRTM is a trademark of Active-Semi.
ACT510
Rev 2, 21-Feb-14

FUNCTIONAL DESCRIPTION
ACT510 is a high performance peak current mode switching. After it stops, as a result of a feedback
low-voltage PWM controller IC. The controller reaction, the feedback voltage increases. When the
includes the most advance features that are feedback voltage reaches VFBBM2, ACT510 start
required in the adaptor applications up to 60 Watt. switching again. Feedback voltage drops again and
Unique fast startup, frequency foldback, QR output voltage starts to bounds back and forward
switching technique, accurate OLP, idle mode, with very small output ripple. ACT510 leaves idle
external compensation adjustment, short winding mode when load is added strong enough to pull
protection, OCP, OTP, OVP and UVLO are feedback voltage exceed VFBBM2.
included in the controller.
Figure 2:
Startup Idle Mode
Startup current of ACT510 is designed to be very
low so that VDD could be charged to VDDON Vo 12V

threshold level and device starts up quickly. A large


value startup resistor can therefore be used to Io
2A

minimize the power loss yet reliable startup in 0A


Vfb
application. For a typical AC/DC adaptor with Vfb_olp
universal input range design, two 1MΩ, 1/8 W Vfb_fl
Vfbbm2
startup resistors could be used together with a VDD Vfbbm1
capacitor(4.7uF) to provide a fast startup and yet Ip Ilim
low power dissipation design solution. Ip_FL

During startup period, the IC begins to operate with


t
minimum Ippk to minimize the switching stresses
for the main switch, output diode and transformers.
And then, the IC operates at maximum power
Primary Inductance Compensation
output to achieve fast rise time. After this, VOUT The ACT510 integrates a built-in primary
reaches about 90% VOUT , the IC operates with a inductance compensation circuit to maintain
‘soft-landing’ mode(decrease Ippk) to avoid output constant OLP despite variations in transformer
overshoot. manufacturing. The compensated ranges is +/-7%.
Constant Voltage (CV) Mode Operation Primary Inductor Current Limit
In constant voltage operation, the ACT510 Compensation
regulates its output voltage through secondary side The ACT510 integrates a primary inductor peak
control circuit . The output voltage information is current limit compensation circuit to achieve
sensed at FB pin through OPTO coupling. The error constant OLP over wide line and wide inductance.
signal at FB pin is amplified through TL431 and
OPTO circuit. When the secondary output voltage is Frequency Foldback
above regulation, the error amplifier output voltage
When the load drops to 75% of full load level,
decreases to reduce the switch current. When the
ACT510 starts to reduce the switching frequency,
secondary output voltage is below regulation, the
which is proportional to the load current to improve
error amplifier output voltage increases to ramp up
the efficiency of the converter.
the switch current to bring the secondary output
back to regulation. The output regulation voltage is ACT510’s load adaptive switching frequency
determined by the following relationship: enables applications to meet all latest green energy
standards. The actual minimum average switching
RF1
VOUTCV = VREF _ TL 431 × (1 + ) (1) frequency is programmable with output
RF 2
capacitance, feedback circuit and dummy load
(while still meeting standby power).
where RF1 (R13) and RF2 (R14) are top and bottom
feedback resistor of the TL431.

No Load Idle Mode


In no load standby mode, the feedback voltage falls
below VFBBM2 and reaches VFBBM1, ACT510 stop
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ActiveQRTM is a trademark of Active-Semi.
ACT510
Rev 2, 21-Feb-14

FUNCTIONAL DESCRIPTION CONT’D


Valley Switching PROTECTION FAILURE PROTECTION
ACT510 employed valley switching from medium FUNCTIONS CONDITION MODE
load to heavy load to reduce switching loss and
VDD > 25V
EMI. In discontinuous mode operation, the resonant VDD Over Voltage Auto Restart
(4 duty cycle)
voltage between inductance and parasitic
capacitance on MOSFET source pin is coupled by VVD > 2.75V or
VVDET Over Volt-
auxiliary winding and reflected on VDET pin through No switching Auto Restart
age/No Voltage
feedback network R6, R7. Internally, the VDET pin for 4 cycles
is connected to an zero-crossing detector to Over Temperature T > 135˚C Auto Restart
generate the switch turn on signal when the
Short Winding/ VCS > 1.7V
conditions are met. Auto Restart
Short Diode
Figure 3: IPK = ILIMIT or
Over Load/Open
Valley Switching VFB = 3.5V + VBE Auto Restart
Loop
for 320ms
V Output Short
VDET < 0.56V Auto Restart
Circuit
Vdrain_gnd VDD Under Volt-
VDD < 7.4V Auto Restart
age

DC voltage

Possible Valley turn on Ton t

Protection Features
The ACT510 provides full protection functions. The
following table summarizes all protection functions.

Auto-Restart Operation
ACT510 will enter into auto-restart mode when a
fault is identified. There is a startup phase in the
auto-restart mode. After this startup phase the
conditions are checked whether the failure is still
present. Normal operation proceeds once the
failure mode is removed. Otherwise, new startup
phase will be initiated again.
To reduce the power loss during fault mode, the
startup delay control is implemented. The startup
delay time increases over lines.

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ActiveQRTM is a trademark of Active-Semi.
ACT510
Rev 2, 21-Feb-14

TYPICAL APPLICATION
Design Example Where ŋ is the estimated circuit efficiency, fL is the
line frequency, tC is the estimated rectifier
The design example below gives the procedure for conduction time, CIN is empirically selected to be
a DCM flyback converter using ACT510. Refer to 22µF electrolytic capacitors.
application circuit Figure 5, the design for an
adapter application starts with the following The maximum duty cycle is set to be 45% at low line
specification: voltage 90VAC and the circuit efficiency is
estimated to be 78%. Then the average input
Input Voltage Range 90VAC - 265VAC, 50/60Hz current is:
Output Power, PO 10W
VOUT × IOUT
Output Voltage, VOUTCV 5V I IN = _ FL

×η
_ MAX
V INDC (4)
Full Load Current, IOUTFL 2A _ MIN

5×2
OCP Current, IOUTMAX 2.3-2.6A = = 142 . 5 mA
90 × 0 . 78
System Efficiency CV, η 0.78

The input primary peak current:


The operation for the circuit shown in Figure 5 is as
follows: the rectifier bridge BD1 and the capacitor 2 × II N 2 × 142 .5 mA
I ppk _ FL = = = 633 .3 mA (5)
C1/C2 convert the AC line voltage to DC bus DMAX 0.45
voltage. This voltage supplies the primary winding
of the transformer T1 and the startup circuit of R1/ The primary inductance of the transformer:
R2 and C4 to VDD pin of ACT510. The primary VIN DMAX 90 × 0.45
power current path is formed by the transformer’s Lp = = = 0.54 mH (6)
I ppk _ FL fsw 633 .3 mA × 120 kHz
primary winding, Q1, and the current sense resistor
R8. The resistors R3, R4, diode D4 and capacitor The primary turn on time at full load:
C3 create a snubber clamping network that protects
Q1 from damage due to high voltage spike during I ppk
TON = Lp _ FL
Q1’s turn off. The network consisting of capacitor _ FL
VINDC _ MIN (7)
C4, diode D2 and resistor R5 provides a VDD
0 . 54 mH × 633 . 3 mA
supply voltage for ACT510 from the auxiliary = = 3 .8 μ s
winding of the transformer. The resistor R5 is 90
optional, which filters out spikes and noise to makes
VDD more stable. C4 is the decoupling capacitor of The ringing periods from primary inductance with
the supply voltage and energy storage component mosfet drain-source capacitor:
for startup. During power startup, the current
charges C4 through startup resistor R1/R2 from the TRINGING _ MAX = 2 π L pC DS _ MAX
rectified bus voltage. The diode D3 and the = 2 × 3 .14 × 0 .54 mH × 100 PF = 1 . 46 μ s (8)
capacitor C6/L2/C7 rectify filter the output voltage.
The resistor divider consists of R13 and R14
programs the output voltage. Since a bridge To guarantee the valley turn on switching at full
rectifier and bulk input capacitors are used, the load, secondly reset time at full load can be
resulting minimum and maximum DC input voltages calculated:
can be calculated:
T RST = T sw - TON _ FL - 0 . 5 T RINGING _ MAX
1 (9)
2 POUT (
2 fL
- tC ) = 1 / 120 kHz - 3 . 8 μ s - 0 . 5 × 1 . 46 μ s = 3 . 8 μ s
V INDC = 2V 2
- (2)
η × C IN
_ MIN INAC _ MIN

2 × 10 × (
1
- 3 . 5 ms )
The minimum primary to secondary turn ratio NP/NS:
= 2 × 90 2
- 2 × 47 ≈90 V
0 . 78 × 22 μ F N T ON V IN
P
= _ FL
× _ MIN

N S T RST V OUT + VD
3 .8 90 (10)
VIN ( MAX )DC = 2 × VIN ( MAX ) AC = × = 16 . 5
3 .8 5 + 0 . 45
(3)
= 2 × ( 265 VAC ) = 375 V

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ACT510
Rev 2, 21-Feb-14

TYPICAL APPLICATION CONT’D


The auxiliary to secondary turn ratio NA/NS: equation for the output capacitance value is given
by:
N A VDD + VD ' 13 + 0 .45
= = = 2 .47 (11) IOUT 2
N S VOUT + VD 5 + 0 .45 COUT = = = 330 μF (19)
fsw × VRIPPLE 120k × 50mV
EE16 core is selected for the transformer. The
gapped core with an effective inductance ALE of 82 Two 680µF electrolytic capacitors are used to
nH/T2 is selected. The turn of the primary winding further reduce the output ripple.
is:
LP 0 . 54 mH
PCB Layout Guideline
NP = = 2
= 81 T (12) Good PCB layout is critical to have optimal
A LE 82 nH / T
performance. Decoupling capacitor (C4) and
feedback resistor (R6/R7) should be placed close to
The turns of secondary and auxiliary winding can
VDD and FB pin respectively. There are two main
be derived accordingly:
power path loops. One is formed by C1/C2, primary
Ns 1 winding, mosfet transistor and current sense
NS = × Np = × 81 = 5T resistor (R8). The other is secondary winding,
Np 16 .5
(13) rectifier D3 and output capacitors (C6/C7). Keep
N these loop areas as small as possible. Connecting
N A = A × Ns = 2.47 × 5 = 12T high current ground returns, the input capacitor
NS
(14) ground lead, and the ACT510 GND pin to a single
Determining the value of the current sense point (star ground configuration).
resistor (R7) uses the maximum current in the
design. So the input primary maximum current at
maximum load:
2 × IOUT _OCP ×VOUT 2 × 2.6 × 5
Ip _OCP = = = 717mA (15)
LP × fsw ×η 0.54 ×120× 0.78

Since the ACT510 internal current limit is set to


0.96V, the design of the current sense resistor is
given by:
VCS 0 .96
RCS = = = 1 .37 Ω (16)
I p _ OCP 0 . 717

The voltage feedback resistors are selected


according to the design. Because the line UVLO is
60VDC, the upper feedback resistor is given by:
NA
R FB _ UP = V INDC ×
N p × I FB _ UVLO
_ UVLO

(17)
60 × 12
= = 46 . 4 k Ω
81 × 0 . 2 mA
The lower feedback resistor is selected as:
V FB
R FB _ LOW = R FB _ UP
NA
( VOUT + VD ) - VFB (18)
NS
2 .2
= × 46 . 4 k Ω = 9 . 1k Ω
( 5 + 0 . 45 ) × 1 - 2 .2
When selecting the output capacitor, a low ESR
electrolytic capacitor is recommended to minimize
ripple from the current ripple. The approximate

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ACT510
Rev 2, 21-Feb-14

Figure 4:
Universal VAC Input, 5V/2A Output Charger

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ACT510
Rev 2, 21-Feb-14

Table 1:
ACT510 5V10W Bill of Materials

ITEM REFERENCE DESCRIPTION QTY MANUFACTURER


1 U1 IC, ACT510, SOT23-6 1 Active-Semi
2 C1 Capacitor, Electrolytic, 15µF/400V, 12x16mm 1 RUBYCON
3 C2 Capacitor, Electrolytic, 10µF/400V, 10x15mm 1 RUBYCON
4 C3 Capacitor, Ceramic, 1000pF/500V, 0805,SMD 1 POE
5 C4 Capacitor, Electrolytic, 6.8µF/35V, 5x11mm 1 POE
6 C5 Capacitor, Ceramic, 1000PF/100V, 0805,SMD 1 POE
7 C6 Capacitor, Electrolytic, 330µF/6.3V, 6.3x8mm 1 KSC
8 C7 Capacitor, Electrolytic, 820µF/6.3V, 6.5x15mm 1 KSC
9 C8 Capacitor, Ceramic, 0.1µF/25V, 0805, SMD 1 POE
10 C9 Capacitor, Ceramic, 1000pF/25V, 0805, SMD 1 POE
11 CY1 Safety Y1, Capacitor, 1000pF/400V, Dip 1 UXT
12 BD1 Bridge Rectifier, D1010S, 1000V/1.0A, SDIP 1 PANJIT
13 D2 Fast Recovery Rectifier, RS1G, 200V/1.0A, RMA 1 PANJIT
14 D3 Diode, Schottky, 45V/10A, S10U45S, SMD 1 Diodes
15 D4 Fast Recovery Rectifier, RS1M, 1000V/1.0A, RMA 1 PANJIT
16 D5 Diode,Ultra Fast, LL4148, SMD Open 1 Good-Ark
17 L1 Axial Inductor, 1.5mH, 5*7, Dip 1 SoKa
18 L2 Axial Inductor, 0.55*5T, 5*7, Dip 1 SoKa
19 LF2 CM Filter,R6K, 500µH, 0.55*2 6T 1 SoKa
20 Q1 Mosfet Transistor, 4N60, TO-262 1 Infineon
21 PCB1 PCB, L*W*T=53x29x1.6mm, Cem-1, Rev:A 1 Jintong
22 F1 Fuse, 1A/250V 1 TY-OHM
23 R1,R2 Chip Resistor, 1.0MΩ 1206, 5% 2 TY-OHM
24 R3 Carbon Resistor, 750KΩ, 0805, 5% 1 TY-OHM
25 R4 Chip Resistor, 100Ω, 0805, 5% 1 TY-OHM
26 R5, R9, R15 Chip Resistor, 22Ω, 0805, 5% 3 TY-OHM
27 R6 Chip Resistor, 46.4KΩ, 0805,1% 1 TY-OHM
28 R7 Chip Resistor, 9.1KΩ, 0805, 1% 1 TY-OHM
29 R8 Chip Resistor, 1.37Ω, 1206 , 5% 1 TY-OHM
30 R10, R11 Chip Resistor, 1KΩ, 0805, 5% 2 TY-OHM
31 R12 Chip Resistor, 3KΩ, 0805, 5% 1 TY-OHM
32 R13 Chip Resistor, 10.7KΩ, 0805, 1% 1 TY-OHM
33 R14 Chip Resistor, 10.5KΩ, 0805, 1% 1 TY-OHM
34 R16 Chip Resistor, 10Ω, 0805, 5% 1 TY-OHM
35 R17 Chip Resistor, 2.2KΩ, 0805, 5% 1 TY-OHM
36 T1 Transformer, Lp=0.54mH, EE16 1
37 U2 OPOT PC817C 1 Sharp
38 IC3 TL431 TO-92 1 ST

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Active-Semi Proprietary―For Authorized Recipients and Customers Copyright © 2014 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
ACT510
Rev 2, 21-Feb-14

TYPICAL PERFORMANCE CHARACTERISTICS

VDD ON/OFF Voltage vs. Temperature Startup Supply Current vs. Temperature
13.5
8

ACT510-002
ACT510-001
VDDON

Startup Supply Current (µA)


12.5
VDDON and VDDOFF (V)

11.5

10.5
7
9.5

8.5
VDDOFF
7.5

6
6.5
0 40 80 120 0 20 40 60 80 100 120

Temperature (°C) Temperature (°C)

Supply Current at Idle/Fault Mode vs. Maximum Switching Frequency vs.


Temperature Temperature
Maximum Switching Frequency (KHz)
ACT510-003

ACT510-004
0.4 160
Idle Mode
Supply Current (mA)

0.3

150

Fault Mode
0.2

0.1
140
0 20 40 60 80 100 120 0 20 40 60 80 100 120

Temperature (°C) Temperature (°C)

VCS Voltage vs. Temperature VFB Threshold Voltage vs. Temperature


5
ACT510-005

ACT510-006

1.0
VFB Threshold Voltage (V)

4 OLP
0.9
VCS Voltage (V)

0.8
2
Stop Switching

0.7
1
Start Switching

0.6 0
0 20 40 60 80 100 120 0 20 40 60 80 100 120

Temperature (°C) Temperature (°C)

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Active-Semi Proprietary―For Authorized Recipients and Customers Copyright © 2014 Active-Semi, Inc.
ActiveQRTM is a trademark of Active-Semi.
ACT510
Rev 2, 21-Feb-14

PACKAGE OUTLINE
SOT23-6 PACKAGE OUTLINE AND DIMENSIONS

Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact
sales@active-semi.com or visit http://www.active-semi.com.

is a registered trademark of Active-Semi.

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ActiveQRTM is a trademark of Active-Semi.

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