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MC14016B

Quad Analog Switch/


Quad Multiplexer
The MC14016B quad bilateral switch is constructed with MOS
P−channel and N−channel enhancement mode devices in a single
monolithic structure. Each MC14016B consists of four independent
switches capable of controlling either digital or analog signals. The http://onsemi.com
quad bilateral switch is used in signal gating, chopper, modulator,
demodulator and CMOS logic implementation. MARKING
DIAGRAMS
Features
• Diode Protection on All Inputs 14
• Supply Voltage Range = 3.0 Vdc to 18 Vdc PDIP−14
MC14016BCP
• Linearized Transfer Characteristics
P SUFFIX
CASE 646 AWLYYWW
• Low Noise − 12 nV/√Cycle, f ≥ 1.0 kHz typical 1
• Pin−for−Pin Replacements for CD4016B, CD4066B (Note improved
transfer characteristic design causes more parasitic coupling
14
capacitance than CD4016) SOIC−14
• For Lower RON, Use The HC4016 High−Speed CMOS Device or D SUFFIX
14016B
AWLYWW
The MC14066B CASE 751A
• This Device Has Inputs and Outputs Which Do Not Have ESD 1
Protection. Antistatic Precautions Must Be Taken.
• Pb−Free Packages are Available* 14
SOEIAJ−14
MAXIMUM RATINGS (Voltages Referenced to VSS) F SUFFIX MC14016B
AWLYWW
Symbol Parameter Value Unit CASE 965
VDD DC Supply Voltage Range −0.5 to +18.0 V 1
Vin, Vout Input or Output Voltage Range −0.5 to VDD + 0.5 V
(DC or Transient)
A = Assembly Location
Iin Input Current (DC or Transient) ± 10 mA
per Control Pin WL, L = Wafer Lot
YY, Y = Year
ISW Switch Through Current ± 25 mA WW, W = Work Week
PD Power Dissipation, per Package 500 mW
(Note 1)
TA Ambient Temperature Range −55 to +125 °C ORDERING INFORMATION
See detailed ordering and shipping information in the package
Tstg Storage Temperature Range −65 to +150 °C
dimensions section on page 2 of this data sheet.
TL Lead Temperature 260 °C
(8−Second Soldering)
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/C From 65C To 125C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS  (Vin or Vout)  VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

 Semiconductor Components Industries, LLC, 2005 1 Publication Order Number:


February, 2005 − Rev. 5 MC14016B/D
MC14016B

PIN ASSIGNMENT BLOCK DIAGRAM

IN 1 1 14 VDD 13
CONTROL 1 2
OUT 1 2 13 CONTROL 1 OUT 1
1
OUT 2 3 12 CONTROL 4 IN 1
5
IN 2 4 11 IN 4 CONTROL 2 3
4 OUT 2
CONTROL 2 5 10 OUT 4
IN 2
CONTROL 3 6 9 OUT 3 6
CONTROL 3 9
VSS 7 8 IN 3 OUT 3
8
IN 3
12
CONTROL 4 10
OUT 4
11
LOGIC DIAGRAM IN 4
(1/4 OF DEVICE SHOWN) VDD = PIN 14
OUT VSS = PIN 7

CONTROL

Control Switch
LOGIC DIAGRAM RESTRICTIONS IN 0 = VSS Off
VSS ≤ Vin ≤ VDD
VSS ≤ Vout ≤ VDD 1 = VDD On

ORDERING INFORMATION
Device Package Shipping†
MC14016BCP PDIP−14 500 Units / Tape & Ammo Box
MC14016BCPG PDIP−14 500 Units / Tape & Ammo Box
(Pb−Free)
MC14016BD SOIC−14 55 Units / Rail
MC14016BDG SOIC−14 55 Units / Rail
(Pb−Free)
MC14016BDR2 SOIC−14 2500 Units / Tape & Reel
MC14016BDR2G SOIC−14 2500 Units / Tape & Reel
(Pb−Free)
MC14016BFEL SOEIAJ−14 2000 Units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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2
MC14016B

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
Î ÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ VDD
− 55C 25C 125C

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
Characteristic Figure Symbol Vdc Min Max Min Typ (2) Max Min Max Unit

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
Input Voltage 1 VIL 5.0 − − − 1.5 0.9 − − Vdc

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
Control Input 10 − − − 1.5 0.9 − −
15 − − − 1.5 0.9 − −

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
VIH 5.0
10





3.0
8.0
2.0
6.0






Vdc

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
15 − 13 11 − − −
± 0.1 ± 0.00001 ± 0.1 ± 1.0

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
Input Current Control − Iin 15 − − − Adc

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
Input Capacitance − Cin pF
Control − − − − 5.0 − − −

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
Switch Input − − − − 5.0 − − −

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
Switch Output − − − 5.0 − − −

Feed Through − − − 0.2 − − −

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
Quiescent Current
ÎÎÎ
ÎÎ
ÎÎÎ
(Per Package) (3)ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
2,3 IDD 5.0
10



0.25
0.5


0.0005
0.0010
0.25
0.5


7.5
15
Adc

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
15 1.0 − 0.0015 1.0 − 30

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
“ON” Resistance 4,5,6 RON − − Ohms
(VC = VDD, RL = 10 k) − −

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
(Vin = + 5.0 Vdc) − 600 − 300 660 − 840

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
(Vin = − 5.0 Vdc) VSS = − 5.0 Vdc 600 − 300 660 − 840

(Vin = ± 0.25 Vdc) 5.0 600 − 280 660 − 840

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
(Vin = + 7.5 Vdc)

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ ÎÎ
ÎÎÎ
(Vin = ± 0.25 Vdc)
ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
(Vin = − 7.5 Vdc) VSS = − 7.5 Vdc
7.5



360
360
360



240
240
180
400
400
400



520
520
520

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
(Vin = + 10 Vdc)

ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
− 600 − 260 660 − 840

ÎÎ ÎÎ
(Vin = + 0.25 Vdc) VSS = 0 Vdc − 600 − 310 660 − 840

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
(Vin = + 5.6 Vdc) 10 600 − 310 660 − 840
(Vin = + 15 Vdc) − 360 − 260 400 − 520

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
(Vin = + 0.25 Vdc) VSS = 0 Vdc

ÎÎÎ
ÎÎÎ
− 360 − 260 400 − 520

ÎÎ ÎÎ
(Vin = + 9.3 Vdc) 15 − 360 − 300 400 − 520

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
 “ON” Resistance − RON Ohms
Between any 2 circuits in a common

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
package

ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ ÎÎ
(VC = VDD)

(Vin = ± 5.0 Vdc, VSS = − 5.0 Vdc) 5.0 − − 15 − − −

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ

(Vin = ± 7.5 Vdc, VSS = − 7.5 Vdc) 7.5 − − 10 − − −

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Input/Output Leakage Current

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
− − Adc

ÎÎ ÎÎ
(VC = VSS)
(Vin = + 7.5, Vout = − 7.5 Vdc) 7.5 − ± 0.1 − ± 0.0015 ± 0.1 − ± 1.0

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
(Vin = − 7.5, Vout = + 7.5 Vdc) 7.5 − ± 0.1 − ± 0.0015 ± 0.1 − ± 1.0

NOTE: All unused inputs must be returned to VDD or VSS as appropriate for the circuit application.
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. For voltage drops across the switch (Vswitch) > 600 mV ( > 300 mV at high temperature), excessive VDD current may be drawn; i.e., the
current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the
Maximum Ratings are exceeded. (See first page of this data sheet.) Reference Figure 14.

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3
MC14016B

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ELECTRICAL CHARACTERISTICS (4) (CL = 50 pF, TA = 25C)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
VDD

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
Characteristic Figure Symbol Vdc Min Typ (5) Max Unit

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
Propagation Delay Time (VSS = 0 Vdc) 7 tPLH, 5.0 − 15 45 ns
Vin to Vout tPHL 10 − 7.0 15

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
((VC = VDD, RL = 10 k)) 15 − 6.0 12

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
Control to Output 8 tPHZ, ns

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
(Vin  10 Vdc, RL = 10 k) tPLZ, 5.0 − 34 90
tPZH, 10 − 20 45

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
tPZL 15 − 15 35

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
Crosstalk, Control to Output (VSS = 0 Vdc) 9 − 5.0 − 30 − mV
(VC = VDD, Rin = 10 k, Rout = 10 k, 10 − 50 −

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
f = 1.0 kHz)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
Crosstalk between any two switches (VSS = 0 Vdc) − −
15
5.0


100
– 80

− dB

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
(RL = 1.0 k, f = 1.0 MHz,
V

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
crosstalk  20 log10 out1)
Vout2

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
Noise Voltage (VSS = 0 Vdc)

ÎÎÎÎ
(VC = VDD, f = 100 Hz)
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
10,11 − 5.0
10
15



24
25
30



nV/√Cycle

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
(VC = VDD, f = 100 kHz)

ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
5.0
10


12
12

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
15 − 15 −

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
Second Harmonic Distortion (VSS = – 5.0 Vdc) − − 5.0 − 0.16 − %
(Vin = 1.77 Vdc, RMS Centered @ 0.0 Vdc,

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
RL = 10 k, f = 1.0 kHz)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
Insertion Loss (VC = VDD, Vin = 1.77 Vdc, 12 − 5.0 dB
VSS = − 5.0 Vdc, RMS centered = 0.0 Vdc, f = 1.0 MHz)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
(RL = 1.0 k)
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
V

ÎÎÎÎ ÎÎÎÎ
Iloss  20 log10 out)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ ÎÎÎ ÎÎÎ
ÎÎÎÎ
Vin ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ


2.3
0.2

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
(RL = 10 k)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ
(RL = 100 k)
(RL = 1.0 M)
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ


0.1
0.05

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎ
Bandwidth (− 3.0 dB)

ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
(VC = VDD, Vin = 1.77 Vdc, VSS = − 5.0 Vdc,
12,13 BW 5.0 MHz

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
RMS centered @ 0.0 Vdc)
(RL = 1.0 k) − 54 −

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
(RL = 10 k) − 40 −

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
(RL = 100 k) − 38 −
(RL = 1.0 M) − 37 −

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
(VSS = − 5.0 Vdc) ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
Vout
ÎÎÎÎ
OFF Channel Feedthrough Attenuation

ÎÎÎ
ÎÎÎÎ
− − 5.0 kHz

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
(VC = VSS, 20 log10  –50 dB)
Vin − 1250 −
(RL = 1.0 k)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
− 140 −
(RL = 10 k)
− 18 −

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
(RL = 100 k)
− 2.0 −
(RL = 1.0 M)
4. The formulas given are for typical characteristics only at 25C.
5. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

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4
MC14016B

VC IS

Vin Vout

VIL: VC is raised from VSS until VC = VIL.


VIL: at VC = VIL: IS = ±10 A with Vin = VSS, Vout = VDD or Vin = VDD, Vout = VSS.
VIH: When VC = VIH to VDD, the switch is ON and the RON specifications are met.

Figure 1. Input Voltage Test Circuit

10,000
VDD = 15 Vdc 10 Vdc

PD , POWER DISSIPATION (µW)


VDD TA = 25°C
5.0 Vdc
1000

ID
100

VDD Vout
TO ALL
10 k 10
PULSE 4 CIRCUITS CONTROL
GENERATOR INPUT
fc

VSS Vin 1.0


PD = VDD x ID 5.0k 10k 100k 1.0M 10M 50M
fc, FREQUENCY (Hz)

Figure 2. Quiescent Power Dissipation Figure 3. Typical Power Dissipation per Circuit
Test Circuit (1/4 of device shown)

TYPICAL RON versus INPUT VOLTAGE

700 700
RL = 10 k VSS = 0 Vdc
600 TA = 25°C 600 RL = 10 k
R ON, ON" RESISTANCE (OHMS)

R ON, ON" RESISTANCE (OHMS)

TA = 25°C
500 500

400 VC = VDD = 5.0 Vdc 400


VSS = − 5.0 Vdc VC = VDD = 10 Vdc
300 300

200 200 VC = VDD = 15 Vdc


VC = VDD = 7.5 Vdc
100 VSS = − 7.5 Vdc 100

0 0
− 10 − 8.0 − 4.0 0 4.0 8.0 10 0 2.0 6.0 10 14 18 20
Vin, INPUT VOLTAGE (Vdc) Vin, INPUT VOLTAGE (Vdc)

Figure 4. VSS = − 5.0 V and − 7.5 V Figure 5. VSS = 0 V

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5
MC14016B

Vout

RL CL

Vin

Vout 20 ns 20 ns
RL VDD
Vin 90%
VC 50% 10%
VSS
tPLH tPHL

Vout 50%
Vin

Figure 6. RON Characteristics Figure 7. Propagation Delay Test Circuit


Test Circuit and Waveforms

Vout
VC RL CL

Vin VX
20 ns
VDD Vout
90%
VC 50%
10% VC 10 k 15 pF
VSS
tPZH tPHZ
Vin = VDD
90% Vx = VSS
Vout 10% Vin
tPZL tPLZ
90% 1k
Vout Vin = VSS
10%
Vx = VDD

Figure 8. Turn−On Delay Time Test Circuit Figure 9. Crosstalk Test Circuit
and Waveforms

35

30
VDD = 15 Vdc
NOISE VOLTAGE (nV/ CYCLE)

25
10 Vdc
20
5.0 Vdc
15
OUT QUAN−TECH 10
MODEL
VC = VDD
2283
5.0
IN OR EQUIV
0
10 100 1.0k 10 k 100 k
f, FREQUENCY (Hz)

Figure 10. Noise Voltage Test Circuit Figure 11. Typical Noise Characteristics

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6
MC14016B

2.0
RL = 1 M AND 100 k
0
TYPICAL INSERTION LOSS (dB)

10 k
− 2.0
1.0
− 4.0 k− 3.0 dB (R = 1.0 M )
L
Vout
− 6.0 − 3.0 dB (RL = 10 k ) RL
VC
− 3.0 dB (RL = 1.0 k )
− 8.0

− 10 + 2.5 Vdc
Vin 0.0 Vdc
− 12 − 2.5 Vdc
10 k 100 k 1.0M 10 M 100 M
fin, INPUT FREQUENCY (Hz)

Figure 12. Typical Insertion Loss/Bandwidth Figure 13. Frequency Response Test Circuit
Characteristics

ON SWITCH

CONTROL
SECTION
OF IC

LOAD
V

SOURCE

Figure 14. V Across Switch

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MC14016B

APPLICATIONS INFORMATION

Figure A illustrates use of the Analog Switch. The 0−to−5 V The example shows a 5 Vp−p signal which allows no
Digital Control signal is used to directly control a 5 Vp−p margin at either peak. If voltage transients above VDD
analog signal. and/or below VSS are anticipated on the analog channels,
The digital control logic levels are determined by VDD external diodes (Dx) are recommended as shown in Figure
and VSS. The VDD voltage is the logic high voltage; the VSS B. These diodes should be small signal types able to absorb
voltage is logic low. For the example, VDD = +5 V logic high the maximum anticipated current surges during clipping.
at the control inputs; V SS = GND = 0 V logic low. The absolute maximum potential difference between
The maximum analog signal level is determined by VDD VDD and VSS is 18.0 V. Most parameters are specified up to
and VSS. The analog voltage must not swing higher than 15 V which is the recommended maximum difference
VDD or lower than V SS. between VDD and VSS.

+5 V

VDD VSS
+ 5.0 V

+5 V 5 Vp−p SWITCH
ANALOG SIGNAL IN
SWITCH 5 Vp−p
+ 2.5 V
OUT ANALOG SIGNAL
EXTERNAL
CMOS 0−TO−5 V DIGITAL
GND
DIGITAL CONTROL SIGNALS MC14016B
CIRCUITRY

Figure A. Application Example

VDD VDD

Dx Dx

SWITCH SWITCH
IN OUT
Dx Dx

VSS VSS

Figure B. External Germanium or Schottky Clipping Diodes

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MC14016B

PACKAGE DIMENSIONS

PDIP−14
P SUFFIX
CASE 646−06
ISSUE N

NOTES:
1. DIMENSIONING AND TOLERANCING
14 8 PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
B 3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
1 7 4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
A
INCHES MILLIMETERS
F L DIM MIN MAX MIN MAX
A 0.715 0.770 18.16 18.80
B 0.240 0.260 6.10 6.60
N C
C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53
F 0.040 0.070 1.02 1.78
−T− G 0.100 BSC 2.54 BSC
SEATING H 0.052 0.095 1.32 2.41
PLANE J 0.008 0.015 0.20 0.38
K J K 0.115 0.135 2.92 3.43
H G D 14 PL M L 0.290 0.310 7.37 7.87
M −−− 10  −−− 10 
0.13 (0.005) M
N 0.015 0.039 0.38 1.01

SOIC−14
D SUFFIX
CASE 751A−03
ISSUE G

−A− NOTES:
1. DIMENSIONING AND TOLERANCING PER
14 8 ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−B− 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
P 7 PL PER SIDE.
0.25 (0.010) M B M 5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
1 7 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
G R X 45  F CONDITION.
C
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 8.55 8.75 0.337 0.344
−T− B 3.80 4.00 0.150 0.157
K M J C 1.35 1.75 0.054 0.068
SEATING D 14 PL D 0.35 0.49 0.014 0.019
PLANE
0.25 (0.010) M T B S A S F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019

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9
MC14016B

PACKAGE DIMENSIONS

SOEIAJ−14
F SUFFIX
CASE 965−01
ISSUE O

NOTES:
14 8 LE 1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
Q1 2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSIONS D AND E DO NOT INCLUDE MOLD
E HE M FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
1 7 L 4 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5 THE LEAD WIDTH DIMENSION (b) DOES NOT
DETAIL P INCLUDE DAMBAR PROTRUSION. ALLOWABLE
Z
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
D TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
VIEW P DAMBAR CANNOT BE LOCATED ON THE LOWER
A RADIUS OR THE FOOT. MINIMUM SPACE
e BETWEEN PROTRUSIONS AND ADJACENT LEAD
c TO BE 0.46 ( 0.018).
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A −−− 2.05 −−− 0.081
b A1 A1 0.05 0.20 0.002 0.008
b 0.35 0.50 0.014 0.020
0.13 (0.005) M 0.10 (0.004) c 0.18 0.27 0.007 0.011
D 9.90 10.50 0.390 0.413
E 5.10 5.45 0.201 0.215
e 1.27 BSC 0.050 BSC
HE 7.40 8.20 0.291 0.323
0.50 0.50 0.85 0.020 0.033
LE 1.10 1.50 0.043 0.059
M 0 10  0 10 
Q1 0.70 0.90 0.028 0.035
Z −−− 1.42 −−− 0.056

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