EMT352 Advanced Devices

Assignment III – Novel Devices (individual)

Deadline: 15 December 2016, Thursday

Section A

You are given the following article:

Hiroshi Iwai, “Future of Nano CMOS Technology,” Solid-State Electronics, vol. 112, pp. 56–67, 2015

Based on the article provided, answer the following questions:

(1) Downsizing a MOSFET will cause a critical issue on off-leakage current of the device. List
down four types of the off-leakage current components in MOSFETs that contribute to this
issue.
(4 Marks)

(2) By using an appropriate equation, explain:

(i) the meaning of subthreshold off-leakage current

(ii) the reason why reducing the threshold voltage will increase the subthreshold off-
leakage current.
(7 Marks)

(3) List down one advantage and one disadvantage of multi-gate FETs when compared with ET-
SOI FETs
(2 Marks)

(4) Multi-gate structures of MOSFETs such as fin-FET and Tri-gate have been developed to
improve the performance of MOSFETs. However multi-gate MOSFETs might also face
significant issues due to the downsizing. Elaborate these issues.
(4 Marks)

Based on the article provided, choose the correct answer.

(1) What is the fundamental limit of the downsizing due to the direct-tunneling current
between source and drain?
(a) 1 nm (c) 3 nm
(b) 2 nm (d) 4 nm

(2) Tri-gate FET was introduced by Intel into their ____ technology node product in 2012.
(a) 22 nm (c) 11 nm
(b) 32 nm (d) 14 nm

(3) ITRS is the short form of _____________________________

(4) EOT is the short form of ______________________________

(5) ET-SOI is the short form of ______________________________

(6) Intel has introduced ET-SOI FET in their production of 28-nm FET. TRUE / FALSE

(6 Marks)
Section B

Fin-FET is one of the novel technologies that has been invented to improve the performance of a
MOSFET. With the aid of diagrams, describe the fabrication process of a fin-FET.

(10 Marks)