Sie sind auf Seite 1von 4

Methods for Circuit-Based Automotive EMC Simulation incorporating VHDL-AMS Models

Florian Frank 1 , Martin L. Zitzmann 2 , Gernot Steinmair 2 , Robert Weigel 1

1 Institute for Electronics Engineering, University of Erlangen-Nuremberg, 91058 Erlangen, Germany 2 BMW Group, 80788 Munich, Germany

Email:

frank@lte.e-technik.uni-erlangen.de

Abstract— This paper provides an overview of several novel approaches to enhance today’s automotive EMC simulation. The introduction of fast and efficient modeling and solving techniques for models of passive PCB traces leads to an improved computational performance. Additionally, the development of a methodology enabling co-simulations of VHDL-AMS models of active IC devices yields more accurate numerical results. After the explanation of these enhancements, the proposed simulation flow and analysis methods are shown by means of numerical results from a typical automotive application.

I. INTRODUCTION

The complexity of problems arising in automotive elec- tromagnetic compatibility (EMC) analysis is increasing with the number of electronic systems assembled in modern cars. Components containing integrated circuits (ICs) and controlled sensors and actuators are influencing factors for the EMC quality. Disturbances like electronic noise on power and ground planes, which is known as simultaneous switching noise (SSN), are transferred via the cable harnesses to the whole system. To avoid cost and time intensive redesign cycles in the car development process, numerical simulation techniques are challenged to help identify and solve EMC relevant problems in the early design stage. For EMC analysis of automotive systems including the system level, the component level as well as the IC level, several different modeling and simulation techniques are re- quired. Whereas cable harness simulations are based on a 2D TL (transmission line) approach, for PCB simulations the 3D PEEC (partial element equivalent circuit) method [1] is applied. The PEEC method enables a circuit representation of the electric field integral equation (EFIE) and therefore a connection between the field domain and the circuit domain. Problems arise as soon as active devices, which are the main sources of the above mentioned disturbances, have to be modeled in order to incorporate them into circuit-based EMC simulations. Due to their nonlinear behavior, it is not sufficient to use simple equivalent circuit descriptions consisting of voltage and current sources and lumped RLC-components to achieve an accurate analysis result. In the past, the most common way was to use IBIS (input/output buffer information specification) [2] to describe the clamping behavior of active ICs. Unfortunately IBIS models show a significant sensitivity to the attached load and hence can be used within a quite narrowly bounded range of loading conditions only.

Solution of

Maxwell’s equations PEEC- Mesh PEEC- Model Geometry PEEC data Parameter SLSim TM Model Mesher Extraction
Maxwell’s equations
PEEC-
Mesh
PEEC- Model
Geometry
PEEC
data
Parameter
SLSim TM
Model
Mesher
Extraction
CAD
Discretization
Sub-
circuits
Simulator
Interface
Circuit-
File
VHDL-
AMS
SMASH TM
Models

Fig. 1.

that can be improved using the methodologies presented in this paper.

Circuit-based EMC simulation workflow. The gray boxes show steps

In recent years an alternative method of modeling active devices based on VHDL-AMS [3], a hardware description language for analog, digital, and mixed-signal applications, is going popularly. Using this language it becomes possible to generate models at any kind of abstraction level, i.e. parts based on physical equations and parts based on pure functional descriptions can be combined within one single model. Thus, models allowing accurate analysis results within a short sim- ulation time can be generated. In order to incorporate VHDL- AMS models into the already existing SPICE-based EMC simulation flow, a methodology has been developed enabling the co-simulation between SPICE and VHDL-AMS. This paper is organized as follows. Section II gives an overview of the enhanced EMC modeling and simulation process. In the next section, a short introduction to the PEEC method is given. Furthermore, it is explained how the solu- tion process in PEEC-based circuit-simulations can be sped up using hierarchical methods combined with special solver techniques. The functionality of a simulator interface program, which forms the basis of the newly developed SPICE-VHDL- AMS-co-simulation methodology, is briefly explained in sec- tion IV. In section V numerical results based on a typical automotive application are given and the last section concludes the paper.

2008 Asia-Pacific Sympsoium on Electromagnetic Compatibility &

20 19 th International Zurich Symposium on Elect romagnetic Compatibility, 19–22 May 2008, Singapore

2008 Asia-Pacific Sympsoium on Electromagnetic Compatibility, 19–22 May 2008, Singapore

II. EMC MODELING AND SIMULATION PROCESS

Using the methodologies and enhancements briefly intro- duced in the following sections, a fast and efficient EMC modeling and simulation process becomes possible. The im- proved analysis workflow as shown in Fig. 1 can be ab- stracted as follows: Before an EMC simulation run can be started, the 3D PEEC models of the PCB traces have to be generated. Therefore, a discretization of the geometrical design is necessary, building the basis for the numerical model computation. By solving Maxwell’s equations, the PEEC pa- rameter extraction (modeling) can be accomplished, resulting in so-called (R, L, C) PEEC models. Together with optional SPICE subcircuits and VHDL-AMS models, SLSim TM solves the network equations in the time domain in co-operation with SMASH TM .

III. PEEC-BASED CIRCUIT SIMULATION

A. PEEC Model Derivation

The 3D PEEC method allows the interpretation of con- ducting structures including dielectrics by a linear network of basic electrical elements. This integral equation based element method (BEM) approach is used for modeling of complex conducting structures like PCB traces and interconnects and leads to dense system matrices in general. The PEEC modeling process starts with a discretization of the conducting medium into volume and surface cells, which is necessary to approxi- mate current and charge densities. Afterwards, the method of moments (MoM) [4] is applied together with Galerkins method [5] to the EFIE to determine the equivalent circuit components.

A

complete theoretical derivation of the PEEC method is given

in

[1].

B.

Fast and Efficient Extraction of Parasitic Effects

A fast and accurate computation of matrix elements repre- sents one major issue to implement an efficient simulation process. This is especially important for parasitic matrices originating from electromagnetic boundary integral equation (BIE) approaches such as the PEEC method. BEM-based

matrices as inductance matrices and potential coefficient ma- trices are dense, in general. These matrices comprise n =

degrees of freedom (DOF) for geometric meshing

with meshsize h thus exhibiting O h 4 matrix entries [6] in 2D. Both the TD and the FD analysis need to compute large numbers of interactions between basis functions for each and every simulation step, leading to enormous CPU time and memory requirements. This can form severe limitation to the number of DOF in practical relevant problems. Fast methods are necessary to reduce the complexity of basic arithmetic operations.

O

h 2

Hierarchical matrices (“H-matrices”) help to represent the matrix as a decomposition of matrix subblocks. They provide

a purely mathematical approach to describe dense matrices

by so-called data-sparse matrices. Based on this kind of description, it is possible to apply approximative algorithms for matrix arithmetic with almost optimal complexity.

21

In H-matrix-based model computation, a fast and accurate approximation of a parasitics matrix is aspired. Controlled by a suitable heuristics only required matrix entries have to be computed, leading to a complexity reduction from O n 2 to

O (nlogn) [7]. Furthermore, H-matrices provide

advantageous features to enhance efficiency and flexibility, compared to fast multipole methods (FFM) [8], [9].

C. Hierarchical Matrices Based Solvers for PEEC

Utilizing iterative methods to obtain an accurate solution of Ax = b inevitably leads to square complexity w.r.t. CPU time and memory requirements even for sparse matrices. A reduction to almost linear complexity can be accomplished by approximating the PEEC-based system matrix A by a

H-matrix A H . The approximative solution x˜ of

the system A H x = b must fulfill the accuracy condition x x˜ ε for a given ε > 0. Based on the formatted H-matrix arithmetic [10], efficient preconditioning techniques can be realized. Implementation issues for an appropriate matrix setup and suitable preconditioning for an efficient PEEC-based circuit simulation have to be taken into account

data-sparse

additional

[11].

IV. INTERFACE FOR

SPICE-VHDL-AMS-CO-SIMULATION

In order to improve the results of EMC simulations, an interface has been developed enabling co-simulations between SPICE and VHDL-AMS. Using this interface, it becomes possible to replace simple equivalent circuits of non-linear active devices with more realistic VHDL-AMS models. The interface connects the SPICE-based circuit simulator SLSim TM [12], which is part of a special EMC toolbox providing the modeling and solving strategies mentioned above, and the VHDL-AMS simulator SMASH TM [13]. The functionality of the interface program and the according co-simulation flow can be abstracted as follows: SLSim TM , which is used as master simulator, loads the SPICE netlist and subsequently all required SPICE models. Thereafter, the simulator SMASH TM is invoked as slave and linked into the running master process. Finally, all additional VHDL-AMS models are loaded and the operating point analysis as well as the transient time domain simulation can be carried out.

A. Connection of SPICE and VHDL-AMS Models

During a mixed-language simulation, i.e., an analysis of a combination of SPICE and VHDL-AMS models, both sim- ulators have to compute solutions of their internal systems of ordinary differential-algebraic equations (DAEs) indepen- dently of each other. Nevertheless, it is necessary to make the calculated values available for the other simulator. Therefore special interconnecting nodes have been introduced allowing for the exchange of voltage and current values. These interconnecting nodes are handled by SLSim TM as voltage controlled current sources, whose current values are calculated by the external VHDL-AMS simulator. The latter treats these nodes as special voltage sources, whose voltage

(dB)

|S 11 |

(dB)

|S 21 |

19 th International Zurich Symposium on Elect romagnetic Compatibility, 19–22 May 2008, Singapore

values are determined and are only allowed to be changed by the SPICE simulator. A drawing of one of these interconnect- ing nodes is shown in Fig. 2.

SPICE VHDL-AMS I T I T = f (V T ) V T V T
SPICE
VHDL-AMS
I T
I T
= f (V T )
V T
V
T
V T
I T

Fig. 2. Interconnecting node of the SLSim TM part (white box) and the SMASH TM part (gray box) of a mixed-language simulation model. Whereas the former consists of a voltage controlled current source the latter consists of a voltage source.

B. Transient Time Analysis

During a transient time analysis, the master simulator is responsible for the adaptive time step control. This means that SLSim TM determines the step widths and thus, the time instances at which a corresponding analog solution is calcu- lated as well as the synchronization between the simulator parts is carried out. In cases where one or both simulators could not determine a corresponding analog solution of their internal systems of DAEs the step width will be reduced. A recalculation of the analog solution and a reduction of the step width, respectively, is also required if the VHDL-AMS simulator is not able to synchronize the logic simulator part with its analog one due to logic events. This synchronization is required after every calculation of an analog solution point.

V. N UMERICAL R ESULTS

For both simulation and measurement purposes an auto- motive specific demonstrator board is considered. The board consists of four layers with dielectric medium FR4 and stems from a typical application in automotive industry. The fully assembled board contains a microcontroller and two power drivers which are used to switch DC motors and lights, respec- tively. Measurements are possible via provided connectors. The investigated design is part of a research project named MISEA [14]. To show the functionality of the enhancements made to the EMC simulation process and thus the correspondence of measurement and simulation results, a reluctance-based model [11] of a relevant signal trace is considered. A suitably chosen meshsize guarantees the validity of the model in the TD as well as in the FD. The good accordance of physical measurements and the simulation results obtained with the generated PEEC model is shown in Fig. 3. Both model extraction and simulation in the conventional case require a large amount of time. Therefore, the total analysis process cannot be carried out in less than one or two days. A first ap- proach for simulation acceleration can be enabled by applying simple matrix sparsification by truncation [11]. Although the

0

-20

-40

-60

-80

Measurement Simulation 10 5 10 6 10 7 10 8 10 9 Frequency (Hz)
Measurement
Simulation
10 5
10 6
10 7
10 8
10 9
Frequency (Hz)

10 10

Measurement Simulation
Measurement
Simulation

10 4

10 5

10 6

10 7

Frequency (Hz)

10 8

10 9

10 10

10 4

0

-20

-40

-60

Fig. 3. Comparison between simulation and measurement results. Due to symmetry reasons only the magnitudes of the scattering parameters S 11 and S 21 are shown.

complexity of the modeling process remains almost constant, the simulation can be accelerated by a factor of 5. Even if a truncation enables a simple sparsification method, it is not efficient enough to implement accurate simulations for large industrially relevant problems. A further enhancement can be accomplished by accelerating model extraction as well as simulation using hierarchical techniques. Applying H- matrix-based computation of parasitics, a modeling speed-up by an additional factor 7 can be achieved. Compared to conventional techniques an increased modeling accuracy can be obtained. A gain with a factor 20 can be achieved con- cerning storage requirements by using the H-matrix storage format instead of the conventional coordinate sparse matrix storage format. The simulation process can be accelerated up to a factor of 10 by applying an algebraic multigrid (AMG) solver [11]. Besides the improvements concerning modeling and anal- ysis speed, further enhancements concerning the accuracy of the simulation results can be achieved. Therefore, some of the active devices that are assembled on the demonstrator board will be included in the EMC simulation using accurate VHDL- AMS models. As an example, one of the two power drivers is used. Thus the executed co-simulation includes the VHDL- AMS model of this device as well as the PEEC model of the connected power trace. Other devices like the load and the power supply are modeled using SPICE equivalent circuits. The chosen power driver is the high-side power switch BTS5440 of Infineon [15]. This device usually is used to switch all kinds of resistive, inductive and capacitive loads. In Fig. 4 it was used to switch a resistive load with R =

22

2008 Asia-Pacific Sympsoium on Electromagnetic Compatibility, 19–22 May 2008, Singapore

5 Ω. This figure compares the current at the output pin of the co-simulation with the corresponding pure VHDL-AMS

simulation and with a similar SPICE simulation (IBIS model of the BTS5440). In the pure VHDL-AMS simulation, only

VHDL-AMS models and the

SMASH TM simulator were used.

From the figure it is obvious that, as expected, no differences between the curves exist. It should be evident that the co- simulation takes a longer execution time than the pure VHDL- AMS analysis and the SPICE simulation. This is due to the fact that in the co-simulation two separate simulators are involved.

3 2.5 2 1.5 VAMS Sim. 1 Co-Sim. 0.5 IBIS Sim. 0 0 0.1 0.2
3
2.5
2
1.5
VAMS Sim.
1
Co-Sim.
0.5
IBIS Sim.
0
0
0.1
0.2
0.3
0.4
0.5
Current (mA)

Time (ms)

Fig. 4. Comparison of the current at the output pin of the high-side power switch. In all simulations a resistive load with R =5Ω was used.

In Fig. 5 the simulation results of the co-simulation includ- ing the PEEC model of the PCB power trace as well as an equivalent SPICE circuit of the cable harness are shown. The BTS5440 model was terminated with a serial connection of a 6.676 Ω resistor and a 25 μH inductor. In the figure the simulation results of the battery voltage and the output voltage are compared to a corresponding analysis in which the VHDL- AMS model was replaced by the IBIS model of the power driver. The differences between the depicted curves are caused by the significant load sensitivity of the IBIS model. This was generated using simulations of the original VHDL-AMS model, terminated by the resistive load with R =5Ω.

VI. CONCLUSIONS

In the course of this paper, fast and accurate modeling and simulation techniques have been introduced and a new developed co-simulation methodology based on two differ- ent simulators has been presented. The BEM-based PEEC modeling approach proved to be useful for the analysis of the electromagnetic behavior of 3D interconnects and traces on PCBs. A speed increase of the model generation and the simulation process could be obtained using hierarchical matrices combined with special iterative solver strategies. In addition, the simulation results could be further improved by replacing simple equivalent circuit models of active devices assembled on PCBs by more accurate VHDL-AMS models.

ACKNOWLEDGMENT

This work was undertaken in the course of the project MISEA [14], supported by the Bavarian Research Foundation (Bayerische Forschungsstiftung).

14.5 VAMS Model 14 IBIS Model 13.5 13 12.5 12 11.5 0 0.1 0.2 0.3
14.5
VAMS Model
14
IBIS Model
13.5
13
12.5
12
11.5
0 0.1
0.2
0.3
0.4
0.5
V bat (V)

Time (ms)

12 10 8 6 4 2 VAMS Model 0 IBIS Model -2 0 0.1 0.2
12
10
8
6
4
2
VAMS Model
0
IBIS Model
-2
0 0.1
0.2
0.3
0.4
0.5
V out (V)

Time (ms)

Fig. 5. Comparison of results of simulations including the active device BTS5440, a PEEC model, and an equivalent circuit model of the cable harness. In one simulation the high-side power switch was represented using a simple IBIS model and in the other a more accurate VHDL-AMS model was used.

REFERENCES

[1] A. E. Ruehli, “Equivalent Circuit Models for Three-Dimensional Mul- ticonductor Systems,” IEEE Trans. Microwave Theory Tech., vol. MTT- 22, no. 3, pp. 216–221, Mar. 1974. [2] The IBIS Open Forum, “IBIS – I/O Buffer Information,” Version 4.2. [3] “IEEE Standard VHDL Analog and Mixed-Signal Extensions,” IEEE Std. 1076.1-1999, New York, USA, 1999. [4] R. F. Harrington, Field Computation by Moment Methods, Piscataway, NJ, USA, 1993.

[5] J. Ekman, “Electromagnetic modeling using the partial element equiva- lent circuit method,” Ph.D. dissertation, Lulea University of Technology,

2003.

[6] M. E. Verbeek, “Iterative solvers and preconditioning for electromag-

netic boundary integral equations,” Ph.D. dissertation, University of Utrecht, Utrecht, The Netherlands, 2001.

[7] W. Hackbusch, “A sparse matrix arithmetic based on H-matrices. Part I: Introduction to H-matrices,” Computing, vol. 62, pp. 89–108, 1999.

G. Antonini, “Fast Multipole Method for Time Domain PEEC Analysis,”

IEEE Trans. Mobile Comput., vol. 2, no. 4, pp. 275–287, Dec. 2003. [9] G. Antonini and A. E. Ruehli, “Fast Multipole and Multifunction PEEC

Methods,” IEEE Trans. Mobile Comput., vol. 2, no. 4, pp. 288–298, Dec. 2003.

[10] W. Hackbusch, “A sparse matrix arithmetic based on H-matrices. Part I: Introduction to H-matrices,” Computing, vol. 62, pp. 89–108, 1999. [Online]. Available: http://www.mis.mpg.de/preprints/ [11] M. L. Zitzmann, “Fast and Efficient Methods for Circuit-based Auto- motive EMC Simulation,” Ph.D. dissertation, University of Erlangen,

[8]

2007.

[12] SimLab Software GmbH, “PCBMod / SLSim,” version 4.0.2. [Online]. Available: http://www.simlab.de [13] Dolphin Integration, “SMASH – Logic, Analog and Mixed simulation,” version 5.9.3. [Online]. Available: http://www.dolphin.fr [14] “MISEA – Modellierung Integrierter Schaltungen fur¨ die EMV-Simulation in der Automobilindustrie.” [Online]. Available:

http://www.misea.de [15] Datasheet BTS 5440G: Smart High-Side Power Switch, Infineon Tech- nologies, June 2005.

23