StrongIRFET™

IRFB7437PbF
Applications HEXFET® Power MOSFET
l Brushed Motor drive applications
l BLDC Motor drive applications
D VDSS 40V
l Battery powered circuits RDS(on) typ. 1.5mΩ
l Half-bridge and full-bridge topologies max. 2.0mΩ
l Synchronous rectifier applications
l Resonant mode power supplies
G
ID (Silicon Limited) 250A c
l OR-ing and redundant power switches S ID (Package Limited) 195A
l DC/DC and AC/DC converters
l DC/AC Inverters

D
Benefits
l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
l Fully Characterized Capacitance and Avalanche SOA S
D
l Enhanced body diode dV/dt and dI/dt Capability G
l Lead-Free
TO-220AB
l RoHS Compliant, Halogen-Free* IRFB7437PbF

G D S
Gate Drain Source

Standard Pack
Base Part Number Package Type Orderable Part Number
Form Quantity
IRFB7437PbF TO-220 Tube 50 IRFB7437PbF
( Ω)

6 250
RDS (on), Drain-to -Source On Resistance m

ID = 100A LIMITED BY PACKAGE

5
200
ID , Drain Current (A)

4
150
3
TJ = 125°C
100
2

1 TJ = 25°C 50

0 0
4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 25 50 75 100 125 150 175
VGS, Gate-to-Source Voltage (V) TC , Case Temperature (°C)

Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature

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 IRFB7437PbF

Absolute Maximum Ratings

Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) c
250
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 180
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 195
IDM Pulsed Drain Current d 1000
PD @TC = 25°C Maximum Power Dissipation 230 W
Linear Derating Factor 1.5 W/°C
VGS Gate-to-Source Voltage ± 20 V
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Mounting torque, 6-32 or M3 screw x x
10lbf in (1.1N m)
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 350 mJ
EAS (Thermally limited) Single Pulse Avalanche Energy k 802
IAR Avalanche Currentd See Fig. 14, 15, 22a, 22b A
EAR Repetitive Avalanche Energy d mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case j ––– 0.65
RθCS Case-to-Sink, Flat Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient j ––– 62

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250μA
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.029 ––– V/°C Reference to 25°C, ID = 1mA d
RDS(on) Static Drain-to-Source On-Resistance ––– 1.5 2.0 mΩ VGS = 10V, ID = 100A
––– 1.8 ––– VGS = 6.0V, ID = 50A
VGS(th) Gate Threshold Voltage 2.2 3.0 3.9 V VDS = VGS, ID = 150μA
IDSS Drain-to-Source Leakage Current ––– ––– 1.0 μA VDS = 40V, VGS = 0V
––– ––– 150 VDS = 40V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Internal Gate Resistance ––– 2.2 ––– Ω

Notes:
 Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.069mH
RG = 50Ω, IAS = 100A, VGS =10V.
„ ISD ≤ 100A, di/dt ≤ 1166A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
… Pulse width ≤ 400μs; duty cycle ≤ 2%.
† Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS .
ˆ Rθ is measured at TJ approximately 90°C.
‰ Limited by TJmax starting TJ = 25°C, L= 1mH, RG = 50Ω, IAS = 40A, VGS =10V.
* Halogen -Free since April 30, 2014

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Dynamic @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 160 ––– ––– S VDS = 10V, ID = 100A
Qg Total Gate Charge ––– 150 225 nC ID = 100A
Qgs Gate-to-Source Charge ––– 41 ––– VDS =20V
Qgd Gate-to-Drain ("Miller") Charge ––– 51 ––– VGS = 10V g
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 99 ––– ID = 100A, VDS =20V, VGS = 10V
td(on) Turn-On Delay Time ––– 19 ––– ns VDD = 20V
tr Rise Time ––– 70 ––– ID = 30A
td(off) Turn-Off Delay Time ––– 78 ––– RG = 2.7Ω
tf Fall Time ––– 53 ––– VGS = 10V g
Ciss Input Capacitance ––– 7330 ––– pF VGS = 0V
Coss Output Capacitance ––– 1095 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 745 ––– ƒ = 1.0 MHz, See Fig. 5
Coss eff. (ER) Effective Output Capacitance (Energy Related) i ––– 1310 ––– i
VGS = 0V, VDS = 0V to 32V , See Fig. 11
Coss eff. (TR) h
Effective Output Capacitance (Time Related) ––– 1735 ––– VGS = 0V, VDS = 0V to 32V h
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 250 c A MOSFET symbol D

(Body Diode) showing the

ISM
G
Pulsed Source Current ––– ––– 1000 A integral reverse
(Body Diode)d p-n junction diode.
S

VSD Diode Forward Voltage ––– 1.0 1.3 V TJ = 25°C, IS = 100A, VGS = 0V g
dv/dt Peak Diode Recovery f ––– 3.1 ––– V/ns TJ = 175°C, IS = 100A, VDS = 40V g
trr Reverse Recovery Time ––– 30 ––– ns TJ = 25°C VR = 34V,
––– 30 ––– TJ = 125°C IF = 100A
Qrr Reverse Recovery Charge ––– 24 ––– nC TJ = 25°C di/dt = 100A/μs g
––– 25 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 1.3 ––– A TJ = 25°C

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1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

8.0V 8.0V
7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
100 5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V

100

10 4.5V

4.5V

≤60μs PULSE WIDTH

Tj = 25°C ≤60μs PULSE WIDTH
Tj = 175°C
1 10
0.1 1 10 100 0.1 1 10 100
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 3. Typical Output Characteristics Fig 4. Typical Output Characteristics

1000 2.0
ID = 100A

RDS(on) , Drain-to-Source On Resistance

1.8 VGS = 10V
ID, Drain-to-Source Current(A)

TJ = 175°C
1.6
100
(Normalized)

1.4

TJ = 25°C 1.2

10
1.0

VDS = 10V 0.8

≤60μs PULSE WIDTH
1.0 0.6
3 4 5 6 7 8 -60 -40 -20 0 20 40 60 80 100120140160180
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 5. Typical Transfer Characteristics Fig 6. Normalized On-Resistance vs. Temperature

100000 14
VGS = 0V, f = 1 MHZ
ID= 100A VDS = 32V
Ciss = Cgs + Cgd, Cds SHORTED
VGS, Gate-to-Source Voltage (V)

12 VDS = 20V
Crss = Cgd
Coss = Cds + Cgd
10
C, Capacitance (pF)

10000
Ciss
8

6
Coss
Crss
1000 4

0
100 0 40 80 120 160 200
1 10 100 QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage

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1000
1000
100μsec

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

TJ = 175°C
100
100 1msec

Limited by Package
TJ = 25°C
10
10 10msec
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
1 1 DC
Tc = 25°C
Tj = 175°C
VGS = 0V Single Pulse
0.1 0.1
0.0 0.5 1.0 1.5 2.0 2.5 0.1 1 10

VSD , Source-to-Drain Voltage (V) VDS, Drain-toSource Voltage (V)

Fig 9. Typical Source-Drain Diode Fig 10. Maximum Safe Operating Area
Forward Voltage
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)

50 1.2
Id = 1.0mA
1.0
48

0.8
Energy (μJ)

46
0.6

44
0.4

42 0.2

0.0
40
0 10 20 30 40 50
-60 -40 -20 0 20 40 60 80 100120140160180
VDS, Drain-to-Source Voltage (V)
TJ , Temperature ( °C )
Fig 11. Drain-to-Source Breakdown Voltage Fig 12. Typical COSS Stored Energy

8
RDS (on) , Drain-to-Source On Resistance (mΩ)

VGS = 5.5V
7
VGS = 6.0V
6

5
VGS = 7.0V
4 VGS = 8.0V
VGS = 10V

1
0 100 200 300 400 500
ID , Drain Current (A)

Fig 13. Typical On-Resistance vs. Drain Current

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D = 0.50
0.20
Thermal Response ( ZthJC )

0.1
0.10
0.05

0.02
0.01
0.01

0.001 SINGLE PULSE

( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ΔTj = 150°C and
Avalanche Current (A)

Tstart =25°C (Single Pulse)

100

10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C. (Single Pulse)
1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth

350 Notes on Repetitive Avalanche Curves , Figures 14, 15:

TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
300 Purely a thermal phenomenon and failure occurs at a temperature far in
ID = 100A
EAR , Avalanche Energy (mJ)

excess of Tjmax. This is validated for every part type.

250 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
200
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
150 6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
100 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
50
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)

0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25 50 75 100 125 150 175
Iav = 2DT/ [1.3·BV·Zth]
Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tav

Fig 16. Maximum Avalanche Energy vs. Temperature

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4.5 10
IF = 60A
VGS(th), Gate threshold Voltage (V)

4.0 VR = 34V
8
TJ = 25°C
3.5
TJ = 125°C

3.0 6

IRR (A)
ID = 150μA
2.5 ID = 1.0mA 4
ID = 1.0A
2.0
2
1.5

1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 0 200 400 600 800 1000
TJ , Temperature ( °C ) diF /dt (A/μs)

Fig 17. Threshold Voltage vs. Temperature Fig. 18 - Typical Recovery Current vs. dif/dt

10 140
IF = 100A IF = 60A
VR = 34V 120 VR = 34V
8 TJ = 25°C
TJ = 25°C
100 TJ = 125°C
TJ = 125°C

6
QRR (nC)

80
IRR (A)

60
4

40
2
20

0 0
0 200 400 600 800 1000 0 200 400 600 800 1000
diF /dt (A/μs) diF /dt (A/μs)

Fig. 19 - Typical Recovery Current vs. dif/dt Fig. 20 - Typical Stored Charge vs. dif/dt

140
IF = 100A
120 VR = 34V
TJ = 25°C
100 TJ = 125°C
QRR (nC)

80

60

40

20

0
0 200 400 600 800 1000
diF /dt (A/μs)

Fig. 21 - Typical Stored Charge vs. dif/dt

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 IRFB7437PbF

Driver Gate Drive

P.W.
D.U.T P.W.
Period D=
Period
+

VGS=10V *
ƒ Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance
D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG V DD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• ISD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
20V
VGS
tp 0.01Ω
I AS

Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms
RD
VDS VDS

VGS
90%
D.U.T.
RG
+
- VDD

V10V
GS 10%
Pulse Width ≤ 1 µs VGS
Duty Factor ≤ 0.1 %
td(on) tr t d(off) tf

Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds

Vgs
50KΩ

12V .2μF
.3μF

+
V
D.U.T. - DS
Vgs(th)
VGS

3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 25a. Gate Charge Test Circuit Fig 25b. Gate Charge Waveform
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TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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Qualification information†
Qualification level Industrial
(per JEDEC JESD47F††guidelines)
Moisture Sensitivity Level TO-220 Not applicable
RoHS compliant Yes
† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
†† Applicable version of JEDEC standard at the time of product release.

Revision History
Date Comment
• Updated data sheet with new IR corporate template.
• Updated typo on the fig.19 and fig.21, unit of y-axis from "A" to "nC" on page7.
4/22/2014
• Updated package outline and part marking on page 9.
• Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1.
• Updated EAS (L =1mH) = 802mJ on page 2
1/6/2015
• Updated note 9 “Limited by TJmax , starting TJ = 25°C, L = 1mH, RG = 50Ω, IAS = 40A, VGS =10V”. on page 2

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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