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On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology
Corporation, and Renesas Electronics Corporation took over all the business of both
companies. Therefore, although the old company name remains in this document, it is a valid
Renesas Electronics document. We appreciate your understanding.
(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-
owned subsidiaries.
(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
HD74LS32
Quadruple 2-input Positive OR Gate
REJ03D0405–0200
Rev.2.00
Feb.18.2005
Features
• Ordering Information
Pin Arrangement
1A 1 14 VCC
1B 2 13 4B
1Y 3 12 4A
2A 4 11 4Y
2B 5 10 3B
2Y 6 9 3A
GND 7 8 3Y
(Top view)
VCC
20k 20k 11k 8k 75
Inputs
A
B
Output
Y
4.5k
1.5k 3k
GND
Electrical Characteristics
(Ta = –20 to +75 °C)
Item Symbol min. typ.* max. Unit Condition
VIH 2.0 — — V
Input voltage
VIL — — 0.8 V
VOH 2.7 — — V VCC = 4.75 V, VIH = 2 V, IOH = –400 µA
Output voltage — — 0.5 IOL = 8 mA
VOL V VCC = 4.75 V, VIL = 0.8 V
— — 0.4 IOL = 4 mA
IIH — — 20 µA VCC = 5.25 V, VI = 2.7 V
Input current IIL — — –0.4 mA VCC = 5.25 V, VI = 0.4 V
II — — 0.1 mA VCC = 5.25 V, VI = 7 V
Short-circuit output
IOS –20 — –100 mA VCC = 5.25 V
current
ICCH — 3.1 6.2 mA VCC = 5.25 V
Supply current
ICCL — 4.9 9.8 mA VCC = 5.25 V
Input clamp voltage VIK — — –1.5 V VCC = 4.75 V, IIN = –18 mA
Note: * VCC = 5 V, Ta = 25°C
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item Symbol min. typ. max. Unit Condition
tPLH — 14 22 ns
Propagation delay time CL = 15 pF, RL = 2 kΩ
tPHL — 14 22 ns
Note: Refer to Test Circuit and Waveform of the Common Item "TTL Common Matter (Document No.: REJ27D0005-
0100)".
Package Dimensions
JEITA Package Code RENESAS Code Previous Code MASS[Typ.]
P-DIP14-6.3x19.2-2.54 PRDP0014AB-B DP-14AV 0.97g
14 8
E
1 7
b3
A
e1 7.62
A1
D 19.2 20.32
E 6.3 7.4
A 5.06
L
A1 0.51
bp 0.40 0.48 0.56
e bp θ c b3 1.30
c 0.19 0.25 0.31
e1
θ 0° 15°
e 2.29 2.54 2.79
Z 2.39
( Ni/Pd/Au plating ) L 2.54
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
*1 DO NOT INCLUDE MOLD FLASH.
D F 2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
14 8
bp
HE
E
c
*2
θ 0° 8°
HE 7.50 7.80 8.00
θ e 1.27
A1
y L x 0.12
y 0.15
Detail F Z 1.42
L 0.50 0.70 0.90
L 1 1.15