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Soft-Switched PFC Boost Rectifier with

Integrated ZVS Two-Switch Forward Converter


Yungtaek Jang, Dave L. Dillman, and Milan M. Jovanović
Delta Products Corporation
Power Electronics Laboratory
P.O. Box 12173, 5101 Davis Drive
Research Triangle Park, NC 27709

Abstract — A soft-switched continuous-conduction-mode boost circuit, not only are the switches in the PFC boost converter
PFC front-end converter with an integrated zero-voltage- soft switched, the switches in the two-switch forward
switched two-switch forward second-stage converter is converter are also able to achieve soft switching.
introduced. In the proposed approach, a single transformer is
commonly used by the two stages to provide isolation of the
II. SOFT-SWITCHED PFC BOOST CONVERTER WITH
power supply and soft switching of all semiconductor switches
including a controlled di/dt turn-off rate of the boost rectifier. INTEGRATED TWO-SWITCH FORWARD CONVERTER
The performance of the proposed approach was evaluated on a The proposed soft-switched PFC boost converter with
150-kHz, 430-W/12-V, universal-line range prototype converter. integrated two-switch forward converter is shown in Fig. 1.
The boost converter consists of voltage source VIN, boost
I. INTRODUCTION inductor LB, main switch S, boost rectifier D, energy-storage
A boost power-factor-corrected (PFC) front-end converter capacitor CB, and the active snubber circuit formed by
followed by a dc-dc two-switch forward converter is one of auxiliary switch S1, winding N1 of transformer TR, snubber
the most extensively employed converter combinations in inductor LS, and blocking diode D1. The two-switch forward
off-line power supplies used in low-end computer servers and converter consists of switches SD1 and SD2 with associated
high-end desk top computers. The front-end boost rectifier is antiparallel diodes, isolation transformer TR, rectifiers DR1
employed to reduce the line-current harmonics and to provide and DR2, output inductor LF, and output capacitor CF.
compliance with various worldwide specifications governing To facilitate the explanation of the circuit operation, Fig. 2
the harmonic limits of the line current in off-line power shows a simplified circuit diagram of the proposed converter
supplies, whereas the two-switch forward converter is in Fig. 1. In the simplified circuit, energy-storage capacitor
employed to provide galvanic isolation and tight output CB is modeled by voltage source VB by assuming that the
voltage regulation. The popularity of the two-switch forward value of CB is large enough so that the voltage ripple across
converter topology stems from its maturity, simplicity, the capacitor is small in comparison to its dc voltage. In
robustness, good performance, and low cost. addition, boost inductor LB and output filter inductor LF are
The continuous-conduction-mode (CCM) boost converter modeled as constant current sources IIN and IO, respectively,
is the preferred topology for implementation of a front end by assuming that the inductance of LB and LF are large so that
with PFC over the range of medium to high power. In recent during a switching cycle the currents through LB and LF do
years, significant efforts have been made to improve the
performance of high-power CCM boost converters [1]-[5]. LB D
The majority of these development efforts have been focused
on reducing the adverse effects of the reverse-recovery D1 DD1
DSD1 S D1
characteristic of the boost diode on the conversion efficiency DR1
LF
CB
and electromagnetic compatibility (EMC) [6]. Similar effort LS

has been put in optimizing and improving the performance of TR +


CF RL VO
the two-switch forward converter [7]-[8]. VIN
S
N1 N2 N3 DR2
-
In this paper, a novel ac-dc converter that integrates the
CCM boost front end with the dc-dc two-switch forward
converter is described. The integration of the two power S1
DD2
DSD2 S D2
stages is achieved by a magnetic component that is shared by
both stages. This approach not only reduces the number of
magnetic components, but also makes it possible to achieve a Fig. 1. Soft-switched power supply that integrates boost converter and
fully soft-switched ac-dc converter. Namely, in the integrated two-switch forward converter.

0-7803-8975-1/05/$20.00 ©2005 IEEE. 1139


- VD + di1 VB
D +
= . (1)
D1 iD DD1
S D1 VSD1
dt LS
DSD1

iS i1 VB +
- DR1 As current i1 starts flowing through winding N1 of
-
LS
i2 transformer TR, the current in winding N3 also begins to
TR i DR1 i DR2
I IN
+ + + + increase, i.e., iDR1=(N1/N3)i1, as shown in Fig. 3(a) and Fig.
VS S
-
V1 N1 LM V2 N2 N 3 V3 DR2 I O 4(l). Because output current IO is constant and equal to the
- N1 - -
n=
N2
sum of rectifier currents iDR1 and iDR2, rectifier current iDR2
+ +
decreases until it becomes zero when rectifier current iDR1
DD2
S1 VS1 DSD2 S D2 VSD2 increases. When rectifier current iDR2 becomes zero at t=T1,
- - output rectifier DR2 turns off, as shown in Fig. 4(m). Since
the current through winding N3 and rectifier DR1 is equal to
Fig. 2. Simplified circuit diagram along with reference directions of key output current IO after the turn-off of DR2, the increasing
currents and voltages. current in winding N1 makes current i2 in winding N2 begin
to flow. This current discharges the output capacitances of
forward switches SD1 and SD2, as illustrated in Fig. 3(b) and
not change significantly. Fig. 4(i). During this period, voltage v2 across winding N2 of
In this analysis, the leakage inductance of the transformer transformer TR starts to increase. After the output
is neglected because it does not have a significant effect on capacitances of forward switches SD1 and SD2 are fully
the operation of the circuit. Moreover, since snubber inductor discharged, switch currents iSD1 and iSD2 continue to flow
LS and primary winding N1 of transformer TR are connected through the antiparallel diodes of forward switches SD1 and
in series, the leakage inductance of the transformer is SD2, as shown in Fig. 3(c) and Fig. 4(i). To achieve ZVS of
absorbed by LS. As a result, transformer TR is modeled by forward switches SD1 and SD2, switches SD1 and SD2 should be
magnetizing inductance LM and the three-winding ideal turned on while their antiparallel diodes are conducting. To
transformer. Finally, it is assumed that in the on state, the simplify the control circuit timing diagram, the turn-on of
semiconductors exhibit zero resistance, i.e., they are short forward switches SD1 and SD2 is synchronized with the turn-
circuits. However, the output capacitance of the switches, as on of boost switch S. While the antiparallel diodes of forward
well as the junction capacitance and the reverse-recovery switches SD1 and SD2 are conducting, voltage v2 across
charge of the boost rectifier are not neglected in this analysis. winding N2 is equal to VB so that induced voltage v1 on
To further facilitate the analysis of operation, Fig. 3 shows winding N1 is
the major topological stages of the circuit in Fig. 1 during a N
v1 = 1 VB = nVB . (2)
switching cycle, whereas Fig. 4 shows its key waveforms. N2
The reference directions of currents and voltages plotted in Because v1 is constant, voltage applied across snubber
Fig. 4 are shown in Fig. 2. inductor LS is also constant so that current i1 increases
As can be seen from the timing diagrams in Figs. 4(a), (b), linearly with a slope of
and (c), the turn on of boost switch S and of forward switches di1 VB − v1 VB − nVB V
SD1 and SD2 are synchronized, whereas auxiliary switch S1 is = = = (1 − n ) B . (3)
dt LS LS LS
turned on prior to the turn on of switches S, SD1, and SD2. In
addition, auxiliary switch S1 is turned off before boost switch During the same period, magnetizing inductance iM increases
S or forward switches SD1 and SD2 are turned off, i.e., the with a slope given by
proposed circuit operates with overlapping gate drive signals di M V
= B . (4)
for the active snubber switch and the converter switches. dt LM
Prior to the turn on of switch S1 at t=T0, all switches are As current i1 linearly increases, boost rectifier current iD
open. As a result, the entire input current IIN flows through linearly decreases at the same rate since the sum of i1 and iD
boost rectifier D into energy-storage capacitor CB in the boost is equal to constant input current IIN, i.e., i1+iD=IIN. Therefore,
power stage, while output current IO flows through output in the proposed circuit, the turn-off rate of the boost rectifier
rectifier DR2 in the two-switch forward power stage as shown di D V
in Fig. 3(j). Because output rectifier DR2 is conducting during = −(1 − n ) B (5)
this period, voltage v3 and induced voltage v1 across winding dt LS
N1 of transformer TR is zero, i.e., v1=(N1/N3)v3=0. After can be controlled by the proper selection of the inductance
switch S1 is turned on at t=T0, the voltage of energy-storage- value of snubber inductor LS and turns ratio n of transformer
capacitor VB is applied across snubber inductor LS so that TR. Typically, for today’s fast-recovery rectifiers, the turn-
current i1 starts to increase linearly, as illustrated in Fig. 4(g). off rate diD/dt should be kept around 100 A/µs. With the
The slope of current i1 is selected turn-off rate, the reverse-recovery current of the

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iD

i1 +
- VB + VB
-

i DR1 i DR1
+ + +
I IN VS + IO
V1 V2 I IN V1 iM IO
- i DR2 -
- -

iS +
VS1
-

(a) [T0 - T1 ] (f) [T5 - T6 ]

iD

i1 + VB +
- VB
-

+ i DR1
+ +
I IN VS V1 iM IO I IN V1 iM IO
- - - i DR2

iS +
VS1
-

(b) [T1 - T2 ] (g) [T6 - T7 ]

iD
+ VB
i1 +
- VB -

+ i DR1 +
+ +
I IN VS IO I IN VS iM IO
V1 iM V1
- - i DR2
- -

iS +
VS1
-

(c) [T2 - T3 ] (h) [T7 - T8 ]

iD

i1 + VB
+
- VB
-

i DR1 + +
I IN iM IO I IN VS V1 iM IO
- - i DR2

iS +
VS1
-

(d) [T3 - T4 ] (i) [T8 - T9 ]

iD

i1 + VB
+ VB -
-

i DR1 +
+ + + +
I IN IO I IN VS IO
V1 iM V1 V2 V3
- i DR2
- - - -

iS +
VS1
-

(e) [T4 - T5 ] (j) [T9 - T10 ]

Fig. 3. Topological stages.

rectifier and the related power losses and EMI problems are capacitance of boost rectifier D, as shown in Fig. 3(c). If the
minimized. turns ratio of transformer TR is selected so that n<0.5, the
After t=T2, current i1 starts to discharge the output energy stored in LS is sufficient to completely discharge the
capacitance of boost switch S and charge the junction output capacitance of boost switch S regardless of the load

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TS
iS still flows through the antiparallel diode of switch S, as
TON-PFC
S1 illustrated in Fig. 4(h).
(a) As shown in Fig. 4(g), current i1 continues to decrease
t
S until it reaches zero at t=T5. Shortly after t=T5, auxiliary
(b) switch S1 is turned off to achieve zero-current switching
TON-DC-DC t
SD1
SD2 (ZCS). After switch S1 is turned off, the entire input current
t (c) IIN flows through boost switch S. As a result, the front-end
vSD1 N1
vSD2 n= N2 VB
VB boost converter stage is completely decoupled from the two-
2
(d)
switch forward converter stage, as shown in Fig. 3(f). For the
t
(1+n)VB rest of the switching cycle, the two-switch forward converter
vS1 stage continues to operate as a conventional two-switch
nVB VB
(e) forward converter.
vS t After forward switches SD1 and SD2 are turned off at t=T6,
VB
magnetizing current iM starts to charge the output
(f)
(1-n)
VB t capacitances of forward switches SD1 and SD2. When voltages
i1 LS I IN vSD1 and vSD2 reach VB, the magnetizing current is diverted
VB - nVB
LS LS
(g)
from forward switches SD1 and SD2 to clamp diodes DD1 and
nV B I IN t DD2, as shown in Fig. 3(g). At the same time, the reset of the
iS LS transformer is initiated by bulk voltage VB applied across
t (h) winding N2. During the reset time of the transformer, forward
i SD1 switch voltages vSD1 and vSD2 are equal to VO, whereas the
i SD2 (i)
VB VB t voltage across auxiliary switch S1 is nVB due to the magnetic
-
iM
LM LM coupling of windings N1 and N2, as illustrated in Figs. 4(d)
t
(j) and (e).
i D1
i D2 After boost switch S is turned off at t=T7, voltage across
(k)
t switch S starts to increase linearly because constant input
i DR1
(l) current IIN begins charging the output capacitance of boost
t
i DR2 switch S, as shown in Fig. 3(h). The increasing boost-switch
(m) voltage causes an equal increase of voltage vS1 across
t
iD di D VB auxiliary switch S1. When boost-switch voltage vS reaches VB
controlled = - (1-n)
dt LS I IN at t=T8, boost diode D begins to conduct, as shown in Fig.
reverse-recovery charge t
(n) 3(i). At the same time, auxiliary-switch voltage vS1 reaches
vD its maximum value of (1+n)VB. The circuit stays in the
VB topological stage shown in Fig. 3(i) until magnetizing current
T0T1 T T3T4 T5 T6 T7 T8 T9 T10 t
(o) iM decreases to zero at t=T9. The next switching cycle is
2
initiated at t=T10.
In summary, the major feature of the proposed circuit in
Fig. 4. Key waveforms.
Fig. 1 is the soft-switching of all semiconductor devices.
Specifically, boost switch S and forward switches SD1 and
SD2 are turned on with ZVS, whereas auxiliary switch S1 is
and line conditions. Once the capacitance is fully discharged turned off with ZCS. In addition, boost diode D is turned off
at t=T3, current iS continues to flow through the antiparallel with a controlled turn-off rate of its current. Because all
diode of boost switch S, as shown in Fig. 3(d) and Fig. 4(h). semiconductor components of the proposed converter
During this period, voltage v1 is applied in the negative operates with soft switching, the overall switching losses are
direction across snubber inductor LS. Therefore, current i1 minimized, which maximizes the conversion efficiency. In
starts to decrease linearly at the rate given by addition, soft switching has a beneficial effect on EMI and
di1 nV may result in a smaller size input filter [6].
=− B , (6)
dt LS However, it should be noted that complete ZVS of forward
as illustrated in Fig. 4(g). The current in auxiliary switch S1 switches SD1 and SD2 can only be achieved if input current IIN
also starts to decrease, whereas boost-switch current iS starts is large enough to produce a negative current through
to increase from the negative peak value, as shown in Figs. primary winding N2 and discharge the output capacitances of
4(g) and (h). To achieve ZVS of boost switch S, it is switches SD1 and SD2 completely, as shown in Fig. 3(b).
necessary to turn on boost switch S before its current According to Fig. 3(b), to have a negative current flowing
becomes positive at t=T4, i.e., during the period when current through winding N2 after t=T1, reflected current i1 into
winding N3 has to be greater than output current IO. If this

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88
VGS1
[20 V/div]
86 VGS
[20 V/div]
84 ZCS
Efficiency [%]

i1
[10 A/div]
82
PROPOSED SOFT
SWITCHING CONVERTER VS
80 [100 V/div] ZVS
HARD SWITCHING
CONVERTER

78

76
4 8 12 16 20 24 28 32 36 VGS1
[20 V/div]
Output Current [A] VGSD2
[20 V/div]
Fig. 5. Measured efficiency of 150 kHz, 430-W experimental converter controlled di/dt
with (dashed line) hard switching and (solid line) soft switching at i1
VIN=90 VAC, VB=380 V, and VO=12 V as functions representing [10 A/div]
output current.

VSD2
condition is not met, forward switches SD1 and SD2 operate [100 V/div] ZVS
with partial ZVS. This mode of operation typically occurs
near the zero crossing of the line voltage in a PFC boost
converter. Since the input current is proportional to the line
voltage, input current IIN is small near the zero crossing of the Fig. 6. Measured waveforms of experimental circuit at VIN=90 V, VB=380
line voltage. However, by adding an extra capacitor across V, IO= 26 A, VO=12 V. Time base: 1 µs/div.
boost switch S, forward switches SD1 and SD2 can achieve
complete ZVS near the zero crossing of the line voltage.
Due to the ZVS of boost switch S and forward switches from a universal ac line input and deliver up to 36 A at 12 V
SD1 and SD2, the most suitable switch component is a output. Switches S, S1, SD1, and SD2 operate at 150 kHz.
MOSFET (Metal Oxide Semiconductor Field Effect The experimental circuit was implemented with the
Transistor) device. Similarly, due to the ZCS of auxiliary following components: boost switch S and two-switch
switch S1, an IGBT (Insulated Gate Bipolar Transistor) is forward switches SD1 and SD2 – SPP20N60C2; auxiliary
suitable for the auxiliary switch. switch S1 – SPA11N80C3; boost diode D and snubber diode
In the proposed circuit, the voltage stresses on boost D1 – RHRP1560; output diodes DR1 and DR2 – S60SC6M;
switch S, forward switches SD1 and SD2, and boost rectifier D bulk capacitor CB – 470 uF/450 V; and output capacitor CF –
are identical to the corresponding stresses in the conventional 2 × 2200 uF/16 V.
converters. However, the voltage stress of auxiliary switch S1 To build boost inductor LB, a toroidal core (MS130060)
is from Arnold and 71 turns of magnet wire (AWG #19) were
v S1( MAX) = (1 + n )VB . (7) used. External snubber inductor LS was connected in series
with the auxiliary winding of transformer TR, as shown in
The control of the proposed circuit is performed by two Fig. 1. The required inductance is approximately 2.7 µH at
independent controllers that are synchronized. Specifically, full load. Snubber inductor LS was built using a toroidal core
one controller is used to regulate the output voltage of the (A189043) and 9 turns of magnet wire (AWG #19).
front-end boost stage, i.e., voltage VB across the energy- Transformer TR was built using a pair of ferrite cores (PJ40-
storage capacitor CB. The other controller is used to regulate 3C94). Three magnet wires (N1=7 turns : N2=26 turns : N3=2
output voltage VO of the two-switch forward converter. turns) were used.
Figure 5 shows the measured efficiencies of the
III. EXPERIMENTAL RESULTS experimental converter with (solid lines) and without (dashed
The performance of the proposed converter was evaluated lines) the active snubber circuit as functions representing
on a 430-W prototype circuit that was designed to operate output current. As can be seen in Fig. 5, the active snubber

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V/36-A output. The proposed technique improves the
efficiency by approximately 1.5% at full load.
Input Voltage VIN
REFERENCES
VIN [1] D.C. Martins, F.J.M. de Seixas, J.A. Brilhante, I. Barbi, “A family of
[50 V/div] Input current IIN dc-to-dc PWM converters using a new ZVS commutation cell,” IEEE
IIN
Power Electronics Specialists' Conf. (PESC) Rec., pp. 524 - 530, June
[5 A/div] 1993.
[2] G. Moschopoulos, P. Jain, G. Joós, “A novel zero-voltage switched
PWM boost converter,” IEEE Power Electronics Specialists' Conf.
(PESC) Rec., pp. 694-700, 1995.
[3] J.-H. Kim, D.Y. Lee, H.S. Choi, B.H. Cho, “High performance boost
PFP (power factor pre-regulator) with an improved ZVT (Zero
Voltage Transition) converter,” IEEE Applied Power Electronics
(APEC) Conf. Proc., pp. 337-342, 2001.
Fig. 7. Measured waveforms of experimental circuit at VIN=90 V, VB=380
V, IO= 36 A, VO=12 V. Time base: 2 ms/div. [4] F.T. Wakabayashi, M.J. Bonato, C.A. Canesin, “Novel high-power
factor ZCS-PWM preregulators,” IEEE Trans. Industrial Electronics,
vol. 48, no. 2, pp. 322-333, Apr. 2001.
[5] H.S. Choi, B.H. Cho, “Zero-current-switching (ZCS) power factor
improves the conversion efficiency in the entire measured pre-regulator (pfp) with reduced conduction losses,” IEEE Applied
power range. The active snubber improves the efficiency by Power Electronics (APEC) Conf. Proc., pp. 962 -967, 2002.
approximately 1.5% at full load. [6] H. Chung, S.Y.R. Hui, K.K. Tse, “Reduction of Power Converter EMI
Figures 6 and 7 show the oscillograms of key waveforms Emission Using Soft-Switching Technique,” IEEE Trans.
Electromagnetic Compatibility, vol. 40, no. 3, pp. 282-287, Aug.
in the experimental converter. As can be seen from the 1998.
corresponding waveforms in Fig. 4, there is a good
agreement between the experimental and theoretical [7] A.P. Patel “Forward Converter Circuit Having Reduced Switching
Losses,” US Patent 6,370,051B1, April 9, 2002.
waveforms. As can be seen from Fig. 6, switches S and SD2
are turned on with ZVS since their voltages VS and VSD2 fall [8] G. Huang, Y. Gu, Z. Liu, and A.J. Zhang “Resonant Reset Dual
to zero before gate-drive signals VGS and VGSD2 become high. Switch Forward Dc-to-Dc Converter,” US Patent 6,469,915B2,
October 22, 2002.
Moreover, auxiliary switch S1 achieves soft-switching turn
off because switch current i1 becomes zero before auxiliary
switch S1 is turned off. Also, it should be noted that the rising
slope of current i1 is approximately di1/dt = 80 A/µs which is
proportional to boost diode current iD during the period when
boost diode D is turned off as shown in Fig. 6. The reverse-
recovery loss of boost diode D is dramatically reduced by the
controlled diD/dt. Figure 7 shows the ac waveforms of input
voltage VIN and input current IIN. The power factor of input
current IIN is higher than 99%.

IV. SUMMARY
A soft-switched boost PFC front-end converter with an
integrated ZVS two-switch forward second-stage converter
has been introduced. By using a single magnetic device
which is mutually shared by the PFC boost converter and the
two-switch forward converter, boost switch S and forward
switches SD1 and SD2 are turned on with ZVS, auxiliary
switch S1 is turned off with ZCS, and boost diode D is turned
off softly using a controlled di/dt rate. As a result, the turn-on
switching losses in the boost and forward switches, the turn-
off switching loss in the auxiliary switch, and reverse-
recovery-related losses in the boost diode are eliminated,
which maximizes the conversion efficiency. The performance
of the proposed approach was evaluated on a 150-kHz, 430-
W, universal-line range prototype converter delivering 12-

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