9

Timer IC 555

Syllabus

Internal architecture of 555 timer, Monostable, Astable

multivibrator and applications.

CONTENTS :

9.1 Timer IC 555

9.2 Pin and Functional Block Diagram of IC 555

Jan-07, 10 July-05, 10, Marks 6

9.3 Monostable Multivibrator using IC 555

Jan-06, 0915, July-04, 11, Marks 8

9.4 Astable Multivibrator using IC 555

Jan-08, 12 July-03, 08,09,15 Marks 8

9.5 555 Timer as a Schmitt Trigger

9.6 Comparison of Multivibrator Circuits

9.1 Timer IC 555

 The timer IC 555 is most versatile IC introduced by

Signetics corporation in early 1970.

 It is timer circuit which is used in various timing

applications such as monostable multivibrator, ramp
generator, missing pulse detector etc.

 Basically it has following elements.

i) A relaxation oscillator ii) R.S. flip-flop

iii) Two components iv) Discharge transistor

8.1.1 R.S Flip-Flop

 The Fig 9.1.1 shows the part of the R-S flip-flop circuit.

 It has a pair of cross coupled transistor where each

collector drives the base of opposite transistor through
RB.

 If Q2 is in saturation, then its collector voltage is almost

zero which can not drive base of Q1 hence Q1 is cut-off.
 As Q1 is cut-off its collector voltage is VCC which drives
the base of Q2 ensuring that it is in saturation.

 Similarly if Q2 is cut-off, Q1 is in saturation. Thus the

circuit ensures that one transistor operates in saturation
and other in cut-off.

 The two outputs Q and Q are taken from the two

collectors.

 In symbolic form, it is represented as shown in the Fig.

9.1.2.

 The two input are set (S) and Reset ®.

 The two outputs are Q and Q

 With the help of S and R, Q can be made high or low. Q is

complementary of Q.

 When set S is high, Q is high, Q is low. The transistor Q

remains in this state, till it is triggered externally into
opposite state.

 The Table 9.1.1 shows the state of output ! related to

inputs S and R.
 S R Output
No Change 0 0 NC
Flip-Flop reset 0 1 0(low)
Flip-flop set 1 0 1 (high)
Avoid this 1 1 *
Table 9.1.1

S = Set, R = Reset, NC = No Change * = Race

9.1.2 Basic Timing Circuit

 The basic timing circuit used in IC 555 which uses R-S

flip-flop is shown in the Fig. 9.1.3.

 Let output Q is high which drives base of Q1 hence Q1 is

in saturation.

 This makes capacitor voltage zero as other end of C gets

grounded through Q1.

 The noninverting input of comparator is called threshold

voltage while inverting input is called control voltage.
 The resistances R1-R2 form a potential divider which
maintains control voltage constant at + 10V.

 As Q1 is assumed to be in saturation due to high !

threshold voltage is zero.

 If high voltage is applied to reset (R), then ! goes low

which drives Q1 in cut-off.

 The capacitor starts charging through resistance R and

threshold voltage starts increasing which is nothing but
voltage but voltage across capacitor C.

 When VC becomes more than 10V which is control

voltage, the comparator output goes high.

 This high signal drives the set (S) input of flip-flop.

 This changes the state of Q back to high which

discharges capacitor C through transistor Q1.

 The Fig. 9.1.4 shows the waveforms of timing circuit.

 The capacitor charging a exponential hence threshold

voltage is also exponential.

 When Q goes low, Q is high and positive going pulse

appears at the output, which is taken from Q. Thus Vout
is high when Q goes low.

 When threshold voltage becomes more than control

voltage, Q becomes more than control voltage, Q becomes
high and Q is low. Thus Vout goes low.
  Hence a rectangular output gets produced.

It can be observed that output remains high for the time which is
required by the capacitor to charge upto control voltage, through
R. Thus by varying R or C, the output pulse width can be varied.
This is the working principle of timer IC 555.

9.2 Pin and Functional Block Diagram of IC 555

 The Fig 9.2.1 (a) and (b) show the pin diagram and the
block diagram of the IC NE 555 timer.

 This is 8 pin IC timer.

 The functional block diagram is explained through the

discussion of various pins.
Pin 1 : Ground :

 All the voltages are measured with respect to this

terminal.

Pin 2 : Trigger

 The IC 555 uses two comparators. The voltage divider

consists of three equal resistances.

 Due to voltage divider, the voltage of noninverting

terminal of comparator 2 is fixed at VCC . 3.
  The inverting input of comparator 2 which is compared
with VCC / 3, is nothing but trigger input brought out as
pin number 2.

 When the trigger input is slightly less than VCC/3 the

comparator 2 output goes high. This output is given to
reset input of R-S flip-flop. So high output of comparator
2 resets the flip-flop,

Pin 3 : Output

 The complementary signal output (Q) of the flip-flop goes

to pin 3 which is the output. The load can be connected
in two ways. One between pin3 and ground while other
between pin 3 and pin 8.

PM 4 : Reset

• This is an interrupt to the timing device.

• When pin 4 is grounded, it stops the working of device and

makes it off. Thus, pin 4 provides on/off feature to the IC
555.

• This reset input overrides all other functions within the

timer when it is momentarily grounded.

Pin 5 : Control Voltage Input

• In most of the applications, external control voltage input is

not used.
• This pin is nothing but the inverting input terminal of
comparator I. The voltage divider holds the voltage of this
input at 2/3 V. This is reference level for comparator 1 with
which threshold is compared. If reference level required is
other than 2/3 Vic for comparator I then external input is to
be given to pin 5.

• If external input applied to pin 5 is alternating then the

reference level for comparator I keeps on changing above and
below 2/3 Vic. Due to this, the variable pulse width output
is possible. This is called pulse width modulation, which is
possible due to pin S.

Pin 6 : Threshold

• This is the noninverting input terminal of comparator 1. The

external voltage is applied to this pin 6.

• When this voltage is more than 2/3 Vcc, the comparator 1

output goes high. This is given to the set input of 11-S flip-
flop. Thus high output of comparator I sets the flip-flop. This
makes Q of flip-flop high and Q low. Thus the output of IC
555 at pin 3 goes low.

• Remember that output at pin 3 is Q which is complementary

output of flip-flop.

• In short,

EQ
Pin 7 : Discharge

• This pin is connected to the collector of the discharge

transistor

• When the output is high then Q is low and transistor Qd is

off. It acts as an open circuit to the external capacitor C to
be connected across it, so capacitor C can charge as
described earlier.

* When output is low, Q is high which drives the base of Qd

high, driving transistor Qd in saturation. It acts as short
circuit, shorting the external capacitor C to be connected
across it.

Pin 8 : Supply VCC

• The IC 555 timer on work with any supply voltage between

4.5 V and 16 V.

9.2.1 Features of IC 555 Timer

The various features of the IC 555 timer are :

1. The 555 is a monolithic timer device which can be used to

produce accurate and highly stable time delays or
oscillation. It on be used to produce time delays ranging
from few microseconds to several hours.

2. It has two basic operating modes : monostable and astable

3. It is available in three packages : 8-pin metalcan, 8-pin mini

DIP or a 14-pin DT. A 14-pin package is IC 556 which
consists of two 555 timers.
4. The NE 555 (Signetics) an operate with a supply voltage in
the range of 4.5 V to 18V and is capable of sourcing and
sinking output currents of 200 mA. Its CMOS version (TLC
555) can operate over a supply range of 2 V to 18 V and has
output current sinking and sourcing capabilities of 100 mA
and 10 mA, respectively.

5. It has a very high temperature stability, as it is designed to

operate in the temperature range of — 55° to 125°C

6. Its output is compatible with TTL, CMOS and Op-Amp

circuits.

Review Questions

1. Explain the functions 4 each 4 pins in 555 timer. fist the

important tartans of 555 timer.

2. Draw and explain the functional block diagram of IC 555.

3. Explain the function of ‘reset’ pin.

4. What an the functions of threshold and control voltage pied

in 555 timer IC ?

9.3 Monostable Multivibrator using IC 555

• The IC 555 timer can be operated as a monostable

multivibrator by connecting an external resistor and a
capacitor as shown in the Fig. 93.1.

• The circuit has only one stable state.

  When trigger is applied, it produces a pulse at the output
and returns back to its stable stable.

9.3.1 Operation

 The flip-flop is initially set i.e. ! is high. This drives the

transistor Qd in saturation.

 The capacitor discharges completely and voltage across it

is nearly zero. The otput at pin 3 is low.

 When a trigger input, a low going pulse is applied, then

circuit state remains unchanged till trigger voltage is
greater than 1/3 VCC

 When it becomes less than 1/3 VCC then comparator 2

output goes high.

 This resets the flip-flop so Q goes low and Q goes high.

 Low ! makes the transistor Qd off. Hence capacitor starts
charging through resistance R, as shown by dark arrows
in the Fig. 9.3.1.

 The voltage across capacitor increases exponentially. This

voltage is nothing but the threshold voltage at pin 6.

 When this voltage becomes more than 2/3 VCC then

comparator 1 output goes high. This sets the flip-flop i.e.
Q becomes high and Q low.

 This high Q drives the transistor Qd in saturation. Thus

capacitor C quickly discharges through Qd as shown by
dotted arrows in the Fig. 9.3.1.

 So it can be noted that Vout at pin 3 is low at start, when

trigger is less than 1/3 VCC it becomes high and when
threshold is greater than 2/3 VCC again becomes low, till
next trigger pulse occurs.

 So a rectangular wave is produced at the output.

 The pulse width of this rectangular pulse is controlled by

the charging time of capacitor. This depends on the time
constant RC. Thus RC Thus RC controls the pulse width.

 The waveforms are shown in the Fig. 9.3.2

9.3.2 Schematic Diagram

 Generally a schematic diagram of the IC 555 circuits is

shown which does not include comparators, flip-flop etc.

 It only shows the external components to be connected to

the 8 pins of IC 555.

 Thus, the schematic diagram of IC 555 as a monostable

multivibrator is shown in the Fig. 9.3.4

 The external components R and C are shown.

 To avoid accidental reset, pin 4 is connected to pin 8

which is supply +VCC

 To have the noise filtering of control voltage, the pin 5 is

grounded through a small capacitor of 0.01.

9.3.3 Applications of Monostable Multivibrator

9.3.4.1 Frequency Dividor

 The monistable circuit can be used as a frequency divider

if the timing interval is adjusted to be longer than the
period of the input signal, as shown in the Fig. 9.3.5.

 The Fig. 9.3.5 shows monostable multivibrator as a

divider by-2 circuits.

Key Point Here, timing interoal ‘t’ is kept slightly larger than the
time period T of the trigger input signal.

 The monostable multivibrator will be triggered by the first

negative going edge of the trigger input, which will make
output to go in its high state.

 The output will remain high for the period equal to timing
interval.
  As timing interval is greater than time period of the trigger
input, output will still be high when the second negative
going pulse occurs.

 The monostable will, however, be re-triggered on the third

negative-going pulse.

 Therefore, monostable triggers on every other pulse of the

trigger input, so there is only one output for every two
input pulses, thus trigger signal is, divided by.2.

Key Point

In this way, by adjusting the timing interval, the monostable

circuit can be made integral fractions of the frequency of the input
trigger signal.

9.3.4.2 Pulse Width Modulation

 The Fig. 9.3.6 shows pulse width modulator.

 It is basically a monostable multivibrator with a

modulating input signal applied at the control voltage
input (pin 5)
  Internally, the control voltage is adjusted to the 2/3 VCC

 Externally applied modulating signal changes the control

voltage and hence the threshold voltage level of the upper
comparator (comparator 1).

 As a result, time period required to charge the capacitor

upto threshold voltage level changes, giving pulse width
modulated signal at the output as shown in the Fig. 9.3.7.

Key Point : It may be noted from the output waveform that the
pulse duration varies according to the modulating signal level, but
the frequency of the output pulses is same as that of the trigger
input signal.

9.3.4.3 Linear Ramp Generator

 When a capacitor is charged with a constant current

source then linear ramp is obtained. This concept is used
in linear ramp generator.

 The circuit is shown in the Fig. 9.3.8,

 The circuit is used to obtain constant current IC in a
current mirror circuit, using transistor Q and diode D.

 The current IC charges capacitor C at a constant rate

towards + VCC

 But when voltage at pin 6 i.e. capacitor voltage VC

becomes (2/3 VCC), the comparator makes internal
transistor Q1 ON within no time.

 But while discharging when VC becomes (1/3 VCC), the

second comparator makes Q1 ON within no time.

 But while discharging when VC becomes (1/3 VCC), the

second comparator makes Q1 OFF and C starts its
charging again.
 When signal input is at ground level (0 V), the emitter
diode of transistor T1 forward biases and clamps
capacitor voltage VC to 0.7V.

 This forces output voltage to stay in its high state.

 When signal input goes high, the transistor cuts off and
capacitor C begins to charge.

 If input signal again goes low before the 555 completes its
timing cycle, the voltage across C is reset to 0.7V.

 If however, input signal does not go low before the 555

completes its timing cycle, the 555 enters its normal state
and output voltage goes low.

 This is illustrated in Fig. 9.3.10 (b).

 For this circuit timing interval is adjusted such that it is

slightly longer than the period of input signal.

 The continuous low going pulses of the period less than

the timing interval do not allow capacitor to charge upto
2/3VCC.

 As a result, output voltage remains high.

  In case of missing pulse (Pulse 4), capacitor charges upto
2/3 VCC and forces output voltage in to its low state, as
shown in the Fig. 9.3.10 (b).

 This type of circuit can be used to detect a missing heart

beat.

9.3.4.5 Pulse Position Modulation (PPM)

 In pulse position modulation, the amplitude and width of

the pulses are kept constant, while the position of each
pulse with reference to the position of a reference pulse, is
changed according to the instantaneous simpled value of
the modulating signal.

 The Fig. 9.3.11 (a) shows the pulse position modulator.

 With this type of circuit, the position of each pulse

changes.

 Both width and period of pulses vary with the modulating

signal. Due to modulating signal at pin 5, the UTP level
changes to.
 EQ

 When Vmod increases the UTP level increases and hence

pulse width also increases.

 If Vmod decreases, UTP level decreases and pulse width

also decreases.

 Thus the pulse width varies as shown in the Fig.

9.3.11(b).

 The circuit is used in communication applications for

transferring voice or data.

Example 9.3.1 Design a timer, which should turn ON heater

immediately after pressing a push button and should hold heater
in ON state for 5 seconds.

Solution : Fig 9.3.12 shows monostable circuit used to drive the

relay.

This relay should be energized for 5 seconds to hold heater

‘ON’ for 5 seconds. Thus TON for monostable is 5 seconds.

We know that the pulse width is given by

Review Questions

I. Discuss, with referent circuits and waveforms, the working

of monostable multvibrator using 555 timer. Derive the
expresion of time delay of a monostable multivibrator using
555 timer.

2. Explain the applications in which the 555 can be used as a

monostble multivibrator.
3. How is an monostble multivibrator using S55 timer
connected into a pulse position modulator ?

4. Explain the use of 555 timer as linear ramp generator and

draw the output waveforms.

5. Describe the 555 time monostble multivibrator applications

in i) Frequency modulation ii) Pulse width modulation.

6. Describe the application of 555 timer as pulsing blazer.

7. Explain the frequency divider using 555 timer.

8. Design one shot (monstable) using IC 555 for the pulse

width of 10. What voltage must be applied to the CONTROL
pin to stretch the pulse width : 1) From 10 us to 20 us and
ii) from 10 us to 5 us.

9. Design a monostble multivibrator for pulse width of I mec

using timer IC 555 operated with supply voltage of 12 V.
Draw the wee farms at the output terminal and across the
capacitor with respect to clock pulse. Explain whether the
pulse width will increase, decrease or remains same if the 3
V dc is applied externally at control pin of IC 555.

10, Design a monostble multivibrator. for a time delay 41 second

using the IC 555.

11. Design a monastable multivilmnor using IC 555 timer to

produce a quasistable state duration of 200 ins. Mat suitable
trigger signal. Draw the input and output waveforms and
mark the necessary timings.
9.4 Astable Multivibrator using IC 555

• The Fig. 9.4.1 shows the IC 555 connected as an stable

multivibrator.

• The threshold input is connected to the bluer input.

• Two external resistances RA, RB and a capacitor C is used in

the circuit.

• This circuit has no stable state. The circuits changes its

state alternately. Hence the operation is also called free
running nonsinusoidal oscillator.

9.4.1 Operation

 When the flip-flop is set, Q is high which drives the

transistor Qd in saturation and the capacitor gets
discharges.
 Now the capacitor voltage is nothing but the trigger
voltage. So while discharging when it becomes less than
1/3 VCC comparator 2 output goes high.

 This resets the flip-flop hence Q goes low and Q goes high.

 The low Q makes the transistor off. Thus capacitor starts

charging through the resistances RA, RB and VCC.

 The charging path is shown by thick arrows in the Fig.

9.4.1.

 As total resistance in the charging path is (RA + RB) the

charging time constant is (RA + RB) C.

 The capacitor voltage is also threshold voltage.

 While charging, capacitor voltage increases i.e. the

threshold voltage increases.

 When it exceeds 2/3 VCC, then the comparator 1 output

goes high which sets the flip-flop. The flip-flop output Q
becomes high and output at pin 3 i.e. Q becomes low.

 High Q drives transistor Qd in saturation and capacitor

starts discharging through resistance RB and transistor
Qd.

 This path is shown by dotted arrows in the Fig. 9.4.1.

 Thus the discharging time constant is RBC.

  When capacitor voltage becomes less than 1/3 Vcc
comparator 2 output goes high resetting the flip-flop. This
cycle repeats.

 Thus when capacitor is charging, output is high while

when it is discharging the output is low. The output is a
rectangular wave. The capacitor voltage is exponentially
rising and falling.

 The waveforms are shown in the Fig. 9.4.2.

9.4.2 Derivation of Duty Cycle

 Generally the charging time constant is greater than the

discharging time constant. Hence at the output, the
waveform is not symmetric.

 The high output remains for longer period than low

output.
 The ratio of high output period and low output period is
given by a mathematical parameter called duty cycle.

 It is defined as the ratio of ON time i.e. high output to the

total time of one cycle. As shown in the Fig. 9.4.2.

W = Time for output is high = TON and T = Time of one

cycle.
9.4.3 Schematic Diagram

 The Fig. 9.4.3 shows the schematic diagram of astable

timer circuit.

 It shows only the external components RA, RB and C.

 The pin 4 is tied to pin 8 and pin 5 is grounded through a

small capacitor.

 The important application of astable multivibrator is

Voltage Controlled Oscillator (VCO)

Example 9.4.1 A 555 timer is configured to run in astable mode

with RA = 4kQ.

RB = 4 kQ and C=0.01 uF. Determine the frequency of the output

and duty cycle

Solution : The frequency of output is give by :

EQ
9.4.4. Application of Astable Multivibrator

9.4.5. Square Wave Generator.

 It can be observed from the expression of duty cycle that

in astable operation exact 50% duty cycle is not possible
to achieve.

 To get exactl 50% duty cycle i.e. square wave output it is

necessary to modify the astable timer circuit, as shown in
the Fig. 9.4.4.

 In the modified circuit, the capacitor C charges through

RA and diode D and discharges through RB.

 To obtain square wave (50) % duty cycle) resistance RB is

adjusted such that it is equal to the summation of
resistance RA and the forward resistance of diode D.

 Usually, potentiometer is used for exact adjustments of

resistors.

 The waveforms of square wave generator are showin in

the Fig. 9.4.5.
9.4.4.2 Voltage Controlled Oscillator (VCO)

 The Fig. 9.4.6 shows the circuit diagram for voltage

controlled oscillator.

 It is basically an astable multivibrator circuit with

variable control voltage at the control voltage terminal is
2/3 VCC.

 In this circuit, the control voltage is externally set by the

potentiometer.

 With change in the control voltage the upper threshold

voltage changes and thus the time required to charge
capacitor upto upper threshold voltage changes.

 Similarly, discharge time also changes.

 As a result, the frequency of the output voltage changes.

  If control voltage is increased, the capacitor will take more
time to charge and discharge and therefore frequency will
decrease.

 On the other hand, if control voltage is decreased, the

capacitor will take less time to charge and discharge,
increasing the frequency of the output signal.

 Thus by varying control voltage we can change the

frequency, hence it is called voltage controlled oscillator.

9.4.4.3 FSK Generator

 Binary code consists of I’s and O’s

 It can be transmitted by shifting a carrier frequency.
 One fix frequency represents one and other represents
zero.
 This type of transmission is called frequency Shift Keying
(FSK) technique.
 Astable multivibrator using IC 555 can be used to
generate PSK signal.

 The circuit for PSK generation is as shown in the Fig.

9.4.7.

 When digital input is HIGH (logic 1), transistor T1 is OFF

and 555 timer works in a normal astable mode. The
frequency of the output waveform can be given as

EQ

 When input is LOW (logic O) transistor T!, is ON and

connected the resistance Rp in parallel with R1. With this
connecting effective Rleft become R1 || Rp and out
frequency is now given by.

EQ

 With this connection effective resistance Reff becomes R1

|| Rp.
]
9.4.5 Astable Multivibrator with a Variable Duty Cycle

 Generally astable mode of IC 555 is used to obtain the

duty cycle between 50% to 100%.

 But if duty cycle less than 50% is required, the circuit can
be modified as shown in the Fig. 9.4.11.

 The circuit is similar to square wave generator, but

instead of connecting diode across fixed RB it is
connected across a combination of variable R2 and R3.

 The resistance R2 is variable and it can be added to R1

and R3 to change the charging and discharging
resistance.

 Thus a variable duty cycle can be achieved.

 The charging time for the capacitor is Tc = (R1 + Part of

R2) 0.693C.

 The discharging time for the capacitor is

EQ
9.5 555 Timer as a Schmitt Trigger

 The Fig. 9.5.1 shows the use of 555 timer as a Schmitt

trigger.

 The input is given to the pins 2 and 6 which are tied

together.

 Pins 4 and 8 are connected to supply voltage +Vcc

 The common point of two pin s 2 and 6 is extremely blased
at VCC/2 through the resistance network R1 and R2.
Generally R1 = R2 to get the biasing of Vcc/2.

 The upper comparator will trip at 2/3 Vcc while lower

comparator at 1/3 Vcc.

 The bias provided by R1 and R2 is centered within these two

thresholds.

 Thus when sine wave of sufficient amplitude, greater than

Vcc/6 is applied to the circuit as input, it causes the
internal flip-flop to alternately set and reset. Due to this,
the circuit produces the square wave at the output, as
shown in the Fig. 9.5.2

 The frequency of square wave remains same as that of

input. The Schmitt trigger can operate with the input
frequencies upto 50 kHz.
9.6 Comparison of Multivibrator Circuits

Sl.No. Monostable multivibrator Astable Multivibrator

1 It has only one stable state There is no stable state
2 Trigger is required for the Trigger is not required to
operation in change the state change the state, hence called
free running
3 Two components R and C are Two components RA and RB
necessary with IC 555 to obtain are necessary with IC 555 to
the circuit obtain the circuit
4 The pulse width is given by The pulse width is given by
W = 1.1 RC seconds
5 The frequency of operation is The frequency of operation is
controlled by frequency of controlled by RA, RB and C
trigger pulses applied
6 The applications are, timer The applications are, square
frequency divider, pulse width wave generator, flasher,
modulation etc. voltage controlled oscillator,
PSK generator etc.