Optimized DSP Implementation

of GMSK Software Modem for GSM Transceiver

Adel Ghazel, Mabrouk Zhili, Neji Youssef

DSP Laboratory, Electronic and Propagation Department

Ecole SupCrieure des Communications de Tunis (SUP’COM)
Rte de Raoued, Km 3.5 - 2083 El Ghazala - Tunis - Tunisia - Fax: (216) 1 856 829
Email: adel.ghazel@supcom.mu.tn, mabrouk.zhiliO,supcom.rnu.tn,neii.youssef@supcom.rnu.tn

Abstract - This work deals with software radio design
and optimization for IF section of GSM transceiver
based on GMSK Modem. To accomplish the tight real-
time requirement, for the Modem, with a low-cost
device, we propose a methodology approach for the
implementation by looking for the optimum using of
DSP architecture parallelism. Experimental results with
fixed point 16’bit DSP are presented to show the
efficiency of the optimized GMSK software Modem.
I. Introduction
11. GMSK Modem description
GMSK is a binary-digital FM modulation with a
modulation index: m = 0.5 [5]. Basically, it is an MSK
modulation with a pre-modulation Gaussian low-pass
filter inserted into the base-band processor for the
purpose of an increase of the spectral efficiency of the
modulated signal.
The impulse response of the Gaussian low-pass filter is
given by,

The use of digital signal processors (DSP) in wireless

kB
h(t)= -eexp(-k2Bt2),
J;;
where k = yG and B stands
has grown many-fold with the start of deployment of for the half power bandwidth, with the specification
GSM and other mobile communication systems in the BT=0.3.
early 1990s. DSPs have been widely introduced for the
implementation of base-band speech processing. The MSK modulated signal expression is given by,
Recently, a new concept of software radio is being given
a significant attention. This concept has the primary goal
s(t)= aI(t>cos(2nfct)cos(-)t + a (t)sin(2nfct)sin(-)t
2T Q 2T
to replace analog components and hardwired devices of a
= aI(t).X(t)+aQ(t).Y(t).
transceiver with programmable devices such as DSPs [ 11
[2][3]. In this paper we focus on the software where T is the bit duration and f, is the carrier frequency.
development for the DSP implementation of GMSK According to this expression, the considered modulation
Modem for the GSM system. can be generated by using quadrate modulation
architecture as shown in figure 1.
Since cost, size and power consumption . of end-user
terminals should meet the aggressive expectations of
service providers and users, we give in our development
a particular attention to system optimization. The
development of a competitive industrial prototype for
such signal processing application needs first the choice
cos(Zpi.f, +’
of the adapted processor then its programming by well
using of its architecture parallelism. The use of
parallelism induces multiple choices for assembler code
generation depending on optimization level. Today, “C”
compilers offer many features to facilitate DSP
programming but they do not guarantee the best code
optimization. In fact, the optimization operation is very
Figure 1 : MSK modulation bock diagram
complex [4] since it needs the simultaneous optimization
of data processing, memorieshegisters data transfers,
The block diagram of a typical MSK receiver is shown
memory storage and addresses generation. To avoid this
in figure 2. The received signal is multiplied by the
complexity, we have defined a methodology approach respective in-phase and quadrate carriers x(t) and y(t)
based on four design steps: algorithmic optimization, followed by integrate and dump circuits. The multiplier-
optimal programming, tasks synchronization and digital
integrator constitutes correlation detection or matched
representation. filtering. As it is known, this is an optimum coherent
receiver in the absence of inter-symbol interference.

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 Integrator
[2k-1 2k+l] kpd
(2k+l)T
Oe%on
"I I Yftl I Samole
Integrator
[2k 2k+21
Figure 2: MSK demodulation bock diagram
The received signal demodulation needs information
about used emission carrier. In fact, the reference
waveforms X(t) and Y(t) and the clock signal at half the
bit rate needed at the samplers should be recovered from
received signal s(t). This induces the necessity of circuits
that ensure this function. Although the MSK signal s(t)
has no discrete components which can be used for
synchronization, it produces strong discrete spectral
components at 2f+ and 2f- when passed through a
squarer. The squarer, in effect, doubles the modulation
index and produces an FSK signal with Af=l/T. These
components are extracted by band-pass filters
corresponding to two useh1 bands [2f++2Fe,2f++6Fe] et
[2f--6Fe , 2f-2Fe], with Fe the sampling frequency of the
speech signal. In practice, many adapted solutions
mainly based on phase-locked loops (PLL) can be used
[6]. This extraction of the spectral components is
followed by frequency division circuits that produce
output signals Sl(t) and S2(t). Finely, combining these
signals gives us the two carrier components:
X(t)=S,(t)+S,(t> ; Y(t)=S2(t)-Sl(t) ; and the base-band
clock signal. The block diagram of such synchronization
circuit is shown in figure 3 .
MSK :
- 1 I I\
Frequencies f+ &
f., Df = 112T
CLCK
Frequency
Divider
Figure 3- Synchronization block diagram for MSK
111. Software optimization
The proposed GMSK Modem software is designed for
implementation on 16 bit - fixed point DSP.
Programming structure was defined not only for GMSK
Modem implementation but also to well support
inpuUoutput communication management. To respect
real-time constraints, although the DSP is a fast device,
efficient programs had been made to accomplish all the
requested processing in accordance with the processor
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timing ability and without any information distortion.
For that purpose, the developed software has been
designed by considering the following optimization
levels.
111-1. Algorithmic optimization
This level of optimized design is achieved by means of
certain simplifications of the GMSK Modem algorithm
in order to reduce the number of real time instructions
and memory size [7].
For Gaussian filter subroutine implementation of filter
convolution product requires multiple instruction
processing inducing a lot of calculation time. To respect
timing constraints we propose an optimized
implementation code based on a predictive approach
related to filter output response (figure 4). Analysis of
this filtered signal permits the identification of four types
of transmission corresponding to four binary states :
(0,O) ; (0,l) ; (1,O) ; (1,l). Hence, using this typical
characteristic we define a filtering algorithm based on
binary state identification. This means for each couple
(ak-l, ak) a corresponding file is associated to the
appropriate transition.
Figure 4: Gaussian Filter possible transitions.
For MSK modulation subroutine we propose an omine
Initialization steps that consist on filling Look Up Tables
corresponding to functions X(t) and Y(t). The module,
that permits to calculate these tables, makes call in a first
time to a sub-module that approximate sine function,
then generates a period and store it in a buffer.
Calculated tables for one period, are stored in data files
in 1.15 format imposed by fixed-point DSP processing.
After initialization, modulation algorithm starts with the
processing of 32 samples for both ak.l and ak. Indeed,
parallel two bits processing is achieved due to MSK
modulation squareness scheme.
The GMSK demodulation subroutine permits to decide
to every 64 samples on two bits, otherwise to every 32
samples we decide on one bit. Demodulation
implementation uses Look Up Tables X(t) and Y(t)
obtained from synchronization algorithm that recover the
same frequency used in broadcast.
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111-2. Optimal programming
To accomplish the tight real-time requirements of
wireless communications, with a low-cost device, we
propose certain choices conceming the DSP hardware
facilities. Although it is more complex to manipulate, we
choose a fixed point representation since it will be very
fast and inexpensive. To increase the number of
instructions executed per machine cycle, we should look
how to use intensively DSP features such as : pipeline
process, hardware parallelism, modulo-mode
addressing,. .. To reach this object we propose to analyze
in detail the computational units allocation, the tasks
arrangement then memories and addressing modes
organization. By considering the algorithmic
optimization, the computational flowchart of GMSK
modulation is given in figure 5.
X(t)
Buffer
r parameters was determined after the analysis of
Buffer
Figure 5 : GMSK subroutine data flowchart
Through this representation we allocate GMSK
computational operations at different DSP units. Buffers
are attributed to PM and DM memories with circular
mode and indirect addressing using different Direct
Address Generators (DAG). This permit to obtain
execution at one machine cycle of several GMSK
modulator operations. This approach was applied to the
demodulation routine and an interesting number of
parallel operations have been identified.
111-3. Full duplex modem Timing
To well support the computational processes
commutation, in full duplex communication, thanks to
low-level instructions and an interrupt management
system, the developed software has been designed with a
synchronous programming mode as illustrated in
figure6.
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Base-band
sampling
frequency
Modem "
sampling
t t
frequency
b
Input Serial
Frame
Figure 6: GMSK Modem synchronous timing
111-4. Digital representation choice
This level of optimization concems the appropriate
choice of digital format for input/output and carriers
signals (8,16,24 bits,...), sinusoidal carrier sampling
resolution (64, 128, 256 samples,...), filter resolution
(number of coefficients). The optimal choice for these
hardware description simulation results and according
also to the compromise communication performances /
software complexity.
The design results of these four optimization steps is
used to look for the DSP characteristics that permit the
best adequate DSP hardware resources for GMSK
Modem software development features. According to
analysis results, the GMSK Modem was implemented on
a 16 bit-fixed point DSP (Analog Devices ADSP2181).
The efficiency of DSP implemented Software is shown
by the following experimental results.
IV. Experimental results
The GMSK Modem software is implemented on Analog
Devices ADSP-2181 which is a 33MIPS DSP [8]. We
have used a DSP sited to an evaluation board (from
Analog Devices) with necessary features for input/output
interfacing. Experimental performances of implemented
GMSK Modem software are analyzed by means of
experimental setup of figure 8. In this installation,
hardware emulator is placed between the target card
(ADSP-2 18 1) and a PC. The emulator permits to analyze
in real time all input and output signals of any
implemented module. While DSP running is in progress,
input/output data are dumped in files, converted in
decimal format and plotted on the screen. Figures 7 and
8 illustrate time domain profile of GMSK Modem
important signals. Signal drawn on figure 9 shows the
concordance between emitted carrier and recovered
carrier to be used for demodulation scheme. In fact it
illustrates well the efficiency of the synchronization
procedure. Figure 10 shows the recuperation of input
binary signal without errors. Hence, the analysis of
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 filtered signal and GMSK modulated signal shows the
efficiency of DSP implemented Software.
Initial and recovered carrier signals
J
ADSP-2181 I
0 3
U
EZ-ICE .-a
4-

Emulator 'nu
E
U-?
32 I
0 1 2 3 J 5 6

Zoom in carrier signals 3 10-

Baseband
frequency

Figure 7: Experimental setup

I
4 4: 44 48 48 5 5:
Time Axis (s) % la*

Figure 10: recovered carrier signal

-- Input Signal Output Signal

Signal before
decision

-2
; a 6 10 40 t
Binary signal Filtered signal Filtered signal
B
-- B
1 1
Figure 8: GMSK modulator signals
'1
GMSK Modulated signal "I U 1 .l U 1 2 a
Amplitude

' " O
0.3). I Figure 1 1 : Emitted and received binary frame

Routine Timing (Machine Cycles)

GMSK modulation 6
-Output serial frame 3
Input serial frame 3
GMSK demodulation 15
Total cycles number 27
J
D tm MO m 4u1 5m ~m 7m
sampler number Figure 12 : Execution timing measurement
Figure 9 : GMSK modulated signal

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The purpose of these measurements is to determine the [6] : R. REGGIANNINI, (( Coherent Reception of L

optimum processor rapidity that can achieve all the
GMSK modem operations by one sampling frequency.
In our case, by choosing 33 MHz ADSP-2181 processor
we looked for the optimum sampling frequency. Using
the following formula, we obtained a total execution
time of about 0 . 8 ~ ~ .
Hence, a sampling frequency of 1 MHz can be well
adapted to the full duplex modem computational. A
second deal is the definition of the adequate hardware
interface for the analog FI output signal. This can be
obtained by using DAC and ADC component with
appropriate rapidity and connected to the DSP serial port
by FIFO memories to make necessary adaptation of the
DSP and converters timing constraints. The design of
this IO hardware interface is the subject of our present
R&D activities.
Generalized MSK over Rayleigh Flat-Fading
Channels n, IEEE Trans. On Comm., Vo1.42
No.21314, Feb./Mar.lApr. 1994 .
[7] : N. Youssef, A.Ghaze1, %Tabbane, M. Zhili,
“Software Development for DSP Implementation
of GMSK Modulation for GSM Transceiver”, IEEE
AFRICON Conference, Cap-Town, Sep.-Oct. 1999
[8] : ADSP-2100 Family User Manual, Third Edition,
Analog Devices Inc., September 1995.
I
Acknowledgements
This work was supported by Analog Devices-SST
Division and the Tunisian Communication Ministry.

V. Conclusion
We have presented an optimized software
implementation, on DSP, for GMSK Modem for GSM
transceiver. The optimized DSP-based software design
was obtained by applying a methodology approach based
on four steps. First, with analyzing the functioning of
each communication stage processing we identified the
possible algorithmic simplifications to reduce operations
number. Second, we defined, for the data processing, an
hierarchic operations organization that permit to use the
maximum of DSP hardware parallelism and pipeline
process. Third, we proposed a synchronous timing mode
for the Modem full duplex functioning. Finally, we find
appropriate signal digital format and resolution to
optimize memory space and calculation time. The
efficiency of the proposed optimized design was
illustrated by some experimental results and
measurements that show the performances of the GMSK
Modem implemented on a 16-bit fixed point 33MHz
DSP (Analog Devices ADSP2181).

VI. References
J. Mitola, “the Software radio architecture”, IEEE
Commun. Mag., May 1995, pp. 26-38
R. Baines, “the DSP Bottleneck”, IEEE Commun.
Mag., May 1995, pp. 46-54
H. Tsurumi & Y. Suzuki, “Broadband RF Stage
Architecture for Software-defined Radio in
Handheld Terminal Applications”, IEEE Comm.
Mag., n02, February 1999, pp. 90-95.
T. Turletti & D. Tennenhouse, “Complexity of a
Software GSM Base Station”, IEEE Comm. Mag.
no 2, February 1999, pp.113-117.
S. Pasupathy, “Minimum Shift Keying: A
spectrally efficient Modulation”, IEEE Commun.
Mag., July 1979, pp. 14-22

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