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MEMS Process Integration and


Dr. Pinyen Lin, Chief Technologist & VP Business Development

Touch Micro-system Technology, Taiwan


1. MEMS Industry and Products

2. Process Integration and Design for Manufacturability
- Challenges and Best Practice
3. CMOS-MEMS Process Integration
4. Summary
TMT Company Profile

z Strategic Position:
Professional MEMS Technology Developer (Co‐Development)
& Manufacturing Platform Provider (Foundry Service)
z The First Professional MEMS Foundry in Taiwan
z The First 200mm MEMS Foundry in Taiwan   
z MEMS Manufacturing Platforms Available
MEMS Industry
• Growing market, but fragmented: “Unique product with unique functions &
• Number of fab-less MEMS companies is growing
• Foundry and fab-less MEMS companies form manufacturing partnership.
• From 2007-2008, 25% MEMS units growth was accompanied with “only”
9% increase in value.

Source: Yole Development, Sep. 2009

MEMS Process Integration Cycle
• No “standardized” MEMS processes
− For different applications, there are different optimum processes.
− There is no process platform available at foundries for easy
development of integration
− At least 4-5 years from development to launch a MEMS product

From M. Huff, MEMS and Nanotechnology Exchange

Hurdles on MEMS Process Integration
• From design to products: Need to overcome many hurdles!

failures Yield

IP Successful
protection Schedule Product
delay launch

Processing compatibility
difficulty Electronic
Working with Foundry with Process Integration

• Leverage the well-characterized processes and process

modules (i.e. core competencies) offered at foundries
− Foundries have developed many process modules for
different applications.
• The ultimate goal is to shorten the time to market!
Design for Manufacturability and Best Practice

• From design point of view

− “Desensitize” system’s behavior from the manufacturing
− Avoid using the undesirable aspects of a fabrication process to
define a device’s critical dimensions
• Short-loop runs (i.e., sub-sets of steps) are based on
statistical methods such as DOE for process validation and
problem solving.
• Test structures and diagnostic structures for measuring the
material properties from the process sequence
MEMS Processing Trend for Volume Production

production with
size & cost
3D WLP & CMOS reduction
Thru-wafer (wafer thinning

Processes & 8” wafers)

wafer bonding)


Processing Trends
TMT’s Core Process Technology
TMT’s Core Process Technology
Interposer Platform
• An advance passive component targeting at high performance,
small form factor passive-only circuits.

Key Features:
z Ultra thin glass substrate (as thin as 150um) 
z Thick Cu (10 um) as for inductor coil
z High‐Q Inductor: Q>50@6.4GHz
z High density MIM capacitor: 350pF/mm2 
z Enabling Capacitors design with two types of 
Capacitance Density ( 350pF/mm2& 4pF/mm2) 
z Design kit / shuttle bus available
TMT’s Integrated Solutions
z CMOS‐MEMS & WLP Platform

z Accelerometer / Gyro / Inertial Sensor 
z Micro‐mirror 
z Microphone and oscillators
z Nozzles / Micro‐channel 

z Silicon Optical Bench platform

z LED Light Engine / Display
MEMS Integration Strategy

• Two examples of MEMS/CMOS packaging

z CMOS and MEMS separated

– need wire bonding between
MEMS and CMOS chips

z MEMS bonded to CMOS as

a single chip
– monolithic integration

Source: Chipworks
MEMS-CMOS Monolithic Integration
• Interleaved MEMS and CMOS
− inserting MEMS process before the back-end interconnect
− Ex. Analog Devices
− Challenges: MEMS processes intervene CMOS processes;
long development cycles
• MEMS First
− MEMS devices made prior to CMOS
− Ex. Sandia National Lab, SiTime
− Challenges: Surface topography, wafer cleanliness,
material property change
MEMS-CMOS Monolithic Integration

• MEMS Last (i.e. MEMS devices built on top of CMOS wafers)

− Bonded MEMS or processed MEMS on CMOS
− Using existing CMOS layers; Ex. Akustica, Baolab
− Deposit MEMS layers; Ex. Texas Instrument, Miradia,
IMEC, Silicon Labs
− WLP of MEMS on top of CMOS, Ex. Xerox, InvenSense
DLP from Texas Instrument

• Three metals on top of CMOS

• Using metal layers as the
mechanical structure

L. Hornbeck, TI DMD Whitepaper

Miradia Micromirror
• Single crystal Si as hinge for faster
switching time
• Process technology owned by TMT

From D. Wang, Miradia

Micromirrors on top of CMOS
Innovative “Standard” Processes Currently Available for
CMOS-MEMS Integration
These processes have been recently developed:
• Low temperature bonding between CMOS and MEMS (to
enable single crystal Si for MEMS)
− GeAl bonding
− Silicon-silicon oxide bonding
• Cavity bonding
− Cavity SOI
• High density MEMS-CMOS electric connection
• Polymer adhesive for microfluidic packaging (learned from
inkjet printhead)
• Deposition of post-CMOS films for MEMS
− PolySiGe, metal alloys, amorphous Si, etc.
MEMS-CMOS Integration Platform
• Low temperature bonding (single crystal Si), wafer thinning,
TSV, and WLP create the active MEMS device layer.
• This process module (for 8-in wafers) has been offered at
foundry for fab-less MEMS companies.

MEMS Device
Top-1 metal
Top-2 metal
CMOS Circuitry
Flexible CMOS-MEMS platform
Cap Layer
MEMS Device
Top-1 metal
Top-2 metal
Top-1 metal
Top-2 metal CMOS Circuitry
CMOS Circuitry

• Many new innovative processes are available at foundries for

MEMS-CMOS integration
• A flexible integrated platform (developed originally for
micromirrors) is now available for MEMS designs
− MEMS structures (single crystal Si / metal) can be
monolithically integrated to the 8-in CMOS wafer.
• Fabless MEMS design companies are benefited from the
process technology offered by MEMS foundries.
• Shortening the process integration cycles is the key for
success in the MEMS industry.

• V. Lin, E. Kang, CS Yang, Touch Micro-system Technology

• M. Huff, MEMS and Nanotechnology Exchange
• S. Bart, Analog Devices
• D. Wang, Miradia
• And many others