EE618: CMOS Analog IC Design

Year: 2017-18 Autumn Semester

Instructor: Prof. Rajesh Zele

Motivation:
Why Analog: www.ee.iitb.ac.in/course/~shashankov/whyanalog.pdf

This is a PG level course in Analog Circuit Design in CMOS technology and is essential for anyone who
wishes to pursue research in Analog/Mixed Signal Design and forms a base for further specialization
in the analog domain. Apart from learning analog circuit design, the course also entails Layout
Design in detail which cannot be found in any other course.

Prerequisites:
Officially this course has no pre-requisites and the instructor begins with the basic MOSFET
equations and circuits while ignoring the underlying physics. Hence it is advantageous to know MOS
Device Fundamentals and also Analog Circuit basics which are well covered in Undergraduate
Courses.

Course Content:
 CMOS Device Fundamentals and Small Signal Models
 CMOS Amplifiers: Common Source/Drain/Gate, Cascode Stage Amplifiers, etc.
 Current Mirrors
 Differential Amplifiers and Mismatches
 Operational Transconductance Amplifiers/Operational Amplifiers
 Feedback and Stability
 Frequency Compensation
 Noise
 Fully-Differential OTA and Common-Mode Feedback
 Voltage/Current Reference (Bandgap Circuits)
 Analog Layout Techniques
 Continuous Time and Switched Capacitor Filters
 Anti-Aliasing and Smoothing Filters

Feedback on Lectures and Assignments/Projects:

 Lectures are quite engaging and tend to be fast because the lectures’ contents are planned
well in advance. The instructor wrote on his laptop which was projected on the screen. The
lectures were recorded and made available on CDEEP in reasonable time and hence taking
notes was not necessary and attention was essential to follow the material being covered.
The instructor also uploaded Lecture Notes which were elaborate enough to read through
later. Explanations to doubts were not clear at times but the instructor came well prepared
to answer them in the succeeding class.
 The assignments were lengthy but not difficult and involved hand calculations as well as
Simulations on the Cadence software available in the VLSI Lab in the SCL 180nm Technology.
 Projects are the heaviest component of the course and are individual. The first project
involved design of an OTA to given specifications and the second one involved its layout and
post-layout simulations. The second project also included a design competition with prizes
 funded by companies in the Analog Industry which is one of the most interesting aspects of
the course.

Exams:
Quizzes were neither easy nor difficult but lengthy and hence required strong fundamentals so that
the questions can be solved without much thought. Midsemesters and Endsemesters involved
questions from papers to test quick analysis and identification of common circuit topologies which
was also taught in the class. But otherwise the exams are doable with sufficient practice and
understanding of the basics.

Teaching Assistants:
The professor confers great importance to the Teaching Assistants with them being involved in
setting of the Assignments and Projects and administration of the course. The class is divided into
groups each being led by one TA. Whatsapp groups are formed to clear doubts quickly and
effectively by making the Tas more approachable. Groups also participate in friendly competition in
assignment scores, etc. Tutorial sessions are held periodically on weekends to solve problems.

Grading Policy:
 Quizzes: 2 x 5% (2 x 10% in 2018 offering)
 Assignments: 4 x 5% (2 x 5% in 2018 offering)
 Projects: 2 x 10%
 Midsem: 20%
 Endsem: 30%

Grading was lenient with getting an AB easy if the required effort is put in. Attendance was taken
manually in every class and 80% attendance as per institute policy was enforced.

Future Courses:
EE 719 (Mixed Signal Design) and EE 619 (RF IC Design) are the immediate succeeding courses which
depend on this course and are offered in the Spring Semester. They strongly depend on the basics
learnt in this course and are essential specializations to work in the field.

Difficulty Level: Difficult (Effort Wise)/ Medium (Theory Wise)

References:
The instructor mostly follows the book my Prof. Behzad Razavi: Design of Analog CMOS Integrated
Circuits. But there are many references to papers also provided to supplement the architectures and
topologies taught in the class. The instructor strongly promotes referring to new architectures from
papers for the Project.

Reviewed By: OV Shashank (shashankov@ee.iitb.ac.in)