INSTRUCTION SET

Similar to the instruction set of 8085, 8086 also has an instruction set which comprises of equivalent
instructions as in 8085 and other extra instructions such as multiplication, division and string operations.
The 8086 has 117 different instructions and about 300 op-codes. One important thing to be noted is that
no memory to memory instructions are allowed in 8086 except for string instructions. The instruction set
of 8086 can be classified into the following main categories for easy understanding:

1) DATA TRANSFER INSTRUCTIONS

2) ARITHMETIC INSTRUCTIONS
3) BIT MANIPULATION INSTRUCTIONS
4) STRING INSTRUCTIONS
5) BRANCH INSTRUCTIONS
6) PROCESSOR CONTROL INSTRUCTIONS
7) ASSEMBLER DIRECTIVES

Now, we shall look into each category in a detailed manner.

DATA TRANSFER INSTRUCTIONS

There are totally 14 data transfer instructions which help in moving 16 bit or 8 bit data between registers
and I/O ports. The following table __ reveals the same.

Table X.1 Summary of Data Transfer Instructions

MOV [BX], DX Copy contents of DX to memory at [BX] MOV copies byte or

word data from a
MOV [CX], 1234H Move 1234H to memory specified by [CX] source to a destination.
Immediate values can
MOV AL, 56H Move 56H to register AL.
also be moved. DS is
MOV ES, 0F80H Move 0F80H to ES. Useful for initializing CS, the segment register.
DS, ES, SS. MOV [AX], [BX] is not
possible.
Value of SS is stored in memory specified by
MOV [BX], SS BX.

POP AX Contents from top of stack moved to AX Moves the top word
from the stack to a
POP ES Contents from top of stack moved to ES destination. After this,
SP is incremented by 2.
POP [DI] Contents from top of stack moved to POP CS is not possible.
location specified by [DI]
PUSH DX Contents from DX moved to top of stack PUSH instruction
copies the contents of
PUSH DS Contents from DS moved to top of stack the specified location
to the top of stack.
PUSH [CX] Contents from location specified by [CX]
After this, SP
moved to top of stack
decrements by 2.
PUSH CS can’t be executed.

XCHG CL, DL Contents of CL and DL are interchanged XCHG exchanges the

contents of a register
XCHG CX, DX Contents of CX and DX are interchanged with a memory
location or another
XCHG CX, [BX] Contents of CX and the value at location
register. Contents of
denoted by [BX] are interchanged.
two memory locations
can’t be interchanged.
Segment registers can’t
be used.

XLAT Contents of memory at [BX] moved to AL. Before executing XLAT,

The contents of AL and BX are added to get the desired data for a
the offset address of the data in the look-up lookup table must be
table. This byte will replace the data in AL. put in the data
segment with the
XLAT is equivalent to MOV AL, [AL] [BX]. offset address of the
starting location in BX.
No operand for this
instruction.

LEA AX, START Offset address of START in the data segment LEA (Load effective
is stored in AX. Assume START is a memory address) puts the
location. offset address of the
source into the
LEA DX, [BX] [SI] Contents of the locations denoted by [BX] specified register.
and [SI] are added and stored in CX.

LDS SI, [1234H] Contents of location denoted by offset LDS copies a word from
1234H in Data segment to lower byte of SI a memory location into
and similarly that of 1235H to higher byte of a register and next
SI. Contents of location denoted by offset memory location to DS
1236H in data segment to lower byte of DS register. Usually used
register and that of 1237H to higher byte of to initialize SI and DS
DS register. registers while starting
a string before using
any of the string
 instructions.

LES SI, [1234H] Similar to LDS. Only

change is instead of DS
register getting loaded,
here ES register gets
loaded.

LSS SI, [1234H] Similar to LDS. Only

change is instead of DS
register getting loaded,
here SS register gets
loaded.

LAHF LAHF copies lower

order byte of flag
register into AH.

SAHF SAHF stores the

contents of AH in the
lower order byte of
flag register.

PUSHF [SP] [flag register] PUSHF stores the 16 bit

flag register in the
[SP] [SP] - 2 stack.

POPF [flag register] [SP] POPF pops two bytes

and stores into the flag
[SP] [SP] + 2 register.

IN AL, 18H 8 bit data from port 18H is stored in AL. Fixed port addressing.
Access to up to 256
IN AX, 18H 16 bit data from ports 18H and 19H will be ports.
stored in AX.

Variable port
Assume [DX] = 1234H. 8 bit data from port addressing. Access to
IN AL, DX 1234H is stored in AL. up to 65536 ports.

IN AX, DX Assume [DX] = 1234H. 16 bit data from ports

1234H and 1235H stored in AX.

OUT 18H, AL Contents of AL is stored in port 18H Fixed port addressing.

16 bit data from AX is stored in ports 18H

OUT 18H, AX and 19H.

Assume [DX] = 1234H. 8 bit data from AL is

stored in port 1234H.
OUT DX, AL Variable port
Assume [DX] = 1234H. 16 bit data from AX is addressing. Access to
stored in ports 1234H and 1235H. up to 65536 ports.
OUT DX, AX

Note:

1. In fixed port addressing, we have to change the program for different ports. This is where
variable port addressing is helpful. We can write a general subroutine and supply the
address of the port to DX register. This way the port addresses can be changed
dynamically in a program itself.

2. No data transfer instruction affects the flag register except the SAHF and POPF
instructions.

ARITHMETIC INSTRUCTIONS

There are totally 19 arithmetic instructions which help in performing mainly addition, subtraction,
multiplication and division operations. The following table __ reveals the same.

Table X.2 Summary of Arithmetic Instructions

ADD AL, 20H 20H is added with value in AL; result in AL. The general format of
the ADD instruction is
ADD DX, 1234H 1234H is added with value in DX; result in DX ADD destination,
source. Both
ADD AX, BX Contents of AX and BX are added and result
destination and source
stored in AX.
can’t be memory
Content of BL is added to the byte at memory locations, i.e.,
ADD BL, [CX] location pointed to by CX and result stored in BL. ADD [AX], [BX] is not
possible.

The data of the

ADD BX, [DI] Content of BX is added to the value at the destination and the
location pointed to by DI and result stored in BX. source must be of
same type: either byte
or word. Flags AF, CF,
ADD [AX], DL Content of DL is added to the byte pointed by AX OF, PF, SF and ZF are all
and result stored in the location pointed to by AX. affected by ADD
instruction.

ADC DX, [BX] Assume [DX] = 0010H, [BX]= 0200H, [DS]= 2000H, ADC adds the data in
[CF]=1 and [20200]= 0050H. the source and
destination plus the
After executing the instruction, content of the carry
flag and stores the
[DX] = 0010 + 0050 + 1 = 0061H. result in the
destination. All the
All the possible operands of ADD instruction are rules of ADD
applicable to ADC also. instruction hold good
for ADC instruction.

SUB AL, 20H 20H is subtracted from value in AL; result in AL SUB subtracts data in
the source from the
SUB DX, 1234H 1234H is subtracted from value in DX; result in DX data in the destination
and stores result in
SUB AX, BX Content of BX subtracted from that of AX and
destination. The
result in AX.
general format is
Content of byte at memory location pointed by SUB destination,
SUB BL, [CX] CX subtracted from BL and result in BL. source. Both
destination and source
can’t be memory
locations, i.e., SUB
SUB BX, [DI] Content of value at the location pointed to by DI [AX], [BX] is not
subtracted from BX and result in BX. possible.
Content of DL is subtracted from the byte pointed The data of the
SUB [AX], DL
by AX and result stored in the location pointed by destination and the
AX. source must be of
same type: byte or
word. Flags AF, CF, OF,
PF, SF and ZF are
affected by SUB
instruction. The CF flag
acts as the borrow flag.
If the result is negative,
CF is set, else reset.

SBB DX, [BX] Assume [DX] = 0100H, [BX]= 0200H, [DS]= 2000H, SBB subtracts the data
[CF]=1 and [20200]= 0050H. in the source and the
value of CF from the
After executing the instruction, data in the destination
and the result is stored
[DX] = 0100 - 0050 - 1 = 00AFH. All the possible in destination. All the
operands of SUB instruction are applicable to SBB rules of SUB instruction
 also. hold good for SBB
instruction.

INC AL Content of AL is incremented by 1. INC adds 1 to the

content of the
INC BX Content of BX is incremented by 1. specified register or
memory location. Data
INC BYTE PTR [CX] Content of the byte in memory pointed by CX is
to be incremented can
incremented by 1.
be a byte or word. Only
Content of the word in memory pointed by SI is the CF is not affected
INC WORD PTR [SI] incremented by 1. by this instruction.

DEC AL Content of AL is decremented by 1. DEC subtracts 1 from

the content of the
DEC BX Content of BX is decremented by 1. specified register or
memory location. Data
DEC BYTE PTR [CX] Content of the byte in memory pointed by CX is
to be decremented can
decremented by 1.
be a byte or word. Only
Content of the word in memory pointed by SI is the CF is not affected
DEC WORD PTR [SI] decremented by 1. by this instruction.

NEG AL 2’s complement of value in AL stored in AL. NEG replaces the data
in the specified register
NEG BX 2’s complement of value in BX stored in BX. or memory location
with its 2’s
NEG BYTE PTR [CX] 2’s complement of the byte in memory pointed
complement. The data
by CX stored in the same memory location.
can be a byte or word.
2’s complement of the word in memory pointed All flags are affected by
NEG WORD PTR [SI] by SI stored in the same memory location. this instruction.

CMP BX,AX Does BX – AX. General format of the

instruction is CMP
If AX = DX, CF=0 ZF=1 SF=0 destination, source.
Comparison is done by
If AX > DX, CF=0 ZF=0 SF=0
subtracting the content
If AX<DX, CF=1 ZF=0 SF=1 of source from content
of destination. This
operation affects only
the flags, the content
of the source and
destination do not get
affected.

MUL AH Content of AH multiplied with AL. Product stored One operand

in AX. instruction – MUL
MUL CX Content of CX multiplied with AX. Product stored source. The source can
in DX: AX. be a byte or word in a
register or memory
location. The source is
MUL BYTE PTR [BX]
multiplied with AL or
Multiply AL with byte in memory pointed by BX.
AX depending on byte
Product stored in AX.
or word multiplication.
Product stored in AX
for byte multiplication
and in DX: AX for word
multiplication.

IMUL CL Multiply AL with CL. Product stored in AX. IMUL is used for signed
multiplication, i.e. if
IMUL AX Multiply AX with AX. Product stored in DX: AX. the magnitude of the
product does not
IMUL BYTE PTR [CX] Multiply AL with byte in memory pointed by CX.
require all the bits of
Product stored in AX.
the destination, these
Multiply AX with word from memory pointed by unused bits are filled
IMUL WORD PTR [SI] SI. Product stored in DX: AX. with the signed bit
value.

Note:

1. To multiply a signed byte by a signed word, the byte must be moved into a word location
(say BL) and the upper byte BH must be filled with copies of the signed bit using the
instruction CBW (Convert byte to word). Now BX contains the 16 bit sign extended bit.

2. If the upper byte of a 16 bit result or upper word of a 32 bit result contains only copies of
the sign bit (all 0’s or all 1’s) then CF =0, OF=0. If not, both will be 1. Other flags such as
AF, PF, SF and ZF are undefined after IMUL operation.

DIV BL Word in AX divided by byte in BL. Quotient stored One operand

in AL, remainder in AH. instruction: DIV
source. Here source is
Double word in DX: AX divided by the word in BX. the divisor. The source
DIV BX Quotient stored in AX, remainder in DX. can be a byte or word
in a register or memory
Word in AX divided by byte in memory pointed by
location.
BX. Quotient stored in AL, remainder in AH.
DIV BYTE PTR [BX]

IDIV WORD PTR[BX] Assume [BX]= 0020H , [DS] = 1000H , IDIV is used for signed
division. The format
[10020H] = 0004H, [DX][AX] = 00000011H. and rules of this
instruction is same as
 After the instruction, that of DIV instruction
only. Quotient is a
[DX] = 0001H (remainder) signed no. and the sign
of the remainder is the
[AX]= 0004H (quotient)
sign of the dividend.

Note:

1. To divide a signed byte by a signed byte, the dividend byte must be moved into AL and
the sign bit of the data in AL is extended to AH using the instruction CBW (Convert byte
to word). Now AX contains the 16 bit sign extended bit. To divide a signed word by a
signed word, the dividend must be moved into AX and the sign bit of the data in AX is
extended to DX: AX using instruction CWD (Convert word to double word).

2. If division by zero occurs or if the quotient is above FFH in 8 bit division or above FFFFH
in 16 bit division, then 8086 generates a type 0 interrupt. All flags are undefined after DIV
and IDIV operation.

3. This is for a faster recap of what you must mainly remember in DIV instruction.

Dividend (bits) Divisor (bits) Quotient (bits) Remainder (bits)

16/8 division AX (16) Source (16) AL (8) AH (8)

32/16 division DX: AX (32) Source (32) AX (16) DX (16)

DAA i. Assume AL = 00111000 = 38 BCD DAA refers to decimal

adjust AL after BCD
BL = 00110011 = 33 BCD. addition. This
instruction adjusts the
ADD AL, BL ; AL=01101011= 6BH
result of adding two
DAA ; AL = 01110001 = 71 BCD ( Add 0110 packed BCD numbers
to AL since lower nibble is greater than 9 ) in AL to provide a valid
BCD number. After
ii. Assume AL = 10000101 = 85 BCD addition, if lower
nibble of AL is greater
BL = 01001000 = 48 BCD. than 9, then DAA adds
6 to the low 4 bits of
ADD AL, BL ; AL = 11001101 = CDH and AF =1.
AL. But if higher nibble
DAA ; AL = 00110011 = 33 BCD and CF =1. is greater than 9, then
DAA adds 60H to AL.
Answer : 133 BCD ( taking into account carry) DAA instruction affects
AF, CF, PF and ZF. OF is
undefined after this
operation.
DAS Here any borrows from low or high nibbles are DAS refers to decimal
ignored. adjust AL after BCD
subtraction. This
i. Assume DL = 01010101 = 55 BCD, instruction adjusts the
result of subtracting
AL = 10010100 = 94 BCD.
two packed BCD
SUB AL, DL ; AL = 00111111 = 3FH numbers in AL to
provide a valid BCD
DAS ; AL = 00111001 = 39 BCD (Subtract number. After
0110 from AL as lower nibble greater than 9), CF subtraction, if lower
=0 ( indicates no borrow ) nibble of AL is greater
than 9, then DAS
{ 1111 – 1010 = 1001 } subtracts 6 from the
low 4 bits of AL. But if
Ignore 1 Answer : 39 BCD
higher nibble is greater
ii. Assume AL = 01001001 = 79 BCD than 9, then DAS
subtracts 60H from AL.
DL = 01011011 = 57 BCD

SUB AL, DL ; AL = 11010111 = D7H and CF =1

(as result is negative )

DAS ; AL = 01110111 = 77 BCD ( Subtract

0110 0000 {60H} from AL as upper nibble in AL is
greater than 9) , CF = 1 ( indicates borrow is
needed ) Answer : 77 BCD

AAA Assume AL = 00000101 = 05d AAA refers to ASCII

adjust after addition.
CH = 00000110 = 06d This instruction must
always be used after
AH =00H.
addition of two
ADD AL, CH ; AL = 11d and CF = 0 unpacked BCD
numbers in AL to
AAA ; AL = 01, AH = 01 and CF = 1. provide a valid
unpacked BCD number.
AAA clears the upper
four bits, CF is set and
AH is incremented if a
decimal carry out is
generated from AL.

Note:

1. In the above example shown, adding 5 and 6, gives a decimal result of 11. Its unpacked BCD form
is 0101H. This is stored in AX. When this result is to be sent to a printer, the ASCII code of each
decimal digit is found by adding 30H to each byte. This is done because the ASCII codes for
 numbers 0 to 9 are 30H through 39H and only ASCII values are received by 8086 microcontroller
from a terminal.

2. An unpacked BCD number is represented as an 8 bit number in which the upper four bits
are always zero. For example, the decimal digit 5 is written as 05H in unpacked BCD
form.

AAS i. Assume AL = 00001000 = 08 BCD AAA refers to ASCII

adjust after
BL = 00000100 = 04 BCD subtraction. This
instruction must
AH = 00H.
always be used after
SUB AL, BL ; AL = 04 BCD subtraction of one
unpacked BCD number
AAS ; AL = 04 BCD, AH =00H and CF = 0. from another in AL to
provide a valid
ii. Assume AL = 00000100 = 04 BCD unpacked BCD number.
AAA clears the upper
BL = 00001000 = 08 BCD, AH =00H
four bits, CF is set and
SUB AL, BL ; AL = -4 BCD (in 2’s complement form AH is decremented if a
AL = FCH) CF =1. decimal borrow is
generated from AL.
AAS ; AL = 04 BCD, CF =1 ( indicates that borrow AAA and AAS affect
is needed ) , AH = FFH (2’s complement of -1 ) only AF and CF flags.

AAD Assume AX = 58d = 0508 unpacked BCD AAD refers to ASCII

adjust before division.
DH = 07H. AAD converts two
unpacked BCD digits in
AAD ; AX = 003AH ( 003AH = 58 decimal)
AH and AL to an
DIV DH ; AL = 08 unpacked BCD (quotient) equivalent binary
number in AL. AAD
AH= 02 unpacked BCD (remainder) must be used before
dividing two unpacked
BCD digits in AX by an
unpacked BCD byte.

AAM Assume AL = 00000011 = 3 BCD AAM refers to ASCII

adjust after
CH = 00001000 = 8 BCD. multiplication. AAM
adjusts the product of
MUL CH ; AX = 0000000000011000 = 0018H
2 unpacked BCD digits
AAM ; AX = 0000001000000100 = in AX. The higher order
24unpacked BCD . digit is placed in AH
and the lower order
8086 does not allow multiplication of two ASCII digit is placed in AL.
codes. So before multiplying two ASCII bytes, we AAD and AAM affect
must mask the upper 4 bits of each of these bytes only PF, SF and ZF flags.
 and then multiply them as two unpacked BCD
digits and then use AAM for adjustment. To
convert unpacked BCD product back to ASCII, we
must OR the product with 3030H.

BIT MANIPULATION INSTRUCTIONS

There are totally 12 bit manipulation instructions which help in performing logical, shift and rotate
operations. The following table __ reveals the same.

Table __ Summary of Bit Manipulation Instructions

AND AX, BX The corresponding bits of AX and BX are logically The general form of
ANDed and result stored in AX. the instruction is AND
destination, source.
AND performs a logical
AND operation
The operands can be either byte or words. Source
between source and
can also be immediate values.
destination and stores
the result in the
destination. PF, SF and
ZF are affected by this
instruction whereas CF
and OF remain zero.

OR AH, CH The corresponding bits of AH and CH are logically The general form is the
ORed and result stored in AH. same as that of AND
instruction. OR
performs a logical OR
operation between
The operands can be either byte or words. Source
source and destination
can also be immediate values.
and stores the result in
destination. Same flags
are affected as for AND
instruction.

XOR BH, DL The corresponding bits of BH and DL are logically The general form is the
ORed and result stored in BH. same as that of AND
instruction. XOR
performs a logical XOR
operation between
The operands can be either byte or words. Source
source and destination
can also be immediate values.
and stores the result in
 destination. Same flags
are affected as for AND
instruction.

NOT [BX] Perform 1’s complement of the value in memory The general form of
pointed by BX. the instruction is NOT
destination. NOT
The operands can be either byte or words. instruction performs
1’s complement (or
inverts) of each bit of
the destination
specified. The result is
stored in the
destination itself. This
instruction does not
affect any flags.

TEST AH, FFH Assume AH= 00H. The general form is the
same as that of AND
After the instruction : TEST AH, FFH instruction. TEST
instruction ANDs the
AH=00H. ZF=1, PF=1, SF=0.
content of the source
with content of
destination. It is
The operands can be either byte or words. The different from AND
source can also be immediate values. instruction in the sense
that it does not store
the result anywhere.
Only the flags get
affected. Same flags
are affected as for AND
instruction.

SHL /SAL The operands can be either byte or words. SHL refers to logical
shift left, SAL means
shift arithmetic left.
Both these instructions
have the same
function. SAL is
generally used for
signed data only. The
general format of this
instruction is
SAL/ SHL destination,
count. This instruction
shifts each bit of the
destination to the left
by that many number
of times specified in
count. This count is
stored in register CL. If
the count is 1, it can be
directly specified in the
instruction.
STRING INSTRUCTIONS

There are totally 10 string instructions which help to move, scan or compare strings, bytes or words. All
string instructions do not have any operands. The following table __ reveals the same.

Table __ Summary of String Instructions

MOVSW / MOVSB Assume DF = 0 , [DS]=0700H , [SI] = 0000H , MOVSB refers to move

a byte and MOVSW
[ES] = 1500H, [DI] = 0006H, [70000] = 5678H. refers to move a word.
This instruction moves
After the instruction: MOVSW
the word or byte from
[150006] = 5678H, [SI] = 0002H, [DI] = 0008H. a memory location
pointed by SI to a
memory location
pointed by DI always.
SI and DI values are
decremented or
incremented
automatically if
direction flag DF = 0 or
DF=1 respectively.

CMPSB / CMPSW Assume [ES] = 1000H, [DI] = 0002H, [DS] = 500H, This instruction
[SI] = 0006H, DF = 0. compares bytes or
words. CMPSB
After the instruction: CMPSB compares strings by
subtracting byte in
Flags get affected based on the result from
extra segment pointed
[50006] – [10002].
by DI from the byte at
[DI] = 0004H, [SI] = 0008H. Data segment pointed
by SI. The flags are only
affected. The contents
do not get affected.

SCASB/ SCASW Assume [ES] = 5000H, [DI] = 0002H, DF = 1, SCAS refers to scan
[50002] = FFH, [AL] = FFH. string. This instruction
is same as the above
After the instruction: SCASB but the only difference
is that here the string
[DI] =0001H{Since byte operation, decrease by 1}
is compared with AX,
ZF =1. { Since [AL] – [50002] = 00H } i.e. , the byte or word
in extra segment
Here, DI alone decrements or increments. SI pointed by DI is
 remains unaffected. subtracted from the
byte in AL or word in
AX respectively.

LODSB/ LODSW LODS refers to load

string. This instruction
loads the byte or word
in data segment into
AL or AX respectively.

STOSB/ STOSW STOS refers to store

string. This instruction
is just the opposite of
the previous
instruction. It stores
the byte or word in AL
or AX at extra segment
pointed by DI.

SCASB/ SCASW SCAS refers to scan

string. This instruction
is same as the above
but the only difference
is that here the string
is compared with AX,
i.e., the byte or word
in extra segment
pointed by DI is
subtracted from the
byte in AL or word in
AX respectively.

REP MOVSW Assume [CX] = 05H. REP refers to repeat.

This instruction repeats
After the instruction: REP MOVSW, 5 words will the instruction that
be moved from data segment to extra segment. follows by a certain
number of times
There are however different prefixes that can be
specified by value of
used with REP instruction.
CX register. The CX
REPE / REPZ The following instruction is repeated till CX register automatically
becomes zero and ZF = 1. decrements by 1 after
each execution of the
The following instruction is repeated till CX instruction. So, before
REPNE / REPNZ
becomes zero and ZF = 0. using this instruction,
you must remember to
load the count value in
 CX.

BRANCH INSTRUCTIONS

As you have seen in 8085, there are different types of branching instructions available in 8086 also.
These vary from branching conditionally and unconditionally to calling or returning from a subroutine.
JMP instructions are different from CALL instruction in the sense CALL must be ended by a RET
instruction, whereas JMP instruction does not require a RET instruction.

Table __ Summary of Branch Instructions

JMP memory Contents of the next two words are moved to IP Unconditional
and CS respectively. branching: These
instructions can
This signed 8 bit data is added to [IP + 2]. [CS] is transfer control either
JMP 8 bit data not changed. within a same segment
JMP 16 bit data or outside a segment.
This unsigned 16 bit data is added to [IP + 2]. [CS]
Note that for
is not changed.
intersegment jumps,
Content of the register is moved to [IP]. [CS] is not both CS and IP
JMP register changes. For
changed.
intrasegment changes,
CS remains constant
CALL memory / CALL 8 Call function can also be used with all of the but IP will change.
bit data / CALL 16 bit above operands. The function of this instruction
data / CALL register is same as JMP. But CALL is generally used to call
subroutines.

RET RET refers to return from subroutine. RET has no

operand. This instruction transfers control back to
the instruction after the CALL instruction.

JZ 8-bit data Jump if the result is zero. (ZF=1) Conditional Branching:

The conditional branch
JNZ 8-bit data Jump if the result is non-zero. (ZF=0) instructions use an 8-
bit displacement
JC 8-bit data Jump if carry produced. (CF=1)
address. This means
JNC 8-bit data Jump if carry not produced. (CF=0) that the branching can
have a range between
JS 8-bit data Jump if result is negative. (SF=1) -12810 to +12710.

If a condition is true,
JNS 8-bit data Jump if result is positive. (SF=0) PC= PC + displacement
address.
JP 8-bit data Jump if parity produced. (PF=1)
If condition is false,
JNP 8-bit data Jump if parity not produced. (PF=0) PC = PC + 2. The next
instruction is executed.
JPO 8-bit data Jump if parity is odd. (PF=0)

JPE 8-bit data Jump if parity is even. (PF=1)

JO 8-bit data Jump if overflow occurs. (OF=1)

JNO 8-bit data Jump if overflow does not occur. (OF=0)

The conditional branch instructions can be used for two purposes.

1. To check if the result of an arithmetic operation is zero or not, positive or negative,

whether a carry was produced or not, whether parity was produced or not, or if it caused
overflow or not, you must use the above mentioned instructions.

2. For comparing two unsigned or signed numbers, use the following instructions after
the compare instruction. Generally we use the terms ‘above’ and ‘below’ for unsigned
numbers and ‘greater’ or ‘lesser’ for signed numbers.

CMP AX, BX This instruction here is used to explain the

following instructions.
All these instructions
Jump if above, i.e. AX > BX. (CF=0 & ZF=0) also are conditional
JA 8-bit data branching instructions.
Jump if above or equal, i.e. AX ≥ BX (CF=0) If you look at all the
JAE 8-bit data
instructions, you might
Jump if below, i.e. AX< BX (CF =1)
JB 8-bit data find that the following
Jump if below or equal, i.e. AX≤BX (CF =1 or ZF=1) instructions hold the
JBE 8-bit data same meaning:
Jump if equal, i.e. AX = BX (ZF=1)
JE 8-bit data JA = JNBE
Jump if not above, i.e. AX≤ BX (CF =1 or ZF=1)
JNA 8-bit data JNA = JBE
Jump if not above or equal, i.e. AX < BX (CF =1)
JNAE 8-bit data JB = JNAE
Jump if not below, i.e. AX ≥ BX (CF=0)
JNB 8-bit data JNB = JAE
Jump if not below or equal, i.e. AX > BX. (CF=0 &
JNBE 8-bit data ZF=0) JE = JZ

JNE 8-bit data Jump if not equal, i.e. AX ≠ BX (ZF=0) JNE = JNZ

JG 8-bit data Jump if greater, i.e. AX > BX (ZF=0 & SF =0) JG = JNLE
JGE 8-bit data Jump if greater or equal, i.e. AX ≥ BX (SF=OF) JNG = JLE

JL 8-bit data Jump if lesser, i.e. AX < BX (SF ≠ OF) JL = JNGE

JLE 8-bit data Jump if lesser or equal, i.e.AX≤BX (ZF=1 or SF≠OF) JNL= JGE

JNG 8-bit data Jump if not greater, i.e. AX≤BX (ZF=1 or SF≠OF) JP = JPE

JNGE 8-bit data Jump if not greater or equal, AX < BX (SF ≠ OF) JNP = JPO

JNL 8-bit data Jump if not lesser, i.e. AX ≥ BX (SF=OF)

JNLE 8-bit data Jump if not lesser or equal, i.e. AX > BX (ZF=0 & SF
=0)

LOOP 8-bit data Decrement CX and jump to the specified address Iteration Control
if CX ≠ 0. Instructions: The
general function of
Loop if equal. (While CX≠0 and ZF=1) each instruction is that
LOOPE 8-bit data/
they decrement CX
LOOPZ 8-bit data
register by 1 and act
LOOPNE 8-bit data/ Loop if not equal. ( While CX≠0 and ZF=0) similar to JMP
LOOPNZ 8-bit data instruction if CX ≠ 0.
None of the flags are
JCXZ affected. If CX = 0, then
Jump if register CX = 0. the loop ends and the
next instruction is
performed.

The interrupt related instructions are also a type of branching instruction as the
control jumps to another place in memory where the interrupt service routine is executed. These
instructions can create only software interrupts (interrupts which can be created by
programming).

INT number The number here can be anything between 00H Totally 256 interrupts
and FFH. Upon this instruction, 8086 executes the can be generated. But
interrupt service routine for that particular out of these, only
interrupt. interrupt numbers 20H
to FFH are available to
the user.

INTO An interrupt is generated in case of an overflow.

(OF=1)

IRET The control is returned back to the main program

 after completion of interrupt service routine.

PROCESSOR CONTROL INSTRUCTIONS

Their name itself explains their meaning clearly. All instructions except ‘ESC’ have no operands.

Table __ Summary of Processor Control Instructions

LOCK A low signal is produced on the LOCK pin of 8086 This instruction locks
during the next instruction. the system bus, i.e.,
the processor will not
be able to use the
system bus for the next
instruction. This
instruction is used
while multiprocessing.
The LOCK works only
with XCHG, ADD, ADC,
SUB, SBB, OR, AND,
XOR, NOT, NEG, INC
and DEC instructions
having a memory
operand.

HLT The processor goes into halt state. HLT refers to halt. This
instruction stops
execution of all
instructions. Only a
reset signal or an
interrupt signal can
make the processor
resume execution from
halt state.

NOP No operation is performed. NOP refers to No

operation. This
instruction can also be
used to produce
delays.

STC Carry flag is set. (CF=1) STC refers to Set the

Carry.

CLC Carry flag is cleared. (CF=0) CLC refers to clear

 carry.

CMC Carry flag is complemented. ( CF = CF’) CMC refers to

complement carry.

STD Direction flag is set. (DF=1) STD refers to set the

direction flag.

CLD Direction flag is cleared. (DF=0) CLD refers to clear

direction flag.

STI Interrupt enable flag is set. (IF=1) STI refers to Set the
interrupt enable flag.

CLI Interrupt enable flag is cleared. (IF=0) CLI refers to clear the
interrupt enable flag.

WAIT This instruction checks if the TEST pin of 8086 is This instruction does
high or low. If the pin is high, then 8086 enters not affect any flags.
into an idle state where no execution takes place. During the idle state, if
a valid interrupt is
If the TEST pin is made low or a higher interrupt is encountered, the
encountered, then 8086 comes out of this idle interrupt is serviced
state. and 8086 goes back to
the idle state. This
instruction when used
before the ESC
instruction; makes
8086 do other
processes while a
coprocessor (like 8087)
is executing an
instruction.

ESC memory_address The contents of the memory_address are placed ESC refers to escape to
on the data bus when the READY pin is made high external processor. This
by the external processor. By doing so, 8086 instruction acts as a
triggers the external processors. trigger to operate the
external processors.

ASSEMBLER DIRECTIVES

As we all know, an assembler converts the assembly language program into the machine language
program. For assembling the program to machine language, the assembler needs certain commands;
maybe to indicate the storage space required for a particular variable so that it creates the required
space or the name of the segments (CODE, DATA, EXTRA and STACK), etc. Such commands are called
directives. These directives are predefined and help the assembler to correctly convert the assemble
language into machine language.

1) To determine the origin : ORG

ORG 20H If ORG is inside code segment, then the first instruction is
stored at an offset 20H in the code segment. If ORG is inside
data segment, then data storage starts at an offset 20H in
the data segment. If no ORG is mentioned, then everything
begins at 00H.

2) To define the size of a variable: DB (define byte) ; DW( define word) ; DD (define double word);
DQ (define quad word) and DT (define ten bytes) .

SRIRAM DB 50H One byte is reserved for variable SRIRAM. Value of 50H is
assigned to SRIRAM.

DELHI DW 1000H One word is reserved for variable DELHI. 1000H is initialized
to DELHI.

SRIRAM DB 02H, 04H, 06H Three bytes reserved for variable SRIRAM. Values of 02H,
04H and 06H assigned to SRIRAM.

HOME DB “BEDROOM” ASCII value of the characters in “BEDROOM” stored in array

HOME.

Similarly, variables for DD, DD, DQ and DT can be defined.

3) To define an array of bytes, words, etc. : DUP (Duplicate)

CHENNAI DB 100 DUP (10H) 100 bytes reserved for array CHENNAI, each element
initialized to 10H.

TRAIN DW 50 DUP (?) 50 words reserved for array TRAIN, each element having no
value initialized.

4) To assign a name to constants : EQU (Equivalent)

CAR EQU 64H Assigns 64H to CAR. So if we use the instruction:

MOV AH, CAR; 64H will be moved to AH.

5) To specify the type of a memory operand: PTR (pointer)

 DEC BYTE PTR [SI] Decrement the byte content of the memory location
pointed by SI.
Only BYTE or WORD can be used as prefix before PTR.

6) To differentiate between segments: ASSUME (Assume)

ASSUME CS: PROGRAM, DS: DATA, SS: STACK This makes the assembler understand that
PROGRAM is CS which contains instructions;
DATA is DS which contains the data and STACK is
SS which contains the stack.

7) To define a new segment: SEGMENT and ENDS

BOOK SEGMENT Book is the name of the segment. The assembler

PAGE DB FFH assigns a value to BOOK corresponding to base
MARK DW 1500H value of data segment. This segment must be
PRINT DB 10H loaded into DS by using:
ENDS MOV BX, BOOK
MOV DS, BX

The above instruction set covers all instructions required to become a confident programmer in
8086. Along with the instruction set, simultaneously go through the sample programs for clearer
understanding.