HOW A SERIAL PORT WORKS

INTRODUCTION

A s the distance between the computer and a peripheral reaches a certain point (10 feet), it
becomes less practical to send data as parallel words. An alternative method of sending
data is to break the parallel words into their individual bits and transmit them, one at a time, in
a serial bit stream over a single conductor.

In this manner, the number of conductors connecting the computer and the peripheral is re-
duced from eight or more data lines and from any number of control lines, to one (or two)
communications lines, a ground line, and maybe a few control lines. Therefore, the cost of
connecting equipment is reduced by using serial communication techniques when a periph-
eral device must be located at some distance from the computer.

SERIAL PORTS
The simplest method of converting a parallel computer word into a serial bit stream is de-
picted in Figure 1 using a parallel-in, serial-out (PISO) shift register. In this arrangement, a
parallel word is loaded into the register with a single clock pulse. After the word has been
loaded into the register, the logic level on its mode control pin is reversed and the bits are
shifted out of the register’s serial output by eight consecutive clock pulses.

Figure 1:
PISO Register

HOW A SERIAL PORT WORKS 1

 Conversely, serial data sent from a remote computer or a peripheral must be converted back
into parallel form to be compatible with the computer’s internal bus structure. The simplest
method of implementing this operation is shown in Figure 2, using a serial-in, parallel-out
(SIPO) shift register to shift the serial bit stream into the register with eight clock pulses.

Figure 2:
Discrete SIPO
Register

Serial Transmission Modes

The biggest problem encountered when sending data serially is keeping the transmitted
data-bit timing synchronized between the two devices.

Two methods are used to provide the proper timing for serial transfers: the data bits
may be sent synchronously (in conjunction with a synchronizing clock pulse) or
asynchronously (without an accompanying clock pulse).

When data is transmitted synchronously, the bits of a word, or character, are synchronized by
a common clock signal, which is applied to both the transmitting and receiving shift regis-
ters. The two registers are initialized before data transmission begins, when the transmitting
circuitry sends a predefined bit pattern that the receiver recognizes as the initialization com-
mand. After this, the receiving circuitry processes the incoming bit stream by counting clock
pulses and dividing the bit stream into words of a predetermined length. If the receiver
misses a bit for any reason, all the words that follow will be processed erroneously. Figure 3
depicts a simplified synchronous transmission scheme.

HOW A SERIAL PORT WORKS 2

 Figure 3:
Synchronous
Transmission
When data is transferred asynchronously, the receiving system is not synchronized with the
sending system. In asynchronous communications, the transmission is dependent on the ca-
pability of two separate clocks, running at the same frequency, to remain synchronized for a
short period of time. The transmitted material is sent character-by-character (usually AS-
CII), with the beginning and end of each character framed by character start and stop bits.
Between these marks, the bits of the character are sent at a constant rate, but the time interval
between characters may be irregular. Figure 4 depicts a typical format for transmitting an 8-
bit ASCII character asynchronously.

Figure 4:
Asynchronous
Character
Format
When no bits are being transmitted, the data line is held in a high logic state, also referred to
as a mark. At the beginning of a character, the transmitter sends a start bit, which is always a
low logic pulse (space). After the start bit, the data bits are transmitted, beginning with the
least significant bit. A number of bits may be transmitted after the data bits. In this case, a
parity bit has been added for error-detection and correction purposes, and one stop bit has
been added to identify the end of the character.

Although this format is fairly common, on different systems the number of data bits range
between five and nine. There may be one, one-and-a-half, or two stop bits included. The use
of an error-checking bit is optional.

Over a given period of time, synchronous communications are much faster than asynchro-
nous methods. This is due to the extra number of bits required to send each character asyn-
chronously. PC serial ports and analog modems use asynchronous communications
methods, and digital modems and local area network adapters use synchronous methods.

HOW A SERIAL PORT WORKS 3

 Serial Interface ICs
Computer systems do not normally rely on the discrete PISO and SIPO shift registers de-
scribed in the previous sections. As with the single-chip parallel ports, IC manufacturers
have developed a number of single-chip devices that perform all the functions necessary for
serial transfers to occur. These serial port ICs are referred to as Asynchronous Communi-
cation Interface Adapters (ACIAs), or as Universal Asynchronous Receiver/Transmit-
ters (UARTs ). Synchr onous devi ces ar e us ual l y cal l ed U n i v e r sa l
Synchronous/Asynchronous Receiver/Transmitters (USARTs). Not only do these de-
vices provide the parallel-to-serial and serial-to-parallel conversions required for serial com-
munications, they also handle both the parallel interface required with the computer’s bus
and all the control functions associated with the transmission.

UARTs
A functional block diagram of a UART is illustrated in Figure 5. A UART consists of two
major sections: the transmit section and the receive section. The transmit section is primarily
made up of two registers: the Transmit Output Shift Register and a Transmit Holding
Register. The transmit holding register holds the next data word to be transmitted until the
shift register has completed the serialization of the previous data word.

Figure 5:
Blocks of a
UART

HOW A SERIAL PORT WORKS 4

The UART’s receiver section is basically the reverse of the transmit section. Serial data is
shifted into the Serial Receive Shift Register until the predetermined number of bits has
been accumulated. At this point, the bits are loaded (in parallel form) into the Receive Hold-
ing Register. Both the transmit and receive functions are under the direction of the UART’s
control section. Many of the device’s parameters, such as the number of start and stop bits
and the type of parity (if any) to be used during transmission, may be programmed by the user
through the control section.

In pre-Pentium units, the system’s multi I/O card provided a pair of fully programmable,
asynchronous communication channels through two serial port connections. On earlier I/O
cards, a pair of 8250 UARTs were used as the basic port circuitry. In newer MI/O cards, a
single VLSI device, called an integrated I/O controller, provides the interfacing and UART
functions. In most Pentium systems, the serial port adapter function is incorporated into the
system board’s integrated I/O controller IC.

The original serial adapters featured programmable baud rates from 50 baud to 9,600 baud, a
fully programmable interrupt system, and variable character lengths (5-, 6-, 7-, or 8-bit char-
acters). In addition, the adapter added and removed start, stop, and parity bits, had false
start-bit detection, had line-break detection and generation, and possessed built-in diagnos-
tics capabilities. As modems became faster, upgraded UARTs were included, or integrated,
to keep up.

Notable advanced UART versions include the 16450 and 16550. The 16450 was the 16-bit
improvement of the 8250, and the 16550 was a high-performance UART with an on-board
16-byte buffer. The buffer enables the UART to store or transmit a string of data without in-
terrupting the system’s microprocessor to handle them. This provides the 16550 with an im-
pressive speed advantage over previous UARTs. These advanced UARTs enable serial ports
to reach data transmission rates of up to 115 kbps. Though some features have changed be-
tween these UARTs, and though they are sometimes integrated directly into an I/O chip, the
units must still adhere to the basic 8250 structure to remain PC-compatible.

USARTs
As their name implies, USARTs have the capability to perform asynchronous communica-
tions just as the UART does, but when higher-performance data transfers are required, the
USART is used in synchronous mode. A few words of clarification about why synchronous
transmission would offer higher performance (speed) than asynchronous transmission may
be in order at this point. Recall that for asynchronous communications, a start bit is required
to mark the beginning of each character, and at least one stop bit is required to identify the
end of the character. This means that at least 10 bits (and therefore 10 bit times) are required
to send an 8-bit data character.

On the other hand, synchronous transmissions require no non-data bits after the transmitter
and receiver have been initialized. Therefore, 8-bits of data are transmitted in 8-bit times.
The only drawback is that any break in the data stream causes the transmitter and receiver to
become de-synchronized. To minimize this problem, the USART incorporates extra internal
circuitry to generate “dummy” or “null” characters for transmission. This keeps the data
flow rate in sync when no actual data is being sent. In addition, the USART also incorporates
a set of first-in, first-out (FIFO) registers. These registers can be filled in advance (this is
called queuing) so that a constant flow of data—and therefore, constant synchroniza-
tion—can be maintained between the transmitter and receiver.

HOW A SERIAL PORT WORKS 5

 Serial Interface Connections
Because of the popularity of asynchronous serial data transmissions and the number of de-
vices that use them (including printers and modems), standardized bit-serial signals and con-
nection schemes have been developed to simplify the process of connecting serial devices to
computers. The most popular of these serial interface standards is the Electronic Industry
Association (EIA) RS-232C interface standard.

The RS-232C Standard

Basically, the IBM version of the RS-232C standard calls for a 25-pin, male D-
type connector, as depicted in Figure 6. This standard also designates certain
pins for data transmission and receiving, along with a number of control lines.
These pin designations are expressed in Table 1. The standard was developed to
cover a wide variety of peripheral devices, so not all the lines are used in any
given application. Different device manufacturers may use different combina-
tions of RS-232C lines, even between peripherals of the same type.
Figure 6:
RS-232C Connector

Table 1: PIN COMMON RS-232C

DESCRIPTION
RS-232C Signal NUMBER NAME NAME
Lines 1 AA Protective ground
2 TxD BA Transmitted data
3 RxD BB Received data
4 RTS CA Request to send
5 CTS CB Clear to send

6 DSR CC Data set ready

7 GND AB Signal ground (common return)
8 CD CF Received line signal detector (RLSD)
9 Reserved for data set testing
10 Reserved for data set testing

Unassigned
11 Secondary received line signal detector
12 SI SCF Secondary clear to send
13 SCB
Secondary transmitted data
14 SBA
Transmission signal element timing (DCE
15 DB
source)

16 SBB Secondary received data

17 DD Received signal element timing (DCE source)
18 Unassigned
19 SCA Secondary request to send
20 DTR CD Data terminal ready

21 CG Signal quality detector

22 RI CE Ring indicator
23 CH/CI Data signal rate selector (DTE/DCE source)
24 DA Transmit signal element timing (DTE source)
25 Unassigned

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In addition to defining the type of connector to be used and the use of its individual pins, the
RS-232 standard also establishes acceptable voltage levels for the signals on the pins. A
logic “1” is represented by a voltage between –3 and –20 volts dc. Conversely, a logic “0” is
signified by a voltage between +3 and +20 volts dc. These levels are generally converted to
and from TTL-compatible signals by CMOS driver and receiver chips. Under these condi-
tions, a maximum baud rate of 20,000 baud can be achieved for distances less than 50 feet.

Advanced Serial Standards

Since the adoption of the RS-232C standard, the EIA has also adopted two more improved
serial standards: the RS-422 and RS-423, which are enhancements of the RS-232C standard.
The RS-422 uses twisted-pair transmission lines and differential line signals to provide a
high degree of noise immunity for transmitted data. The RS-423 standard uses coaxial cable
to provide extended transmission distances and higher data-transfer rates.

With the advent of the mouse as a common input device, a 9-pin, male D-shell version of the
RS-232 serial port became common. This version is commonly used as the COM1 serial port
for the mouse in Windows-based systems. Figure 7 depicts the 9-pin version of the interface
being used to connect a serial printer through a common connection scheme referred to as a
“null modem.”

Figure 7:
RS-232C 9-Pin
Serial Printer
Connection

The exchanging of pins 2 and 3 between the two devices forms the basis of the null modem.
Because the device in Figure 7 is a serial printer, pins 5 and 6 of the DTE equipment are tied
to the DTR pin of the DCE equipment. In a true null modem, pins 4 and 5 of the interface
would need to be cross-connected to facilitate two-way communications.

The character bit stream is transmitted to the printer on the line designated as the Transmit
Data line (TXD) at the computer connector and the Receive Data line (RXD) at the printer
connector. A reciprocal line (TXD at the printer connector and RXD at the computer connec-
tor) is also used in the printer interface. Because data does not flow from the printer to the
computer, this line basically informs the computer that a printer is connected to the interface,
is turned on, and is ready to receive data (much like the Select line in the Centronics interface
standard).

HOW A SERIAL PORT WORKS 7

 The flow of data to the printer is moderated by a line referred to as the Data Set Ready
(DSR) line at the computer connector, and the Data Terminal Ready (DTR) line at the
printer connector. The printer uses this line in much the same manner as the Busy line of the
Centronics interface. When the buffer is full, the printer signals on this line to tell the com-
puter not send any more data. More complex serial interfacing may include a line called
Clear To Send (CTS) at the computer connector and the Ready To Send (RTS) line at the
printer connector, and their reciprocal lines, where the identifications are reversed.

At the printer’s end of the cable, another UART receives the serial bit stream, removes the
start and stop bits, checks the parity bit for transmission errors, and reassembles the charac-
ter data into parallel form.

Because the movement of data is asynchronous using the UART, an agreement must be es-
tablished between the computer’s UART and the printer’s UART, concerning the speed at
which characters will be sent. The transmission rate, or baud rate, of the computer’s UART
is generally set by software. On the other hand, the printer’s baud rate is usually designated
by a set of DIP switches in the printer. Common baud rates used with serial printers are 300,
1,200, 2,400, and 9,600 bits per second (bps). One of the most common problems associ-
ated with getting a serial interface to work is mismatched baud rate.

Character Framing
In the Centronics type parallel port, the data is specifically sent in individual 8-bit packages.
However, in serial communications there is more flexibility in how the data is transmitted.
Typical RS-232 transmission formats enable 7- or 8-bit characters to be sent as a package in-
side a character frame. Each frame also contains various numbers of non-data bits for
marking the starting and stopping points of the frame. An additional bit is often added to the
frame for error-checking purposes. The composition of the character frame must be the same
at both the sending and receiving ends of the transmission. It shouldn’t be too difficult to un-
derstand what problems would arise if a device is set to receive a 7-bit character with two
start bits, one stop bit, and an error-checking bit, but receives an 8-bit character with two start
bits, two stop bits, and no error-checking bit.

Using the serial printer as an example, it should be easy to envision simple communications
taking place. However, most serial port applications involve two-way communications. In
these types of applications, control of the communication port becomes more complicated.
In addition to matching baud rates and character framing between the two devices, a mecha-
nism for controlling the flow of information between the two ports must be established. This
method of controlling the flow of information between the two devices is called a protocol
and must be agreed to by both devices for the transfer to be successful. Both hardware and
software flow-control protocols have been devised for use with serial ports.

HOW A SERIAL PORT WORKS 8

DOS Serial Port Names

As with parallel ports, DOS assigns COM port designations to the system’s serial
ports during bootup. COM port designations are normally COM1 and COM2 in
most system, but they can be extended to COM3 and COM4 in advanced systems.

Either RS-232 port may be designated as COM1, COM2, COM3, or COM4, as long as both
ports are not assigned to the same COM port number. In most PCs, COM1 is assigned as port
address hex 3F8h and uses IRQ channel 4. The COM2 port is typically assigned port address
hex 2F8h and IRQ3. Likewise, COM3 uses IRQ4 and is assigned an I/O address of 3E8h, and
COM4 usually resides at 2E8 and uses IRQ3.

HOW A SERIAL PORT WORKS 9