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Abstract—This paper aims to present a new multilevel voltage of the devices throughout transient and steady-state
inverter with reduced number of power electronic condition.
switches. To answer the above-mentioned problems successfully, a
For the high power demand highly developed power number of circuit topologies of multilevel inverter and
electronics converters are necessary. So that multilevel converter have been established [3],[4] such as,
power converters has been launched as an substitute in diode-clamped (or neutral-clamped),
high power and medium voltage situations. Multilevel flying capacitors (or capacitor-clamped),
inverter not only gets high power rating but also advance Cascaded H-bridge cells with separate DC sources.
performance of whole system in terms of harmonics and The output voltage of the multilevel inverter consists of many
dv/dt stress. levels produced by using several DC voltage sources.
Since as the output levels increases the requirement of Definitely, the quality of the produced voltage is improved as
power switches and sources is increases. The paper the number of voltage levels increases, so the quantity of
presents a new multilevel inverter which requires less output filters can be reduces [5].
power switches. So that the setting up space and cost of Theoretically, it is possible to produce an infinite output
inverter is decreases. These features are obtaining by voltage level. By increasing the number of levels in the
comparing proposed multilevel inverter with conventional inverter, the output voltage levels have more steps generating
cascade multilevel inverter. The performance of the a staircase waveform, which results a reduced harmonic
developed multilevel inverter is confirmed with computer distortion. On the other hand, a large number of levels
simulations using MATLAB software and laboratory increase the number of switches required, gate-amp, diodes,
prototype implementation. and other components. Because of this control system become
Keywords—sub-multilevel unit; cascade multilevel more complex and brings in a voltage imbalance problems.
inverter; fundamental control system; H-bridge. Therefore, these multilevel inverter systems are not
appropriate for raising the output voltage levels because of
I. INTRODUCTION their large number of switches. To boost the number of the
Now a day’s multilevel concept looks to be an alternative, output voltage levels so as to obtain high quality output
economical and efficient solution for medium and high power voltage waveform by means of multilevel inverter systems, the
application. In-fact, for a standard voltage grid, it is difficult to above problems should be solved in advance [6], [7], [8]
connect only one power semiconductor toggle directly [1]. So Two topologies for dc to ac conversion are presented in this
that, a multilevel power converter arrangement has been paper.
recognized as an option in high power and medium voltage
situation such as laminators, mills, conveyors, pumps, fans, A. cascade H-bridge multilevel inverter
blowers, compressors, and so on. As a cost efficient solution, Cascaded H-Bridge (CHB) topology as shown in fig.1. This is
multilevel converter not only achieve high power ratings, but become very well-liked in high-power AC supplies. A
also consent to the use of low power application in renewable cascade multilevel inverter contains a series of H-bridge
energy sources such as photovoltaic, wind, and fuel cells (single-phase full bridge) inverter units. Each of this H-bridge
which can be easily interconnect to a multilevel converter unit has its own dc source; this may be a battery unit, fuel cell
system for a high power application. or solar cell. Each separate D.C. source is associated with a
The series connection of switching power devices has big single-phase full-bridge inverter. The ac terminal voltages of
difficulty [2], such as, non identical distribution of applied unlike level inverters are linked in series. Throughout the
voltage across series-connected devices that outcomes the different arrangements of the four switches, S1-S4, each
applied voltage of separate devices much higher than blocking converter level can construct three unlike voltage outputs,
K.E. Society's
RAJARAMBAPU INSTITUTE OF TECHNOLOGY
Proceedings of
INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION AND ENERGY SYSTEMS
(ICCCES-16)
In Association with IET, UK & Sponsored by TEQIP-II
29th -30th, Jan. 2016
K.E. Society's
RAJARAMBAPU INSTITUTE OF TECHNOLOGY
Proceedings of
INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION AND ENERGY SYSTEMS
(ICCCES-16)
In Association with IET, UK & Sponsored by TEQIP-II
29th -30th, Jan. 2016
Where,
Table-II shows switching sequence of proposed inverter. As Vblock, j = blocked voltage by the jth basic unit
the proposed inverter only able to generate positive voltage V_block = blocked voltage by the additional dc
levels at the output it is essential to add an h-bridge. H-bridge voltage sources
consists of four switches T1-T4. This inverter is called the Vblock,H = blocked voltage by the used H-bridge
proposed cascade inverter. The load voltage will be positive
that is +Vo when switch T1 and T4 are on and it is negative TABLE III
that is –Vo when switch T2 and T3 on. Proposed Algorithm
Number of power switches and the number of dc voltage Magnitude of dc Nlevel Vo,max Vblock
sources are given by the following equations, voltage source
V1,j=V2,j=V3,j=Vdc 6n+3 (3n+1)Vdc (21n+6)Vdc
For j=1,2,…,n
K.E. Society's
RAJARAMBAPU INSTITUTE OF TECHNOLOGY
Proceedings of
INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION AND ENERGY SYSTEMS
(ICCCES-16)
In Association with IET, UK & Sponsored by TEQIP-II
29th -30th, Jan. 2016
(a)
(b)
Fig 3 proposed topology (a) n level cascade multilevel inverter (b) 15 level multilevel inverter
TABLE II
GENERATED 15 LEVEL OUTPUT VOLTAGE BASED ON THE ON AND OFF STATE OF POWER SWITCHES
K.E. Society's
RAJARAMBAPU INSTITUTE OF TECHNOLOGY
Proceedings of
INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION AND ENERGY SYSTEMS
(ICCCES-16)
In Association with IET, UK & Sponsored by TEQIP-II
29th -30th, Jan. 2016
-5
inverter, the planned topology uses 16 IGBTs whereas
-10
the symmetric CHB multilevel inverter use 28 IGBTs.
-15
-20
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Time
20
15
10
5
Amplitude
-5
-10
-15
-20
0 0.05 0.1 0.15 0.2 0.25
Time
0.3 0.35 0.4 0.45 0.5
Fig 6 Variation of Nswitch versus Nlevel
Fig. 4 15 level output voltage wave and load current
K.E. Society's
RAJARAMBAPU INSTITUTE OF TECHNOLOGY
Proceedings of
INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION AND ENERGY SYSTEMS
(ICCCES-16)
In Association with IET, UK & Sponsored by TEQIP-II
29th -30th, Jan. 2016
K.E. Society's
RAJARAMBAPU INSTITUTE OF TECHNOLOGY