CSE205 - Computer Architecture and

Organization (CAO)

MACHINE INSTRUCTIONS

Jimmy Mathew
Assistant Professor Senior,
School of Computing Science & Engineering (SCOPE),
VIT University, India
Email: jimmym@vit.ac.in / Office: SJT-313-A08
 Reference textbooks
• [1] W. Stallings, “Computer organization and architecture”, Prentice-Hall, 8th
edition, 2009.

• [2] M. M. Mano, “Computer System Architecture”, Prentice-Hall, 3rd Edition,

1992.

• [3] J. P. Hayes, “Computer system architecture”, McGraw Hill, 3rd Edition,

2002.

• [4] John L. Hennessy and David A. Patterson, “Quantitative Approach –

Computer Architecture”, Morgan Kaufmann Publishers, 5th edition, 2011.

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 INSTRUCTION SET

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 Instruction Set

What must an instruction set

specify…?

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 Instruction Set

Which Operation to perform

Where to find the operand or operands

Where to put the result, if there is result

Where to find the next instruction

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 INSTRUCTION FORMATS

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 Instruction Formats
Instruction Representations
Each instruction is represented by sequence of bits
The instruction is divided into two fields
Opcode field
Operand field
This operand field further divided into one to four fields.
This layout of the instruction is known as the “Instruction Format”
Simple instruction format
Operand Operand Result Next
Opcode
Address1 Address2 Address1 Instruction

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 Instruction Formats

Instruction Set is categorized into types based on

• Operation performed
• Number of operand addresses
• Addressing modes

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 Instruction Formats
Based on Operation
Data Movement

Memory I\O Instructions

LOAD, STORE, MOV IN, OUT

Data Processing

Arithmetic Logic Instructions

Add, Sub, MUL AND, OR,

Control Instructions

Conditional Un Conditional
JNZ, JZ…. Jump

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 Instruction Formats
Instruction Set categorized into four categories based
on number of operand address in the instruction.

• 4 Address Instruction
• 3 Address Instruction
• 2 Address Instruction
• 1 Address Instruction
• 0 Address Instruction

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 Instruction Formats
For a two-operand arithmetic instruction, five items need to be
specified
Operation to be performed (opcode)
Location of the first operand
Location of the second operand
Place to store the result
Location of next instruction to be executed

Assumptions
24-bit memory address (3 bytes)
128 instructions (7 bits rounded to 1 byte)

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 Memory

24 Bits / 3 Bytes
4- Address
8
Instruction
24 24 24 24

CPU Op Code ResAddr Op1Addr Op2Addr NextiAddr

Op1 Example: add M1,M2,M3, nexti

M(1)M(2)+M(3)
Op2 + Memory Required to store an Instruction:
Resop 5 x 3 bytes = 15 Bytes

Memory Required to Encode an Instruction:

1Byte+ 4 x 3 bytes = 13 Bytes

Calculation of Memory Accesses

To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1
Op2Addr=1 Op2=1
ResAddr=1 Res=1
NextiAddr=1 Total=3
Total=5

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 5 + 3 =8

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 Memory

24 Bits / 3 Bytes
3- Address
8
Instruction
24 24 24

CPU Op Code ResAddr Op1Addr Op2Addr

Op1 Example: add M1,M2,M3

M(1)M(2)+M(3)
Op2 + Memory Required to store an Instruction:
Resop 4 x 3 bytes = 12 Bytes

Memory Required to Encode an Instruction:

1Byte+ 3 x 3 bytes = 10 Bytes
PC 24
Calculation of Memory Accesses
To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1
Op2Addr=1 Op2=1
ResAddr=1 Res=1

Total=4 Total=3

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 4+ 3 =7

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 Memory

24 Bits / 3 Bytes
2- Address
8
Instruction
24 24 24

CPU Op Code Op1Addr Op2Addr

Example: add M2,M3
Op1
M(2)M(2)+M(3)
Op2 + Memory Required to store an Instruction:
Resop 3 x 3 bytes = 09 Bytes

Memory Required to Encode an Instruction:

1Byte+ 2 x 3 bytes = 7 Bytes
PC 24
Calculation of Memory Accesses
To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1
Op2Addr=1 Op2=1
Res=1
Total=3
Total=3

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 3+ 3 =6

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 Memory

24 Bits / 3 Bytes
1- Address
8
Instruction
24 24

CPU Op Code Op1Addr

Op1 Example: add M2

Op2 + Memory Required to store an Instruction:
Resop 2 x 3 bytes = 06 Bytes
Acc
Memory Required to Encode an Instruction:
1Byte+ 1 x 3 bytes = 4Bytes
PC 24
Calculation of Memory Accesses
To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1

Total=2 Total=1

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 2+ 1 =3

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 0-Address Instruction

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 Instruction Formats

Zero address
Number of memory access required:
For push and pop:
to fetch an instruction: 2
to fetch an operand value: 1
Total 3
For operations: 1 (to fetch an instruction)

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 Instruction Formats
Comparisons
Instruction Memory Memory M/As to M/As to Memory
Type To Store To Encode fetch an Execute an Traffic
in Bytes in Bytes Instruction Instruction

4-address 5 x 3 = 15 1+(4 x 3) = 13 5 3 5+3=8

3-Address 4 x 3 = 12 1+(3 x 3) = 10 4 3 4+3=7

2-Address 3 x 3 = 09 1+(2 x 3) = 07 3 3 3+3=6

1-Address 2 x 3 = 06 1+(1 x 3) = 04 2 1 2+1=3

0-Address 1 x 3 = 03 1+(0 x 3) = 01 1 0 1+0=1

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Instruction Formats

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 ADDRESSING MODES

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 Addressing Modes
• Immediate mode

• Direct mode

• Indirect mode

• Register mode

• Register indirect mode

• Displacement mode

• Relative mode
• Indexed mode
• Base mode

• Stack mode

• Implied mode
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 Immediate Addressing Mode
 The simplest form of addressing is immediate addressing

 data is a part of instruction itself.

 Example:- MOVE #100H, R1
Here the data 100h is moved to R1.
 MVI A, 01
– MVI stands for Move Immediate. This basically implies move 01 to A.

Opcode Operand

 Advantage:
•This mode can be used to define and use constants
•or set of initials values of variables.
•No memory references

Advantage:
•Limited Operand size

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 Direct/Absolute Addressing Mode Main Memory

 The address where data is available is part of the instruction

 The address field contains th effective address of the operand.

 Example:- MOVE 30A4, R1
•The memory location 30A4 is accessed
•The data from this location is copied onto Register R1.

Opcode EA

 Advantage: Operand
• Large operand Magnitude

 Disadvantage:
•Limited Address Size
The change in the location of the program is associated with
the change in all absolute memory references.

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Indirect Addressing Mode
Diagram

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 Indirect Addressing mode Cont”
The address field of the instruction gives the address of
the effective address of the operand stored in the
memory.
EA = (A)
Ex: Mov CX, [4200H]
Advantage: Large address space, may be nested,
multilevel or cascaded
Disadvantage: Multiple memory accesses to find the
operand, hence slower

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Register Addressing Diagram

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 Cont’
Operand is in the register specified in the address part of
the instruction
EA = R
Ex: Mov AX, BX
Special case of direct addressing

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CAO Chapter 1.3 JMW VIT-U 28
 Cont’
Address part of the instruction specifies the register
which gives the address of the operand in memory
Special case of indirect addressing
EA = (R)
Ex: Mov BX, [DX]
Advantage: Large address space
Disadvantage: Extra memory reference

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 Displacement Addressing Mode
EA = A + (R)
Address field holds two values
A = Base value
R = register that holds displacement
Or vice-versa

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 Relative addressing mode

It is often used in branch (conditional and unconditional)

instructions, locality of reference and cache usage
Advantage: Flexibility
Disadvantage: Complexity

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 Base register Addressing mode
Used to facilitate the relocation of programs in memory.
EA = A + (BX)
Advantage: Flexibility
Disadvantage: Complexity

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 Indexed Addressing mode
Used in performing iterative operations
EA = A + (SI)

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 Implied Addressing Mode
Operand is implied / implicit
Ex:
• Complementing Accumulator
Set or Clearing the flag bits (CLC, STC etc.)
0 – address instructions in a stack organized computer
are implied mode instructions.
Effective Address (EA) = AC or Stack[SP]

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 Auto Increment and Auto
Decrement Addressing Modes
This addressing mode is used when the address stored in
the register refers to a table of data in memory, it is
necessary to increment or decrement the register after
every access to the table

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Addressing Modes

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Addressing Modes

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 Problems
Find the effective address and the content of AC for the given data.

V.Saritha, SCSE, VIT University

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Addressing Mode Effective Content of AC
Address

500 AC ← (500) 800 LOAD AC, [500]

Direct Address
Immediate operand 201 AC ← 500 500 LOAD AC, 500

Indirect address 800 AC ← ((500)) 300 LOAD AC, label1

702 AC ← (PC + 500) 325 JUMP label1

Relative address
600 AC ← (XR + 500) 900 MOV AC, XR[500]
Indexed address
- AC ← R1 400 MOV AC, R1
Register
400 AC ← (R1) 700 MOV AC, [R1]
Register Indirect
400 AC ← (R1)+ 700 MOV AC, [R1+]
Autoincrement
399 AC ← -(R1) 450 MOV AC, [-R1]
Autodecrement

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 TYPES OF OPERANDS

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 Types of Operands
• Address

• Numbers

– Binary, octal, decimal, hexadecimal, BCD

– Fixed point, floating point

– Signed, unsigned

• Characters

– ASCII – American Standard Code for Information Interchange

– EBCDIC – Extended Binary Coded Decimal Interchange Code

• Logical Data

– Boolean
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Types of Operands

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Types of Operands

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 TYPES OF OPERATIONS

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 Types of Operations
• Data transfer

• Arithmetic

• Logical

• Conversion

• I/O

• System control

• Transfer of control

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Types of Operations

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Types of Operations

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Types of Operations

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 Additional Reference
Reference Book
Vincent .P. Heuring, Harry F. Jordan “
Computer System design and Architecture”
Pearson, 2nd Edition, 2003

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