Topstar C46 VerA PDF

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Topstar Digital technologies Co.,LTD
D D
Board name: MotherBoard Schematic 02. System block & Index
Project name: C46 03. PWR Block & Description
Version: VerA 04. Notes & Annotations
Initial Date: MAY.9, 2008 05. Schematic Modify and History
59. CLOCK Distribution
60. Power on & off Sequence
60. Power On Sequence & Reset Map
61. ACPI Mode Switch Timings
Topstar Confidential
C C
Hardware drawing by: Hardware check by: EMI Check by:
Power drawing by: Power check by:
Manager Sign by:
B B
A A
TOPSTAR TECHNOLOGY
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Page Name Title
Size Project Name Rev
C C46
A
Date: Friday, November 27, 2009 Sheet 1 of 59
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
Topstar Confidential
ShenZhen Topstar Industry Co.,LTD
D D
C46 SYSTEM BLOCK Ver:A
Backlight
Connector
+VDC
CK505M
TFT
Only for PM Clocking
LVDS switch SLG8SP585

+V3.3S
+V3.3S
64M*16Bit*4 GDDRIII
+V1.5GDDR
Memory DDR3 SODIMM0

interface DDR3 800/1066 800/1066
Arrandule/clarsfield +V0.75S,+V1.5,+V3.3S
VGA LVDS Nvidia 989rPGA
NB11 DDR3 SODIMM1
R/G/B PEGX16 /eDP
+V5S +VGA_CORE,
+V1.05GPU +VCC_CORE,+VccGFX DDR3 800/1066 800/1066
+V1.8GDDR, +V1.5S, +V1.8S,
TMDS +V3.3GPU +V0.75S,+V1.5,+V3.3S
+V1.5GPU +V1.1S_VTT
C C
HDMI
LVDS DMI*4 100MHz +V0.75S,+V1.5,+V3.3S
FDI
RJ45
RTL8102E
PCIE 1X +V3.3S,+V3.3AL
BIOS SPI RJ45
8Mbit
+V3.3AL Ibex_peak
PCI-Express X16 1071 BGA
SATA ODD
+V3.3A,+V3.3S,+V1.5S, +V5S
+V1.05S,+V1.8S,
PCIE mini Card PCIE mini Half-Card +V5A,+V5S
S-ATA
2.5" HDD SD/MMC/MS CARD
+V5S,+V3.3S
Card Reader
USB1.1/2.0 ITE 1337
PCIE 1X +V3.3S,+V3.3AL
LPC
AZALIA
USB1.1/2.0
BLUE
TOOTH(V1.2) Camera USB PORT1 KB Controller/EC
1.3M/2.0M +V5AL
B BTM-203/CCOM ENE 3926 B
MODULE +V3.3AL,+V3.3S,+V5AL L
NEW CARD(Type II) +V3.3AL +V3.3S
R
TCM MiC
AZALIA
ALC662
+V5S,+V3.3S
LED/TouchPAD/Button/
Q-key/LID
DAUGHTER BOARD DAUGHTER BOARD
KB Matrix
A A
TOPSTAR TECHNOLOGY
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Page Name Sys block
C C46
A
5 4 3 2 1
5 4 3 2 1
C46 POWER BLOCK Ver:A

Platform
Logic
VCC_SENCE
VR_ON
VSS_SENCE
D D
IMON
VR_TT#
VIN
Vcc_core
V_5 IMVP-6.5 VID[6...0]
PSI#
V_3
DPRSLPVR
CLK_ENABLE#
IMVP6_PWRGD
PSI# PROCHOT#
PCH CPU_PWRGD CPU-M
C C
CLK
CHIP
注意:
虚线表示电源电压信号。
Charge Battery
ISL6251 51A
+VCC_CORE
VCC_CORE
Adapter Power +VDC ISL62882
65/90W Switch 5A
B B
+V1.8S MOSFET
+V1.8GPU
KIA1117
Always_On
DDR Power
Power
TPS51218
TPS51125
ISL62872 ISL62881 TPS51218 TPS51218 +APL5331 +V5S
+V3.3S
+V3.3AL +V1.5
+V1.05S +V1.1S_VTT +V0.75S
8A 18A +V5AL
5A/5A 12A/2.5A MOSFET
MOSFET MOSFET MOSFET
+VGA_CORE +VGFX +V1.5S
10A 14A +V1.5GPU 3A
+V1.05GPU +V3.3GPU
3A
2.5A <0.5A
A System Power A
+V_S
TOPSTAR TECHNOLOG
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Page Name PWR Block
C C46 A
5 4 3 2 1
5 4 3 2 1
Voltage Rails
+VDC Primary DC system power supply(9V-19V)
I2C SMB Address
+VCC_CORE Core voltage for processor
D Device Address Hex Bus Master D
+V1.1S_VTT 1.1V for CPU

Clock Generator 1101 001x D2 SMB_PCH PCH
SO-DIMM0 1010 000x A0 SMB_PCH PCH
+V1.05S 1.05V for PCH core
SO-DIMM1 1010 010x A4 SMB_PCH PCH
+V0.75S 0.75V DDR3 Termination voltage
NEW CARD Variable Variable SMB_PCH PCH
+V1.5 1.5V power rail for DDR3
PCIE Mini CARD Variable Variable SMB_PCH PCH
+V3.3AL 3.3V always on power rail
PCH Variable Variable SMB1_PCH ENE3926
+V3.3S 3.3V main power rail
+V5AL 5V for USB Device Smart Battery 0001 011x 16 I2C ENE3926
+V5S 5V main power rail
+VGA_CORE 0.8--1.03V for GPU NB8M core voltage
+V1.5S 1.5S for PCIE Device
+V1.8S 1.8V for display votage
+V3.3GPU 3.3V for external GPU

C C
Power States/AC mode
Board stack up description Signal SLP_S3# SLP_S4# SLP_S5# +V*AL +V* +V*S Clock
S0(Full On) HIGH HIGH HIGH ON ON ON ON

PCB Layers
S3(STM) LOW HIGH HIGH ON ON OFF OFF
TOP
S4(STD) LOW LOW HIGH ON OFF OFF OFF
GND
S5(SoftOff) LOW LOW LOW ON OFF OFF OFF
IN1
IN2 Trace Impedence:50ohm +/-15%(Default)
VCC
IN3
B GND B
Bottom
Wake up Events
USB Table
USB Port# Function Description LID switch from EC
Power switch from EC
0 Express Card
1 minicard1
2 reserved
3 camera
4 USB port1
5 Bluetooth
6 Reserved
A A
7 Reserved
8 CARD Reader TOPSTAR TECHNOLOG

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9 minicard2 Page Name Notes
10 USB port2 C C46 A
11 USB port3 PROPERTY NOTE: this document contains information confidential and property to
5 4 3 2 1
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VerA to VerB Changelist

1.外置VBIOS ROM 改成内置，srrap 上拉改为15K。
2. 27M clock的串联电阻0ohm改为33ohm。
3.PCH 端100M的CLK-REQ#下拉改为上拉。
D 4. PCH GPIO16 下拉改为上拉，follow CHECK LIST D
5.Switch IC的footprint改成符合实物的。
6. RGB的ESD 管子摆放方向改正。
7. HDMI接到EC的 detect 信号接法调整。
8. SYS_RST#预留0hm
9.SIM 卡/键盘/电池三个connecter换footprint。
10.GPU_RST#预留上拉。
11.HD connecter 和TP键的左右按钮物料更改。
12.BT connect 那边有改发ECN注意不要遗漏
VerB to VerC Changelist

1. N11M那边加上背光控制的与门解决开机屏就白着的问题。
C 2.蓝牙那边的那组USB线P/N反转过来，之前接反了。 C
3.EC那边IMVP_ON的1K电阻换0ohm。（电源那边已经分压了）。
VerC to VerD Changelist

1.N11M那边HDMI信号线连接有误。D2+/-与D1+/-调换。
2. 3.3AL/5AL电那边colay 220uf poscap的电容。
B B
TOPSTAR TECHNOLOG
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Page Name history
A Size Project Name Rev A
A C46 A
5 4 3 2 1
5 4 3 2 1
+V3.3S {8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57}
+V3.3AL {23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56}
+V3.3S FB102 1 100ohm@100MHz,3A +V3.3S_CK_VDD

FB0805
D D
C226 C223 C234 C220 C227
10UF/6.3V,X5R 0.1UF/25V,Y5V 0.1UF/25V,Y5V

0.1UF/25V,Y5V 0.1UF/25V,Y5V
C0805 C0402 C0402 C0402 C0402
Layout Note:
Cap Close to CK505 PWR pin
+V3.3S
SMBUS ADD:1101 001X

R247
10K U12
R0402
1 31 R275 0 R0402
VDD_DOT SMB_DATA SMB_DATA_S {15,16,23,40,41}
CPU_STOP# 5 32 R276 0 R0402
VDD_27 SMB_CLK SMB_CLK_S {15,16,23,40,41}
17 VDD_SRC
+V3.3S_CK_VDD 29 16 CPU_STOP#
VDD_REF CPU_STOP#
24 23 BCLK R264 0 R0402
VDD_CPU CPU0 CLK_BUF_BCLK_P {23}
18 22 BCLK# R261 0 R0402
VDD_CPU_IO CPU0# CLK_BUF_BCLK_N {23}
+VDDIO_CLK 15 VDD_SRC_IO Integrated resistors on differentail clk
G1 GND1 CPU1 20
G2 GND2 CPU1# 19
G3 GND3
No more than 500 mil G4 3 DOT96 R262 0 R0402
GND4 DOT96 CLK_BUF_DOT96_P {23}
C231 27pF/50V,NPO XTAL_IN 28 4 DOT96# R260 0 R0402
Y1 XTAL_IN DOT96# CLK_BUF_DOT96_N {23}
C0402
3 4 XTAL_OUT 27 10 R243 0 R0402
XTAL_OUT SRC0/SATA CLK_BUF_SATA_P {23}
C +V3.3S FB9 1 2 100ohm@100MHz,3A +VDDIO_CLK G5 11 R242 0 R0402 C
GND5 SRC0#/SATA CLK_BUF_SATA_N {23}
FB0805 C230 C216 C217 C229 C222 2 1 13 R241 0 R0402
SRC1 CLK_BUF_EXP_P {23}
14 R240 0 R0402
SRC1# CLK_BUF_EXP_N {23}
14.318MHz 2 VSS_DOT
10UF/6.3V,X5R 0.1UF/25V,Y5V 0.1UF/25V,Y5V 8 6
VSS_27 27M_NSS 27M_nonSSC {20}
10UF/6.3V,X5R 0.1UF/25V,Y5V C233 27pF/50V,NPO XS4_5032_0D8 9 7
C0805 C0805 C0402 C0402 C0402 C0402 VSS_SATA 27M_SS 27M_SSC {20}
12 VSS_SRC
21 30 BCLK_FS R278 33 R0402
VSS_CPU REF/FS CLK_BUF_REF14 {23}
26 25 CLK_PWRGD
VSS_REF CK_PWRGD/PWRDWN#
CK505QFN32
update Y1 footprint
+V3.3S
Frequence Select
High:100Mhz
Low:133Mhz(Default) R277 CLK_BUF_REF14 C232 10PF/50V,NPO C0402
10K ns
R0402
B B
ns
BCLK_FS
R306 ns 0
+V3.3S
+V3.3AL
R307 C236
10K 0.1UF/10V,X7R
5
R314 R0402
ns 10K 1 VCC
R0402 4 CLK_PWRGD
2
3
GND SOT23_5
PQ32 SN74AHC1G08DBV
3
2N7002 U15
R317 1K 1 SOT23
{55} CK505_CLK_EN#
R0402
C244
2
C249
C0402
ns C0402 0.1UF/25V,Y5V
0.1UF/25V,Y5V
A A
TOPSTAR TECHNOLOG
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Page Name CK505M
C M21 B
5 4 3 2 1
5 4 3 2 1
PEG_IRCOMP_R R560 49.9,1%

U2A R0402
PEG_ICOMPI B26
A26 R552 750 OHM
D DMI_TXN0 PEG_ICOMPO R0402 D
{24} DMI_TXN0 A24 DMI_RX#[0] PEG_RCOMPO B27
DMI_TXN1 C23 A25 EXP_RBIAS
{24} DMI_TXN1 DMI_RX#[1] PEG_RBIAS PEG_RXN[15:0] {17}
DMI_TXN2 B22
{24} DMI_TXN2 DMI_RX#[2]
DMI_TXN3 A21 K35 PEG_RXN0
{24} DMI_TXN3 DMI_RX#[3] PEG_RX#[0]
J34 PEG_RXN1
DMI_TXP0 PEG_RX#[1] PEG_RXN2
{24} DMI_TXP0 B24 DMI_RX[0] PEG_RX#[2] J33
DMI_TXP1 D23 G35 PEG_RXN3
{24} DMI_TXP1 DMI_RX[1] PEG_RX#[3]
DMI
DMI_TXP2 B23 G32 PEG_RXN4
DMI_TXP3 A22 F34 PEG_RXN5
F31 PEG_RXN6
DMI_RXN0 PEG_RX#[6] PEG_RXN7
{24} DMI_RXN0 D24 DMI_TX#[0] PEG_RX#[7] D35
DMI_RXN1 G24 E33 PEG_RXN8
{24} DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
DMI_RXN2 F23 C33 PEG_RXN9
DMI_RXN3 H23 D32 PEG_RXN10
B32 PEG_RXN11
DMI_RXP0 PEG_RX#[11] PEG_RXN12
{24} DMI_RXP0 D25 DMI_TX[0] PEG_RX#[12] C31
DMI_RXP1 F24 B28 PEG_RXN13
{24} DMI_RXP1 DMI_TX[1] PEG_RX#[13]
DMI_RXP2 E23 B30 PEG_RXN14
{24} DMI_RXP2 DMI_TX[2] PEG_RX#[14]
DMI_RXP3 G23 A31 PEG_RXN15
{24} DMI_RXP3 DMI_TX[3] PEG_RX#[15] PEG_RXP[15:0] {17}
J35 PEG_RXP0
PEG_RX[0] PEG_RXP1
PEG_RX[1] H34
H33 PEG_RXP2
{24} FDI_TXN[7:0] PEG_RX[2]
FDI_TXN0 E22 F35 PEG_RXP3
C FDI_TX#[0] PEG_RX[3] C
FDI_TXN1 D21 G33 PEG_RXP4
FDI_TXN2 FDI_TX#[1] PEG_RX[4] PEG_RXP5
D19 FDI_TX#[2] PEG_RX[5] E34
FDI_TXN3 D18 F32 PEG_RXP6
FDI_TXN4 FDI_TX#[3] PEG_RX[6] PEG_RXP7
G21 FDI_TX#[4] PEG_RX[7] D34
FDI_TXN5 PEG_RXP8
PCI EXPRESS -- GRAPHICS

E19 FDI_TX#[5] PEG_RX[8] F33
FDI_TXN6 F21 B33 PEG_RXP9
FDI_TX#[6] PEG_RX[9]
Intel(R) FDI
FDI_TXN7 G18 D31 PEG_RXP10
FDI_TX#[7] PEG_RX[10] PEG_RXP11
PEG_RX[11] A32
C30 PEG_RXP12
{24} FDI_TXP[7:0] PEG_RX[12]
FDI_TXP0 D22 A28 PEG_RXP13
FDI_TXP1 FDI_TX[0] PEG_RX[13] PEG_RXP14
C21 FDI_TX[1] PEG_RX[14] B29
FDI_TXP2 D20 A30 PEG_RXP15
FDI_TX[2] PEG_RX[15] PEG_NV_RXN[15:0] {17}
FDI_TXP3 C18
FDI_TXP4 FDI_TX[3] PEG_TXN0 0.1UF/10V,X7RGC132 PEG_NV_RXN0
G22 FDI_TX[4] PEG_TX#[0] L33
FDI_TXP5 E20 M35 PEG_TXN1 0.1UF/10V,X7R GC185 PEG_NV_RXN1
FDI_TXP6 FDI_TX[5] PEG_TX#[1] PEG_TXN2 0.1UF/10V,X7R GC127 PEG_NV_RXN2
F20 FDI_TX[6] PEG_TX#[2] M33
FDI_TXP7 G19 M30 PEG_TXN3 0.1UF/10V,X7R GC183 PEG_NV_RXN3
FDI_TX[7] PEG_TX#[3] PEG_TXN4 0.1UF/10V,X7R GC123 PEG_NV_RXN4
PEG_TX#[4] L31
F17 K32 PEG_TXN5 0.1UF/10V,X7RGC178 PEG_NV_RXN5
{24} FDI_FSYNC0 FDI_FSYNC[0] PEG_TX#[5]
E17 M29 PEG_TXN6 0.1UF/10V,X7RGC118 PEG_NV_RXN6
{24} FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6]
J31 PEG_TXN7 0.1UF/10V,X7RGC173 PEG_NV_RXN7
PEG_TX#[7] PEG_TXN8 0.1UF/10V,X7R GC112 PEG_NV_RXN8
{24} FDI_INT C17 FDI_INT PEG_TX#[8] K29
H30 PEG_TXN9 0.1UF/10V,X7RGC169 PEG_NV_RXN9
B {24} FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29 B
D17 F29 PEG_TXN11 0.1UF/10V,X7RGC164 PEG_NV_RXN11
{24} FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11]
E28 PEG_TXN12 0.1UF/10V,X7RGC103 PEG_NV_RXN12
PEG_TX#[12] PEG_TXN13 0.1UF/10V,X7RGC159 PEG_NV_RXN13
PEG_TX#[13] D29
D27 PEG_TXN14 0.1UF/10V,X7R GC96 PEG_NV_RXN14
PEG_TX#[15] C26 PEG_NV_RXP[15:0] {17}
L34 PEG_TXP0 GC130 0.1UF/10V,X7R PEG_NV_RXP0
PEG_TX[0] PEG_TXP1 GC184 0.1UF/10V,X7R PEG_NV_RXP1
PEG_TX[1] M34
M32 PEG_TXP2 GC126 0.1UF/10V,X7R PEG_NV_RXP2
PEG_TX[3] L30
PEG_TX[5] K31
PEG_TX[7] H31
K28 PEG_TXP8 GC1110.1UF/10V,X7R PEG_NV_RXP8
PEG_TX[9] G30
G29 PEG_TXP10 GC1060.1UF/10V,X7R PEG_NV_RXP10
PEG_TX[10] PEG_TXP11 GC1620.1UF/10V,X7R PEG_NV_RXP11
PEG_TX[11] F28
E27 PEG_TXP12 GC101 0.1UF/10V,X7R PEG_NV_RXP12
PEG_TX[13] D28
C27 PEG_TXP14 GC94 0.1UF/10V,X7R PEG_NV_RXP14
PEG_TX[14] PEG_TXP15 GC1540.1UF/10V,X7R PEG_NV_RXP15
PEG_TX[15] C25 TOPSTAR TECHNOLOGY
A bent A
Page Name Arrandule
IC,AUB_CFD_rPGA,R1P0
B C46
A
5 4 3 2 1
5 4 3 2 1
+V1.1S_VTT {10,11,27,28,29,38,50,51,55}
+V3.3S {6,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.5 {11,15,16,49,56,57}
D D
+V1.1S_VTT Voltage Level?
Layout Note:
Place close to CPU +V1.1S_VTT +V3.3S
R139
U2B 1K,1%
H_COMP3 AT23 R0402
COMP3
BCLK A16 BCLK_CPU_P_R R520 0 R0402
BCLK_CPU_P {27}
ns R130
MISC
H_COMP2 AT24 B16 BCLK_CPU_N_R R522 0 R0402 R133 10K
COMP2 BCLK# BCLK_CPU_N {27}
10K R0402
1
H_COMP1 AR30 BCLK_ITP_P
CLOCKS
G16 T59 ns R0402 ns
COMP1 BCLK_ITP
BCLK_ITP# AT30 BCLK_ITP_N T58 ns Q9
H_COMP0 AT26 PM_EXT_TS#0 3 2
COMP0 DIM_EXTTS#0 {16}
PEG_CLK E16 CLK_EXP_P_R R528 0 R0402
CLK_EXP_P {23}
SOT23MMBT3904-F
+V1.1S_VTT
PEG_CLK# D16 CLK_EXP_N_R R524 0 R0402
CLK_EXP_N {23}
ns
R187 AH24 SKTOCC#
49.9,1%
DPLL_REF_SSCLK A18 CLK_DP_P_R R539 0 R0402
R0402
DPLL_REF_SSCLK# A17 CLK_DP_N_R R531 0 R0402 +V1.1S_VTT
H_CATERR# AK14 ns Voltage Level?
CATERR#
THERMAL
ns +V3.3S
F6 R129
SM_DRAMRST# DDR3_DRAMRST# {15,16}
R433 0 R0402 H_PECI_R AT15 +V1.1S_VTT 1K,1%
{27} H_PECI PECI
+V1.1S_VTT AL1 SM_RCOMP_0 R0402
SM_RCOMP[0] SM_RCOMP_1 ns
SM_RCOMP[1] AM1
AN1 SM_RCOMP_2 R118
R548 68 R0402 VR_PROCHOT# SM_RCOMP[2] R123 10K
AN26 PROCHOT#
ns AN15 PM_EXT_TS#0 10K R0402
PM_EXT_TS#[0]
1
DDR3
MISC
AP15 PM_EXT_TS#1 R0402 ns
PM_EXT_TS#[1] Q8
AK15 PM_EXT_TS#1 3 2
{27,38} THERMTRIP# THERMTRIP# DIM_EXTTS#1 {15}
SOT23MMBT3904-F
49.9,1% +V1.1S_VTT ns
PRDY# AT28 R0402
+V1.1S_VTT AP27 XDP_REQ
PREQ# R566
ns
H_CPURST#_R TCK AN28 TCK

TMS
TDO 目前我们用的内存端没有做过温的功能。
C R549 68 R0402 AP26 AP28 C
RESET_OBS# TMS
PWR MANAGEMENT
ns AT27 TRST# R216
TRST# 49.9,1%
JTAG & BPM

R182 0 R0402 H_PM_SYNC_R AL15 AT29 TDI TMS R0402 ns
{24} H_PM_SYNC PM_SYNC TDI
AR27 TDO 49.9,1%
+V1.1S_VTT TDO TDI_M R0402
TDI_M AR29
R180 0 R0402 VCCPWRGOOD_1_R AN14 AP29 TDO_M R559 TCK R218 ns
VCCPWRGOOD_1 TDO_M +V3.3S
49.9,1%
AN25 T24 ns R0402 49.9,1%
0 R0402 VCCPWRGD_0_R DBR# R568
{27} VCCPWRGD_0 AN27 VCCPWRGOOD_0 TDI R0402 ns
R212 R213 AJ22 T18 ns 49.9,1% R632
ns PM_DRAM_PWRGD BPM#[0] R214 10K
1K,1% {24} PM_DRAM_PWRGD AK13 SM_DRAMPWROK BPM#[1] AK22 T20 ns
R0402 AK24 T23 ns XDP_REQ R0402 ns R0402
BPM#[2]
BPM#[3] AJ24 T25 ns
{43} CPU_VTT_PWG AM15 VTTPWRGOOD BPM#[4] AJ25 T26 ns EC_PROCHOT# {43}
BPM#[5] AH22 T19 ns
AK23 +V1.1S_VTT
BPM#[6] T22 ns
H_PWRGD_XDP_R AM26 AH23 T21 ns R634 Q31 R635
TAPPWRGOOD BPM#[7] TDI_M 1K MMBT3904-F 1K
2
1.5K,1% R0402 Q30 SOT23 R0402
R181 PLT_RST#_R AL14 R217 +V1.1S_VTT 1 MMBT3904-F R636 1 +V1.1S_VTT
{17,26,38,39,40,41,43,44} BUF_PLT_RST# RSTIN#
0 SOT23 1K
R0402 R0402 R0402
3
TDO_M
IC,AUB_CFD_rPGA,R1P0 ns VR_PROCHOT#
R185 VR_PROCHOT# {55}
+V1.5 750 OHM
R0402
Processor Compensation DDR3 Compensation Signals

Signals SM_RCOMP_2
R105
1.21K,1% H_COMP1 H_COMP3 SM_RCOMP_1
H_COMP0 H_COMP2 SM_RCOMP_0

B B
PM_DRAM_PWRGD
R198 R544 R543 R542 R439 R438 R437
49.9,1% 49.9,1% 20,1% 20,1% 100,1% 24.9,1% 130,1%
R0402 R0402 r0402 r0402 R0402 R0402 R0402
R101
3.3K
CPU_VTT_PWG
R344
750 OHM
R0402
A A
TOPSTAR TECHNOLOGY
bent
Page Name Arrandule
C C46
A
5 4 3 2 1
5 4 3 2 1
U2D
U2C
SB_CK[0] W8 M_CLK_DDR2 {15}

D {15} MB_DATA[63:0] SB_CK#[0] W9 M_CLK_DDR#2 {15} D
MB_DATA0 B5 M3
SB_DQ[0] SB_CKE[0] M_CKE2 {15}
AA6 MB_DATA1 A5
SA_CK[0] M_CLK_DDR0 {16} SB_DQ[1]
AA7 MB_DATA2 C3
SA_CK#[0] M_CLK_DDR#0 {16} MB_DATA3 SB_DQ[2]
SA_CKE[0] P7 M_CKE0 {16} B3 SB_DQ[3] SB_CK[1] V7 M_CLK_DDR3 {15}
{16} MA_DATA[63:0] MA_DATA0 A10 MB_DATA4 E4 V6
MA_DATA1 SA_DQ[0] MB_DATA5 SB_DQ[4] SB_CK#[1] M_CLK_DDR#3 {15}
C10 SA_DQ[1] A6 SB_DQ[5] SB_CKE[1] M2 M_CKE3 {15}
MA_DATA2 C7 MB_DATA6 A4
MA_DATA3 SA_DQ[2] MB_DATA7 SB_DQ[6]
A7 SA_DQ[3] SA_CK[1] Y6 M_CLK_DDR1 {16} C4 SB_DQ[7]
MA_DATA4 B10 Y5 MB_DATA8 D1
MA_DATA5 SA_DQ[4] SA_CK#[1] M_CLK_DDR#1 {16} MB_DATA9 SB_DQ[8]
D10 SA_DQ[5] SA_CKE[1] P6 M_CKE1 {16} D2 SB_DQ[9]
MA_DATA6 E10 MB_DATA10 F2 AB8
SA_DQ[6] SB_DQ[10] SB_CS#[0] M_CS#2 {15}
MA_DATA7 A8 MB_DATA11 F1 AD6
SA_DQ[7] SB_DQ[11] SB_CS#[1] M_CS#3 {15}
MA_DATA8 D8 MB_DATA12 C2
F10 SA_DQ[9] SA_CS#[0] AE2 M_CS#0 {16} F5 SB_DQ[13]
MA_DATA10 E6 AE8 MB_DATA14 F3
SA_DQ[10] SA_CS#[1] M_CS#1 {16} SB_DQ[14]
MA_DATA11 F7 MB_DATA15 G4 AC7
SA_DQ[11] SB_DQ[15] SB_ODT[0] M_ODT2 {15}
MA_DATA12 E9 MB_DATA16 H6 AD1
SA_DQ[12] SB_DQ[16] SB_ODT[1] M_ODT3 {15}
MA_DATA13 B7 MB_DATA17 G2
E7 SA_DQ[14] SA_ODT[0] AD8 M_ODT0 {16} J6 SB_DQ[18]
MA_DATA15 C6 AF9 MB_DATA19 J3
SA_DQ[15] SA_ODT[1] M_ODT1 {16} SB_DQ[19]
MA_DATA16 H10 MB_DATA20 G1
SA_DQ[16] SB_DQ[20] MB_DM[7:0] {15}
MA_DATA17 G8 MB_DATA21 G5 D4 MB_DM0
MA_DATA18 SA_DQ[17] MB_DATA22 SB_DQ[21] SB_DM[0] MB_DM1
K7 SA_DQ[18] J2 SB_DQ[22] SB_DM[1] E1
MA_DATA19 J8 MB_DATA23 J1 H3 MB_DM2
MA_DATA20 SA_DQ[19] MB_DATA24 SB_DQ[23] SB_DM[2] MB_DM3
G7 SA_DQ[20] J5 SB_DQ[24] SB_DM[3] K1
MA_DATA21 G10 MB_DATA25 K2 AH1 MB_DM4
SA_DQ[21] MA_DM[7:0] {16} SB_DQ[25] SB_DM[4]
MA_DATA22 J7 B9 MA_DM0 MB_DATA26 L3 AL2 MB_DM5
MA_DATA23 SA_DQ[22] SA_DM[0] MA_DM1 MB_DATA27 SB_DQ[26] SB_DM[5] MB_DM6
J10 SA_DQ[23] SA_DM[1] D7 M1 SB_DQ[27] SB_DM[6] AR4
MA_DATA24 L7 H7 MA_DM2 MB_DATA28 K5 AT8 MB_DM7
MA_DATA25 SA_DQ[24] SA_DM[2] MA_DM3 MB_DATA29 SB_DQ[28] SB_DM[7]
M6 SA_DQ[25] SA_DM[3] M7 K4 SB_DQ[29]
MA_DATA26 M8 AG6 MA_DM4 MB_DATA30 M4
MA_DATA27 SA_DQ[26] SA_DM[4] MA_DM5 MB_DATA31 SB_DQ[30]
L9 SA_DQ[27] SA_DM[5] AM7 N5 SB_DQ[31]
MA_DATA28 L6 AN10 MA_DM6 MB_DATA32 AF3
MA_DATA29 SA_DQ[28] SA_DM[6] MA_DM7 MB_DATA33 SB_DQ[32]
K8 SA_DQ[29] SA_DM[7] AN13 AG1 SB_DQ[33] MB_DQS#[7:0] {15}
MA_DATA30 N8 MB_DATA34 AJ3 D5 MB_DQS#0
MA_DATA31 SA_DQ[30] MB_DATA35 SB_DQ[34] SB_DQS#[0] MB_DQS#1
P9 SA_DQ[31] AK1 SB_DQ[35] SB_DQS#[1] F4
MA_DATA32 AH5 MB_DATA36 AG4 J4 MB_DQS#2
MA_DATA33 SA_DQ[32] MB_DATA37 SB_DQ[36] SB_DQS#[2] MB_DQS#3
C AF5 SA_DQ[33] MA_DQS#[7:0] {16} AG3 SB_DQ[37] SB_DQS#[3] L4 C
MA_DATA34 AK6 C9 MA_DQS#0 MB_DATA38 AJ4 AH2 MB_DQS#4
SA_DQ[34] SA_DQS#[0] SB_DQ[38] SB_DQS#[4]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY - B

MA_DATA35 AK7 F8 MA_DQS#1 MB_DATA39 AH4 AL4 MB_DQS#5
MA_DATA36 SA_DQ[35] SA_DQS#[1] MA_DQS#2 MB_DATA40 SB_DQ[39] SB_DQS#[5] MB_DQS#6
AF6 SA_DQ[36] SA_DQS#[2] J9 AK3 SB_DQ[40] SB_DQS#[6] AR5
MA_DATA37 AG5 N9 MA_DQS#3 MB_DATA41 AK4 AR8 MB_DQS#7
MA_DATA38 SA_DQ[37] SA_DQS#[3] MA_DQS#4 MB_DATA42 SB_DQ[41] SB_DQS#[7]
AJ7 SA_DQ[38] SA_DQS#[4] AH7 AM6 SB_DQ[42]
MA_DATA39 AJ6 AK9 MA_DQS#5 MB_DATA43 AN2
MA_DATA40 SA_DQ[39] SA_DQS#[5] MA_DQS#6 MB_DATA44 SB_DQ[43]
AJ10 SA_DQ[40] SA_DQS#[6] AP11 AK5 SB_DQ[44]
MA_DATA41 AJ9 AT13 MA_DQS#7 MB_DATA45 AK2
MA_DATA42 SA_DQ[41] SA_DQS#[7] MB_DATA46 SB_DQ[45]
AL10 SA_DQ[42] AM4 SB_DQ[46]
MA_DATA43 AK12 MB_DATA47 AM3
SA_DQ[43] SB_DQ[47] MB_DQS[7:0] {15}
MA_DATA44 AK8 MB_DATA48 AP3 C5 MB_DQS0
MA_DATA45 SA_DQ[44] MB_DATA49 SB_DQ[48] SB_DQS[0] MB_DQS1
AL7 SA_DQ[45] MA_DQS[7:0] {16} AN5 SB_DQ[49] SB_DQS[1] E3
MA_DATA46 AK11 C8 MA_DQS0 MB_DATA50 AT4 H4 MB_DQS2
MA_DATA47 SA_DQ[46] SA_DQS[0] MA_DQS1 MB_DATA51 SB_DQ[50] SB_DQS[2] MB_DQS3
AL8 SA_DQ[47] SA_DQS[1] F9 AN6 SB_DQ[51] SB_DQS[3] M5
MA_DATA48 AN8 H9 MA_DQS2 MB_DATA52 AN4 AG2 MB_DQS4
AM10 SA_DQ[49] SA_DQS[3] M9 AN3 SB_DQ[53] SB_DQS[5] AL5
MA_DATA50 AR11 AH8 MA_DQS4 MB_DATA54 AT5 AP5 MB_DQS6
AL11 SA_DQ[51] SA_DQS[5] AK10 AT6 SB_DQ[55] SB_DQS[7] AR7
MA_DATA52 AM9 AN11 MA_DQS6 MB_DATA56 AN7
MA_DATA53 SA_DQ[52] SA_DQS[6] MA_DQS7 MB_DATA57 SB_DQ[56]
AN9 SA_DQ[53] SA_DQS[7] AR13 AP6 SB_DQ[57]
MA_DATA54 AT11 MB_DATA58 AP8
AP12 SA_DQ[55] AT9 SB_DQ[59]
MA_DATA56 AM12 MB_DATA60 AT7
AN12 SA_DQ[57] MA_A_A[15:0] {16} AP9 SB_DQ[61]
MA_DATA58 AM13 Y3 MA_A_A0 MB_DATA62 AR10
SA_DQ[58] SA_MA[0] SB_DQ[62] MB_B_A[15:0] {15}
MA_DATA59 AT14 W1 MA_A_A1 MB_DATA63 AT10 U5 MB_B_A0
MA_DATA60 SA_DQ[59] SA_MA[1] MA_A_A2 SB_DQ[63] SB_MA[0] MB_B_A1
AT12 SA_DQ[60] SA_MA[2] AA8 SB_MA[1] V2
MA_DATA61 AL13 AA3 MA_A_A3 T5 MB_B_A2
MA_DATA62 SA_DQ[61] SA_MA[3] MA_A_A4 SB_MA[2] MB_B_A3
AR14 SA_DQ[62] SA_MA[4] V1 SB_MA[3] V3
MA_DATA63 AP14 AA9 MA_A_A5 R1 MB_B_A4
SA_DQ[63] SA_MA[5] MA_A_A6 SB_MA[4] MB_B_A5
SA_MA[6] V8 {15} MB_B_BS0 AB1 SB_BS[0] SB_MA[5] T8
T1 MA_A_A7 W5 R2 MB_B_A6
SA_MA[7] {15} MB_B_BS1 SB_BS[1] SB_MA[6]
Y9 MA_A_A8 R7 R6 MB_B_A7
SA_MA[8] {15} MB_B_BS2 SB_BS[2] SB_MA[7]
AC3 U6 MA_A_A9 R4 MB_B_A8
{16} MA_A_BS0 SA_BS[0] SA_MA[9] SB_MA[8]
AB2 AD4 MA_A_A10 R5 MB_B_A9
{16} MA_A_BS1 SA_BS[1] SA_MA[10] SB_MA[9]
U7 T2 MA_A_A11 AC5 AB5 MB_B_A10
{16} MA_A_BS2 SA_BS[2] SA_MA[11] {15} MB_B_CAS# SB_CAS# SB_MA[10]
U3 MA_A_A12 Y7 P3 MB_B_A11
B SA_MA[12] {15} MB_B_RAS# SB_RAS# SB_MA[11] B
AG8 MA_A_A13 AC6 R3 MB_B_A12
SA_MA[13] {15} MB_B_WE# SB_WE# SB_MA[12]
T3 MA_A_A14 AF7 MB_B_A13
SA_MA[14] MA_A_A15 SB_MA[13] MB_B_A14
{16} MA_A_CAS# AE1 SA_CAS# SA_MA[15] V9 SB_MA[14] P5
AB3 N1 MB_B_A15
{16} MA_A_RAS# SA_RAS# SB_MA[15]
{16} MA_A_WE# AE9 SA_WE#
S_Bot IC,AUB_CFD_rPGA,R1P0
S_Bot
A A
TOPSTAR TECHNOLOGY
bent
Page Name Arrandule
C C46
A
5 4 3 2 1
5 4 3 2 1
+VCC_CORE {55}
+V1.1S_VTT {8,11,27,28,29,38,50,51,55}
U2F
+VCC_CORE +V1.1S_VTT
D
AG35 VCC1 VTT0_1 AH14 D
AG34 VCC2 VTT0_2 AH12
AG33 AH11 +V1.1S_VTT +V1.1S_VTT
VCC3 VTT0_3
AG32 VCC4 VTT0_4 AH10 C362 C363 C364 C365 C380 C171
AG31 VCC5 VTT0_5 J14
AG30 J13 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R
VCC6 VTT0_6
AG29 VCC7 VTT0_7 H14
AG28 VCC8 VTT0_8 H12
AG27 G14 R575 R221
VCC9 VTT0_9 ns
AG26 VCC10 VTT0_10 G13 1K 1K
AF35 VCC11 VTT0_11 G12 R0402 R0402
AF34 VCC12 VTT0_12 G11
AF33 F14 PM_PSI# PM_DPRSLPVR
VCC13 VTT0_13
AF32 VCC14 VTT0_14 F13
AF29 E14 R576 R220
VCC17 VTT0_17 ns
AF28 VCC18 VTT0_18 E12 1K 1K
AF27 VCC19 VTT0_19 D14 R0402 R0402
AF26 VCC20 VTT0_20 D13
1.1V RAIL POWER
AD35 VCC21 VTT0_21 D12
AD34 VCC22 VTT0_22 D11 C186 C388 C145 C146 C147 C368
AD33 VCC23 VTT0_23 C14
AD32 C13 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 0.22uF/10V,X7R 0.01uF/25V,X7R
VCC24 VTT0_24
AD29 VCC27 VTT0_27 B14
AD28 VCC28 VTT0_28 B12
AD27 VCC29 VTT0_29 A14
AD26 VCC30 VTT0_30 A13
AC35 VCC31 VTT0_31 A12
AC34 VCC32 VTT0_32 A11
AC33 VCC33
AC32 VCC34
AC31 +V1.1S_VTT
VCC35
AC30 VCC36 VTT0_33 AF10
AC29 VCC37 VTT0_34 AE10
AC28 VCC38 VTT0_35 AC10
CPU CORE SUPPLY
C AC27 VCC39 VTT0_36 AB10 C

AC26 VCC40 VTT0_37 Y10 C360 C361
AA35 VCC41 VTT0_38 W10
AA34 U10 10uF/6.3V,X5R 10uF/6.3V,X5R
VCC42 VTT0_39
AA33 VCC43 VTT0_40 T10
AA32 VCC44 VTT0_41 J12
AA31 J11 +VCC_CORE
AA30
VCC45
VCC46
VTT0_42
VTT0_43 J16 Clarksfield 1.1v
AA29 J15
AA28
VCC47
VCC48
VTT0_44 Arrandale 1.05v
AA27 VCC49
AA26 VCC50
Y35 VCC51
Y34 VCC52
Y33 VCC53
Y32 VCC54
Y31 VCC55
Y30 VCC56
Y29 VCC57 C379 C174 C175 C189 C209 C378 C169 C190 C191 C188 C187
Y28 VCC58
Y27 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R
VCC59
Y26 VCC60
V35 VCC61 PSI# AN33 PM_PSI# {55}
V34
POWER
VCC62
V33 VCC63
V32 VCC64 VID[0] AK35 H_VID0 {55}
V31 VCC65 VID[1] AK33 H_VID1 {55}
V30 VCC66 VID[2] AK34 H_VID2 {55}
V29 VCC67 VID[3] AL35 H_VID3 {55}
CPU VIDS
V28 VCC68 VID[4] AL33 H_VID4 {55}

V27 VCC69 VID[5] AM33 H_VID5 {55}
V26 VCC70 VID[6] AM35 H_VID6 {55}
U35 VCC71 PROC_DPRSLPVR AM34 PM_DPRSLPVR {55}
U34 VCC72
U33 VCC73
U32 VCC74
U31 G15 VTT_SELECT_R R193
VCC75 VTT_SELECT VTT_SELECT {50}
U30 0
B VCC76 B
U29 VCC77
U28 +VCC_CORE
VCC78
U27 VCC79 C170 C384 C192 C172 C173 C176 C375 C374 C387 C386 C383 C382
U26 VCC80
R35 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R
VCC81
R34 VCC82
R33 R589
VCC83
R32 VCC84 ISENSE AN35 Vcore_IMON_R R580 Vcore_IMON {55}
100,1%
R31 0 R0402
VCC85
R30 VCC86
R29 VCC87 VCCSENSE_R R581
SENSE LINES
R28 VCC88 VCC_SENSE AJ34 VCCSENSE {55}

R27 AJ35 VSSSENSE_R R582
0
VCC89 VSS_SENSE VSSSENSE {55}
R26 0
VCC90
P35 VCC91
P34 B15 TP_VTT_SENSE ns ICTP
VCC92 VTT_SENSE T15
P33 A15 TP_VSS_SENSE_VTT ICTP
VCC93 VSS_SENSE_VTT T14
P32 ns R590
VCC94 100,1%
P31 VCC95
P30 R0402 C373 C381 C385 C377 C376 C199 C198 C197 C196 C212 C210 C211
VCC96
P29 VCC97
P28 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 1uF/10V,X7R 1uF/10V,X7R 0.22uF/10V,X7R 0.22uF/10V,X7R 0.01uF/25V,X7R 0.01uF/25V,X7R 10uF/6.3V,X5R
VCC98
P27 VCC99
P26 VCC100
A A
TOPSTAR TECHNOLOGY
bent
Page Name Arrandule
C C46
A
5 4 3 2 1
5 4 3 2 1
+VGFX {51}
+V1.1S_VTT {8,10,27,28,29,38,50,51,55}
+V1.5 {8,15,16,49,56,57}
+V1.8S {26,28,29,31,49,56,57}
D D
+VGFX
U2G
AT21 VAXG1
AT19 VAXG2 VAXG_SENSE AR22 VGFXVCCSEN {51}
SENSE
LINES
AT18 VAXG3 VSSAXG_SENSE AT22 VGFXVSSSEN {51}
AT16 VAXG4
C181 C162 C184 C372 AR21 VAXG5
AR19 VAXG6
10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R AR18 VAXG7
AR16 VAXG8 GFX_VID[0] AM22 GFXVR_VID_0 {51}
AP21 VAXG9 GFX_VID[1] AP22 GFXVR_VID_1 {51} GFXVR_EN {51}
GRAPHICS VIDs
AP19 VAXG10 GFX_VID[2] AN22 GFXVR_VID_2 {51}
AP18 VAXG11 GFX_VID[3] AP23 GFXVR_VID_3 {51}
AP16 VAXG12 GFX_VID[4] AM23 GFXVR_VID_4 {51}
AN21 VAXG13 GFX_VID[5] AP24 GFXVR_VID_5 {51}
GRAPHICS
AN19 VAXG14 GFX_VID[6] AN24 GFXVR_VID_6 {51}
AN18 VAXG15
AN16 R545
VAXG16
AM21 VAXG17 GFX_VR_EN AR25 4.7K
AM19 VAXG18 GFX_DPRSLPVR AT25 GFXVR_DPRSLPVR {51} R0402
AM18 VAXG19 GFX_IMON AM24 VGFX_IMON {51}
AM16 VAXG20
AL21 VAXG21
C AL19 VAXG22
C
AL18 +V1.5
VAXG23
AL16 VAXG24
AK21 VAXG25 VDDQ1 AJ1
AK19 VAXG26 VDDQ2 AF1
- 1.5V RAILS
AK18 VAXG27 VDDQ3 AE7
C160 C371 C161 C183 AK16 VAXG28 VDDQ4 AE4
AJ21 VAXG29 VDDQ5 AC1 C106 C110 C108 C107 C111 C109
0.22uF/10V,X7R 0.01uF/25V,X7R 10uF/6.3V,X5R 10uF/6.3V,X5R AJ19 AB7
VAXG30 VDDQ6 10uF/6.3V,X5R 10uF/6.3V,X5R 1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R
AJ18 VAXG31 VDDQ7 AB4
AJ16 VAXG32 VDDQ8 Y1
AH21 VAXG33 VDDQ9 W7
POWER
AH19 VAXG34 VDDQ10 W4
AH18 VAXG35 VDDQ11 U1
AH16 VAXG36 VDDQ12 T7
VDDQ13 T4
VDDQ14 P1
+V1.1S_VTT N7
VDDQ15
VDDQ16 N4
DDR3
VDDQ17 L1
J24 VTT1_45 VDDQ18 H1
FDI
J23 VTT1_46
H25 +V1.1S_VTT
VTT1_47
C149 C150
10uF/6.3V,X5R 10uF/6.3V,X5R P10
VTT0_59
VTT0_60 N10
VTT0_61 L10
VTT0_62 K10
+V1.1S_VTT C358 C359
10uF/6.3V,X5R 10uF/6.3V,X5R
1.1V
VTT1_63 J22
K26 VTT1_48 VTT1_64 J20
J27 J18 +V1.1S_VTT
VTT1_49 VTT1_65
PEG & DMI
J26 VTT1_50 VTT1_66 H21

B
J25 VTT1_51 VTT1_67 H20 B
H27 VTT1_52 VTT1_68 H19
C151 C148 C154 C152 G28 VTT1_53
G27 VTT1_54
10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R G26 VTT1_55 C185 C153
F26 VTT1_56
E26 L26 10uF/6.3V,X5R 10uF/6.3V,X5R
VTT1_57 VCCPLL1
1.8V
E25 VTT1_58 VCCPLL2 L27

M26 VCCPLL
VCCPLL3
+V1.8S
VCCPLL FB8 1 2 FB0805

300ohm@100MHz,1.5A
C200 C201 C195 C193

1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R 10uF/6.3V,X5R
A A
TOPSTAR TECHNOLOGY
bent
Page Name Arrandule
C C46
A
5 4 3 2 1
5 4 3 2 1
U2I
U2H
AT20 VSS1 VSS81 AE34

AT17 VSS2 VSS82 AE33 K27 VSS161
AR31 VSS3 VSS83 AE32 K9 VSS162
AR24 VSS6 VSS86 AE29 J32 VSS165
D D
AR15 VSS10 VSS90 AE6 H35 VSS169
AR12 VSS11 VSS91 AD10 H32 VSS170
AR9 VSS12 VSS92 AC8 H28 VSS171
AP20 VSS15 VSS95 AB35 H22 VSS174
AN34 VSS22 VSS102 AB28 H2 VSS181
AN31 VSS23 VSS103 AB27 G34 VSS182
AN17 VSS26 VSS106 AA10 G9 VSS185
AM29 VSS27 VSS107 Y8 G6 VSS186
AM27 VSS28 VSS108 Y4 G3 VSS187
AM25 VSS29 VSS109 Y2 F30 VSS188
AM20 VSS30 VSS110 W35 F27 VSS189
C AM14 VSS32 VSS112 W33 F22 VSS191 C
AM5 VSS35 VSS115 W30 E35 VSS194
AM2 W29 E32
AL34
AL31
VSS36
VSS37
VSS38 VSS
VSS116
VSS117
VSS118
W28
W27
E29
E24
VSS195
VSS196
VSS197
VSS
AL23 VSS39 VSS119 W26 E21 VSS198
AL20 VSS40 VSS120 W6 E18 VSS199
AL17 VSS41 VSS121 V10 E13 VSS200
AL12 VSS42 VSS122 U8 E11 VSS201
AL3 VSS45 VSS125 T35 E2 VSS204 VSS_NCTF1 AT35
AK29 VSS46 VSS126 T34 D33 VSS205 VSS_NCTF2 AT1
AK27 VSS47 VSS127 T33 D30 VSS206 VSS_NCTF3 AR34
AK25 VSS48 VSS128 T32 D26 VSS207 VSS_NCTF4 B34
AK20 T31 D9 B2
NCTF
VSS49 VSS129 VSS208 VSS_NCTF5
AK17 VSS50 VSS130 T30 D6 VSS209 VSS_NCTF6 B1
AJ31 VSS51 VSS131 T29 D3 VSS210 VSS_NCTF7 A35
AJ23 VSS52 VSS132 T28 C34 VSS211
B AJ11 VSS56 VSS136 R10 C24 VSS215 B
AJ8 VSS57 VSS137 P8 C22 VSS216
AH35 VSS60 VSS140 N35 C16 VSS219
AH34 VSS61 VSS141 N34 B31 VSS220
AH17 VSS71 VSS151 M10 A29 VSS230
AH13 VSS72 VSS152 L35 A27 VSS231
AH3 VSS75 VSS155 L8
AG10 VSS76 VSS156 L5
AF8 VSS77 VSS157 L2
AF4 VSS78 VSS158 K34 TOPSTAR TECHNOLOGY
AF2 VSS79 VSS159 K33
A AE35 K30 bent A
VSS80 VSS160
Page Name Arrandule
IC,AUB_CFD_rPGA,R1P0 B C46
IC,AUB_CFD_rPGA,R1P0 S_Bot A
S_Bot Date: Friday, November 27, 2009 Sheet 12 of 59
5 4 3 2 1
5 4 3 2 1
U2E
RSVD32 AJ13
RSVD33 AJ12
AP25 RSVD1
AL25 RSVD2 RSVD34 AH25
AL24 AK26 H11 H12 H13 H14
RSVD3 RSVD35
AL22 RSVD4
AJ33 RSVD5 RSVD36 AL26
D D
AG9 RSVD6 RSVD_NCTF_37 AR2
M27 RSVD7
ns L28 AJ26
R209 0 VREF_CH_A_DIMM RSVD8 RSVD38
{16} VREFA_DDR3 J17 SA_DIMM_VREF RSVD39 AJ27
R204 0 VREF_CH_B_DIMM H17 CPU_HOLE CPU_HOLE CPU_HOLE CPU_HOLE
{15} VREFB_DDR3 SB_DIMM_VREF
ns G25 ns ns ns ns
RSVD11
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
G17 RSVD12
E31 AP1
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
RSVD13 RSVD_NCTF_40
E30 RSVD14 RSVD_NCTF_41 AT2
RSVD_NCTF_42 AT3
RSVD_NCTF_43 AR1
R570
R0402 AL28
3.01K,1% ns CFG0 RSVD45
AM30 CFG[0] RSVD46 AL29
R573 AM28 AP30
R572 3.01K,1% CFG[1] RSVD47
AP31 CFG[2] RSVD48 AP32
R0402 R0402 CFG3 AL32 AL27
3.01K,1% CFG4 CFG[3] RSVD49
AL30 CFG[4] RSVD50 AT31
ns AM31 AT32
CFG[5] RSVD51
AN29 CFG[6] RSVD52 AP33
C AM32 CFG[7] RSVD53 AR33 C
AK32 CFG[8] RSVD_NCTF_54 AT33
never pull down for switchable graphic AK31 AT34
RESERVED
CFG[9] RSVD_NCTF_55
AK28 CFG[10] RSVD_NCTF_56 AP35
AJ28 CFG[11] RSVD_NCTF_57 AR35
AN30 AR32 BRACKET BRACKET1_Mylar
CFG[12] RSVD58
AN32 CFG[13]
AJ32 CFG[14]
AJ29 CFG[15] RSVD_TP_59 E15
AJ30 CFG[16] RSVD_TP_60 F15
AK30 CFG[17] KEY A2
H16 RSVD_TP_86 RSVD62 D15
RSVD63 C15
RSVD64 AJ15
RSVD65 AH15
B19 RSVD15
A19 RSVD16
A20 RSVD17
B20 RSVD18
RSVD_TP_66 AA5
U9 RSVD19 RSVD_TP_67 AA4
T9 RSVD20 RSVD_TP_68 R8
B
RSVD_TP_69 AD3 B
AC9 RSVD21 RSVD_TP_70 AD2
AB9 RSVD22 RSVD_TP_71 AA2
RSVD_TP_72 AA1
RSVD_TP_73 R9
RSVD_TP_74 AG7
CPU_BRACKET Mylar
C1 RSVD_NCTF_23 RSVD_TP_75 AE3
A3 RSVD_NCTF_24
RSVD_TP_76 V4
RSVD_TP_77 V5
RSVD_TP_78 N2
J29 RSVD26 RSVD_TP_79 AD5
J28 RSVD27 RSVD_TP_80 AD7
RSVD_TP_81 W3
A34 RSVD_NCTF_28 RSVD_TP_82 W2
A33 RSVD_NCTF_29 RSVD_TP_83 N3
RSVD_TP_84 AE5
C35 RSVD_NCTF_30 RSVD_TP_85 AD9
B35 RSVD_NCTF_31
AP34 R579 0 R0402
VSS
TOPSTAR TECHNOLOGY
A bent A
Page Name Arrandule
B C46
A
5 4 3 2 1
5 4 3 2 1
PCH Strapping
Name Description 0 1
Reboot option
SPKR at power-up Default Mode No Reboot Mode
with TCO Disabled
D Internal pull-up. D
INIT3_3V# Leave as "No Connect"
Top Block Swap Default Mode
GNT3#/GPIO55 Mode Processor Strapping
INTVRMEN Integrated VRM Mode Disabled Enabled Pin Description 0 1
Default(SPI): Leave both GNT0#and GNT1# floating. Boot: Embedded An external Display No Physical Display
GNT0# From PCI: Connect GNT1# to ground with 1k resistor,leave GNT0# Floating DisplayPort Port device is Port attached to
GNT1# CFG[4] Presence connected to the Embedded Displayport
From LPC:Connect both GNT0# and GNT1#to ground with 1k resistor Embedded Display Port
GNT2#/ Configures DMI
GPIO53 for ESI Default Mode PCI-E Static Lane Numbers
CFG[3] Lane Reversal Resersed 15->0.14->1, Normal Operation
...
Intel Anti-Theft
SPI_MOSI Technology Disabled Enabled
CFG[0] PIC-Express Bifurcation enable Single PCIE Graphics

Configuration Select
NV_ALE Intel Anti-Theft Disabled Enabled
Technology
NV_CLE DMI termination voltage / Weak internal pull-up Note: Default value for each bit is 1 unless specified otherless
1.Security measure
HDA_DOCK_EN Flash Descriptor Security measure Overridden
#/GPIO33 Security enabled 2.Sampled on the rising
C edge of PWROK,disables C
Intel ME& its freatures
Weak internal
HDA_SDO Weak internal pull-down pull-down /
Weak internal
HDA_SYNC Weak internal pull-down pull-down /
Intel ME Crypto
GPIO15 TLS cipher suite With No confidentiality Confidentiality
GPIO8 Weak internal pull-up Weak internal

pull-up /
Disables the Enables the
GPIO27 Default: floating internal VccVRM internal VccVRM
Name Pin Attr Description Name Pin Attr Description

GPIO0 +V3.3S I/O 10Kohm pull up to V3.3S GPIO46 +V3.3A I/O As TP(test point)
GPIO1 +V3.3S I/O EXTSMI# Reserve for EC,10k to V3.3S GPIO47 +V3.3A I/O As PCIE_CLKREQ for N10,10K to GND and 10K to V3.3GPU
GPIO2 +V3.3S I/OD 8.2Kohm pull up to V3.3S GPIO48 +V3.3S I/O 10Kohm pull up to V3.3S
GPIO3 +V3.3S I/OD 8.2Kohm pull up to V3.3S GPIO49 +V3.3S I/O 10Kohm pull up to V3.3S
GPIO4 +V3.3S I/OD 8.2Kohm pull up to V3.3S GPIO50 +V3.3S I/O 8.2Kohm pull up to V3.3S
GPIO5 +V3.3S I/OD As LVDS_DDC_SEL for DDC select GPIO51 +V3.3S I/O Reserve 1K pull down to GND
GPIO6 +V3.3S I/O 10Kohm pull up to V3.3S GPIO52 +V3.3S I/O 8.2Kohm pull up to V3.3S
GPIO7 +V3.3S I/O As EC_RUNTIME_SCI# link to EC,10K to V3.3S GPIO53 +V3.3S I/O As LVDS_BLT_SEL for BLT select
GPIO8 +V3.3A I/O 10Kohm pull up to V3.3AL GPIO54 +V3.3S I/O 8.2Kohm pull up to V3.3S
GPIO9 +V3.3A I/O As USB_OC#5 for USB board GPIO55 +V3.3S I/O Reserve 1K pull down to GND
B GPIO10 10Kohm pull up to V3.3AL GPIO56 +V3.3A I/O 8.2Kohm pull up to V3.3AL B
+V3.3A I/O
GPIO11 +V3.3A I/O 10Kohm pull up to V3.3AL GPIO57 +V3.3A I/O 10Kohm pull up to V3.3AL
GPIO12 +V3.3A I/O 10Kohm pull up to V3.3AL GPIO58 +V3.3A I/O As SML1CLK and 2.2K to V3.3AL
GPIO13 +V3.3A I/O NC GPIO59 +V3.3A I/O 10Kohm pull up to V3.3AL
GPIO14 +V3.3A I/O 10Kohm pull up to V3.3AL GPIO60 +V3.3A I/O 10Kohm pull up to V3.3AL
GPIO15 +V3.3A I/O 1Kohm pull up to V3.3AL GPIO61 +V3.3A I/O As PM_SUS_STAT# link to EC and 1k to V3.3AL
GPIO16 +V3.3S I/O 10K to GND,reserve 10K to V3.3S for debug GPIO62 +V3.3A I/O As TP
GPIO17 +V3.3S I/O 10Kohm pull up to V3.3S GPIO63 +V3.3A I/O As TP
GPIO18 +V3.3S I/O MiniPCIE_REQ# Reserve,10k to V3.3S GPIO64 +V3.3S I/O NC
GPIO19 +V3.3S I/O 10Kohm pull up to V3.3S GPIO65 +V3.3S I/O NC
GPIO20 +V3.3S I/O minicard_CLKREQ# Reserve,10k to V3.3S GPIO66 +V3.3S I/O NC
GPIO21 +V3.3S I/O 10Kohm pull up to V3.3S GPIO67 +V3.3S I/O As CLK_CR_48M for IT1337E output 48M clock
GPIO22 +V3.3S I/O 10Kohm pull up to V3.3S GPIO72 +V3.3A I/O As BAT_LOW# link to EC and 10K to V3.3AL
GPIO23 +V3.3S I/O Reserve 10Kohm pull up to V3.3S for debug GPIO73 +V3.3A I/O 10Kohm pull down to GND
GPIO24 +V3.3A I/O 10Kohm pull up to V3.3AL and 10K to GND GPIO74 +V3.3A I/O 10Kohm pull up to V3.3AL
GPIO25 +V3.3A I/O EXPCARD_CLKREQ# Reserve,100k to V3.3AL GPIO75 +V3.3A I/O As SML1DATA and 2.2K to V3.3AL
GPIO26 +V3.3A I/O 8.2Kohm pull up to V3.3AL
GPIO27 +V3.3A I/O Reserve 10Kohm pull down to GND for debug
GPIO28 +V3.3A I/O 10Kohm pull up to V3.3AL
GPIO29 +V3.3A I/O NC
GPIO30 +V3.3A I/O As ALW_ACK link to EC and 10K to V3.3AL
GPIO31 +V3.3A I/O As AC_IN_PCH link to EC
GPIO32 +V3.3S I/O 10Kohm pull up to V3.3S
GPIO33 +V3.3S I/O 4.7Kohm pull down to GND
GPIO35 +V3.3S I/O 10Kohm pull down to GND
GPIO37 +V3.3S I/O 10Kohm pull down to GND for BIOS ver
GPIO41 +V3.3A I/O As USB_OC#2 for USB board
GPIO44 +V3.3A I/O 8.2Kohm pull up to V3.3AL
GPIO45 +V3.3A I/O As TP(test point)
A A
TOPSTAR TECHNOLOGY
bent
Page Name black
C C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.5 {8,11,16,49,56,57}
+V0.75S {16,49,56}
+V0.75S +V1.5
D D
204
203
100
105
106
111
112
117
118
123
124
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
75
76
81
82
87
88
93
94
99
DIMM2
{9} MB_B_A[15:0]
VTT2
VTT1
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
MB_DATA[63:0] {9}
MB_B_A0 98 5 MB_DATA0
MB_B_A1 A0 D0 MB_DATA1
97 A1 D1 7
95 A3 D3 17
+V1.5 MB_B_A4 92 4 MB_DATA4
91 A5 D5 6
86 A7 D7 18
C47 C78 C27 C77 C75 C44 C76 C34 C45 MB_B_A8 89 21 MB_DATA8
ns ns MB_B_A9 A8 D8 MB_DATA9
85 A9 D9 23
C0805 C0805 C0402 C0805 C0805 C0402 C0805 C0805 C0402 MB_B_A10 107 33 MB_DATA10
2.2UF/10V,X7R 2.2UF/10V,X7R 0.1UF/25V,Y5V 2.2UF/10V,X7R MB_B_A11 A10/AP D10 MB_DATA11
84 A11 D11 35
10UF/6.3V,X5R 0.1UF/25V,Y5V 2.2UF/10V,X7R 2.2UF/10V,X7R 0.1UF/25V,Y5V MB_B_A12 83 22 MB_DATA12
MB_B_A13 A12/BC# D12 MB_DATA13
119 A13 D13 24
+V1.5 MB_B_A14 80 34 MB_DATA14
78 A15 D15 36
39 MB_DATA16
C46 C48 D16 MB_DATA17
{9} MB_B_BS0 109 BA0 D17 41
10uF/6.3V,X5R 10uF/6.3V,X5R 108 51 MB_DATA18
{9} MB_B_BS1 BA1 D18
C0805 C0805 79 53 MB_DATA19
{9} MB_B_BS2 BA2 D19
+V1.5 40 MB_DATA20
D20 MB_DATA21
{9} M_CS#2 114 CS0 D21 42
121 50 MB_DATA22
{9} M_CS#3 CS1 D22 MB_DATA23
D23 52
C25 C21 C40 C20 C19 C38 C35 C39 MB_DM0 11 57 MB_DATA24
ns ns ns MB_DM1 DQM0 D24 MB_DATA25
28 DQM1 D25 59
C0402 C0805 C0402 C0805 C0805 C0402 C0805 C0805 MB_DM2 46 67 MB_DATA26
0.1UF/25V,Y5V2.2UF/10V,X7R 2.2UF/10V,X7R 0.1UF/25V,Y5V 2.2UF/10V,X7R MB_DM3 DQM2 D26 MB_DATA27
63 DQM3 D27 69
ns 0.1UF/25V,Y5V 2.2UF/10V,X7R 2.2UF/10V,X7R MB_DM4 136 56 MB_DATA28
MB_DM5 DQM4 D28 MB_DATA29
153 DQM5 D29 58
C MB_DM6 170 68 MB_DATA30 C
{9} MB_DM[7:0] MB_DM7 DQM6 D30 MB_DATA31
187 DQM7 D31 70
129 MB_DATA32
Layout note:电容靠近DDR slot VDD PIN {9} MB_B_WE# 113 WE
D32
D33 131 MB_DATA33
115 141 MB_DATA34
{9} MB_B_CAS# CAS D34
110 143 MB_DATA35
{9} MB_B_RAS# RAS D35
130 MB_DATA36
D36 MB_DATA37
{9} M_CKE2 73 CKE0 D37 132
74 140 MB_DATA38
{9} M_CKE3 CKE1 D38 MB_DATA39
D39 142
101 147 MB_DATA40
{9} M_CLK_DDR2 CK0 D40 MB_DATA41
{9} M_CLK_DDR#2 103 CK0 D41 149
102 157 MB_DATA42
{9} M_CLK_DDR3 CK1 D42 MB_DATA43
{9} M_CLK_DDR#3 104 CK1 D43 159
146 MB_DATA44
D44 MB_DATA45
{9} M_ODT2 116 ODT0 D45 148
120 158 MB_DATA46
{9} M_ODT3 ODT1 D46
160 MB_DATA47
MB_DQS0 D47 MB_DATA48
12 DQS0 D48 163
MB_DQS1 29 165 MB_DATA49
MB_DQS2 DQS1 D49 MB_DATA50
47 DQS2 D50 175
137 DQS4 D52 164
{9} MB_DQS[7:0] 171 DQS6 D54 174
DQS7 D55 MB_DATA56
D56 181
200 183 MB_DATA57
{6,16,23,40,41} SMB_DATA_S SDA D57 MB_DATA58
{6,16,23,40,41} SMB_CLK_S 202 SCL D58 191
193 MB_DATA59
R46 10K R0402 D59 MB_DATA60
197 SA0 D60 180
+V3.3S Note: R49 10K R0402 201 182 MB_DATA61
SO-DIMM1 SPD Address is 0xA4 SA1 D61 MB_DATA62
D62 192
199 194 MB_DATA63
VDDSPD D63
VREFB_DDR3 1 10 MB_DQS#0
VREFB_CA VREF_DQ DQS#0 MB_DQS#1
126 VREF_CA DQS#1 27
45 MB_DQS#2
B
C31 C29 DQS#2 MB_DQS#3 B
198 EVENT# DQS#3 62
C30 C28 30 135 MB_DQS#4
0.1UF/25V,Y5V 0.1UF/25V,Y5V RESET# DQS#4 MB_DQS#5
DQS#5 152
C0402 2.2UF/10V,X7R C0402 2.2UF/10V,X7R 77 169 MB_DQS#6
C0805 C0805 NC1 DQS#6 MB_DQS#7
122 NC2 DQS#7 186
close to DDR pin1 125
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
NCTEST MB_DQS#[7:0] {9}
GND1
GND2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
close to DDR
pin199
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
205
206
DDR3_SODIMM204_0
{8} DIM_EXTTS#1
{8,16} DDR3_DRAMRST#
+V1.5 +V1.5
R48 R50
1K,1% 1K,1%
R0402 R0402
VREFB_DDR3 VREFB_CA
VREFB_DDR3 {13}
R47 R51 C43

1K,1% 1K,1% C53
R0402 R04020.1UF/25V,Y5V
C0402 2.2UF/10V,X7R
A C0805 A
TOPSTAR TECHNOLOGY
bent
Page Name DDR3 SODIMM1
C C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.5 {8,11,15,49,56,57}
+V0.75S {15,49,56}
+V0.75S +V1.5
+V1.5
204
203
100
105
106
111
112
117
118
123
124
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
1
C96
75
76
81
82
87
88
93
94
99
D D
DIMM1 + C37 C33 C417 C26 C22 C36 C49
1
{9} MA_A_A[15:0]
ns ns ns ns
VTT2
VTT1
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
MA_DATA[63:0] {9} CT7343_19 C0402 C0805 C0805 C0402 C0805 C0402 C0805
2
MA_A_A0 98 5 MA_DATA0 0.1UF/25V,Y5V 2.2UF/10V,X7R 2.2UF/10V,X7R 2.2UF/10V,X7R
MA_A_A1 A0 D0 MA_DATA1 220uF/2.5V,POSCAP 2.2UF/10V,X7R 0.1UF/25V,Y5V 0.1UF/25V,Y5V
97 A1 D1 7
MA_A_A2 96 15 MA_DATA2
MA_A_A3 A2 D2 MA_DATA3
95 A3 D3 17
MA_A_A4 92 4 MA_DATA4 1, A minimum of 9 high frequency
MA_A_A5 A4 D4 MA_DATA5 capacitors are recommended to be
91 A5 D5 6
MA_A_A6 90 16 MA_DATA6 placed near each SO-DIMM of DDR2.
MA_A_A7 A6 D6 MA_DATA7 +V1.5 2, 2.2µF*5 per DIMM,0.1µF*4 per
86 A7 D7 18
MA_A_A8 89 21 MA_DATA8 DIMM,330µF*1 per DIMM
MA_A_A9 A8 D8 MA_DATA9
85 A9 D9 23
MA_A_A11 A10/AP D10 MA_DATA11
84 A11 D11 35
MA_A_A13 A12/BC# D12 MA_DATA13 C23 C419 C213 C24
119 A13 D13 24 C208 C418
MA_A_A15 A14 D14 MA_DATA15 10uF/6.3V,X5R
C0402 C0805 10uF/6.3V,X5R
C0805 C0402
78 A15 D15 36
39 MA_DATA16 2.2UF/10V,X7R 2.2UF/10V,X7R
D16 MA_DATA17 0.1UF/25V,Y5V 0.1UF/25V,Y5V
{9} MA_A_BS0 109 BA0 D17 41
108 51 MA_DATA18
{9} MA_A_BS1 BA1 D18
79 53 MA_DATA19
{9} MA_A_BS2 BA2 D19
40 MA_DATA20
D20 MA_DATA21
114 42
{9}
{9}
M_CS#0
M_CS#1 121
CS0
CS1
D21
D22 50 MA_DATA22 Layout note:电容靠近DDR slot VDD PIN
52 MA_DATA23
MA_DM0 D23 MA_DATA24
11 DQM0 D24 57
MA_DM1 28 59 MA_DATA25
MA_DM2 DQM1 D25 MA_DATA26 +V0.75S
46 DQM2 D26 67
MA_DM4 DQM3 D27 MA_DATA28
136 DQM4 D28 56
MA_DM6 DQM5 D29 MA_DATA30
{9} MA_DM[7:0] 170 DQM6 D30 68
MA_DM7 187 70 MA_DATA31 C51 C72 C32 C18
DQM7 D31 MA_DATA32
D32 129
113 131 MA_DATA33 1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R
{9} MA_A_WE# WE D33
C 115 141 MA_DATA34 C
{9} MA_A_CAS# CAS D34
110 143 MA_DATA35
{9} MA_A_RAS# RAS D35
130 MA_DATA36
D36 MA_DATA37
{9} M_CKE0 73 CKE0 D37 132
74 140 MA_DATA38
{9} M_CKE1 CKE1 D38 MA_DATA39
D39 142
101 147 MA_DATA40
{9} M_CLK_DDR0 CK0 D40 MA_DATA41
{9} M_CLK_DDR#0 103 CK0 D41 149
102 157 MA_DATA42
{9} M_CLK_DDR1 CK1 D42 MA_DATA43
{9} M_CLK_DDR#1 104 CK1 D43 159
146 MA_DATA44
D44 MA_DATA45
{9} M_ODT0 116 ODT0 D45 148
120 158 MA_DATA46
{9} M_ODT1 ODT1 D46
160 MA_DATA47
MA_DQS0 D47 MA_DATA48
12 DQS0 D48 163
MA_DQS1 29 165 MA_DATA49
MA_DQS2 DQS1 D49 MA_DATA50
47 DQS2 D50 175
137 DQS4 D52 164
{9} MA_DQS[7:0] 171 DQS6 D54 174
DQS7 D55 MA_DATA56
D56 181
200 183 MA_DATA57
{6,15,23,40,41} SMB_DATA_S SDA D57 MA_DATA58
{6,15,23,40,41} SMB_CLK_S 202 SCL D58 191
193 MA_DATA59
R65 10K R0402 D59 MA_DATA60
197 SA0 D60 180
+V3.3S R64 10K R0402 201 182 MA_DATA61
SA1 D61 MA_DATA62
D62 192
199 194 MA_DATA63
VDDSPD D63
VREFA_DDR3R54 0 1 10 MA_DQS#0
0.1UF/25V,Y5V C41 VREFA_CA VREF_DQ DQS#0 MA_DQS#1
126 VREF_CA DQS#1 27
C42 45 MA_DQS#2
C50 DQS#2 MA_DQS#3
198 EVENT# DQS#3 62
C0402 2.2UF/10V,X7R C52 2.2UF/10V,X7R 30 135 MA_DQS#4
C0805 0.1UF/25V,Y5V RESET# DQS#4 MA_DQS#5
DQS#5 152
C0402 C0805 77 169 MA_DQS#6
B NC1 DQS#6 MA_DQS#7 B
122 NC2 DQS#7 186
125 MA_DQS#[7:0] {9}
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
NCTEST
GND1
GND2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
close to DDR pin
DDR3_SODIMM204_0
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
205
206
{8} DIM_EXTTS#0
{8,15} DDR3_DRAMRST#
+V1.5 +V1.5
R52 R435
1K,1% 1K,1%
R0402 R0402
VREFA_DDR3 VREFA_CA
VREFA_DDR3 {13}
R53 R436 C327

1K,1% 1K,1% C328 2.2UF/10V,X7R
R0402 R04020.1UF/25V,Y5V
C0402 C0805
A A
TOPSTAR TECHNOLOGY
bent
Page Name DDR3 SODIMM0
C C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3GPU {20,21,33,34,52,57}
+VGA_CORE {52}
+V1.05GPU {18,19,20,57}
+V3.3GPU +V3.3GPU
D D
GR41 PM
GR53 10K GR16 0
10K PM +V3.3GPU
PM S_Bot S_Top
S_Top
PCIE_CLKREQ ns GC3
0.1uF/10V,X7R +V1.05GPU
5
GPU_RST# GU2 S_Top GR2 is used for test only, so it Under GPU Near GPU
1 VCC
{43} EC_GPU_RST#
GPU_RST#
can be unstuff for cost saving.
4
2 GC84 GC71 GC73 GC93 GC87
{8,26,38,39,40,41,43,44} BUF_PLT_RST# GND U3A C0805
C0805
ns SN74AHC1G08DBV GR42 0.1uF/10V,X7R C0402 C0402 4.7uF/10V,X5R 10uF/6.3V,X5R
3
SOT23_5 100K AM16 PCI_EXPRESS AK16 1uF/10V,X5R 1uF/10V,X5R
S_Bot PCIE_CLKREQ PEX_RST# PEX_IOVDD_01 S_Top
AR13 PEX_CLKREQ PEX_IOVDD_02 AK17
S_Top PM PM S_Top PM S_Top
PEX_IOVDD_03 AK21 U3F U3G
GR20 200,1% R0402 AJ17 S_Top
PM S_Top
PM +VGA_CORE +VGA_CORE
PEX_TSTCLK_OUT PEX_IOVDD_04 AK24
ns AJ18 AK27 PEX_IOVDD+PEX_IOVDDQ:MAX:2200mA +V1.05GPU
PEX_TSTCLK_OUT# PEX_IOVDD_05 NVVDD
{23} PCIE_CLKREQ GND
GND_096 E15
S_Top
{23} CLK_PCIE_N11M AR16 PEX_REFCLK Under GPU Near GPU AB11 VDD_001 GND_097 E18
{23} CLK_PCIE_N11M# AR17 PEX_REFCLK# PEX_IOVDDQ_1 AG11 AB13 VDD_002 VDD_057 P21 AA11 GND_1 GND_098 E24
PEX_IOVDDQ_2 AG12 AB15 VDD_003 VDD_058 P23 AA12 GND_2 GND_099 E27
AG13 GC69 GC82 GC98 GC65 GC90 GC102 GC91 AB17 P25 AA13 E30
PEG_RXP15 GC149 0.1UF/10V,X7R PEG_NV_TXP15 PEX_IOVDDQ_3 C0805 C0805 C0805 VDD_004 VDD_059 GND_3 GND_100
AL17 PEX_TX0 PEX_IOVDDQ_4 AG15 AB19 VDD_005 VDD_060 R11 AA14 GND_4 GND_101 E6
PEG_RXN15 GC150 0.1UF/10V,X7R PEG_NV_TXN15 AM17 AG16 0.1uF/10V,X7R 0.1uF/10V,X7R C0402 C0402 4.7uF/10V,X5R 4.7uF/10V,X5R10uF/6.3V,X5R AB21 R12 AA15 E9
S_Bot PEX_TX0# PEX_IOVDDQ_5 1uF/10V,X5R 1uF/10V,X5R VDD_006 VDD_061 GND_5 GND_102
PM PEX_IOVDDQ_6 AG17 AB23 VDD_007 VDD_062 R13 AA16 GND_6 GND_103 F2
PEG_NV_RXP15 S_Bot PM AP17 AG18 S_Top S_Top AB25 R14 AA17 F31
{7} PEG_NV_RXP[15:0] PEX_RX0 PEX_IOVDDQ_7 VDD_008 VDD_063 GND_7 GND_104
PEG_NV_RXN15 AN17 AG22 PM PM PM S_Top PM S_Top PM S_Top AC11 R15 AA18 F34
PEX_RX0# PEX_IOVDDQ_8 S_Top
PM S_Top
PM VDD_009 VDD_064 GND_8 GND_105
{7} PEG_NV_RXN[15:0] PEX_IOVDDQ_9 AG23 AC12 VDD_010 VDD_065 R16 AA19 GND_9 GND_106 F5
PEG_RXP14 GC97 0.1UF/10V,X7R PEG_NV_TXP14 AM18 AG24 AC13 R17 AA2 J2
PEG_RXN14 GC100 0.1UF/10V,X7R PEG_NV_TXN14 PEX_TX1 PEX_IOVDDQ_10 VDD_011 VDD_066 GND_10 GND_107
AM19 PEX_TX1# AC14 VDD_012 VDD_067 R18 AA20 GND_11 GND_108 J31
S_Top PM AC15 R19 AA21 J34
{7} PEG_RXP[15:0] S_Top VDD_013 VDD_068 GND_12 GND_109
PEG_NV_RXP14 PM AN19 AC16 R20 AA22 J5
PEG_NV_RXN14 PEX_RX1 VDD_014 VDD_069 GND_13 GND_110
AP19 PEX_RX1# AC17 VDD_015 VDD_070 R21 AA23 GND_14 GND_111 L9
AG25 +VGA_CORE AC18 R22 AA24 M11
{7} PEG_RXN[15:0] PEX_IOVDDQ_11 VDD_016 VDD_071 GND_15 GND_112
PEG_RXP13 GC152 0.1UF/10V,X7R PEG_NV_TXP13 AL19 AG26 AC19 R23 AA25 M13
AK19 PEX_TX2# PEX_IOVDDQ_13 AJ14 MAX:19.6A Under GPU Near GPU AC20 VDD_018 VDD_073 R24 AA34 GND_17 GND_114 M15
S_Bot PM AJ15 AC21 R25 AA5 M17
PEG_NV_RXP13 S_Bot PEX_IOVDDQ_14 VDD_019 VDD_074 GND_18 GND_115
PM AR19 PEX_RX2 PEX_IOVDDQ_15 AJ19 AC22 VDD_020 VDD_075 T12 AB12 GND_19 GND_116 M19
PEG_NV_RXN13 AR20 AJ21 AC23 T14 AB14 M2
PEX_RX2# PEX_IOVDDQ_16 GC26 GC35 GC66 GC39 GC50 GC31 VDD_021 VDD_076 GND_20 GND_117
PEX_IOVDDQ_17 AJ22 AC24 VDD_022 VDD_077 T16 AB16 GND_21 GND_118 M21
PEG_RXP12 GC104 0.1UF/10V,X7R PEG_NV_TXP12 AL20 AJ24 C0402 C0805 AC25 T18 AB18 M23
PEG_RXN12 GC105 0.1UF/10V,X7R PEG_NV_TXN12 PEX_TX3 PEX_IOVDDQ_18 0.047uF/16V,X7R 0.22uF/10V,X7R C0603 1uF/10V,X5R 4.7uF/10V,X5R VDD_023 VDD_078 GND_22 GND_119
AM20 PEX_TX3# PEX_IOVDDQ_19 AJ25 AD12 VDD_024 VDD_079 T20 AB20 GND_23 GND_120 M25
S_Top PM AJ27 0.047uF/16V,X7R 0.22uF/10V,X7R AD14 T22 AB22 M31
PEG_NV_RXP12 S_Top PEX_IOVDDQ_20 S_Top S_Top S_Top VDD_025 VDD_080 GND_24 GND_121
PM AP20 PEX_RX3 PEX_IOVDDQ_21 AK18 AD16 VDD_026 VDD_081 T24 AB24 GND_25 GND_122 M34
PEG_NV_RXN12 AN20 AK20 PM PM PM PM S_Top AD18 V11 AC9 M5
PEX_RX3# PEX_IOVDDQ_22 S_TopPM S_TopPM VDD_027 VDD_082 GND_26 GND_123
PEX_IOVDDQ_23 AK23 AD22 VDD_028 VDD_083 V13 AD11 GND_27 GND_124 N11
C PEG_RXP11 GC156 0.1UF/10V,X7R PEG_NV_TXP11 AM21 AK26 AD24 V15 AD13 N12 C
AM22 PEX_TX4# PEX_IOVDDQ_25 AL16 L11 VDD_030 VDD_085 V17 AD15 GND_29 GND_126 N13
S_Bot PM L12 V19 AD17 N14
PEG_NV_RXP11 S_Bot GC78 GC56 GC51 GC62 GC60 VDD_031 VDD_086 GND_30 GND_127
PM AN22 PEX_RX4 L13 VDD_032 VDD_087 V21 AD2 GND_31 GND_128 N15
PEG_NV_RXN11 AP22 C0402 L14 V23 AD21 N16
PEX_RX4# 0.047uF/16V,X7R C0402 C0402 0.022uF/16V,X7R VDD_033 VDD_088 GND_32 GND_129
L15 VDD_034 VDD_089 V25 AD23 GND_33 GND_130 N17
PEG_RXP10 GC108 0.1UF/10V,X7R PEG_NV_TXP10 AL22 0.022uF/16V,X7R 0.022uF/16V,X7R
0.022uF/16V,X7R L16 W11 AD25 N18
PEG_RXN10 GC110 0.1UF/10V,X7R PEG_NV_TXN10 PEX_TX5 S_Top S_Top VDD_035 VDD_090 GND_34 GND_131
AK22 PEX_TX5# L17 VDD_036 VDD_091 W12 AD31 GND_35 GND_132 N19
S_Top PM PM PM L18 W13 AD34 N20
PEG_NV_RXP10 S_Top S_TopPM PMS_Top PMS_Top VDD_037 VDD_092 GND_36 GND_133
PM AR22 PEX_RX5 L19 VDD_038 VDD_093 W14 AD5 GND_37 GND_134 N21
PEG_NV_RXN10 AR23 L20 W15 AE11 N22
PEX_RX5# VDD_039 VDD_094 GND_38 GND_135
L21 VDD_040 VDD_095 W16 AE12 GND_39 GND_136 N23
PEG_RXP9 GC161 0.1UF/10V,X7R PEG_NV_TXP9 AL23 L22 W17 AE13 N24
PEG_RXN9 GC160 0.1UF/10V,X7R PEG_NV_TXN9 PEX_TX6 GC75 GC70 GC59 GC49 VDD_041 VDD_096 GND_40 GND_137
AM23 PEX_TX6# L23 VDD_042 VDD_097 W18 AE14 GND_41 GND_138 N25
S_Bot PM A2 L24 W19 AE15 P12
PEG_NV_RXP9 S_Bot NC_1 C0402 0.01uF/25V,X7R C0402 0.01uF/25V,X7R VDD_043 VDD_098 GND_42 GND_139
PM AP23 PEX_RX6 NC_2 AA4 L25 VDD_044 VDD_099 W20 AE16 GND_43 GND_140 P14
PEG_NV_RXN9 AN23 AB4 0.01uF/25V,X7R 0.01uF/25V,X7R M12 W21 AE17 P16
PEX_RX6# NC_3 S_Top S_Top VDD_045 VDD_100 GND_44 GND_141
NC_4 AB7 M14 VDD_046 VDD_101 W22 AE18 GND_45 GND_142 P18
PEG_RXP8 GC113 0.1UF/10V,X7R PEG_NV_TXP8 AM24 AC5 PM PM M16 W23 AE19 P20
PEG_RXN8 GC116 0.1UF/10V,X7R PEG_NV_TXN8 PEX_TX7 NC_5 S_TopPM S_TopPM VDD_047 VDD_102 GND_46 GND_143
AM25 PEX_TX7# NC_6 AD6 M18 VDD_048 VDD_103 W24 AE20 GND_47 GND_144 P22
S_Top PM AF6 M20 W25 AE21 P24
PEG_NV_RXP8 S_Top NC_7 GC64 GC72 GC55 VDD_049 VDD_104 GND_48 GND_145
PM AN25 PEX_RX7 NC_8 AG6 M22 VDD_050 VDD_105 Y12 AE22 GND_49 GND_146 R2
PEG_NV_RXN8 AP25 AJ5 M24 Y14 AE23 R31
PEX_RX7# NC_9 C0402 4700pF/25V,X7R C0402 VDD_051 VDD_106 GND_50 GND_147
NC_10 AK15 P11 VDD_052 VDD_107 Y16 AE24 GND_51 GND_148 R34
PEG_RXP7 GC165 0.1UF/10V,X7R PEG_NV_TXP7 AL25 AL7 0.01uF/25V,X7R 4700pF/25V,X7R P13 Y18 AE25 R5
PEG_RXN7 GC166 0.1UF/10V,X7R PEG_NV_TXN7 PEX_TX8 NC_11 S_Top VDD_053 VDD_108 GND_52 GND_149
AK25 PEX_TX8# NC_14 E7 P15 VDD_054 VDD_109 Y20 AG2 GND_53 GND_150 T11
S_Bot PM H32 PM P17 Y22 AG31 T13
PEG_NV_RXP7 S_Bot NC_16 S_TopPM PMS_Top VDD_055 VDD_110 GND_54 GND_151
PM AR25 PEX_RX8 NC_17 M7 P19 VDD_056 VDD_111 Y24 AG34 GND_55 GND_152 T15
PEG_NV_RXN7 AR26 P6 AG5 T17
PEX_RX8# NC_18 GND_56 GND_153
NC_21 U7 AK2 GND_57 GND_154 T19
PEG_RXP6 GC119 0.1UF/10V,X7R PEG_NV_TXP6 AL26 V6 +V3.3GPU AK31 T21
PEG_RXN6 GC120 0.1UF/10V,X7R PEG_NV_TXN6 PEX_TX9 NC_22 GND_58 GND_155
S_Top
AM26 PEX_TX9# NC_23 Y4 MAX:120mA Under GPU Near GPU NB10_G128 AK34 GND_59 GND_156 T23
PM AK5 GND_60 GND_157 T25
PEG_NV_RXP6 S_Top PM AP26 S_Bot AL12 U11
PEG_NV_RXN6 PEX_RX9 GC32 GC23 GC11 GND_61 GND_158
AN26 PEX_RX9# PM AL15 GND_62 GND_159 U12
C0603 C0805 AL18 U13
PEG_RXP5 GC170 0.1UF/10V,X7R PEG_NV_TXP5 0.1uF/10V,X7R 1uF/10V,X7R 4.7uF/10V,X5R GND_63 GND_160
AM27 PEX_TX10 AL21 GND_64 GND_161 U14
PEG_RXN5 GC171 0.1UF/10V,X7R PEG_NV_TXN5 AM28 F7 AL24 U15
S_Bot PEX_TX10# PEX_SVDD_3V3_1 S_Top GND_65 GND_162
PM
PEX_SVDD_3V3_2 AG19 AL27 GND_66 GND_163 U16
PEG_NV_RXP5 S_Bot PM AN28 PM PM S_Top PM S_Top AL30 U17
PEG_NV_RXN5 PEX_RX10 GND_67 GND_164
AP28 PEX_RX10# MAX:180mA AL6 GND_68 GND_165 U18
VDD33_1 J10 AL9 GND_69 GND_166 U19
PEG_RXP4 GC124 0.1UF/10V,X7R PEG_NV_TXP4 AL28 J11 AN2 U20
PEG_RXN4 GC125 0.1UF/10V,X7R PEG_NV_TXN4 PEX_TX11 VDD33_2 GC13 GC18 GND_70 GND_167
AK28 PEX_TX11# VDD33_3 J12 AN34 GND_71 GND_168 U21
S_Top PM J13 AP12 U22
PEG_NV_RXP4 S_Top VDD33_4 0.1uF/10V,X7R GND_72 GND_169
PM AR28 PEX_RX11 VDD33_5 J9 AP15 GND_73 GND_170 U23
PEG_NV_RXN4 AR29 0.1uF/10V,X7R AP18 U24
PEX_RX11# S_Top GND_74 GND_171
S46 VerA:Delete some caps AP21 GND_75 GND_172 U25
PEG_RXP3 GC176 0.1UF/10V,X7R PEG_NV_TXP3 AK29 D35 PM S_Top AP24 V12
PEG_RXN3 GC174 0.1UF/10V,X7R PEG_NV_TXN3 PEX_TX12 VDD_SENSE1 PM followed N10M DG 090327 GND_76 GND_173
AL29 PEX_TX12# VDD_SENSE2 P7 AP27 GND_77 GND_174 V14
B S_Bot PM AD20 AP3 V16 B
S_Bot VDD_SENSE3 NVVDD_SENSE {52} GND_78 GND_175
PEG_NV_RXP3 PM AP29 AD19 +V1.05GPU AP30 V18
PEG_NV_RXN3 PEX_RX12 GND_SENSE1 R505 0 R0402 GND_79 GND_176
AN29 PEX_RX12# GND_SENSE2 R7 AP33 GND_80 GND_177 V2
GND_SENSE3 E35 PM AP6 GND_081 GND_178 V20
PEG_RXP2 GC128 0.1UF/10V,X7R PEG_NV_TXP2 AM29 Near GPU GFB1 AP9 V22
PEG_RXN2 GC129 0.1UF/10V,X7R PEG_NV_TXN2 PEX_TX13 S_Bot GND_082 GND_179
AM30 PEX_TX13# 1 2 FB0603 B12 GND_083 GND_180 V24
S_Top 120ohm@100MHz,500mA
PEG_NV_RXP2 S_Top
PM MAX:120mA GC8 GC6 PM
B15 GND_084 GND_181 V31
PM AN31 PEX_RX13 PEX_PLLVDD AG14 B21 GND_085 GND_182 V5
PEG_NV_RXN2 AP31 C0805 B24 V9
PEX_RX13# 1uF/10V,X7R 4.7uF/10V,X5RS_Top GND_086 GND_183
B27 GND_087 GND_184 Y11
PEG_RXP1 GC179 0.1UF/10V,X7R PEG_NV_TXP1 AM31 C0603 B3 Y13
PEG_RXN1 GC180 0.1UF/10V,X7R PEG_NV_TXN1 PEX_TX14 PM GND_088 GND_185
AM32 PEX_TX14# B30 GND_089 GND_186 Y15
S_Bot T16 ns S_Top PMS_Top
PM PEX_CAL_PU_GND/NC AG20 B33 GND_090 GND_187 Y17
PEG_NV_RXP1 S_Bot PM AR31 B6 Y19
PEG_NV_RXN1 PEX_RX14 GR19 2.49K,1% R0402 GND_091 GND_188
AR32 PEX_RX14# PEX_TERMP AG21 B9 GND_092 GND_189 Y21
PM C2 Y23
PEG_RXP0 GC134 0.1UF/10V,X7R PEG_NV_TXP0 GR29 10K R0402S_Top GND_093 GND_190
AN32 PEX_TX15 TESTMODE AP35 +V3.3GPU C34 GND_094 GND_191 Y25
PEG_RXN0 GC133 0.1UF/10V,X7R PEG_NV_TXN0 S_Top
ns
AP32 E12
S_Top PM
PEX_TX15#
S_Top
Layout Notice GND_095
PEG_NV_RXP0 S_Top PM AR34 GR28 10K R0402
PEG_NV_RXN0 PEX_RX15
AP34 PEX_RX15# Under GPU: NB10_G128
PM The total trace length measured from GPU ball to cap is no more than 150 mil
S_Top
NB10_G128 S46 VerA:Add reserved pull up resistor S_Bot
Near GPU: PM
CLOSE S_Bot
on TESTMODE follewed nvidia suggest
The total trace length measured from GPU ball to cap is no more than 750 mil
PM
TO N10
VerA: all PCIE singala lane reversal llh0523
A A
TOPSTAR TECHNOLOGY
bent
Page Name N10M PCIE&PWR&GND
D C46
A
5 4 3 2 1
5 4 3 2 1
+V1.05GPU {17,19,20,57}
+V1.5GPU {19,57}
+V1.5GPU
U3B
MAX:5700mA Under GPU Near GPU
FBAD_0 L32 J23 +V1.5GPU
FBAD_1 FBA_D0 FBVDDQ0 +V1.5GPU
N33 FBA_D1
FPA
FBVDDQ1 J24
FBAD_2 L33 J29
FBAD_3 FBA_D2 FBVDDQ2 GC76 GC53 U11
N34 FBA_D3 FBVDDQ3 AA27 GC74 U26
FBAD_4 N35 AA29 GC68 A1 N3 FBA_A0
FBAD_5 FBA_D4 FBVDDQ4 0.047uF/16V,X7R 0.1uF/10V,X7R 4.7uF/10V,X5R VDDQ0 A0 FBA_A1 FBA_A0
P35 FBA_D5 FBVDDQ5 AA31 C1 VDDQ1 A1 P7 A1 VDDQ0 A0 N3
FBAD_6 P33 AB27 0.01uF/16V,X7R F1 P3 FBA_A2 C1 P7 FBA_A1
FBAD_7 FBA_D6 FBVDDQ6 VDDQ2 A2 FBA_A3 VDDQ1 A1 FBA_A2
P34 FBA_D7 FBVDDQ7 AB29 D2 VDDQ3 A3 N2 F1 VDDQ2 A2 P3
FBAD_8 K35 AC27 PM PM PM PM H2 P8 FBA_A4 D2 N2 FBA_A3
K33 FBA_D9 FBVDDQ9 AD27 A8 VDDQ5 A5 P2 H2 VDDQ4 A4 P8
FBAD_10 K34 AE27 C9 R8 FBA_A6 A8 P2 FBA_A5
H33 FBA_D11 FBVDDQ11 AJ28 E9 VDDQ7 A7 R2 C9 VDDQ6 A6 R8
FBAD_12 G34 B18 H9 T8 FBA_A8 E9 R2 FBA_A7
G33 FBA_D13 FBVDDQ13 E21 A9 R3 H9 VDDQ8 A8 T8
D FBAD_14 E34 G17 N1 L7 FBA_A10 R3 FBA_A9 D
FBAD_15 FBA_D14 FBVDDQ14 VDD1 A10 FBA_A11 A9 FBA_A10
E33 FBA_D15 FBVDDQ15 G18 GC83 R1 VDD2 A11 R7 N1 VDD1 A10 L7
FBAD_16 G31 G22 GC77 GC48 B2 N7 FBA_A12 R1 R7 FBA_A11
FBAD_17 FBA_D16 FBVDDQ16 0.01uF/16V,X7R 0.1uF/10V,X7R VDD3 A12 FBA_A13 VDD2 A11 FBA_A12
F30 FBA_D17 FBVDDQ17 G8 K2 VDD4 A13 T3 B2 VDD3 A12 N7
FBAD_18 G30 G9 0.047uF/16V,X7R G7 T7 K2 T3 FBA_A13
FBAD_19 FBA_D18 FBVDDQ18 VDD5 A14 VDD4 A13
G32 FBA_D19 FBVDDQ19 H29 K8 VDD6 A15/BA3 M7 G7 VDD5 A14 T7
FBAD_20 K30 J14 PM PM PM D9 K8 M7
FBAD_21 FBA_D20 FBVDDQ20 VDD7 VDD6 A15/BA3
K32 FBA_D21 FBVDDQ21 J15 N9 VDD8 D9 VDD7
FBAD_22 H30 J16 R9 K1 FBA_ODT0 N9
FBAD_23 FBA_D22 FBVDDQ22 VDD9 ODT0 VDD8 FBA_ODT0
K31 FBA_D23 FBVDDQ23 J17 ODT1 J1 R9 VDD9 ODT0 K1
FBAD_24 L31 J20 +V1.5GPU J1
FBAD_25 FBA_D24 FBVDDQ24 FBA_CS0# ODT1
L30 FBA_D25 FBVDDQ25 J21 B1 VSSQ0 CS0# L2
FBAD_26 M32 J22 D1 L1 B1 L2 FBA_CS0#
FBAD_27 FBA_D26 FBVDDQ26 VSSQ1 CS1# VSSQ0 CS0#
N30 FBA_D27 G1 VSSQ2 D1 VSSQ1 CS1# L1
FBAD_28 M30 E2 M2 FBA_BA0 FBB_CKE G1
FBAD_29 FBA_D28 VSSQ3 BA0 FBA_BA1 PM VSSQ2 FBA_BA0
P31 FBA_D29 D8 VSSQ4 BA1 N8 E2 VSSQ3 BA0 M2
FBAD_30 R32 E8 M3 FBA_BA2 FBA_CKE GR46 D8 N8 FBA_BA1
FBAD_31 FBA_D30 VSSQ5 BA2 FBA_RST 1K,1% VSSQ4 BA1 FBA_BA2
R30 FBA_D31 B9 VSSQ6 E8 VSSQ5 BA2 M3
FBAD_32 AG30 V32 FBA_A4 F9 T2 FBA_RST B9
FBAD_33 FBA_D32 FBA_CMD0 FBA_RAS# VSSQ7 RESET# VSSQ6 FBA_RST
AG32 FBA_D33 FBA_CMD1 W31 G9 VSSQ8 F9 VSSQ7 RESET# T2
FBAD_34 AH31 U31 FBA_A5 J3 FBA_RAS# GR38 GR31 GR33 G9
FBAD_35 FBA_D34 FBA_CMD2 FBA_BA1 RAS# FBA_CAS# 10K 10K 10K FBB_VREF2 VSSQ8 FBA_RAS#
AF31 FBA_D35 FBA_CMD3 Y32 E1 VSS0 CAS# K3 RAS# J3
FBAD_36 AF30 AB35 FBB_A2 M1 L3 FBA_WE# E1 K3 FBA_CAS#
FBAD_37 FBA_D36 FBA_CMD4 FBB_A4 VSS1 WE# PM PM PM GC163 VSS0 CAS# FBA_WE#
AE30 FBA_D37 FBA_CMD5 AB34 P1 VSS2 M1 VSS1 WE# L3
FBAD_38 AC32 W35 FBB_A3 T1 D3 FBADQM_0 GR47 0.01uF/16V,X7R P1
FBAD_39 FBA_D38 FBA_CMD6 FBB_CKE VSS3 DMU FBADQM_3 1K,1% VSS2 FBADQM_1
AD30 FBA_D39 FBA_CMD7 W33 J2 VSS4 DML E7 T1 VSS3 DMU D3
FBAD_40 AN33 W30 FBB_CS# B3 J2 E7 FBADQM_2
FBAD_41 FBA_D40 FBA_CMD8 FBA_A11 VSS5 FBA_CLK0 PM PM VSS4 DML
AL31 FBA_D41 FBA_CMD9 T34 G8 VSS6 CK J7 B3 VSS5
FBAD_42 AM33 T35 FBA_CAS# J8 K7 FBA_CLK0# G8 J7 FBA_CLK0
FBAD_43 FBA_D42 FBA_CMD10 FBA_WE# VSS7 CK# VSS6 CK FBA_CLK0#
AL33 FBA_D43 FBA_CMD11 AB31 A9 VSS8 J8 VSS7 CK# K7
FBAD_44 AK30 Y30 FBA_BA0 M9 K9 FBA_CKE +V1.5GPU A9
FBAD_45 FBA_D44 FBA_CMD12 FBB_A5 VSS9 CKE0 VSS8 FBA_CKE
AK32 FBA_D45 FBA_CMD13 Y34 P9 VSS10 CKE1 J9 M9 VSS9 CKE0 K9
FBAD_46 AJ30 W32 FBA_A12 T9 P9 J9
FBAD_47 FBA_D46 FBA_CMD14 FBA_RST VSS11 VSS10 CKE1
AH30 FBA_D47 FBA_CMD15 AA30 T9 VSS11
FBAD_48 AH33 AA32 FBA_A7 FBB_VREF1 H1 L8
FBAD_49 FBA_D48 FBA_CMD16 FBA_A10 VREFDQ ZQ0 GR26 FBB_VREF2
AH35 FBA_D49 FBA_CMD17 Y33 M8 VREFCA ZQ1 L9 H1 VREFDQ ZQ0 L8
FBAD_50 AH34 U32 FBA_CKE 1K,1% M8 L9
FBAD_51 FBA_D50 FBA_CMD18 FBA_A0 VREFCA ZQ1
AH32 FBA_D51 FBA_CMD19 Y31
FBAD_52 AJ33 U34 FBA_A9 FBAD_6 D7 E3 FBAD_25 GR48 PM
FBAD_53 FBA_D52 FBA_CMD20 FBA_A6 FBAD_1 DQU0 DQL0 FBAD_27 243,1% FBAD_13 FBAD_23 GR27
AL35 FBA_D53 FBA_CMD21 Y35 C3 DQU1 DQL1 F7 D7 DQU0 DQL0 E3
FBAD_54 AM34 W34 FBA_A2 FBAD_7 C8 F2 FBAD_28 FBB_VREF1 FBAD_11 C3 F7 FBAD_19 243,1%
FBAD_55 FBA_D54 FBA_CMD22 FBA_A8 FBAD_4 DQU2 DQL2 FBAD_29 PM FBAD_14 DQU1 DQL1 FBAD_20
AM35 FBA_D55 FBA_CMD23 V30 C2 DQU3 DQL3 F8 C8 DQU2 DQL2 F2
FBAD_56 AF33 U35 FBA_A3 FBAD_3 A7 H3 FBAD_26 GC89 FBAD_8 C2 F8 FBAD_16 PM
FBAD_57 FBA_D56 FBA_CMD24 FBA_A1 FBAD_0 DQU4 DQL4 FBAD_30 GR25 0.01uF/16V,X7R FBAD_12 DQU3 DQL3 FBAD_22
AE32 FBA_D57 FBA_CMD25 U30 A2 DQU5 DQL5 H8 A7 DQU4 DQL4 H3
FBAD_58 AF34 U33 FBA_A13 FBAD_5 B8 G2 FBAD_24 1K,1% FBAD_10 A2 H8 FBAD_17
FBAD_59 FBA_D58 FBA_CMD26 FBA_BA2 FBAD_2 DQU6 DQL6 FBAD_31 待确定 FBAD_15 DQU5 DQL5 FBAD_21
AE35 FBA_D59 FBA_CMD27 AB30 A3 DQU7 DQL7 H7 B8 DQU6 DQL6 G2
FBAD_60 AE34 AB33 FBB_ODT0 FBADQS_0# B7 G3 FBADQS_3# PM PM FBAD_9 A3 H7 FBAD_18 待确定
FBAD_61 FBA_D60 FBA_CMD28 FBA_CS0# FBADQS_0 DQSU# DQSL# FBADQS_3 FBADQS_1# DQU7 DQL7 FBADQS_2#
AE33 FBA_D61 FBA_CMD29/NC T33 C7 DQSU DQSL F3 B7 DQSU# DQSL# G3
FBAD_62 AB32 W29 FBA_ODT0 FBADQS_1 C7 F3 FBADQS_2
FBAD_63 FBA_D62 FBA_CMD30/NC DQSU DQSL
AC35 FBA_D63
C C
DDR3
DDR3
FBADQM_0 P32
FBADQM_1 FBA_DQM0 FBA_CLK0
H34 FBA_DQM1 FBA_CLK0 T32 PM
FBADQM_2 J30 T31 FBA_CLK0# PM
FBADQM_3 FBA_DQM2 FBA_CLK0# +V1.5GPU
P30 FBA_DQM3 FBA_CLK1 AC31 FBA_CLK1
FBADQM_4 AF32 AC30 FBA_CLK1#
FBADQM_5 FBA_DQM4 FBA_CLK1# +V1.5GPU
AL32 FBA_DQM5 U29
FBADQM_6 AL34
FBADQM_7 FBA_DQM6 FBA_A0
AF35 FBA_DQM7 A1 VDDQ0 A0 N3 U13
C1 P7 FBA_A1
VDDQ1 A1 FBB_A2 FBA_A0
F1 VDDQ2 A2 P3 A1 VDDQ0 A0 N3
FBADQS_0 L34 D2 N2 FBB_A3 C1 P7 FBA_A1
FBADQS_1 FBA_DQS_WP0 VDDQ3 A3 FBB_A4 VDDQ1 A1 FBB_A2
H35 FBA_DQS_WP1 H2 VDDQ4 A4 P8 F1 VDDQ2 A2 P3
FBADQS_2 J32 T30 T17 ns A8 P2 FBB_A5 D2 N2 FBB_A3
FBADQS_3 FBA_DQS_WP2 FBA_DEBUG VDDQ5 A5 FBA_A6 VDDQ3 A3 FBB_A4
N31 FBA_DQS_WP3 C9 VDDQ6 A6 R8 H2 VDDQ4 A4 P8
FBADQS_4 AE31 E9 R2 FBA_A7 A8 P2 FBB_A5
FBADQS_5 FBA_DQS_WP4 +V1.05GPU VDDQ7 A7 FBA_A8 VDDQ5 A5 FBA_A6
AJ32 FBA_DQS_WP5 H9 VDDQ8 A8 T8 C9 VDDQ6 A6 R8
FBADQS_6 AJ34 GFB8 R3 FBA_A9 E9 R2 FBA_A7
FBADQS_7 FBA_DQS_WP6 120ohm@100MHz,500mA A9 FBA_A10 VDDQ7 A7 FBA_A8
AC33 FBA_DQS_WP7 MAX:100mA Near GPU N1 VDD1 A10 L7 H9 VDDQ8 A8 T8
1 2 R1 R7 FBA_A11 +V1.5GPU +V1.5GPU R3 FBA_A9
FB0603 VDD2 A11 FBA_A12 A9 FBA_A10
B2 VDD3 A12 N7 N1 VDD1 A10 L7
FBADQS_0# L35 GC85 GC86 K2 T3 FBA_A13 R1 R7 FBA_A11
FBADQS_1# G35 FBA_DQS_RN0 PM VDD4 A13 VDD2 A11 FBA_A12
FBA_DQS_RN1 G7 VDD5 A14 T7 B2 VDD3 A12 N7
FBADQS_2# H31 1uF/10V,X5R 4.7uF/10V,X5R K8 M7 K2 T3 FBA_A13
FBADQS_3# N32 FBA_DQS_RN2 C0805 VDD6 A15/BA3 VDD4 A13
FBA_DQS_RN3 FB_DLLAVDD0 AG27 D9 VDD7 G7 VDD5 A14 T7
FBADQS_4# AD32 N9 GR51 GR34 K8 M7
FBADQS_5# AJ31 FBA_DQS_RN4 PM VDD8 FBB_ODT0 PM 1K,1% 1K,1% VDD6 A15/BA3
FBA_DQS_RN5 FB_PLLAVDD0 AF27 R9 VDD9 ODT0 K1 D9 VDD7
FBADQS_6# AJ35 PM J1 N9
FBADQS_7# AC34 FBA_DQS_RN6 ODT1 PM VDD8 FBB_ODT0
FBA_DQS_RN7 R9 VDD9 ODT0 K1
B1 L2 FBB_CS# J1
VSSQ0 CS0# FBB_VREF3 FBB_VREF4 ODT1
P29 FBA_WDS0/NC D1 VSSQ1 CS1# L1
+V1.5GPU R29 G1 B1 L2 FBB_CS#
FBA_WDS0#/NC VSSQ2 FBA_BA0 GC188 GC136 VSSQ0 CS0#
L29 FBA_WDS1/NC E2 VSSQ3 BA0 M2 D1 VSSQ1 CS1# L1
M29 D8 N8 FBA_BA1 GR50 0.01uF/16V,X7R GR36 0.01uF/16V,X7R G1
FBA_WDS1#/NC VSSQ4 BA1 FBA_BA2 1K,1% 1K,1% VSSQ2 FBA_BA0
AG29 FBA_WDS2/NC E8 VSSQ5 BA2 M3 E2 VSSQ3 BA0 M2
AH29 B9 PM D8 N8 FBA_BA1
GR11 FBA_WDS2#/NC VSSQ6 FBA_RST PM PM PM VSSQ4 BA1 FBA_BA2
AD29 FBA_WDS3/NC F9 VSSQ7 RESET# T2 E8 VSSQ5 BA2 M3
1K,1% AE29 G9 B9
ns FBA_WDS3#/NC VSSQ8 FBA_RAS# VSSQ6 FBA_RST
RAS# J3 F9 VSSQ7 RESET# T2
E1 K3 FBA_CAS# G9
VSS0 CAS# FBA_WE# VSSQ8 FBA_RAS#
J27 FB_VREF M1 VSS1 WE# L3 RAS# J3
P1 E1 K3 FBA_CAS#
VSS2 FBADQM_7 VSS0 CAS# FBA_WE#
NB10_G128 T1 VSS3 DMU D3 M1 VSS1 WE# L3
J2 E7 FBADQM_4 P1
GR8 GC44 VSS4 DML VSS2 FBADQM_6
B3 VSS5 T1 VSS3 DMU D3
2.49K,1% 0.01uF/16V,X7R PM G8 J7 FBA_CLK1 J2 E7 FBADQM_5
ns ns VSS6 CK FBA_CLK1# VSS4 DML
J8 VSS7 CK# K7 B3 VSS5
A9 G8 J7 FBA_CLK1
+V1.5GPU VSS8 FBB_CKE VSS6 CK FBA_CLK1#
M9 VSS9 CKE0 K9 J8 VSS7 CK# K7
B P9 J9 A9 B
VSS10 CKE1 VSS8 FBB_CKE
T9 VSS11 M9 VSS9 CKE0 K9
P9 VSS10 CKE1 J9
H1 VREFDQ ZQ0 L8 T9 VSS11
FBB_VREF3 M8 L9
GC80 GC139 GC135 GC81 GC190 GC182 GC79 VREFCA ZQ1
H1 VREFDQ ZQ0 L8
C0603 C0603 C0805 FBB_VREF4 M8 L9
0.1uF/10V,X7R 0.1uF/10V,X7R 0.01uF/16V,X7R 0.1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R 4.7uF/10V,X5R FBAD_60 FBAD_32 GR39 VREFCA ZQ1
D7 DQU0 DQL0 E3
FBAD_59 C3 F7 FBAD_36 243,1%
FBAD_61 DQU1 DQL1 FBAD_33 FBAD_48 FBAD_47 GR49
C8 DQU2 DQL2 F2 D7 DQU0 DQL0 E3
PM PM PM PM PM PM PM FBAD_56 C2 F8 FBAD_37 FBAD_52 C3 F7 FBAD_43 243,1%
+V1.5GPU FBAD_63 DQU3 DQL3 FBAD_35 FBAD_50 DQU1 DQL1 FBAD_46
A7 DQU4 DQL4 H3 C8 DQU2 DQL2 F2
FBAD_58 A2 H8 FBAD_39 FBAD_54 C2 F8 FBAD_41
FBAD_62 DQU5 DQL5 FBAD_34 PM FBAD_51 DQU3 DQL3 FBAD_45 PM
B8 DQU6 DQL6 G2 A7 DQU4 DQL4 H3
FBAD_57 A3 H7 FBAD_38 待确定 FBAD_55 A2 H8 FBAD_42
GC189 GC92 GC168 GC88 GC144 GC140 GC131 FBADQS_7# DQU7 DQL7 FBADQS_4# FBAD_49 DQU5 DQL5 FBAD_44
B7 DQSU# DQSL# G3 B8 DQU6 DQL6 G2
C0603 C0603 C0805 FBADQS_7 C7 F3 FBADQS_4 FBAD_53 A3 H7 FBAD_40 待确定
0.1uF/10V,X7R 0.1uF/10V,X7R 0.01uF/16V,X7R 0.1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R 4.7uF/10V,X5R DQSU DQSL FBADQS_6# DQU7 DQL7 FBADQS_5#
B7 DQSU# DQSL# G3
FBADQS_6 C7 F3 FBADQS_5
DQSU DQSL
DDR3
PM PM PM PM PM PM PM
DDR3
PM
+V1.5GPU
PM
GC115 GC147 GC151 GC148 GC175 GC122 GC99

0.1uF/10V,X7R 0.1uF/10V,X7R 0.01uF/16V,X7R 0.1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R 4.7uF/10V,X5R
C0603 C0603 C0805
PM PM PM PM
FBA_ODT0 FBB_ODT0 PM PM PM
GR30 GR37
10K 10K +V1.5GPU
PM PM
FBA_CLK0 GC138 GC142 GC141 GC187 GC186 GC137 GC95

A + 150UF/2.5V GC114 A
FBA_CLK1 CT7343_28 0.1uF/10V,X7R 0.1uF/10V,X7R 0.01uF/16V,X7R 0.1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R 4.7uF/10V,X5R
ns C0603 C0603 C0805
R558
243,1% R616 PM PM PM PM
243,1% PM PM PM
PM
PM
FBA_CLK1#
FBA_CLK0#
TOPSTAR TECHNOLOGY
bent
Page Name N10M memory1
D C46
A
5 4 3 2 1
5 4 3 2 1
+V1.5GPU
U3C
+V1.05GPU {17,18,20,57}
B13 FBC_D0 Under GPU Near GPU
D13 FBC_D1 FBVDDQ27 N27 +V1.5GPU {18,57}
A13 FBC_D2
FPC
FBVDDQ28 P27
A14 FBC_D3 FBVDDQ29 R27
C16 T27 GC109 GC57
FBC_D4 FBVDDQ30 GC45 GC38
B16 FBC_D5 FBVDDQ31 U27
A17 U29 0.01uF/25V,X7R 0.047uF/16V,X7R 0.1uF/10V,X7R 4.7uF/10V,X5R
FBC_D6 FBVDDQ32
D16 FBC_D7 FBVDDQ33 V27
C13 V29 S_Top S_Top S_Top S_Top
FBC_D8 FBVDDQ34 PM PM PM PM
B11 FBC_D9 FBVDDQ35 V34
D C11 FBC_D10 FBVDDQ36 W27 D
A11 FBC_D11 FBVDDQ37 Y27
C10 FBC_D12
C8 FBC_D13
B8 FBC_D14
A8 FBC_D15
E8 FBC_D16
F8 GC16 GC28 GC143 GC22
FBC_D17 0.01uF/25V,X7R 0.047uF/16V,X7R 0.1uF/10V,X7R 4.7uF/10V,X5R
F10 FBC_D18
F9 FBC_D19
F12 S_Top S_Top S_Top S_Top
FBC_D20 PM PM PM PM
D8 FBC_D21
D11 FBC_D22
E11 FBC_D23
D12 FBC_D24 FBC_CMD0 C17
E13 FBC_D25 FBC_CMD1 B19
F13 FBC_D26 FBC_CMD2 D18
F14 FBC_D27 FBC_CMD3 F21
F15 FBC_D28 FBC_CMD4 A23
E16 FBC_D29 FBC_CMD5 D21
F16 FBC_D30 FBC_CMD6 B23
F17 FBC_D31 FBC_CMD7 E20
D29 FBC_D32 FBC_CMD8 G21
E28 FBC_D35 FBC_CMD11 F23
D26 FBC_D36 FBC_CMD12 A22
F25 FBC_D37 FBC_CMD13 C22
D24 FBC_D38 FBC_CMD14 B17
C E25 F24 C
FBC_D39 FBC_CMD15
E32 FBC_D40 FBC_CMD16 C25
F32 FBC_D41 FBC_CMD17 E22
D33 FBC_D42 FBC_CMD18 C20
E31 FBC_D43 FBC_CMD19 B22
C33 FBC_D44 FBC_CMD20 A19
F29 FBC_D45 FBC_CMD21 D22
D30 FBC_D46 FBC_CMD22 D20
E29 FBC_D47 FBC_CMD23 E19
B29 FBC_D48 FBC_CMD24 D19
C31 FBC_D49 FBC_CMD25 F18
C29 FBC_D50 FBC_CMD26 C19
B31 FBC_D51 FBC_CMD27 F22
C32 FBC_D52 FBC_CMD28 C23
B32 FBC_D53 FBC_CMD29/NC B20
B35 FBC_D54 FBC_CMD30/NC A20
B34 FBC_D55
A29 FBC_D56
B28 FBC_D57
A28 FBC_D58
C28 FBC_D59
C26 FBC_D60
D25 FBC_D61
B25 FBC_D62
A25 FBC_D63
A16 FBC_DQM0 FBC_CLK0 E17

D10 FBC_DQM1 FBC_CLK0# D17
B B
F11 FBC_DQM2 FBC_CLK1 D23
D15 FBC_DQM3 FBC_CLK1# E23
D27 FBC_DQM4
D34 +V1.05GPU
FBC_DQM5 GFB5
A34 FBC_DQM6
D28 120ohm@100MHz,500mA
FBC_DQM7 +V1.5GPU MAX:35mA 1 2
FB0603
C14 GC19 GC25 GC12 S_Top ns
FBC_DQS_WP0
A10 FBC_DQS_WP1 FBC_DEBUG G19 GR6 60.4,1% 0.1uF/10V,X7R C0805
E10 R0402 0.1uF/10V,X7R ns 10UF/6.3V,X5R
FBC_DQS_WP2 ns ns S_Top ns
D14 FBC_DQS_WP3 S_Top S_Top
E26 FBC_DQS_WP4 S_Top
D32 FBC_DQS_WP5
A32 FBC_DQS_WP6 FB_DLLAVDD1 J19
B26 FBC_DQS_WP7 FB_PLLAVDD1 J18
B14 FBC_DQS_RN0
B10 +V1.5GPU
FBC_DQS_RN1
D9 FBC_DQS_RN2
E14 PM Place close to balls
FBC_DQS_RN3
F26 FBC_DQS_RN4 FBCAL_PD_VDDQ K27 GR13 40.2,1%
D31 R0402
FBC_DQS_RN5 PM
A31 FBC_DQS_RN6 S_Top
A26 FBC_DQS_RN7 FBCAL_PU_GND L27 GR14 40.2,1%
R0402
PM
S_Top 40.2 in DG
A G14 FBC_WDS0/NC FBCAL_TERM_GND M27 GR15 40.2,1% A
G15 R0402 TOPSTAR TECHNOLOGY
FBC_WDS0#/NC
G11 FBC_WDS1/NC S_Top bent
G12 FBC_WDS1#/NC
G27 Page Name N10M memory2
FBC_WDS2/NC
G28 FBC_WDS2#/NC
G24 Size Project Name Rev
FBC_WDS3/NC A3 C46
G25 FBC_WDS3#/NC A
NB10_G128 PROPERTY NOTE: this document contains information confidential and property to
S_Bot to others or used for any purpose other than that for which it was obtained without
PM the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3GPU {17,21,33,34,52,57}
+V1.05GPU {17,18,19,57}
+V1.8GPU {57}
+V3.3GPU
ADD 1K pull low by bent 091022

R42 R41 R44
4.99K,1% 15K,1% 2.2K GU1
R0402 R0402 R0402 +V3.3GPU
ns ns ROM_SI_GPU ROM_SO_GPU U3D
5 D Q 2
S_Top S_Top S_Top
1K is not-stuffed in DG V02
D ROM_SI_GPU ROM_SCLK_GPU 6 AK9 IFPAB_PLLVDD D
C IFPAB_PLLVDD R191 1K,1%
IFPAB_RSET AJ11 MAX:220 mA
ROM_SCLK_GPU GR1 10K ROM_CS#_GPU 1 R0402 IFPAB_PLLVDD 1 2 +V1.05GPU
S ns T52 IFPAB_IOVDD PM GFB7
J26 NC_19 IFPA_IOVDD AG9
ROM_SO_GPU S_Top +V3.3GPU ns T50 S_Top PM FB0603
PM 7 HOLD J25 NC_20 IFPB_IOVDD AG10
GC61 GC40 120ohm@100MHz,500mA
GR2 10K 3 R481 10K R0402 AB5 AM12 PM 1uF/10V,X5R C0805
W S_Bot CEC IFPA_TXC# GPU_LVDS_CLKAM {31} C0402 4.7uF/10V,X5R
IFPA_TXC AM11 GPU_LVDS_CLKAP {31}
R40 R43 R45 S_Top S_Bot S_Top
PM 8 VCC VSS 4 PM
10K,1% 15K,1% 15K,1% S_Bot S_Top
D7 RFU1 IFPA_TXD0# AL8 GPU_LVDS_YAM0 {31}
R0402 R0402 GR3 R137 ns S_Top +V1.8GPU
D6 RFU2 IFPA_TXD0 AM8 GPU_LVDS_YAP0 {31}
PM S_Top 10K PM25LV010A 10K R0402 C7
S_Top
ns S_Top
PM ns GC1 RFU3 MISC PM
B7 RFU4 IFPA_TXD1# AM9 GPU_LVDS_YAM1 {31} MAX:220 mA
S_Top 0.1UF/10V,X7RS_Top A7 AM10 IFPAB_IOVDD 2 1 GFB3
S_Top RFU5 IFPA_TXD1 GPU_LVDS_YAP1 {31}
Rom_SI: -Hynix 32Mx32 (pull-down 15K) PM ns +V3.3GPU IFPAB FB0603
S_Top AL10 PM GC27 PM GC41 PM PM 120ohm@100MHz,500mA GC5
-Samsung 32MX32 (pull-down 20K) PM IFPA_TXD2# GPU_LVDS_YAM2 {31}
GC52 GC15 C0805
IFPA_TXD2 AK10 GPU_LVDS_YAP2 {31}
R157 40.2K,1% N9 0.1uF/10V,X7R 0.1uF/10V,X7R 1uF/10V,X5R C0805 PM 4.7uF/10V,X5R
R0402 MULTI_STRAP_REFO_GND R206 100,1%ns C0402 C0402 C0402 S_Top
4.7uF/10V,X5R
IFPA_TXD3# AL11
C46P change 35K to 15k to support internal R152 40.2K,1% M9 AK11 UnderS_Top
GPU NearS_Top
GPU
MULTI_STRAP_REF1_GND IFPA_TXD3 S_Top
R0402 S_Top S_Top S_Top
VBIOS ROM 091022 BENT PM S_Top
S_Top
IFPB_TXC# AN13
R657 ROM_CS#_GPU C3 AP13
R658 ROM_SI_GPU ROM_CS# IFPB_TXC +V3.3GPU
2.2K D3 ROM_SI
2.2K ROM_SO_GPU C4 AP8
R0402 ROM_SO IFPB_TXD4#
R0402 ROM_SCLK_GPU D4 AN8 MAX:220 mA GFB2
PM ROM_SCLK IFPB_TXD4 IFPCD_PLLVDD
PM 2 1
AN10 120ohm@100MHz,500mA
IFPB_TXD5# FB0603
F6 I2CH_SCL IFPB_TXD5 AP10
GC24 GC20 GC67 GC29 GC7 PM/HDMI
0.1uF/10V,X7R 0.1uF/10V,X7R 0.1uF/10V,X7R 1uF/10V,X5R C0805 S_Top
G6 I2CH_SDA IFPB_TXD6# AR10
+V1.05GPU AR11 C0402 C0402 C0402 C0402 4.7uF/10V,X5R
C IFPB_TXD6 PM/HDMI PM/HDMI PM/HDMI PM/HDMI PM/HDMI C
FB5 120ohm@100MHz,500mA ns T46 R210 100,1%ns S_Top S_Top S_Top S_Top +V1.05GPU
MAX:60+45 mA A5 SPDIF IFPB_TXD7# AP11
S_Top
1 2 PLLVDD AN11 MAX:285 mA
FB0603 IFPB_TXD7 S_Top IFPCD_IOVDD 1 2 GFB6
PM S_Top PM PM PM PM ns T45 FB0603
A4 BUFRST#
GC4 GC10 GC14 GC42 S_Bot GC34 120ohm@100MHz,500mA
C0805 1uF/10V,X5R 0.1UF/10V,X7R 0.1UF/10V,X7R ns T47 C5 AJ9 IFPCD_PLLVDD GC47 GC43 GC54 C0805 PM/HDMI
4.7uF/10V,X5R C0402 RFU IFPC_PLLVDD R503 1K,1% 0.1uF/10V,X7R 0.1uF/10V,X7R 1uF/10V,X5R 4.7uF/10V,X5R
IFPC_RSET AK7
S_Top S_Top S_Bot PM/HDMI C0402 C0402 C0402 PM/HDMI S_Top
IFPC_IOVDD AJ8
Near
S_Top GPU S_Top Under GPU AK14 GND_192 IFPD_IOVDD AK8 IFPCD_IOVDD S_Bot PM/HDMI
S_Top
PM/HDMI
S_Top
PM/HDMI
S_Top S_Top
R145 0 S_Bot
K9 AC6 IFPCD_PLLVDD Under GPU Near GPU
R0402 ns GND_193 IFPD_PLLVDD R484 1K,1%
IFPD_RSET AB6
PM/HDMI
+V1.05GPU S_Top S_Bot
PLLVDD AE9 AN3 R525 33 R0402 PM/HDMI HDMI_DDC_DATA {33}
FB4 120ohm@100MHz,500mA MAX:45mA PLLVDD IFPC_AUX# R526 33 R0402 PM/HDMI
AD9 VID_PLLVDD IFPC_AUX AP2 HDMI_DDC_CLK {33}
1 2 SP_PLLVDD AF9 SP_PLLVDD
S
4
Pn
6
V
e
r
B
:
Dt
H
M
I
_
D
D
C
Cc
_
Kr
L
a
dt
n
Ai
D
Ak
T
s9
i
w
r
o
n
g
l
y
FB0603 S_Bot
S_Top S_Bot
l
i
k
,
s
w
a
p
h
e
m
t
o
o
r
e
c
l
n
0
0
6
2
6
PM GC9 PM GC46 PM AR2 PM/HDMI
C182 0.1uF/10V,X7R IFPC_TXC# {33}
C0805 1uF/10V,X5R XTALOUTBUFF_T12 IFPC_L3# PM/HDMI C180 0.1uF/10V,X7R
D2 XTAL_SSIN IFPC_L3 AP1 IFPC_TXC {33}
33 GR32 PM 4.7uF/10V,X5R C0402 XTAL_PLL S_Top
XTALOUTBUFF_T12
XTALOUTBUFF_T12 +V3.3GPU GC17 27M_nonSSC_GPU B1 AM4 PM/HDMI S_Top
C177 0.1uF/10V,X7R
{6} 27M_SSC S_Top XTAL_IN IFPC_L2# IFPC_TXD2N {33}
Near GPU 0.1UF/10V,X7R AM3 PM/HDMI C167 0.1uF/10V,X7R IFPC_TXD2P {33}
IFPC_L2
1
PM/SSC S_Top S_Top ns IFPCD S_Top

GR40 GFB4 S_Top T43 D1 AM5 PM/HDMI S_Top
C163 0.1uF/10V,X7R
XTAL_OUTBUFF IFPC_L1# IFPC_TXD1N {33}
10K PM 120ohm@100MHz,500mA AL5 PM/HDMI C158 0.1uF/10V,X7R IFPC_TXD1P {33}
T41 ns IFPC_L1 S_Top
FB0603 MAX:120mA B2
2
S_Bot XTAL_OUT PM/HDMI S_Top

C157 0.1uF/10V,X7R
IFPC_L0# AM6 IFPC_TXD0N {33}
S_Top AM7 PM/HDMI C144 0.1uF/10V,X7R IFPC_TXD0P {33}
4.7UF/10V,X5R 1uF/10V,X5R 0.1UF/10V,X7RPM PM GC37 S_Bot IFPC_L0 S_Top
GC21 GC33 GC30 GC58 470pF/25V,X7R S_Bot S_Top
PM C0805 PM C0402 PMS_Top 4700PF/25V,X7R PM AJ12 AN4
S_Top S_Top S_Top
GC63 0.1UF/10V,X7R DACA_VDD IFPD_AUX#
B AK12 DACA_VREF IFPD_AUX AP4 B
S_Top R208
Under GPU S_Top
AK13 DACA_RSET
GR35 33 27M_nonSSC_GPU Near GPU R0402 PM124,1% AR4
{6} 27M_nonSSC IFPD_L3#
R449 33 R0402 G1 AR5
S_Top {34} CRT_DDC_CLK I2CA_SCL IFPD_L3
PM R454 33 R0402 G4 IFPC_TXC# R211 499,1% PM/HDMI
{34} CRT_DDC_DATA S_Top I2CA_SDA
PM AP5 IFPC_TXC R207 499,1% PM/HDMI
IFPD_L2#
3
S_Bot IFPC_TXD0N R203 S_Top
499,1% PM/HDMI
PM IFPD_L2 AN5
GR52 S_Bot DACA IFPC_TXD0P R200 S_Top
499,1% PM/HDMI Q12 +V3.3GPU
{34} CRT_HSYNC AM13 DACA_HSYNC
10K AL13 AN7 IFPC_TXD1N R194 S_Top
499,1% PM/HDMI BSS138
{34} CRT_VSYNC DACA_VSYNC IFPD_L1# S_Top
AP7 IFPC_TXD1P R189 499,1% PM/HDMI SOT23 1 R197
S_Bot IFPD_L1 IFPC_TXD2N R186 S_Top
499,1% PM/HDMI PM/HDMI PM/HDMI 10K
IFPC_TXD2P R184 S_Top
499,1% PM/HDMI S_Top
{34} CRT_RED AM15 AR7
2
DACA_RED IFPD_L0# S_Top S_Top
{34} CRT_GREEN AM14 DACA_GREEN IFPD_L0 AR8
AL14 S_Top
{34} CRT_BLUE DACA_BLUE
ADD pull low by bent 091022 AG7 R490 10K R0402

DACB_VDD
DACB_VREF AK6
DACB_RSET AH7 PM
S_Bot +V3.3GPU
TBD
G3 R459 2.2K R0402
150,1% GR24 CRT_RED DACC I2CB_SCL R457 2.2K R0402
I2CB_SDA G2
PM AM1 PM
S_Top
150,1% GR23 CRT_GREEN DACB_HSYNC S_Bot
DACB_VSYNC AM2 PM
PM S_Bot
DACB_RED AK4
S_Top
150,1% GR22 CRT_BLUE AL4
PM DACB_GREEN
DACB_BLUE AJ4
S_Top
Place close to balls NB10_G128

A A
S_Bot
PM
TOPSTAR TECHNOLOGY
bent
Page Name N10M IO_1
Custom C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3GPU {17,20,33,34,52,57}
ITEM FUNC Action
GPIO0 GPIO no using , PD 10K
GPIO1 HPD-C connect to HDMI conn with level shifter

U3E
GPIO2 Panel backlight brightness reserved associated with EC PWM , then connect to LVDS conn , reserved PD 10K
PM N1 GPIO3 Panel Power enable , active high connect LCDVDD_ON

R500 10K R0402 MIOA_D0
AJ6 IFPEF_PLLVDD MIOA_D1 P4
AL1 P1 GPIO4 Panel backlight On , active high connect LCDVDD backlight on
R488 10K R0402 IFPEF_RSET MIOA_D2
AE7 IFPE_IOVDD MIOA_D3 P2
PM AD7 P3 GPIO5 GPU vid0 Reserved routing to GPU power controller
IFPF_IOVDD MIOA_D4
MIOA_D5 T3
AD4 IFPEF MIOA T2 GPIO6 GPU vid1 Reserved routing to GPU power controller
D IFPE_AUX# MIOA_D6 D
AE4 IFPE_AUX MIOA_D7 T1
GPIO7 GPU vid2 no using , reserved 10K PU V3.3S
MIOA_D8 U4
AE5 IFPE_L3# MIOA_D9 U1
GPIO8 Thermal trip of GPU , active low Connect to Hardware shut down circuit , parallel with CPU thermaltrip , 10K PU V3.3S
AE6 IFPE_L3 MIOA_D10 U2
MIOA_D11 U3
GPIO9 Thermal alert input connect to thermal sensor IC alert with 10K PU V3.3S
AF5 IFPE_L2# MIOA_D12/NC R6
AF4 IFPE_L2 MIOA_D13/NC T6
GPIO10 Memory Vref switch no using , NC
MIOA_D14/NC N6
AG4 IFPE_L1# GPIO11 SLI_SYNC , host GPU output , slave input No using , PD 10K followed DEMO
AH4 IFPE_L1
MIOA_CTL3 P5 GPIO12 PWR_LEVEL no using , 10K PU V3.3S followed DEMO
AH5 IFPE_L0# MIOA_HSYNC N3
AH6 IFPE_L0 MIOA_VSYNC L3 GPIO13 Dynamic NVVDD control 0 no using , NC
MIOA_DE N2
AF2 IFPF_AUX# GPIO14 Dynamic NVVDD control 0 no using , NC
AF3 IFPF_AUX
MIOA_CLKOUT R4 GPIO15 HPD-E no using , PD 10K
AH3 IFPF_L3# MIOA_CLKOUT# T4
AH2 IFPF_L3 GPIO16 FAN_PWM no using , PD 10K
AH1 N4 R470 10K R0402
IFPF_L2# MIOA_CLKIN GPIO17 Reserved no using , PD 10K
AJ1 IFPF_L2
PM GPIO18 Reserved no using , PD 10K
AJ2 IFPF_L1#
AJ3 IFPF_L1 GPIO19 HPD_D no using , PD 10K
AL3 IFPF_L0# GPIO20 Reserved no using , PD 10K
AL2 IFPF_L0
+V3.3GPU GPIO21 HPD-F no using , PD 10K
AA9 MIOB_VDDQ1 GPIO22 SWAPRDY 10K PU V3.3S

AB9 MIOB_VDDQ2
MIOB
C138
0.1uF/10V,X5R
W9
Y9
MIOB_VDDQ3 THERMDN B4 需要用DDR3的 GPIO23 GPIO no using , NC
PM C0402 MIOB_VDDQ4
THERMDP B5
ns T13 AA7 MIOB_CAL_PD_VDDQ
C ns T49 AA6 C
MIOB_CAL_PU_GND
AP14 ns R541 10K R0402
ns T51 JTAG_TCK ns R540 10K R0402
AF1 MIOB_VREF JTAG_TMS AR14 +V3.3GPU
AN14 ns R533 10K R0402
JTAG_TDI
JTAG_TDO AN16 T53 ns
Y1 AP16 ns R546 1K R0402
MIOB_D0 JTAG_TRST#
Y2 MIOB_D1
N10M-GS:0xA74(strap2 pull-down 25K, rom_sclk pull-up 15K) Y3 MIOB_D2
N10M-GE:0xA68(strap2 pull-up 5K, rom_sclk pull-down 15K) AB3 +V3.3GPU
MIOB_D3 MISC1
AB2 MIOB_D4
+V3.3GPU AB1 PM R445 2.2K R0402
MIOB_D5 PM R448 2.2K R0402
AC4 MIOB_D6
AC1 MIOB_D7
AC2 MIOB_D8 I2CS_SCL E2
AC3 MIOB_D9 I2CS_SDA E1
R473 R167 R480 AE3 E3 PM R450 33 R0402
4.99K,1% 34.8K,1% MIOB_D10 I2CC_SCL PM R126 33 R0402 G_SMB_CLK {31}
45.3K,1% AE2 MIOB_D11 I2CC_SDA E4 G_SMB_DATA {31}
R0402 R0402 R0402 U6 F4 I2CD_SCL_GPU
ns PM PM MIOB_D12/NC RFU_1 I2CD_SDA_GPU
W6 MIOB_D13/NC RFU_2 G5
Y6 D5 +V3.3GPU
STRAP0_GPU MIOB_D14/NC RFU_3
W5 STRAP0 RFU_4 E5
STRAP1_GPU W7
STRAP2_GPU STRAP1 G_SMB_CLK R30 2.2K R0402 PM
V7 STRAP2 G_SMB_DATA R28 2.2K R0402 PM
W3 I2CD_SCL_GPU R128 2.2K R0402 PM
MIOB_CTL3 I2CD_SDA_GPU R131 2.2K R0402 PM
W1 MIOB_HSYNC
R475 R164 R477 W2 K1 GPIO0_GPU GPU_VID2 R132 10K R0402 ns
30.1K,1% 34.8K,1% 15K,1% MIOB_VSYNC GPIO0 GPU_OVT# R148 10K R0402 PM
Y5 MIOB_DE GPIO1 K2 GPU_HDMI_HPD {33,43}
R0402 R0402 R0402 K3 GPU_LVDS_BKLTCTL SLI_SWAPRDY R155 10K R0402 ns
GPIO2 GPU_LVDS_BKLTCTL {32}
PM ns ns V4 H3
MIOB_CLKOUT GPIO3 GPU_LVDS_VDDEN {31}
W4 H2 GPU_LVDS_BKLTEN_R PWR_LEVEL R142 10K R0402 ns
MIOB_CLKOUT# GPIO4
GPIO5 H1 GPU_VID0 {52}
PM R486 10K R0402 AE1 H4
MIOB_CLKIN GPIO6 GPU_VID1 {52}
H5 GPU_VID2
+V3.3GPU GPIO7 GPU_OVT#
GPIO8 H6 GPU_OVT# {38}
S46P VerB:Ns R579,stuff J7 THER_ALERT#
GPIO9
B R562 and change R562 to 35k P9 MIOA_VDDQ1 GPIO10 K4 B
R9 K5 SLI_SYNC GPU_HDMI_HPD R458 10K R0402 ns
followed nvidia PUN 090619 C141 T9
MIOA_VDDQ2 GPIO11
H7 PWR_LEVEL ns R140 33 R0402 GPIO0_GPU R463 10K R0402 PM
MIOA_VDDQ3 GPIO12 AC_IN {43,46}
PM U9 J4 GPU_LVDS_BKLTCTL R455 10K R0402
0.1uF/10V,X5R MIOA_VDDQ4 GPIO13 SLI_SYNC R460 10K R0402 ns
GPIO14 J6
C0402 L1 HPD_E_GPU GPU_LVDS_VDDEN R135 10K R0402 PM
GPIO15 GPU_FAN_PWM HPD_E_GPU R465 10K R0402 ns
GPIO16 L2
L4 GPU_GPIO17 GPU_FAN_PWM R462 10K R0402 ns
ns T11 GPIO17 GPU_GPIO18 GPU_GPIO17 R466 10K R0402 ns
U5 MIOA_CAL_PD_VDDQ GPIO18 M4
ns T8 T5 L7 HPD_D_GPU GPU_GPIO18 R468 10K R0402 ns
MIOA_CAL_PU_GND GPIO19 GPU_GPIO20 HPD_D_GPU R150 10K R0402 ns
GPIO20 L5
K6 HPD_F_GPU GPU_GPIO20 R472 10K R0402 ns
ns T48 GPIO21 SLI_SWAPRDY HPD_F_GPU R451 10K R0402 ns
N5 MIOA_VREF GPIO22 L6
GPIO23 M6
NB10_G128
NOTE:
1, XCLK_277 set 0 ，using 27MHz clock
PM Nvidia advise:
For used GPIO1,2,3,4,5,6: please use 10K pull-down for initial value. 2，FB_0_BAR_SIZE 0 system frame buffer 256M
For used GPIO8,12: please use 10K pull-up for initial value. 3，PCI_DEVID[4:0] N10M-GS set 0x0A74 PCI_DEVID[4:0] set 10100
For the unused GPIO, no need external HW pull-up/down. 4, USER[3:0] set 1111 , using EDID method to detect panel
+V3.3GPU 5, 3GIO_PADCFG[3:0] set 0001 , using NOTEBOOK configuration
6, RAMCFG[3:0] need follow latest PUN
THER_ALERT#
7, PEX_PLL_EN_TERM100 set 0 , using PEX PLL termination disable configuration
GR54 8, SLOT_CLK_CFG set 1 , GPU MCH using the same clk chip
0 9, SUB_VENDOR set 0 , no VIDEO BIOS ROM
R0402
GR4 10.SMBUS_ALT_ADDR Set 0
10K 11.0 3D Device 1VGA Device(default)
R0402
PM GC191
0.1UF/10V,X7R
C0402
GU5
5
A A
+V3.3GPU 1 VCC
4 GPU_LVDS_BKLTEN {31}
GPU_LVDS_BKLTEN_R 2
GND
SN74AHC1G08DBV TOPSTAR TECHNOLOGY
3
SOT23_5
R663 bent
10K Page Name N10M IO_2
R0402
Custom C46
A
5 4 3 2 1
5 4 3 2 1
+V1.05S {23,24,28,29,50,56,57,58}
+V3.3S {6,8,15,16,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
EC_RTC {48}
PCH_EC_RTC {29}
SPONGE_RTC1 Voltage Swing on RTCX1 pin

RTCBAT GLUE EC_RTC
assembly should not exceed 1.0V.
RTC_BAT1 D4
BAT54C PCH_EC_RTC
+ SOT23
- 1
RTCBAT with Cable
D D
assembly 3
根据机构 2 C329
1uF/10V,X7R
定Cable尺寸 C0603
CMOS Settings J1
Clear CMOS Short
R121
Keep CMOS Open
1K R447 20K R0402 +V3.3S
R0402
1
RTCBAT1 R110 20K R0402 J4
CONN2_R C98 C331 JOPEN U4A
3
CNS2_R R453 1uF/10V,X7R RESISTOR_1 +V3.3S

1M C0603 1uF/10V,X7R ns 32XCLK0 R471 R136
1 1 B13 D33
3
LPC_AD0 {38,40,43}
2
R0402 C0603 32XCLK1 RTCX1 FWH0 / LAD0 10K 10K
2 2 D13 RTCX2 FWH1 / LAD1 B33 LPC_AD1 {38,40,43}
4
C32 R0402 R0402

FWH2 / LAD2 LPC_AD2 {38,40,43}
A32 ns ns
LPC_AD3 {38,40,43}
4
RTC_RST# FWH3 / LAD3

C14 RTCRST#
C34 R78
FWH4 / LFRAME# LPC_FRAME# {38,40,43}
SRTC_RST# D17 10K
SRTCRST# R0402
A34
RTC
LPC
SM_INTRUDER# LDRQ0#
A16 INTRUDER# LDRQ1# / GPIO23 F34
ICH_INTVRMEN A14 AB9

INTVRMEN SERIRQ INT_SERIRQ {38,43}
INT_SERIRQ
R467 33 R0402 HDA_BCLK A30

{37} AZALIA_CODEC_BITCLK HDA_BCLK
SATA0RXN AK7 SATA_RXN0 {35}
R464 33 R0402 HDA_SYNC D29 AK6
{37} AZALIA_CODEC_SYNC HDA_SYNC SATA0RXP SATA_RXP0 {35}
SATA0TXN AK11 SATA_TXN0_C C66 0.01uF/25V,X7R
SATA_TXN0 {35}
{37} SPKR P1 SPKR SATA0TXP AK9 SATA_TXP0_C C65 C0402
SATA_TXP0 {35}
C0402 0.01uF/25V,X7R
R469 33 R0402 HDA_RST# C30
{37} AZALIA_CODEC_RST# HDA_RST#
SATA1RXN AH6 SATA_RXN1 {35}
SATA1RXP AH5 SATA_RXP1 {35}
C
{37} AZALIA_SDATAIN0 G30 HDA_SDIN0 SATA1TXN AH9 SATA_TXN1_C C63 0.01uF/25V,X7R
SATA_TXN1 {35} C
SATA1TXP AH8 SATA_TXP1_C C64 C0402

SATA_TXP1 {35}
F30 C0402 0.01uF/25V,X7R
HDA_SDIN1 R95 1K R0402 ns
SATA2RXN AF11
E32 AF9 R88 1K R0402 ns
IHDA
HDA_SDIN2 SATA2RXP
SATA2TXN AF7
F32 HDA_SDIN3 SATA2TXP AF6
AH3 R416 1K R0402 ns

R461 33 R0402 HDA_SDO SATA3RXN R415 1K R0402 ns
{37} AZALIA_CODEC_SDOUT B29 HDA_SDO SATA3RXP AH1
R134 SATA3TXN AF3 HM55 don't support SATA port 2and3
SATA3TXP AF1
H32
SATA
HDA_DOCK_EN# / GPIO33 R62 1K R0402 ns
SATA4RXN AD9
J30 AD8 R63 1K R0402 ns
For ME ns 4.7K HDA_DOCK_RST# / GPIO13 SATA4RXP
SATA4TXN AD6
R0402 AD5
SATA4TXP
ns ICTP M3 AD3 R418 1K R0402 ns
T35 JTAG_TCK SATA5RXN
AD1 R417 1K R0402 ns
ns ICTP SATA5RXP
T32 K3 JTAG_TMS SATA5TXN AB3
SATA5TXP AB1
ns ICTP K1 +V1.05S
T36 JTAG_TDI
JTAG
ns ICTP J2 AF16
T33 JTAG_TDO SATAICOMPO
ns ICTP J4 AF15 R113 37.4,1% +V3.3S
T34 TRST# SATAICOMPI R0402
OD output
SPI_CLK R411 0 SPI_CLK_R BA2 need pullup
SPI_CLK R423
SPI_CS0#R400 0 SPI_CS0#_R AV3 10K
+V3.3S SPI_CS0# R0402
AY3 SPI_CS1# SATALED# T3 SATA_LED# {45}
R398 SPI_MOSI R412 0 SPI_MOSI_R AY1 Y9 R76 10K R0402 +V3.3S

B SPI_MOSI SATA0GP / GPIO21 B
SPI
0 SPI_MISO R413 0 SPI_MISO_R AV1 V1 R421 10K R0402
SPI_MISO SATA1GP / GPIO19
R399
ns IbexPeak-M_Rev1_0
10K R0402
U8
8 5 SPI_MOSI
VDD SI SPI_MISO
SO 2
R397 3.3K 3 1 SPI_CS0#
WP# CE# SPI_CLK
SCK 6
R396 3.3K 7 HOLD#
VSS 4
8M
C333
SOIC8_50_208 PCH_EC_RTC
332K 1% PULL 32XCLK0 R441 0 C0402
HIGH TO
VBAT_RTC FOR R0402
Y4 15pF/50V,NPO
ICH8M INTRNAL
1
R102 VR ENABLE(PULL R440 32.768KHz
LOW DISABLE) 10M xd3_2X6
3
332K,1% R0402
R0402 ASSY
2
C332
ICH_INTVRMEN
32XCLK1 C0402
15pF/50V,NPO
R99
0
ns
R0402
A A
TOPSTAR TECHNOLOGY
bent
Page Name PCH
C C46
A
Date: Thursday, December 17, 2009 Sheet 22 of 59
5 4 3 2 1
5 4 3 2 1
+V3.3AL {6,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V1.05S {22,24,28,29,50,56,57,58}
+V3.3S {6,8,15,16,22,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V5S {25,29,32,33,34,35,36,37,38,43,51,52,55,56}
+V3.3AL
SMBCLK R124 2.2K

D D
SMBDATA R430 2.2K
10K
GPIO11 R0402 R431
10K
R0402
GPIO60 R103
10K
R0402
SML0CLK R429
10K
U4B R89
SML0DATA R0402
10K
BG30 B9 GPIO11 R428
{44} PCIE_RXN1_LAN PERN1 SMBALERT# / GPIO11
C0402 BJ30 GPIO74 R0402
{44} PCIE_RXP1_LAN PERP1
C340 PCIE_TXN1_LAN_C BF29 H14 SMBCLK
{44} PCIE_TXN1_LAN PETN1 SMBCLK
C343 C0402 PCIE_TXP1_LAN_C BH29
{44} PCIE_TXP1_LAN PETP1
0.1UF/10V,X7R 0.1UF/10V,X7R C8 SMBDATA SML1CLK R97 2.2K
SMBDATA
{40} PCIE_RXN2_3G AW30 PERN2
C0402 BA30 R0402
{40} PCIE_RXP2_3G PERP2
C349 PCIE_TXN2_3G_C BC30 J14 GPIO60 SML1DATA R100 2.2K
{40} PCIE_TXN2_3G PETN2 SML0ALERT# / GPIO60
C348 C0402 PCIE_TXP2_3G_C BD30
{40} PCIE_TXP2_3G PETP2
0.1UF/10V,X7R 0.1UF/10V,X7R C6 SML0CLK R0402
SML0CLK
AU30
SMBus
{41} PCIE_RXN3_EXP PERN3 Add 0 ohm
C0402 AT30 G8 SML0DATA
{41} PCIE_RXP3_EXP PERP3 SML0DATA
C350 PCIE_TXN3_EXP_C AU32
{41} PCIE_TXN3_EXP PETN3
C351 C0402 PCIE_TXP3_EXP_C AV32
{41} PCIE_TXP3_EXP PETP3
0.1UF/10V,X7R 0.1UF/10V,X7R M14 GPIO74
SML1ALERT# / GPIO74
BA32 PERN4
BB32 E10 R652 0 R0402
PERP4 SML1CLK / GPIO58 SML1CLK {43}
BD32 PETN4
BE32 G12 R653 0 R0402
PETP4 SML1DATA / GPIO75 SML1DATA {43}
PCI-E*
R426
BF33 PERN5
BH33 T13 PEG_A_CLKRQ#
PERP5 CL_CLK1 CL_CLK1 {39}
Controller
BG32 PETN5
BJ32 PETP5 CL_DATA1 T11 CL_DATA1 {39} 10K
C C
Link
BA34 T9 R0402
{39} PCIE_RXN4_WLAN PERN6 CL_RST1# CL_RST1# {39}
C0402 AW34
{39} PCIE_RXP4_WLAN PERP6
C347 PCIE_TXN4_WLAN_CBC34
{39} PCIE_TXN4_WLAN PETN6
C346 C0402 PCIE_TXP4_WLAN_CBD34
{39} PCIE_TXP4_WLAN PETP6
0.1UF/10V,X7R0.1UF/10V,X7R H1 PEG_A_CLKRQ# R427 0 R0402
PEG_A_CLKRQ# / GPIO47 PCIE_CLKREQ {17}
AT34 ns
PERN7
AU34 PERP7
AU36 AD43 CLKOUT_PEG#
R174 0 R0402
PETN7 CLKOUT_PEG_A_N CLK_PCIE_N11M# {17}
AV36 AD45 CLKOUT_PEGR173 0 R0402
PETP7 CLKOUT_PEG_A_P CLK_PCIE_N11M {17}
+V3.3AL BG34 AN4
PERN8 CLKOUT_DMI_N CLK_EXP_N {8}
PEG
HM55 doesn't contain port7 and port8 BJ34 AN2
PERP8 CLKOUT_DMI_P CLK_EXP_P {8}
BG36 PETN8
BJ36 PETP8
AT1 R414 0 R0402
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3
R402 AK48
{44} PCIE_GLAN_CLKN CLKOUT_PCIE0N
10K AK47
{44} PCIE_GLAN_CLKP CLKOUT_PCIE0P
From CLK BUFFER
R0402 AW24
CLKIN_DMI_N CLK_BUF_SATA_N {6}
R425 0 R0402 P9 BA24
PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_BUF_SATA_P {6}
{40} CLK_PCIE_3G# AM43 CLKOUT_PCIE1N CLKIN_BCLK_N AP3 CLK_BUF_BCLK_N {6}

+V3.3AL AM45 AP1
{40} CLK_PCIE_3G CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLK_P {6}
{40} MiniPCIE_REQ# U4 PCIECLKRQ1# / GPIO18

CLKIN_DOT_96N F18 CLK_BUF_DOT96_N {6}
R422 E18
CLKIN_DOT_96P CLK_BUF_DOT96_P {6}
10K AM47
{39} CLK_PCIE_MINICARD# CLKOUT_PCIE2N
R0402 AM48
{39} CLK_PCIE_MINICARD CLKOUT_PCIE2P
MiniPCIE_REQ# AH13
CLKIN_SATA_N / CKSSCD_N CLK_BUF_EXP_N {6}
{39} minicard_CLKREQ# N4 PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P AH12 CLK_BUF_EXP_P {6}
+V3.3AL AH42 P41

{41} CLK_PCIE_EXPCARD# CLKOUT_PCIE3N REFCLK14IN CLK_BUF_REF14 {6}
{41} CLK_PCIE_EXPCARD AH41 CLKOUT_PCIE3P
B B
{41} EXPCARD_CLKREQ# A8 PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK J42 PCI_CLKFB {26}
R424
10K +V3.3AL
R0402 AM51 AH51 0 R195
minicard_CLKREQ# CLKOUT_PCIE4N XTAL25_IN 10M R196
AM53 CLKOUT_PCIE4P XTAL25_OUT AH53 R144
R0402
R83 8.2K R0402 M9 AF38
PCIECLKRQ4# / GPIO26 XCLK_RCOMP +V1.05S Y51
2
+V3.3AL 25MHz XS2_3d3
90.9,1%
AJ50 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 T45
AJ52 R0402 C164 C168
CLKOUT_PCIE5P
27pF/50V,NPO 27pF/50V,NPO
R84 8.2K R0402 H6 P43
Clock Flex
PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 C0402 C0402
+V3.3AL AK53 T42

CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66
AK51 CLKOUT_PEG_B_P
R57 8.2K R0402 P13 N50 33 R515 CLK_CR_48M {42}
PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67
IbexPeak-M_Rev1_0
+V3.3S
Change to pull up follow intel design guide

R305
R311 0 R0402 2.2K
ns
Q18
2N7002E-T1
SMBCLK 3 2 SMB_CLK_S {6,15,16,40,41}
+V3.3S
A +V5S A
1
R297
R301 0 R0402 2.2K
ns TOPSTAR TECHNOLOGY
2N7002E-T1 bent
Page Name PCH
SMBDATA 3 2 SMB_DATA_S {6,15,16,40,41} Size Project Name Rev
C C46
A
Q23 Date: Friday, November 27, 2009 Sheet 23 of 59
1
+V5S PROPERTY NOTE: this document contains information confidential and property to
5 4 3 2 1
5 4 3 2 1
+V3.3AL {6,23,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V3.3S {6,8,15,16,22,23,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.05S {22,23,28,29,50,56,57,58}
U4C
D FDI_TXN[7:0] {7} D
BA18 FDI_TXN0
DMI_RXN0 FDI_RXN0 FDI_TXN1
{7} DMI_RXN0 BC24 DMI0RXN FDI_RXN1 BH17
DMI_RXN1 BJ22 BD16 FDI_TXN2
{7} DMI_RXN1 DMI1RXN FDI_RXN2
DMI_RXN2 AW20 BJ16 FDI_TXN3
DMI_RXN3 BJ20 BA16 FDI_TXN4
BE14 FDI_TXN5
DMI_RXP0 FDI_RXN5 FDI_TXN6
{7} DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14
DMI_RXP1 BG22 BC12 FDI_TXN7
{7} DMI_RXP1 DMI1RXP FDI_RXN7
DMI_RXP2 BA20
{7} DMI_RXP2 DMI2RXP FDI_TXP[7:0] {7}
DMI_RXP3 BG20 BB18 FDI_TXP0
{7} DMI_RXP3 DMI3RXP FDI_RXP0
BF17 FDI_TXP1
DMI_TXN0 FDI_RXP1 FDI_TXP2
{7} DMI_TXN0 BE22 DMI0TXN FDI_RXP2 BC16
+V1.05S DMI_TXN1 BF21 BG16 FDI_TXP3
{7} DMI_TXN1 DMI1TXN FDI_RXP3
DMI_TXN2 BD20 AW16 FDI_TXP4
DMI_TXN3 BE18 BD14 FDI_TXP5
BB14 FDI_TXP6
DMI_TXP0 FDI_RXP6 FDI_TXP7
{7} DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12
DMI_TXP1 BH21
{7} DMI_TXP1 DMI1TXP
DMI_TXP2 BC20
{7} DMI_TXP2 DMI2TXP
R456 DMI_TXP3 BD18 BJ14
{7} DMI_TXP3 DMI3TXP FDI_INT FDI_INT {7}
49.9,1%
DMI
FDI
R0402 FDI_FSYNC0 BF13 FDI_FSYNC0 {7}
BH25 DMI_ZCOMP
FDI_FSYNC1 BH13 FDI_FSYNC1 {7}
DMI_COMP_R BF25 DMI_IRCOMP
FDI_LSYNC0 BJ12 FDI_LSYNC0 {7}
+V3.3S
FDI_LSYNC1 BG14 FDI_LSYNC1 {7}
R60
10K
R0402
T6 SYS_RESET# WAKE# J12 PCIE_WAKE# {39,40,41,43,44}

C C
R70 0 R0402 SYS_PWROK_R M6 Y1 CLKRUN#
SYS_PWROK CLKRUN# / GPIO32
System Power Management

SYS_PWROK R446 0 R0402 PWROK_R B17 PWROK
R69 0 R0402 ME_PWRGD_R K5 P8

This is suspend power pin MEPWROK SUS_STAT# / GPIO61 PM_SUS_STAT# {43}
R434 10K R0402 LAN_RST# A10 F3 SUSCLK T39 ICTPns

LAN_RST# SUSCLK / GPIO62
+V3.3AL
R432 0 R0402 DRAM_PWRGD_R D9 E4 SLP_S5# R81 0 R0402 T1 ns
{8} PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63
C16 H7 SLP_S4# R86 0 R0402

{43,53} PM_RSMRST# RSMRST# SLP_S4# PM_SLP_S4# {41,43,56}
R82
10K
{43} ALW_ACK M1 SUS_PWR_DN_ACK / GPIO30 SLP_S3# P12 SLP_S3# R67 0 R0402
PM_SLP_S3# {41,43,53}
ns
R444
+V3.3AL 10K
R0402 R71 0 R0402 P5 K8 SLP_M#
{43} PM_PWRBTN# PWRBTN# SLP_M#
这个信号在有M3的时候用。 T37 ns
{43} AC_IN_PCH P7 ACPRESENT / GPIO31 TP23 N2 M电就用S电。此信号不用
C282
ns 0.1UF/25V,Y5V A6 BJ10
U19 {43} BAT_LOW# BATLOW# / GPIO72 PMSYNCH H_PM_SYNC {8}
5
74AHCT1G08GV
1 VCC SOT23_5 RI# F14 F6
{43,53} Main_PWROK RI# SLP_LAN# / GPIO29
4 SYS_PWROK +V3.3AL
{43} EC_IMVP_PWRGD 2
GND R401 IbexPeak-M_Rev1_0
3
ns R346 ALW_ACK 10K

10K
B B
R0402
R0402
R347 0
+V3.3AL
+V3.3S
R119 R405
10K
RI# CLKRUN#
R0402
R56 10K
10K PM_PWRBTN# R0402
R0402
R111 1K PCIE_WAKE#
R0402
A A
TOPSTAR TECHNOLOGY
bent
Page Name PCH
C C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V5S {23,29,32,33,34,35,36,37,38,43,51,52,55,56}
{31} PCH_LVDS_BKLTEN
+V3.3S
R166
100K
R178 R175
10K 10K
D D
LCTL_DATA
LCTL_CLK
+V3.3S
U4D
R177 R176 T48 BJ46

{31} PCH_LVDS_BKLTEN L_BKLTEN SDVO_TVCLKINN
2.2K 2.2K T47 BG46
{31} PCH_LVDS_VDDEN L_VDD_EN SDVO_TVCLKINP
{32} LVDS_BKLTCTL Y48 L_BKLTCTL SDVO_STALLN BJ48

SDVO_STALLP BG48
PCH_DDC_CLK AB48
PCH_DDC_DATA {31} L_DDC_CLK
PCH_DDC_DATA Y45 BF45
L_DDC_DATA SDVO_INTN
PCH_DDC_CLK {31} SDVO_INTP BH45
LCTL_CLK AB46
LCTL_DATA L_CTRL_CLK
V48 L_CTRL_DATA
AP39 LVD_IBG SDVO_CTRLCLK T51
T7 AP41 T53
R147 ns LVD_VBG SDVO_CTRLDATA
2.37K,1% AT43 LVD_VREFH
AT42 LVD_VREFL DDPB_AUXN BG44
DDPB_AUXP BJ44
DDPB_HPD AU38
LVDS
{31} PCH_LVDS_CLKAM AV53 LVDSA_CLK#
{31} PCH_LVDS_CLKAP AV51 LVDSA_CLK DDPB_0N BD42
DDPB_0P BC42
{31} PCH_LVDS_YAM0 BB47 LVDSA_DATA#0 DDPB_1N BJ42
Digital Display Interface

{31} PCH_LVDS_YAM1 BA52 LVDSA_DATA#1 DDPB_1P BG42
{31} PCH_LVDS_YAM2 AY48 LVDSA_DATA#2 DDPB_2N BB40
T10 AV47 BA40
ns LVDSA_DATA#3 DDPB_2P +V5S
C
DDPB_3N AW38 C
{31} PCH_LVDS_YAP0 BB48 LVDSA_DATA0 DDPB_3P BA38
{31} PCH_LVDS_YAP1 BA50 LVDSA_DATA1
{31} PCH_LVDS_YAP2 AY49 LVDSA_DATA2
T12 AV48 Y49
LVDSA_DATA3 DDPC_CTRLCLK GM_HDMI_DDC_CLK {33}
ns AB49
DDPC_CTRLDATA GM_HDMI_DDC_DATA {33}
1
AP48 2N7002
LVDSB_CLK# GM
AP47 LVDSB_CLK DDPC_AUXN BE44
BD44 R532GM
DDPC_AUXP 0
AY53 LVDSB_DATA#0 DDPC_HPD AV40 2 3 MCH_HDMI_HPD {33}
AT49 R0402
LVDSB_DATA#1 R662ns
AU52 LVDSB_DATA#2 DDPC_0N BE40 IN_D2- {33}
AT53 BD40 0
LVDSB_DATA#3 DDPC_0P IN_D2+ {33} Q29
BF41 R0402
DDPC_1N IN_D1- {33}
AY51 LVDSB_DATA0 DDPC_1P BH41 IN_D1+ {33}
AT48 BD38 R527
LVDSB_DATA1 DDPC_2N IN_D0- {33}
AU50 BC38 100K
LVDSB_DATA2 DDPC_2P IN_D0+ {33}
AT51 BB36 GM
LVDSB_DATA3 DDPC_3N MCH_CLK_D4- {33}
DDPC_3P BA36 MCH_CLK_D4+ {33}
CRT_BLUE_R AA52 U50

{34} CRT_BLUE_R CRT_BLUE DDPD_CTRLCLK
CRT_GREEN_R AB53 U52
{34} CRT_GREEN_R CRT_GREEN DDPD_CTRLDATA
CRT_RED_R AD53
{34} CRT_RED_R CRT_RED
DDPD_AUXN BC46
CRT_DDC_CLK_R V51 BD46
{34} CRT_DDC_CLK_R CRT_DDC_CLK DDPD_AUXP
CRT_DDC_DATA_R V53 AT38
{34} CRT_DDC_DATA_R CRT_DDC_DATA DDPD_HPD
DDPD_0N BJ40
CRT_HSYNC_R Y53 BG40
{34} CRT_HSYNC_R CRT_HSYNC DDPD_0P
CRT_VSYNC_R Y51 BJ38
{34} CRT_VSYNC_R CRT_VSYNC DDPD_1N
DDPD_1P BG38
CRT
DDPD_2N BF37
AD48 DAC_IREF DDPD_2P BH37
AB51 CRT_IRTN DDPD_3N BE36
R508 C435 BD36
B
150,1% 5.6pF/50V,NPO DDPD_3P B
GM CRT_BLUE_R ns R179 IbexPeak-M_Rev1_0
1K,1%
R507
150,1% C436
GM CRT_GREEN_R 5.6pF/50V,NPO
ns
R506
C437
GM 150,1% CRT_RED_R 5.6pF/50V,NPO
ns
A A
TOPSTAR TECHNOLOGY
bent
Page Name PCH
C C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3AL {6,23,24,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V3.3S {6,8,15,16,22,23,24,25,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.8S {11,28,29,31,49,56,57}
D D
+V3.3S +V3.3AL
PLTRST buffer U4E
H40 AD0 NV_CE#0 AY9
N34 AD1 NV_CE#1 BD1
C44 AD2 NV_CE#2 AP15
R388 R387 A38 BD8
AD3 NV_CE#3
0 0 C36 AD4
R0402 R0402 J34 AV9
ns AD5 NV_DQS0
A40 AD6 NV_DQS1 BG8
D45 AD7
E36 AD8 NV_DQ0 / NV_IO0 AP7
C313 H48 AP6
AD9 NV_DQ1 / NV_IO1
E40 AD10 NV_DQ2 / NV_IO2 AT6
0.1UF/25V,Y5V C40 AT9
C0402 AD11 NV_DQ3 / NV_IO3
M48 AD12 NV_DQ4 / NV_IO4 BB1
5
C M45 AD13 NV_DQ5 / NV_IO5 AV6 C

VCC 1 PLT_RST# F53 BB3
AD14 NV_DQ6 / NV_IO6
{8,17,38,39,40,41,43,44} BUF_PLT_RST# 4 M40 AD15 NV_DQ7 / NV_IO7 BA4
NVRAM
2 M43 AD16 NV_DQ8 / NV_IO8 BE4
GND
J36 AD17 NV_DQ9 / NV_IO9 BB6
U22 R66 K48 BD6
3
R389 74AHCT1G08GV AD18 NV_DQ10 / NV_IO10

10K F40 AD19 NV_DQ11 / NV_IO11 BB7
100K SOT23_5 R0402 C42 BC8
R0402 AD20 NV_DQ12 / NV_IO12
K46 AD21 NV_DQ13 / NV_IO13 BJ8
M51 AD22 NV_DQ14 / NV_IO14 BJ6
J52 AD23 NV_DQ15 / NV_IO15 BG6
K51 AD24
L34 AD25 NV_ALE BD3
F42 AD26 NV_CLE AY6
PCI_GNT#0 J40 AD27
PCI_GNT1# PCI_GNT0# Boot BIOS G46 AD28
F44 AD29 NV_RCOMP AU2
PCI_GNT#1 1 1 SPI M47 AD30
PCI
H36 AD31 NV_RB# AV7
Default high(SPI) 1 0 PCI
J50 C/BE0# NV_WR#0_RE# AY8
R159 R170 0 0 LPC G42 AY5
1K 1K C/BE1# NV_WR#1_RE#
H47 C/BE2#
R0402 R0402 G34 AV11
ns ns C/BE3# NV_WE#_CK0
NV_WE#_CK1 BF5
INT_PIRQA# G38
INT_PIRQB# PIRQA#
H51 PIRQB#
INT_PIRQC# B37 H18
PIRQC# USBP0N EXPCARD_USB_PN0 {41} EXPRESS Card
INT_PIRQD# A44 J18
PIRQD# USBP0P EXPCARD_USB_PP0 {41}
USBP1N A18 MINICARD_USB_PN1 {39}
PCI_REQ#0 F51 C18
REQ0# USBP1P MINICARD_USB_PP1 {39}
PCI_GNT#3 LVDS_SEL_PCH A46 N20
REQ1# / GPIO50 USBP2N BT_USB_PN2 {38} BT
{31} LVDS_BLT_SEL B45 REQ2# / GPIO52 USBP2P P20 BT_USB_PP2 {38}
PCI_REQ#3 M53 J20
REQ3# / GPIO54 USBP3N CAM_USB_PN3 {32} CAMERA Change port5 to port2 by bent 091022
USBP3P L20 CAM_USB_PP3 {32}
PCI_GNT#3 Low=A16 swap override/ R517 PCI_GNT#0 F48 F20
Top Block Swap Mode Topblock Swap Override enable GNT0# USBP4N USB_PN4 {36}
1K PCI_GNT#1 K45 G20 IOUSB PORT
Strap High=Default GNT1# / GPIO51 USBP4P USB_PP4 {36}
R0402 GNT2# F36 A20
B GNT2# / GPIO53 USBP5N USB_PN5 {36} B
ns PCI_GNT#3 H53 C20
4.7K in checklist GNT3# / GPIO55 USBP5P USB_PP5 {36}
USBP6N M22
INT_PIRQE# B41 N22
INT_PIRQF# PIRQE# / GPIO2 USBP6P
K53 PIRQF# / GPIO3 USBP7N B21
INT_PIRQG# A36 D21
PIRQG# / GPIO4 USBP7P
{31} LVDS_DDC_SEL A48 PIRQH# / GPIO5 USBP8N H22 USB_CR_PN8 {42}
J22 CARD READER
USBP8P USB_CR_PP8 {42}
USB
PCI_RST# K6 E22
PCIRST# USBP9N MINICARD_USB_PN2 {40}
PCI pullup +V3.3S PCI_SERR# E44
USBP9P F22
A22
MINICARD_USB_PP2 {40} MINICARD
SERR# USBP10N USB_PN10 {36}
IOUSB PORT
PCI_PERR# E50 C22
PERR# USBP10P USB_PP10 {36}
USBP11N G24 USB_PN11 {36}
USBP11P H24 USB_PP11 {36}
PCI_FRAME# R501 8.2K R0402 PCI_IRDY#
PCI_IRDY# R482 8.2K R0402 T9 PCI_PAR
A42
H44
IRDY# USBP12N L24
M24
T4 ns Attribution
PAR USBP12P T3 ns
PCI_TRDY# R504 8.2K R0402 ICTP ns PCI_DEVSEL# F46 DEVSEL# USBP13N A24 T44 ns TBD
PCI_STOP# R478 8.2K R0402 PCI_FRAME# C46 C24
FRAME# USBP13P T42 ns
PCI_SERR# R162 8.2K R0402
PCI_DEVSEL# R165 8.2K R0402 PCI_LOCK# D49
PCI_PERR# R171 8.2K R0402 PLOCK# USB_BIAS
USBRBIAS# B25
PCI_LOCK# R168 8.2K R0402 PCI_STOP# D41
PCI_REQ#0 R519 8.2K R0402 PCI_TRDY# STOP#
C48 TRDY# USBRBIAS D25
LVDS_SEL_PCH R491 8.2K R0402
LVDS_BLT_SEL R487 8.2K R0402 T2 PCI_PME M7 R452
PCI_REQ#3 R514 8.2K R0402 ICTP ns PME# OC0# 22.6,1%
OC0# / GPIO59 N16
LVDS_DDC_SEL R25 8.2K R0402 PLT_RST# D5 J16 OC1# R0402
GNT2# R141 8.2K R0402 PLTRST# OC1# / GPIO40
OC2# / GPIO41 F16 USB_OC#2 {36}
INT_PIRQA# R143 8.2K R0402 47 R513 CLK_591PCI_R N52 L16 OC3#
{43} CLK_591PCI CLKOUT_PCI0 OC3# / GPIO42
INT_PIRQB# R518 8.2K R0402 47 R512 CLK_TCMPCI_R P53 E14 OC4#
{38} CLK_TCMPCI CLKOUT_PCI1 OC4# / GPIO43
INT_PIRQC# R156 8.2K R0402 22 R161 PCI_CLKFB_R P46 G16
{23} PCI_CLKFB CLKOUT_PCI2 OC5# / GPIO9 USB_OC#5 {36}
INT_PIRQD# R485 8.2K R0402 47 R511 PCI_CLK_DEBUG_R P51 F12 OC6#
{40} PCI_CLK_DEBUG CLKOUT_PCI3 OC6# / GPIO10
INT_PIRQE# R476 8.2K R0402 P48 T15 OC7#
INT_PIRQF# R516 8.2K R0402 CLKOUT_PCI4 OC7# / GPIO14
INT_PIRQG# R474 8.2K R0402 +V3.3AL
+V1.8S IbexPeak-M_Rev1_0
PCI_RST# R55 8.2K R0402 ns +V1.8S
A OC0# R0402 10K R120 A
OC1# R0402 10K R106

R32 R33
1K,1% 10K OC3# R0402 10K R114
R0402 R0402 TOPSTAR TECHNOLOGY
PM OC4# R0402 10K R116
PM bent
OC6# R0402 10K R104 Page Name PCH
1
Q7 OC7# R0402 10K R58 Size Project Name Rev

LVDS_SEL_PCH 2 3 C C46
{26} LVDS_SEL_PCH LVDS_SEL {31} A
MMBT3904-FSOT23
PM Date: Friday, November 27, 2009 Sheet 26 of 59
5 4 3 2 1
5 4 3 2 1
+V1.1S_VTT {8,10,11,28,29,38,50,51,55}
+V3.3AL {6,23,24,26,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V3.3S {6,8,15,16,22,23,24,25,26,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
D D
+V3.3S
U4F
GPIO0 R420 10K
GPIO0 Y3 AH45
EXTSMI# R149 10K BMBUSY# / GPIO0 CLKOUT_PCIE6N
CLKOUT_PCIE6P AH46
C38 TACH1 / GPIO1
GPIO6 R151 10K {43} EXTSMI# GPIO24 R93 10K
GPIO6 D37 ns
EC_RUNTIME_SCI# R138 10K TACH2 / GPIO6
CLKOUT_PCIE7N AF48
MISC
J32 TACH3 / GPIO7 CLKOUT_PCIE7P AF47
SATA2GP R77 10K R0402 {43} EC_RUNTIME_SCI#
GPIO8 F10
SATA4GP GPIO8 SATA4GP
ns R419 10K R404 10K R0402
LAN_PHY K9 U2 +V1.1S_VTT
LAN_PHY_PWR_CTRL / GPIO12 A20GATE H_A20GATE {43}
GPIO17 R160 10K ns
GPIO15 T7
GPIO22 R75 10K 注意工板要求下拉 GPIO15 SATA_CLKREQ# R74 10K R0402 ns
SATA4GP AA2 AM3
SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N BCLK_CPU_N {8}
STP_PCI# R80 10K GPIO27 R79 10K R0402
GPIO17 F38 AM1 ns
TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P BCLK_CPU_P {8}
SATA5GP R403 10K R0402 GPIO22 Y7 BG10 R190
SCLOCK / GPIO22 PECI H_PECI {8}
GPIO
56
GPIO48 R61 10K GPIO24 H10 T1 R0402
GPIO24 RCIN# H_RCIN# {43} internal pull up. default to use internal VccVRM
GPIO27 AB12 BE10
GPIO27 PROCPWRGD VCCPWRGD_0 {8}
CPU
C C
GPIO28 V13 BD10 THERMTRIP_R# R96 54.9,1%R0402
GPIO28 THRMTRIP# THERMTRIP# {8,38}
H_RCIN# R408 10K
STP_PCI# M11 STP_PCI# / GPIO34
SATA_CLKREQ# V6 SATACLKREQ# / GPIO35
SATA2GP AB7 BA22
SATA2GP / GPIO36 TP1
GPIO37 AB13 AW22
+V3.3AL SATA3GP / GPIO37 TP2
GPIO38 V3 BB22
SLOAD / GPIO38 TP3
GPIO8 R87 10K GPIO39 P3 AY45
SDATAOUT0 / GPIO39 TP4
LAN_PHY R85 10K T38 GPIO45 H3 AY46
ICTP ns PCIECLKRQ6# / GPIO45 TP5
GPIO15 R72 1K T40 GPIO46 F1 AV43
ICTP ns PCIECLKRQ7# / GPIO46 TP6
GPIO24 R94 10K GPIO48 AB6 AV45
ns SDATAOUT1 / GPIO48 TP7
GPIO28 R59 10K SATA5GP AA4 AF13
确认是否上 SATA5GP / GPIO49 TP8
GPIO57 F8 M18
GPIO57 TP9
TP10 N18
A4 VSS_NCTF_1 TP11 AJ24

A49
NCTF
VSS_NCTF_2
RSVD
GPIO57 R92 10K A5 AK41
VSS_NCTF_3 TP12
A50 VSS_NCTF_4
A52 VSS_NCTF_5 TP13 AK42
A53 VSS_NCTF_6
B2 VSS_NCTF_7 TP14 M32
+V3.3S B4 VSS_NCTF_8
B52 VSS_NCTF_9 TP15 N32
B53 VSS_NCTF_10
B
BE1 VSS_NCTF_11 TP16 M30 B
BE53 VSS_NCTF_12
BF1 VSS_NCTF_13 TP17 N30
R112 R406 R73 BF53
10K 10K 10K VSS_NCTF_14
BH1 VSS_NCTF_15 TP18 H12
ns ns ns BH2 VSS_NCTF_16
BH52 VSS_NCTF_17 TP19 AA23
BH53 VSS_NCTF_18
BJ1 VSS_NCTF_19 NC_1 AB45
GPIO37 BJ2 VSS_NCTF_20
BJ53 VSS_NCTF_26
D1 VSS_NCTF_27 NC_5 T39
D2 VSS_NCTF_28
D53 VSS_NCTF_29
E1 VSS_NCTF_30 INIT3_3V# P6
R117 R407R409 E53 VSS_NCTF_31
10K 10K 10K TP24 C10
IbexPeak-M_Rev1_0
For differentiate BIOS version
A A
TOPSTAR TECHNOLOGY
bent
Page Name PCH
C C46
A
5 4 3 2 1
5 4 3 2 1
+V1.1S_VTT {8,10,11,27,29,38,50,51,55}
+V1.05S {22,23,24,29,50,56,57,58}
+V3.3S {6,8,15,16,22,23,24,25,26,27,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.8S {11,26,29,31,49,56,57}
D D
+V3.3S
+V1.05S
1629mA U4G POWER

AB24 AE50 VCCADAC FB221 2 FB0603
VCCCORE[1] VCCADAC[1]
AB26 VCCCORE[2]
AB28 AE52 C366 C367 120ohm@100MHz,500mA
VCCCORE[3] VCCADAC[2]
C134 C122 AD26 VCCCORE[4] C357
CRT
AD28 VCCCORE[5] VSSA_DAC[1] AF53
10uF/6.3V,X5R 1uF/10V,X7R AF26 0.01uF/16V,X7R 0.1UF/10V,X7R 1uF/10V,X7R
VCCCORE[6]
VCC CORE
AF28 VCCCORE[7] VSSA_DAC[2] AF51
AF30 VCCCORE[8]
AF31 +V3.3S
VCCCORE[9]
AH26 VCCCORE[10]
AH28 VCCCORE[11]
AH30 VCCCORE[12]
AH31 VCCCORE[13] VCCALVDS AH38
AJ30 +V1.8S
VCCCORE[14]
AJ31 VCCCORE[15] VSSA_LVDS AH39
AP43 VCCTX_LVDS FB7 1 2 FB0603

+V1.05S VCCTX_LVDS[1]
VCCTX_LVDS[2] AP45
AT46 C137 C135 120ohm@100MHz,500mA
LVDS
VCCTX_LVDS[3]
AK24 VCCIO[24] VCCTX_LVDS[4] AT45 C139
0.01uF/16V,X7R 0.1UF/10V,X7R 1uF/10V,X7R
FB181 2 FB0603 VCCAPLL BJ24 VCCAPLLEXP +V3.3S
VCC3_3[2] AB34
120ohm@100MHz,500mA C336
ns AN20 VCCIO[25] VCC3_3[3] AB35
C ns 1uF/10V,X7R AN22 C
HVCMOS
VCCIO[26]
AN23 VCCIO[27] VCC3_3[4] AD35
+V1.05S AN24 VCCIO[28] C130
AN26 VCCIO[29]
AN28 VCCIO[30]
BJ26
3251mA BJ28
VCCIO[31]
VCCIO[32]
0.1UF/10V,X7R
AT26 VCCIO[33]
AT28 VCCIO[34]
AU26 +V1.8S
C345 C339 C337 VCCIO[35]
AU28 VCCIO[36]
10uF/6.3V,X5R 1uF/10V,X7R 1uF/10V,X7R AV26 VCCIO[37]
AV28 VCCIO[38] VCCVRM[2] AT24
AW26 +V1.1S_VTT
VCCIO[39]
AW28 VCCIO[40] C102
DMI
BA26 VCCIO[41] VCCDMI[1] AT16
BA28 1uF/10V,X7R
VCCIO[42]
BB26 VCCIO[43] VCCDMI[2] AU16 C93
BB28 VCCIO[44]
BC26 1uF/10V,X7R
C128 C341 VCCIO[45]
PCI E*
BC28 VCCIO[46]
1uF/10V,X7R 1uF/10V,X7R BD26 +V1.8S
VCCIO[47]
BD28
BE26
VCCIO[48]
VCCIO[49] VCCPNAND[1] AM16 156mA
BE28 VCCIO[50] VCCPNAND[2] AK16
BG26 VCCIO[51] VCCPNAND[3] AK20
BG28 VCCIO[52] VCCPNAND[4] AK19 C87
BH27 VCCIO[53] VCCPNAND[5] AK15
AK13 1uF/10V,X7R
+V3.3S VCCPNAND[6]
AN30 VCCIO[54] VCCPNAND[7] AM12
NAND / SPI
AN31 VCCIO[55] VCCPNAND[8] AM13

+V1.8S AM15
VCCPNAND[9]
+V1.05S AN35 VCC3_3[1]
AT22 VCCVRM[1]
B B
FB191 2 FB0603 VCCFDIPLL BJ18 AM8
VCCFDIPLL VCCME3_3[1] +V3.3S
VCCME3_3[2] AM9
FDI
120ohm@100MHz,500mA AM23 AP11

ns
C335 VCCIO[1] VCCME3_3[3]
VCCME3_3[4] AP9 86mA
1uF/10V,X7R
ns C79
IbexPeak-M_Rev1_0
0.1UF/10V,X7R
A A
TOPSTAR TECHNOLOGY
bent
Page Name PCH
C C46
A
5 4 3 2 1
5 4 3 2 1
+V1.1S_VTT {8,10,11,27,28,38,50,51,55}
+V1.05S {22,23,24,28,50,56,57,58}
+V5AL {32,36,48,49,50,53,56}
+V3.3AL {6,23,24,26,27,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V5S {23,25,32,33,34,35,36,37,38,43,51,52,55,56}
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
PCH_EC_RTC {22}
+V1.8S {11,26,28,31,49,56,57}
+V1.05S +V1.05S
U4J POWER
D D
FB24 1 2 FB0603 VCCACLK AP51 V24
120ohm@100MHz,500mA VCCACLK[1] VCCIO[5]
VCCIO[6] V26
ns C370 C356 AP53 VCCACLK[2] VCCIO[7] Y24 C114
VCCIO[8] Y26
ns 10uF/6.3V,X5R 1uF/10V,X7R 1uF/10V,X7R
ns AF23 V28
VCCLAN[1] VCCSUS3_3[1]
VCCSUS3_3[2] U28
C95 R98 0 R0402 AF24 U26
VCCLAN[2] VCCSUS3_3[3] +V3.3AL
VCCSUS3_3[4] U24
VCCSUS3_3[5] P28
0.1UF/10V,X7R Y20 P26
+V1.05S DCPSUSBYP VCCSUS3_3[6]
VCCSUS3_3[7] N28 168mA
If internal LAN is not used connect to GND directly N26
VCCSUS3_3[8] C119 C116 C117
AD38 VCCME[1] VCCSUS3_3[9] M28
M26
2222mA AD39
VCCSUS3_3[10]
L28
USB
VCCME[2] VCCSUS3_3[11] 0.1UF/10V,X7R 0.1UF/10V,X7R 0.1UF/10V,X7R
VCCSUS3_3[12] L26
AD41 VCCME[3] VCCSUS3_3[13] J28
C352 C132 C127 C112 VCCSUS3_3[14] J26
AF43 VCCME[4] VCCSUS3_3[15] H28
10uF/6.3V,X5R 10uF/6.3V,X5R 1uF/10V,X7R 1uF/10V,X7R H26
VCCSUS3_3[16]
AF41 VCCME[5] VCCSUS3_3[17] G28
VCCSUS3_3[18] G26
AF42 VCCME[6] VCCSUS3_3[19] F28
VCCSUS3_3[20] F26
V39 VCCME[7] VCCSUS3_3[21] E28
Clock and Miscellaneous

VCCSUS3_3[22] E26
V41 C28 +V3.3AL
VCCME[8] VCCSUS3_3[23]
VCCSUS3_3[24] C26
V42 B27 +V1.05S
1
VCCSUS3_3[26] A28
Y39 A26 D5
1N4148WS
Y41 VCCME[11] VCCSUS3_3[28] U23 SOD323 +V5AL
2
Y42 VCCME[12] VCCIO[56] V23 R127
C
V5REF_SUS F24 C
V9 +V3.3S
C81 DCPRTC 10
+V1.8S R0603
C104
V5REF K49
1
0.1UF/10V,X7R AU24 1uF/10V,X7R
PCI/GPIO/LPC
VCCVRM[3] D7
J38 +V5S
C105
VCCADPLLA 75mA BB51 VCCADPLLA[1]
VCC3_3[8] C140 1N4148WS
SOD323 R172
1uF/10V,X7R BB53 L38 1uF/10V,X7R +V3.3S
2
VCCADPLLA[2] VCC3_3[9]
+V1.05S M36
VCCADPLLB 75mA BD51
VCC3_3[10]
BD53
VCCADPLLB[1]
VCCADPLLB[2] VCC3_3[11] N36 375mA 10
R0603
AH23 P36 C131
VCCIO[21] VCC3_3[12] C129
AJ35 VCCIO[22]
+V1.05S AH35 U35
C124 C113 C123 VCCIO[23] VCC3_3[13] 0.1UF/10V,X7R
1uF/10V,X7R 1uF/10V,X7R 1uF/10V,X7R AF34 0.1UF/10V,X7R
FB23 1 VCCADPLLA VCCIO[2]
2 FB0603 VCC3_3[14] AD13
120ohm@100MHz,500mA AH34 +V1.05S
VCCIO[3]
C369 C355 AF32 VCCIO[4]

AK3 VCCSATAPLL FB17 1 2 FB0603
10uF/6.3V,X5R 1uF/10V,X7R VCCSATAPLL[1] 120ohm@100MHz,500mA
V12 DCPSST VCCSATAPLL[2] AK1
ns
C88 C320 C321
Y22 10uF/6.3V,X5R 1uF/10V,X7R
0.1UF/10V,X7R C100 DCPSUS ns ns
VCCIO[9] AH22
+V1.05S
+V1.8S
0.1UF/10V,X7R P18 AT20
FB21 1 VCCADPLLB VCCSUS3_3[29] VCCVRM[4]
2 FB0603
120ohm@100MHz,500mA +V3.3AL U19
SATA
VCCSUS3_3[30] +V1.05S
PCI/GPIO/LPC
B VCCIO[10] AH19 B
C353 C354 U20 VCCSUS3_3[31]
VCCIO[11] AD20
10uF/6.3V,X5R 1uF/10V,X7R U22 VCCSUS3_3[32]
VCCIO[12] AF22
C118
+V3.3S AD19
VCCIO[13]
V15 VCC3_3[5] VCCIO[14] AF20 C101
0.1UF/10V,X7R AF19
VCCIO[15] 1uF/10V,X7R
V16 VCC3_3[6] VCCIO[16] AH20
C89 Y16 AB19

VCC3_3[7] VCCIO[17]
VCCIO[18] AB20
+V1.1S_VTT AB22
0.1UF/10V,X7R VCCIO[19] +V1.05S
VCCIO[20] AD22
AT18 V_CPU_IO[1]
AA34
CPU
C90 C94 VCCME[13] +V3.3AL

VCCME[14] Y34
C0805 AU18 Y35
V_CPU_IO[2] VCCME[15]
VCCME[16] AA35
4.7UF/10V,Y5V
0.1UF/10V,X7R
RTC
PCH_EC_RTC A12 L30

VCCRTC VCCSUSHDA
HDA
C325 IbexPeak-M_Rev1_0
C338
0.1UF/10V,X7R 1uF/10V,X7R
A A
TOPSTAR TECHNOLOGY
bent
Page Name PCH
C C46
A
5 4 3 2 1
5 4 3 2 1
U4I
AY7 VSS[159] VSS[259] H49
B11 VSS[160] VSS[260] H5
U4H B15 J24
VSS[161] VSS[261]
AB16 VSS[0] B19 VSS[162] VSS[262] K11
B23 VSS[163] VSS[263] K43
AA19 VSS[1] VSS[80] AK30 B31 VSS[164] VSS[264] K47
AA20 VSS[2] VSS[81] AK31 B35 VSS[165] VSS[265] K7
AA22 VSS[3] VSS[82] AK32 B39 VSS[166] VSS[266] L14
AM19 VSS[4] VSS[83] AK34 B43 VSS[167] VSS[267] L18
D
AA28 VSS[7] VSS[86] AK43 BG12 VSS[170] VSS[270] L32 D
AA30 VSS[8] VSS[87] AK46 BB12 VSS[171] VSS[271] L36
AB11 VSS[11] VSS[90] AK8 BB24 VSS[174] VSS[274] M12
AB15 VSS[12] VSS[91] AL2 BB30 VSS[175] VSS[275] M16
AB23 VSS[13] VSS[92] AL52 BB34 VSS[176] VSS[276] M20
AB30 VSS[14] VSS[93] AM11 BB38 VSS[177] VSS[277] N38
AB31 VSS[15] VSS[94] BB44 BB42 VSS[178] VSS[278] M34
AB32 VSS[16] VSS[95] AD24 BB49 VSS[179] VSS[279] M38
AB39 VSS[17] VSS[96] AM20 BB5 VSS[180] VSS[280] M42
AB43 VSS[18] VSS[97] AM22 BC10 VSS[181] VSS[281] M46
AC2 VSS[22] VSS[101] BA42 BC22 VSS[185] VSS[285] N24
AC52 VSS[23] VSS[102] AM30 BC32 VSS[186] VSS[286] P11
AD11 VSS[24] VSS[103] AM31 BC36 VSS[187] VSS[287] AD15
AD12 VSS[25] VSS[104] AM32 BC40 VSS[188] VSS[288] P22
AD30 VSS[28] VSS[107] AM38 BH9 VSS[191] VSS[291] P34
AD31 VSS[29] VSS[108] AM39 BD48 VSS[192] VSS[292] P42
AD32 VSS[30] VSS[109] AM42 BD49 VSS[193] VSS[293] P45
AD34 VSS[31] VSS[110] AU20 BD5 VSS[194] VSS[294] P47
AU22 VSS[32] VSS[111] AM46 BE12 VSS[195] VSS[295] R2
AD42 VSS[33] VSS[112] AV22 BE16 VSS[196] VSS[296] R52
AD46 VSS[34] VSS[113] AM49 BE20 VSS[197] VSS[297] T12
AD49 VSS[35] VSS[114] AM7 BE24 VSS[198] VSS[298] T41
AD7 VSS[36] VSS[115] AA50 BE30 VSS[199] VSS[299] T46
AE2 VSS[37] VSS[116] BB10 BE34 VSS[200] VSS[300] T49
AE4 VSS[38] VSS[117] AN32 BE38 VSS[201] VSS[301] T5
AF12 VSS[39] VSS[118] AN50 BE42 VSS[202] VSS[302] T8
Y13 VSS[40] VSS[119] AN52 BE46 VSS[203] VSS[303] U30
AH49 VSS[41] VSS[120] AP12 BE48 VSS[204] VSS[304] U31
AU4 VSS[42] VSS[121] AP42 BE50 VSS[205] VSS[305] U32
AF35 VSS[43] VSS[122] AP46 BE6 VSS[206] VSS[306] U34
AP13 VSS[44] VSS[123] AP49 BE8 VSS[207] VSS[307] P38
C AN34 VSS[45] VSS[124] AP5 BF3 VSS[208] VSS[308] V11 C
AF45 VSS[46] VSS[125] AP8 BF49 VSS[209] VSS[309] P16
AF46 VSS[47] VSS[126] AR2 BF51 VSS[210] VSS[310] V19
AF49 VSS[48] VSS[127] AR52 BG18 VSS[211] VSS[311] V20
AF5 VSS[49] VSS[128] AT11 BG24 VSS[212] VSS[312] V22
AF8 VSS[50] VSS[129] BA12 BG4 VSS[213] VSS[313] V30
AG2 VSS[51] VSS[130] AH48 BG50 VSS[214] VSS[314] V31
AG52 VSS[52] VSS[131] AT32 BH11 VSS[215] VSS[315] V32
AH11 VSS[53] VSS[132] AT36 BH15 VSS[216] VSS[316] V34
AH32 VSS[57] VSS[136] AV12 BH35 VSS[220] VSS[320] V45
AV18 VSS[58] VSS[137] AV16 BH39 VSS[221] VSS[321] V46
AJ19 VSS[62] VSS[141] AV34 C12 VSS[225] VSS[325] V7
AJ2 VSS[63] VSS[142] AV38 C50 VSS[226] VSS[326] V8
AJ20 VSS[64] VSS[143] AV42 D51 VSS[227] VSS[327] W2
AJ22 VSS[65] VSS[144] AV46 E12 VSS[228] VSS[328] W52
AJ23 VSS[66] VSS[145] AV49 E16 VSS[229] VSS[329] Y11
AJ32 VSS[69] VSS[148] AW14 E30 VSS[232] VSS[332] Y19
AJ34 VSS[70] VSS[149] AW18 E34 VSS[233] VSS[333] Y23
AT5 VSS[71] VSS[150] AW2 E38 VSS[234] VSS[334] Y28
AJ4 VSS[72] VSS[151] BF9 E42 VSS[235] VSS[335] Y30
AK12 VSS[73] VSS[152] AW32 E46 VSS[236] VSS[336] Y31
AM41 VSS[74] VSS[153] AW36 E48 VSS[237] VSS[337] Y32
AN19 VSS[75] VSS[154] AW40 E6 VSS[238] VSS[338] Y38
AK26 VSS[76] VSS[155] AW52 E8 VSS[239] VSS[339] Y43
AK22 VSS[77] VSS[156] AY11 F49 VSS[240] VSS[340] Y46
AK23 VSS[78] VSS[157] AY43 F5 VSS[241] VSS[341] P49
AK28 VSS[79] VSS[158] AY47 G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
IbexPeak-M_Rev1_0 G18 Y8
S_Bot VSS[244] VSS[344]
B
G2 VSS[245] VSS[345] P24 B
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
IbexPeak-M_Rev1_0
S_Bot
A A
TOPSTAR TECHNOLOGY
bent
Page Name PCH
C C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.8S {11,26,28,29,49,56,57}
D D
+V1.8S +V1.8S
U10
GND 43
1 VSS VDD7 42
2 VDD VSS8 41
{32} LVDS_CLKAP 3 TMDS2+ VDD6 40
{32} LVDS_CLKAM 4 TMDS2- VSS7 39
5 VSS1 ATMDS2+ 38 PCH_LVDS_CLKAP {25}
{32} LVDS_YAP2 6 TMDS1+ ATMDS2- 37 PCH_LVDS_CLKAM {25}
{32} LVDS_YAM2 7 TMDS1- ATMDS1+ 36 PCH_LVDS_YAP2 {25}
8 VDD1 ATMDS1- 35 PCH_LVDS_YAM2 {25}
{26} LVDS_SEL 9 SEL ATMDS0+ 34 PCH_LVDS_YAP1 {25}
10 VSS2 ATMDS0- 33 PCH_LVDS_YAM1 {25}
{32} LVDS_YAP1 11 TMDS0+ ATMDSCLK+ 32 PCH_LVDS_YAP0 {25}
{32} LVDS_YAM1 12 TMDS0- ATMDSCLK- 31 PCH_LVDS_YAM0 {25}
13 VSS3 VDD5 30
{32} LVDS_YAP0 14 TMDSCLK+ BTMDS2+ 29 GPU_LVDS_CLKAP {20}
{32} LVDS_YAM0 15 TMDSCLK- BTMDS2- 28 GPU_LVDS_CLKAM {20}
16 VDD2 BTMDS1+ 27 GPU_LVDS_YAP2 {20}
17 VSS4 BTMDS1- 26 GPU_LVDS_YAM2 {20}
18 VDD3 BTMDS0+ 25 GPU_LVDS_YAP1 {20}
19 VSS5 BTMDS0- 24 GPU_LVDS_YAM1 {20}
20 VDD4 BTMDSCLK+ 23 GPU_LVDS_YAP0 {20}
21 VSS6 BTMDSCLK- 22 GPU_LVDS_YAM0 {20}
TS3DV421
+V3.3S
PM +V3.3S
C C
U6
{26} LVDS_DDC_SEL 1 IN1 COM1 10 EDID_CLK {32} U5
{21} G_SMB_CLK 2 NO1 NC1 9 PCH_DDC_CLK {25} {21} GPU_LVDS_BKLTEN 1 NO IN 6 LVDS_BLT_SEL {26}
3 GND V+ 8 2 GND V+ 5
{21} G_SMB_DATA 4 NO2 NC2 7 PCH_DDC_DATA {25} {25} PCH_LVDS_BKLTEN 3 NC COM 4 LVDS_BKLTEN {32}
5 IN2 COM2 6 EDID_DATA {32} ts5a3157
TS5A23157
PM
PM
footprint need to change
+V3.3S
U1
{21} GPU_LVDS_VDDEN 1 NO IN 6 LVDS_SEL_PCH {26}

2 GND V+ 5
{25} PCH_LVDS_VDDEN 3 NC COM 4 LVDS_VDDEN {32}
ts5a3157
B
PM B
RN4 0
RA0402_4 GM
RN5 0 1 2
{25} PCH_LVDS_CLKAP LVDS_CLKAP {32}
RA0402_4 3 4
{25} PCH_LVDS_CLKAM LVDS_CLKAM {32}
1 2 R29 0 R0402
{25} PCH_LVDS_YAP2 RN6 LVDS_YAP2 {32} {32} EDID_CLK PCH_DDC_CLK {25}
3 4 RA0402_4 0
{25} PCH_LVDS_YAM2 LVDS_YAM2 {32}
GM 1 2 GM
{25} PCH_LVDS_YAP1 LVDS_YAP1 {32}
RN7 3 4 GM
{25} PCH_LVDS_YAM1 LVDS_YAM1 {32}
RA0402_41 2 R27 0 R0402
{25} PCH_LVDS_YAP0 LVDS_YAP0 {32} {32} EDID_DATA PCH_DDC_DATA {25}
{25} PCH_LVDS_YAM0 GM 0 3 4 LVDS_YAM0 {32}
GM
R24 0 R0402
{25} PCH_LVDS_BKLTEN LVDS_BKLTEN {32}
GM
R23 0 R0402
{25} PCH_LVDS_VDDEN LVDS_VDDEN {32}
GM
A A
TOPSTAR TECHNOLOGY
bent
Page Name LVDS Switch
C C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+VDC {40,46,48,49,50,51,52,55,56,57}
+V3.3S
+V3.3AL {6,23,24,26,27,29,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V5AL {29,36,48,49,50,53,56}
D1 2 1 1N4148WS
{36,43} LIDR# +V5S {23,25,29,33,34,35,36,37,38,43,51,52,55,56}
SOD323
R15
1K
D2
R0402
{31} LVDS_BKLTEN 1
LCDCON1
3 LCDCON2X20P_2
BKLT_ON {43}
CNS40_LCDB
2 LCDVDD
{43} HW_OFF_BKLT#
C8
BAT54A 41 41
1000pF/50V,X7R LCDVDD 1 2
C0402 1 2
D
3 3 4 4 D
{31} LVDS_YAM0 5 5 6 6 LVDS_YAM1 {31}
{31} LVDS_YAP0 7 7 8 8 LVDS_YAP1 {31}
9 9 10 10
{31} LVDS_YAM2 11 11 12 12 LVDS_CLKAP {31}
{31} LVDS_YAP2 13 13 14 14 LVDS_CLKAM {31}
15 15 16 16
LCDVDD 17 18
F1 ns 1.5A T-Fuse 17 18
19 19 20 20
AO6409 R0603 21 22
+V3.3S 21 22
23 23 24 24
+V3.3AL 6 1 FB1 0 R0805 LCDVDD 25 26
D 25 26
5 2 {31} EDID_CLK 27 27 28 28
4 S 3 {31} EDID_DATA 29 29 30 30 EDID PWR
G C3 C4 C5 R5 +5VAL_Camera 31 32 LVDS_CAM_USB_PN3
2.2K F2 1.5A T-Fuse ns BKLT_PWM 31 32 LVDS_CAM_USB_PP3
Q6 33 33 34 34
R16 R17 C10 C9 C0402 10uF/6.3V,X5R C0805 R0402 +VDC R0603 35 36 BKLT_ON
10K 100K C0402 0.1UF/25V,Y5V C0805 10UF/6.3V,X5R ns 35 36
37 37 38 38
3LCDVDD_EN#
R0402 ns C0402 ns 1 2 39 40
ns FB16 39 40
INVT_VDD 42 42
0.047uF/16V,X7R 0.01uF/16V,X7R 100ohm@100MHz,3A
R18 LVDS_VDDGON# C307 C306
100K FB0805 C0603 0.1uF/25V,X7R
R0402 0.1uF/25V,X7R C0603
ns
Q3
2N7002 LCDVDD
1 SOT23 +VDC
{31} LVDS_VDDEN
2
R19 R14
100K 100 R8
R0402 R0603 100K S46P VerB:LVDS CONN换为40pin立式 090710
Q4 6
3
SC70_6
C LVDS_VDDEN 2 5 +V5AL C
2N7002DW VerB:Reverse Camera PWR control Circuit 071026
100pF/50V,NPO
1
R381 0 R0402 C6 R9 +V5S

{43} EC_BKLT_PWM
100K
FB14 0 R0402 BKLT_PWM R6 R7

{21} GPU_LVDS_BKLTCTL
ns 0 0
R0805 R0805
FB15 0 R0402 R382 C305 ns
{25} LVDS_BKLTCTL
ns 10K
R0402 100pF/50V,NPO R2 0 R0805
C0402 +5VAL_Camera E1
1
EMI
+V3.3S +V3.3AL 2 3
500mA ns
1
R3
10K Q1 C2 C1
R10 0 R0603 ns R0402 SOT23 0.1uF/10V,X5R 10uF/6.3V,X5R
ns AO3415 C0402 C0805
1
R11 0 R0603 EDID PWR ns
R1 10K
C7 R0402
ns
3
0.1UF/10V,X7R
C0402 Add +5S to CAM POWER
许沐锌 081111
{43} Camera_ON 1
Q2
2
R4 2N7002E-T1
R383 R0603 0 100K SOT23
R0402 ns
R384 R0603 0 ns
CHK2
1 2 LVDS_CAM_USB_PN3
{26} CAM_USB_PN3 LVDS_CAM_USB_PP3
{26} CAM_USB_PP3 4 3
B B
D15 D16
L4_0805 90ohm@100MHz,0.5A
1
ns
EGA10603V05A1-B EGA10603V05A1-B
ESDPAD_R0603 ESDPAD_R0603
ns ns
2
A A
TOPSTAR TECHNOLOGY
bent
Page Name
LVDS&Inverter CONN
C C46
A
5 4 3 2 1
5 4 3 2 1
AD+ {36,46,48}
+V5S {23,25,29,32,34,35,36,37,38,43,51,52,55,56}
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V3.3AL {6,23,24,26,27,29,32,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V3.3S +V3.3S +V3.3S +V3.3GPU {17,20,21,34,52,57}
R494 R498
4.7K ns 4.7K
R492 R493
4.7K 4.7K DDC_EN GM/HDMI TMS_EN
ns
R495 R499
GM/HDMI 0 0
DDCBUF_EN
ns
GM/HDMI
CFG
D GND GND D
+V3.3S
C179 C156
0.01uF/25V,X7R 0.01uF/25V,X7R
GM/HDMI GM/HDMI
+V5_HDMI
GND +V5_HDMI
5VDDCDA_HDMI
5VDDCCK_HDMI
DDCBUF_EN
HDMIHP_C
R497
+V3.3S
DDC_EN
R496 2.2K
TMS_EN
2.2K
CFG
5VDDCCK_HDMI
0.01uF/25V,X7R C166 5VDDCDA_HDMI
C165 0.01uF/25V,X7R GM/HDMI
G7
G6
G5
G4
GM/HDMI GM/HDMI GM/HDMI
36
35
34
33
32
31
30
29
28
27
26
U25 25
g7
g6
GND7
FUNCTION4
FUNCTION3
VCC3V5
DDC_EN
GND6
HPD_SINK
SDA_SINK
SCL_SINK
GND5
VCC3V4
TMDS_EN
g5
g4
GND
GND G1
g1
gnd10 49
37 GND8 GND4 24
38 23 IFPC_TXD2P C178 C155
{25} IN_D0+ IN_D1- OUT_D1-
39 22 IFPC_TXD2N 0.01uF/25V,X7R 0.01uF/25V,X7R
{25} IN_D0- IN_D1+ OUT_D1+
40 VCC3V6 VCC3V3 21
41 20 IFPC_TXD1P
{25} IN_D1+ IN_D2- OUT_D2-
42 19 IFPC_TXD1N
{25} IN_D1- IN_D2+ OUT_D2+
43 18 GM/HDMI GM/HDMI
GND9 GND3 IFPC_TXD0P
{25} IN_D2+ 44 IN_D3- OUT_D3- 17
45 16 IFPC_TXD0N
{25} IN_D2- IN_D3+ OUT_D3+
ANALOG1(REXT)
46 VCC3V7 VCC3V2 15
HPD_SOURCE
IFPC_TXC
SDA_SOURCE
SCL_SOURCE
{25} MCH_CLK_D4+ 47 IN_D4- OUT_D4- 14

IFPC_TXC#
FUNCTION1
FUNCTION2
{25} MCH_CLK_D4- 48 IN_D4+ OUT_D4+ 13

ANALOG2
G2 +V3.3S
g2
VCC3V1
C G3 C
VCC3V
g3
GND1
GND2
gnd18
GND
Note:The ESD protection devices should be placed as

close to the HDMI connector as
1
2
3
4
5
6
7
GM_HDMI_DDC_DATA 8
9
10
11
12
G8
CH7318 possible so that when ESD strikes occur, the

GND discharges can be quickly absorbed or
GM_HDMI_DDC_CLK
diverted to the ground/power plane before it is

PC0
PC1
GND coupled to another signal path nearby.

C142
GM/HDMI 0.01uF/25V,X7R HDMI
+V3.3S GND R483 0 R0603
R479 0 R0603
intel demo 499 and chro demo 1.2k by homy 1029 HDMI +V5_HDMI
GU3
GM/HDMI l4_0805 ns +V5S
+V3.3S CHK4
4 3 100M0.33A IFPC_TXD6P_esd 1 10 IFPC_TXD6P_esd HDMI_CON1
{20} IFPC_TXD2P LINE_1 NC4 FB6
R202 1 2 IFPC_TXD6N_esd 2 9 IFPC_TXD6N_esd D6
{20} IFPC_TXD2N LINE_2 NC3
R201 GND_HDMI GC145 0.1uF/10V,X7R 3 8 IFPC_TXD4P_esd 1 1 2 1 2120ohm@100MHz,500mA
1.2K 499,1% CHK5 4 IFPC_TXD5P_esd C0402 VDD GND D2+
{25}
3 4 7 2
MCH_HDMI_HPD
{20} IFPC_TXD1P LINE_3 NC2 D2 SHTELD

CH7318 PS8101 1 2 ns IFPC_TXD5N_esd
HDMI 5 6 IFPC_TXD4N_esd 3 1N5819HW-F FB0603
{20} IFPC_TXD1N LINE_4 NC1 D2-
100M0.33A IFPC_TXD5P_esd 4 SOD123 C136 R154
l4_0805 D1+ 0.1UF/25V,Y5V 100K
AZ1045
5 D1 SHTELD
R502 0 R0603 IFPC_TXD5N_esd 6 HDMI C0402 R0402
HDMI D1- HDMI
GND R489 0 R0603 7 20
GND D0+ GND1
8 D0 SHTELD GND2 21
Colay 8101 and 7318 by xiezx 9 HDMI
R523HDMI0 R0603 IFPC_TXC_esd D0- HDMI
10 CK+
R521 0 R0603 11 22 GND_HDMI GND_HDMI
HDMI IFPC_TXC#_esd CK SHTELD GND3
GU4 12 CK- GND4 23
l4_0805 13
CHK6 IFPC_TXD4P_esd CEC
{20} IFPC_TXD0P 4 3 100M0.33A 1 LINE_1 NC4 10 14 RESERVED
1 2 ns IFPC_TXD4N_esd 2 9 5VDDCCK_HDMI 15
{20} IFPC_TXD0N LINE_2 NC3 SCL
GND_HDMI GC146 0.1uF/10V,X7R 3 8 +V5_HDMI 5VDDCDA_HDMI 16
CHK7 IFPC_TXC_esd VDD GND SDA
{20} IFPC_TXC 4 3100M0.33A C0402 4 LINE_3 NC2 7 17 DCC/CEC_GND
GND_HDMI
1 2 ns IFPC_TXC#_esd HDMI 5 6 18
{20} IFPC_TXC# LINE_4 NC1 +5V
HDMIHP_C 19
l4_0805 HP_DET
R538 0 R0603 AZ1045
R529 0 R0603 HDMI HDMI_D_1A
Colay 8101 and 7318 by xiezx +V3.3S +V3.3S HDMI <Part Number> D23 ns/HDMI
B HDMI DIODE_SCHTK MLSEP B
GND_HDMI GND_HDMI
Colay COMCHK with 0ohm HDMI IFPC_TXD6P_esd 6 5 IFPC_TXD6P_esd
OUT4 IN4
R534 R535 IFPC_TXD6N_esd 7 4 IFPC_TXD6N_esd
4.7K 4.7K R537 R536 OUT3 IN3
ns 8101 2.2K 2.2K +V5_HDMI 8 3
GM/HDMI GM/HDMI GND1 GND
IFPC_TXD5P_esd 9 2 IFPC_TXD5P_esd
OUT2 IN2
PC0
GM_HDMI_DDC_DATA {25}
3
IFPC_TXD5N_esd 10 1 IFPC_TXD5N_esd
R188 OUT1 IN1
GM_HDMI_DDC_CLK {25}
PC1 R0402 R0402 0 D8 R199
R0402 BAT54A 0
+V3.3GPU +V3.3GPU PM/HDMI PM/HDMI R0402 GND_HDMI D24
1 PM/HDMI IFPC_TXD4P_esd 10 1 IFPC_TXD4P_esd
2
OUT1 IN1
change 4.7k to 2.2k 080508 hads
先断开GND和GND_HDMI,从一博回来后再开桥连上 IFPC_TXD4N_esd IFPC_TXD4N_esd
9 OUT2 IN2 2
R530 GR18
4.7K 4.7K R192 8 3
GND1 GND
1
7318 R0402 4.7K

PM/HDMI PM/HDMI IFPC_TXC_esd 7 4 IFPC_TXC_esd
OUT3 IN3
2 3 5VDDCCK_HDMI IFPC_TXC#_esd 6 5 IFPC_TXC#_esd
{20} HDMI_DDC_CLK OUT4 IN4
GND PM/HDMI
BSS138 DIODE_SCHTK MLSEP ns/HDMI
C159
GQ4 10pF/50V,NPO
C0402 +V3.3GPU
R205 0 R0402 PM/HDMI
ns
GND_HDMI
GND_HDMI GR7
10K +V3.3AL
+V3.3GPU +V3.3GPU PM/HDMI R0402
GPU_HDMI_HPD {21,43}
GR9 R183
4.7K 4.7K GQ2 GQ1 GR12
1
3
R0402 PM/HDMI 2N7002 2N7002 1K
A PM/HDMI SOT23 SOT23 R0402 A
PM/HDMI
2 3 5VDDCDA_HDMI HDMIHP_C 1 1
{20} HDMI_DDC_DATA
100pF/50V,NPO
PM/HDMI GR5 PM/HDMI PM/HDMI GC36 GR10
2
BSS138 C143 100K 10K
GQ3 10pF/50V,NPO PM/HDMI R0402 C0402 R0402
C0402 PM/HDMI PM/HDMI TOPSTAR TECHNOLOGY
R169 0 R0402 PM/HDMI bent
ns
Page Name HDMI CONN
GND_HDMI GND_HDMI GND_HDMI Size Project Name Rev
A2 C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57
+V5S {23,25,29,32,33,35,36,37,38,43,51,52,55,56}
CRT INTERFACE +V3.3GPU {17,20,21,33,52,57}
Cross moat place Change the ESD diode connection by bent 091022
D Place close to VGA port +V5S Cross moat place
D
VGA CONNECTOR
+V5_VGA
IFB4
R659
PM 0 47ohm/100MHz,500mA ID5 IFB1
GR45 0 1FB0603 2 ROUT 1 2 1 2
{20} CRT_RED
GND_VGA
R571
3
R0603 1N5819 120ohm@100MHz,500mA
IR8 ID8 SOD123 FB0603 IR5 CONNECTOR
{25} CRT_RED_R IC22 IC18
150,1% BAT54SPT IC12 100K TOP VIEW
5.6pF/50V,NPO IC17 5.6pF/50V,NPO
GM 0.1UF/25V,Y5V VGA1
17
0 5.6pF/50V,NPO SOT23
ns VGADMF
2
GND_VGA GND_VGA 6 GND
IFB3 GND_VGA NV suggest:2pf NC
R660 1 R 11
0 47ohm/100MHz,500mA GND_VGA+V5_VGA 7 GND
GR44 0 PM NV suggest:22pf SDA
{20} CRT_GREEN 1FB0603 2 GOUT 2 G 12 5VDDCDA
8 GND
3
R0603 3 B HSYNC 13 HSYNC
IR7 IC23 IC16 IC15 ID7 9 NC
{25} CRT_GREEN_R
R569 150,1% BAT54SPT 4 NC VSYNC 14 VSYNC
GM 5.6pF/50V,NPO 5.6pF/50V,NPO 5.6pF/50V,NPO 10 GND
SOT23 GND CLK
0 ns 5 15 5VDDCCK
shell
2
shell
GND_VGA IC11 IC7 IC4 IC9
R661
16
0 GND_VGA+V5_VGA C10518-11505-L 15PF/50V,NPO 15PF/50V,NPO 15PF/50V,NPO 15PF/50V,NPO
GR43 0 PM 1 2 IFB2 FB0603 BOUT
{20} CRT_BLUE
47ohm/100MHz,500mA ns ns
3
IR6 IC24 R0603 IC13
150,1% IC14 ID6 ESD:
5.6pF/50V,NPO 5.6pF/50V,NPO BAT54SPT
{25} CRT_BLUE_R
ns 5.6pF/50V,NPO
SOT23 NV suggest use +3.3V Assy
C R553 0 GM
Layout note: GND_VGA S46/修改成跟M21一致的VGA Conn。LJ081223 GND_VGA
C
2
1. +3.3V and GND Route >15mils trace width
GND_VGA
GND_VGA +V5_VGA 2. No more than 75mils
3. ESD diode should no more than 10pf cap.
150ohm电阻前走线阻抗50ohm +V3.3S
(From GPU to CONN) +V3.3S +V3.3S +V3.3S +V3.3S
+V5_VGA
IC19
0.1UF/25V,Y5V
IC10 IC2 IC1 IC20 IC21
0.1UF/25V,Y5V GND_VGA 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V +V3.3GPU +V3.3S
Cross moat place

GND_VGA +V5_VGA
R599 R259
R509
GM 8.2K 8.2K
R0402 R0402
{25} CRT_DDC_DATA_R
PM GM
0
reserved ciucuit possibility to Cost down 1G125 follow design guide--0929 IR4 IR3
+V5_VGA Q16 2.2K 2.2K +V5_VGA
VerC: Del VR7 ID4
BSS138
SOT23 2
R600
R219
2 3 5VDDCDA 3
{20} CRT_DDC_DATA VerC: Change to bat54s
{25} CRT_HSYNC_R IC3 IC6
IU2 PM 1
B 0 GM 74AHCT1G125
SOT23_5
0.1UF/25V,Y5V 0.1UF/25V,Y5V 0 +V3.3GPU +V3.3S B
Gate_vga 1
BAT54SPT
1 OE# VCC 5 R510
SOT23 GND_VGA
GR17 0 PM 2 GND_VGA VerB:BAV99由DIODES改为PHILIPS的
{20} CRT_HSYNC A {25} CRT_DDC_CLK_R for cost down
R596 R244
3 4 CRT_H_SYNC Near U5/U6 ASAP GM 8.2K 8.2K +V5_VGA071016
GND Y 0 VerC: Change to bat54s R0402 R0402 Q14
ID3
PM GM BSS138
IU1 IR2 39 HSYNC SOT23 2
74AHCT1G125
SOT23_5 IR1 39 VSYNC R595 2 3 5VDDCCK 3
{20} CRT_DDC_CLK
1 OE# VCC 5
PM 1
GR21 0 PM 0
{20} CRT_VSYNC 2 A
Gate_vga1
CRT_V_SYNC BAT54SPT GND_VGA
3 GND Y 4
SOT23
+V3.3S
R598
R0402
R215 GM GND_VGA
{25} CRT_VSYNC_R
+V5_VGA GM
0 +V3.3GPU
0 R597
2
VSYNC 3 IC8
0.1UF/25V,Y5V
0
1
ID1 R0402
PM
BAT54SPT GND_VGA
SOT23 Demo has no voltage lever shifter
A ID2
+V5_VGA
A
2 TOPSTAR TECHNOLOGY
IC5 bent
HSYNC 3 0.1UF/25V,Y5V
Page Name CRT Interface
1
Custom C46
BAT54SPT A
GND_VGA
SOT23 TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
5 4 3 2 1
5 4 3 2 1
+V5S {23,25,29,32,33,34,36,37,38,43,51,52,55,56}
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
D D
SATAHDD_B1 SATAHDD_B2
+V3.3S
FB27 0 R0805
V3.3_SATA
ns
CT5 4.7uF/10V,Y5V C405 C406
C0805 0.1UF/25V,Y5V 0.1UF/25V,Y5V
ns ns ns Screw 2*5mm Screw 2*5mm
ASSY ASSY
+V5S
Average 1A,Peak 1.5A
FB26 0 R0805
V_HDD Close to connector as possible SATA_HDD1
the same distance to connector
{22} SATA_TXP0 2 TX
CT4 4.7uF/10V,Y5V C396 C397 0.01uF/25V,X7R 3 1
{22} SATA_TXN0 TX# GND0
C0805 0.1UF/25V,Y5V 0.1UF/25V,Y5V C414 C0402 5 4
{22} SATA_RXN0 RX# GND1
V3.3_SATA C413 C0402 6 7
{22} SATA_RXP0 RX GND2
0.01uF/25V,X7R
8 VCC3_0 GND3 11
9 VCC3_1 GND4 12
V_HDD 10 13
VCC3_2 GND5
14 VCC5_0 GND6 17
15 VCC5_1
+V5S 16 19
VCC5_2 GND7
FB20 0 R0805 Average 1A,Peak 1.5A 18 REEVE
23
V_ODD GND23
20 VCC12_0 GND24 24
21 VCC12_1
CT3 4.7uF/10V,Y5V C330 C334 22
C0805 0.1UF/25V,Y5V 0.1UF/25V,Y5V VCC12_2
SATA_HDD CONN
SATA_D_50B
C C
SATA_CON1
S1 GND1
{22} SATA_TXP1 S2 A+
{22} SATA_TXN1 S3 A- GND6 14
S4 GND2
C344 0.01uF/25V,X7R S5
{22} SATA_RXN1 B-
C342 0.01uF/25V,X7R S6
{22} SATA_RXP1 B+
S7 GND3
V_ODD
P1 DP
P2 +5V_1
P3 +5V_2
P4 MD GND7 15
B
P5 GND4 B
P6 GND5
SATA_ODD CONN
SATA_S_50G
VerB:change the footprint the same as S46P
A A
TOPSTAR TECHNOLOGY
bent
Page Name SATA HDD&ODD
C C46
A
5 4 3 2 1
5 4 3 2 1
USB Board CONN +V5S
+V3.3AL
{23,25,29,32,33,34,35,37,38,43,51,52,55,56}
{6,23,24,26,27,29,32,33,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V5AL {29,32,48,49,50,53,56}
+VDC {32,40,46,48,49,50,51,52,55,56,57}
AD+ {46,48}
24pin 0.5mm bot FFC
D 24
+V5S +V5S D
24
23 23
22 22
21 21
20 20
{26} USB_OC#5 19 19
18 C401 C395
{26} USB_OC#2 18
17 17 0.01uF/25V,X7R 0.01uF/25V,X7R
{26} USB_PN11 16 16 C0402 C0402
{26} USB_PP11 15 15
14 14
{26} USB_PN10 13 13 26 26
{26} USB_PP10 12 12 25 25
11 11
{26} USB_PN4 10 10
{26} USB_PP4 9 9
8 8
7 7
6 6
5 5
4 4
3 3
2 2
1 1
+V5AL USB_CONN1
C C
+V3.3AL +V5S +V3.3AL +V5S
R163 R153
1
1
Q11 10K Q10 10K
2N7002E-T1 R0402 2N7002E-T1 R0402
ns ns ns ns
TPCLK 2 3 TP_TPCLK_R TPDAT 2 3 TP_TPDAT_R
{43} TPCLK {43} TPDAT
TR2 0 R0402 TR1 0 R0402 power button Conn

Ns pull up hear to avoid a leak of current. PWRCONN1
21 21
AD+ 1 1 2 2 AD+
3 3 4 4
5 5 6 6
7 8
B R358 LEFT 9
7
9
8
10 10 B
1K 11 12
R0402 11 12
3 4 13 13 14 14
{46,54} Isense_SYSP 15 15 16 16 LIDR# {32,43}
3
C283 17 18 +V3.3AL
{39,43,48} PWR_SW_VCC2 17 18
D14 19 20
100pF/50V,NPO 19 20
22 22
1 2
TLSW1 BAT54SPT 88242_2001
TMG-534-V
1
1 +V5S BUTTON4_S CNS2x10_1_R

1 TP_TPDAT_R 620902010002
2 2
7 3 TP_TPCLK_R +V5S
7 3
4 4
8 5 LEFT
8 5 RIGHT
6 6
CNS6_1_R1
Conn 6Pin R0402 R352 RIGHT
TP_CON1 1K
+V3.3AL
VerB:converse the connection of TP_CON1 3 4
3
+V5S C281 D13
100pF/50V,NPO 1 2 BAT54SPT
TRSW1
A C120 C125 R146 R158 TMG-534-V TOPSTAR TECHNOLOGY A
1
47K 47K C126 BUTTON4_S

0.1UF/25V,Y5V C0603 R0402 R0402 C0402 bent
C0402 1UF/10V,Y5V ns ns 0.1UF/25V,Y5V +V5S Page Name USB2.0&&LED CONN&Qkey CONN
Add pull res
TPDAT A3 C46
A
TPCLK Date: Friday, November 27, 2009 Sheet 36 of 59
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V3.3S
+V5S {23,25,29,32,33,34,35,36,38,43,51,52,55,56}
VCC5CDC +V5S
FB12 GND_AUD GND_AUD
600ohm@100MHz,1.5A GND_AUD GND_AUD
1 2FB0805
Change to cap for esd Solve audio curve cut issue
C274 C301 By Johan 071228 By Johan 071224
C280 C278 C291 C298 C288
1
10UF/6.3V,X5R 10UF/6.3V,X5R D34 D33
0.1UF/25V,Y5V 0.1UF/25V,Y5V C0805 0.1UF/25V,Y5V 0.1UF/25V,Y5V C0805 0.1UF/25V,Y5V R0402 R0402 ESDPAD_R0603 ESDPAD_R0603
100pF/50V,NPO 100pF/50V,NPO EGA1-0603-V05 EGA1-0603-V05
R637 R639 ns ns
2
U20 Cross moat place
25
38
1
9
LINE_OUT1
GND_AUD
C302 4.7uF/10V,X5R SURR_OUT_L FB28
1 2300ohm@100MHz,1.5A 1 L
VDD1
VDD2
AVDD1
AVDD2
T27 C0805 FB0805 4
ICTP ns A_GPIO0 2 35 CT1 ns R375 75 R0402 SURR_OUT_L SURR_OUT_R FB30
1 2300ohm@100MHz,1.5A 2
GPIO0 FRONT-OUT-L
+
T28 ct6032 100uF/10V FB0805 5 R
ICTP ns A_GPIO1 3 36 CT2 ns R376 75 R0402 SURR_OUT_R HP_DET 6
GPIO1 FRONT-OUT-R
+
ct6032 100uF/10V 3
1
D D
37 C304 4.7uF/10V,X5R D39 C428 C423 C422 7
LINE1-VREFO-R C0805 ESDPAD_R0603 0.1uF/10V,X7R 100pF/50V,NPO100pF/50V,NPO 8
C299 0.1UF/25V,Y5V EGA1-0603-V05 C0402 C0402
27 ns ns ns AZALIAJACK
2
VREF C300 C0805 change to ns for esd AUDIO8B
GND_AUD By Johan 071228
11 28 VREFOUT 10UF/6.3V,X5R
{22} AZALIA_CODEC_RST# REST# MIC1-VREFO-L R370 4.7K R0402 INT_MIC_L_R GND_AUD GND_AUD GND_AUD GND_AUD
{22} AZALIA_CODEC_BITCLK 6 BITCLK GND_AUD
29
{22} AZALIA_CODEC_SYNC 10 SYNC
LINE1-VREFO-L Headphone Jack
MIC2_REF
5
MIC2-VREFO 30 INPUT:HEADPHONE/LINE-OUT
{22} AZALIA_CODEC_SDOUT SDOUT
R348 33 LINE2-VREFO 31 OUTPUT:FRONT L/R
{22} AZALIA_SDATAIN0 8 SDIN
32 R371 4.7K R0402 INT_MIC_L_R used for enhancing Audio
MIC1-VREFO-R ns
R343 51K R0402 C275 1uF/10V,X7R 12 33 R372 10K ns
D35
1N4148WS
quality and ESD ability.
{43} BTL_BEEP PC-BEEP DCVOL VCC5CDC
C0603 MIC2_REF 1 2
JACK_DET_A 13 34 JACK_DET_B SOD323
JD1 JD2 D37
1N4148WS
R333 75K R0402 C276 1uF/10V,X7R C279 14 ALC662 43 1 2
{22} SPKR LINE2-L CEN-OUT GND_AUD GND_AUD
C0603 SOD323
100pF/50V,NPO 15 44
LINE2-R LFE-OUT Solve audio curve cut issue
R341 R337 MIC2_L R359 75 R0402 C284 4.7uF/10V,X5R C0805 16 45 By Johan 071224
MIC2-L SIDESURR-OUT-L
1
4.7K 4.7K R646 R638 D32 D36
MIC2_R R364 75 R0402 C289 4.7uF/10V,X5R C0805 17 46 4.7K 4.7K ESDPAD_R0603 ESDPAD_R0603
MIC2-R SIDESURR-OUT-R R0402 R0402 EGA1-0603-V05 EGA1-0603-V05
All of JD resistors should be
placed as close as possible to ICTPT30 ns 18 47 EAPD R360 0 R0402 SHUTDOWN# ns ns
2
CD-L SPDIFI/EAPD ns
the sense pin of codec. ICTPT29 ns 20 48
MIC_IN1
CD-R SPDIFO MIC2_L FB29
1 2300ohm@100MHz,1.5A 1 L
INT_MIC_L C297 1uF/10V,Y5V C0603 21 FB0805 4
MIC1-L AMP_OUT_L MIC2_R FB31
SURR-OUT-L 39 1 2300ohm@100MHz,1.5A 2
C296 1uF/10V,Y5V C0603 22 FB0805 5 R
JACK_DET_B R378 5.11K,1% R0402 ns MIC1-R R363 20K,1% MIC1_JD
JDREF 40 GND_AUD 6
23 LINE1-L 3
C JACK_DET_A R354 5.11K,1% R0402 HP_DET 41 AMP_OUT_R 7 C
SURR-OUT-R
1
CD-GND
VerA:follow the DEMO design in MIC1&MIC2 071108 24 D38 C430 8
AGND1
AGND2
LINE1-R C420 C424
GND1
GND2
R353 20K,1% ns MIC1_JD ESDPAD_R0603
EGA1-0603-V05 0.1uF/10V,X7R 100pF/50V,NPO 100pF/50V,NPO AZALIAJACK
JACK_DET_B R379 20K,1% ns C0402 C0402 AUDIO8B
2
QFPS48_0D5_1D6 ALC662 ns ns
4
7
19
26
42
GND_AUD GND_AUD GND_AUD GND_AUD GND_AUD
connecr mic1_jd to senseB change to ns for esd
and reserved route to senseA
By Johan 071224
Stereo Microphone Jack By Johan 071228
INPUT:STEREO MIC-IN
T31 GND_AUD
OUTPUT:CENT/LFE
ICTP MIC2_L
ns
MIC2_R
add cap for esd
By Johan 071228
INT_MIC_L_R C429 C421

100pF/50V,NPO 100pF/50V,NPO
C0402 C0402
FB25 FB0805
INT_MIC_L R574
+
1K 1 2 1
300ohm@100MHz,1.5A 2 GND_AUD GND_AUD
1
D27 C391
ESDPAD_R0603 MIC1
EGA1-0603-V05 100pF/50V,NPO Microphone
ns C0402 BZ_D6027
2
VCC5CDC VCC5CDC SURR_OUT_L SURR_OUT_R
ASSY GND_AUD GND_AUD
PQ75 PQ76 PQ70 PQ71
GAIN0 GAIN1 Av(inv)
3
2N7002 2N7002 2N7002 2N7002
SOT23 SOT23 SOT23 SOT23
0 0 6dB R367 R374
B 10K 10K AMP_SHDW1 AMP_SHDW1 B
10dB GND_AUD 1 1
0 1
ns ns
1 0 15.6dB INPUT:STEREO MIC-IN
2
GAIN0
GAIN1
1 1 21.6dB OUTPUT:CENT/LFE
R368 R373 onboard stereo
10K 10K
microphone VCC5CDC
GND_AUD GND_AUD U21 R640

TPA6017A2 10K
sop20_0d65_4d4g
AMP_OUT_R C0603 R362 20K 17 18 +INTSPR
C286 0.22uF/10V,X7R RIN- ROUT+ SHUTDOWN#
7 14 -INTSPR
RIN+ ROUT-
3
FB13 1 2FB0805 ns C292
300ohm@100MHz,1.5A 0.47uF/25V,Y5V R365 10K 9 4 +INTSPL Q32
GND_AUD LIN+ LOUT+ 2N7002
C0603
C287 0.22uF/10V,X7R 10 8 -INTSPL VCC5CDC 1
BYPASS LOUT- {43} AMP_SHDW
C303 0.1UF/25V,Y5V C0603 R644
ns AMP_OUT_L C0603 R366 20K 5 16 100K
2
C290 0.22uF/10V,X7R LIN- VDD R643
12 NC PVDD1 6
15 C293 10K
SHUTDOWN# PVDD2 0.1UF/10V,X7R SOT23
19 SHDWN# GND1 1
GND_AUD 11 C294 4.7uF/10V,Y5V
GAIN0 GND2 C295 C0805
2 GAIN0 GND3 13
20 0.1UF/10V,X7R
GAIN1 GND4 GND
3 GAIN1 GND5 21 GND_AUD
GND_AUD
IO_INTSPK1
A CNS4_V A
5 1 +INTSPR
5 1 -INTSPR
2 2
GND_AUD 3 +INTSPL
3 -INTSPL
6 6 4 4
TOPSTAR TECHNOLOGY
bent
Page Name AZALIA(ALC883)
C C46
A
GND_AUD PROPERTY NOTE: this document contains information confidential and property to
5 4 3 2 1
5 4 3 2 1
+V5S +V3.3S FAN Controller Circuit

Q13
BT H2
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
AO3415 +V5S {23,25,29,32,33,34,35,36,37,43,51,52,55,56}
+V3.3AL {6,23,24,26,27,29,32,33,36,39,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
R227 BT 0 R0805 2 3 R230 0 +V3.3S_BT
+V1.1S_VTT {8,10,11,27,28,29,50,51,55}
BT
+V1.5S {39,40,41,56}
R224 ns 0 R0805 BT
C215 BT C218 H1
1000pF/50V,X7R FAN
1
BT TPCON_USB 0.1UF/10V,X7R ns
R245 CNS10_0D8_R TH_230_132_118_6
100K
BT 1
1 HOLE
D 2 2 D
11 3 R228 BT 0 R0402 TH_200_132_118
11 3 BT_USB_PP2 {26}
4 R229 BT 0 R0402
BT_USB_PN2 {26}
1
R265 0 ns BT_ON# R256 BT 1K 4 +V3.3AL +V3.3S
12 12 5 5
6 R655 BT 0 R0402
6 USB_PP5 {36}
1
2
3
4
5
6
7
7 R656 BT 0 R0402 +V5S
7 USB_PN5 {36}
8 HW_RATIO_OFF# {43}
1
2
3
4
5
6
7
8 +V3.3S_BT R13 R12
9 9
3
10 10K 10K
Q15 10 ns
2N7002E-T1-E3 R22
R266 BT 1K 1 SOT23 BT_CON R233 BT 0 10K
{43} BT_PWRON M46 VERB:CHANGE BT_CON THE SAME AS X01--XIEZX BT_ON {32}
BT
FAN_BACK {43}
ns
2
R267 R654 ns 100K

BT_PWRON {43}
100K BT
3
BT
C214 R21 1K FAN_TACH_ON 1 Q5
MMBT3904-F R20
0.22uF/10V,X7R ns SOT23
C11
2
BT ns 0
+V5S 1000pF/50V,X7R
ns
Q28
BCP69-16 Vfan
CPUFAN1
SOT223 4
3 2 1 1 4 4
2 2
2
C16 3 5
R31 D22 3 5
C14
1
后续要改, 发ECN 改BOM 1K R26 0.1UF/25V,Y5V
1N4148WS
CONN3_V
1
10 10uF/6.3V,X5R CNS3_V
TCM R0603 R37 SOD323 FAN_FB
1
+V3.3S VCC_358 5.11K,1%
1
C12
2
+V3.3S U30 R34 U7A
C 1K 0.1UF/25V,Y5V LM358 C
8
22 10 R615 0 so8_50_150 Shut-Down
{22,40,43} LPC_FRAME# LFRAME# VDD1
16 19 R0805 TCM 3 +V3.3S
{8,17,26,39,40,41,43,44} BUF_PLT_RST#
2
LRESET# VDD2 +
{26} CLK_TCMPCI 21 LCLK VDD3 24 1
1
26 C409 C411 C407 2 Throttling/
{22,40,43} LPC_AD0 LAD0 -
23 4 0.1UF/25V,Y5V 0.1UF/25V,Y5V R36 Un-throttling
{22,40,43} LPC_AD1 LAD1 GND1
R610R620 R624 20 11 10uF/6.3V,X5R TCM TCM R39
{22,40,43} LPC_AD2
4
10K 10K 10K LAD2 GND2 TCM C13 10K,1%
{22,40,43} LPC_AD3 17 LAD3 GND3 18 4.7K
TCM ns TCM 27 25 R0402
{22,43} INT_SERIRQ
2
PM_CLKRUN# SERIRQ GND4 0.1UF/25V,Y5V
15 CLKRUN#
LPCPD# 28 1 R35 R38
LPCPD# NC High-5V
LPCPD# 2 1 100K 2
NC1 FAN1_V {43}
5 200K R0402
LPCPP NC2
9 BA0 NC3 6 Middle-4V
3 BA1 NC4 8
NC5 12
PM_CLKRUN# LPCPP 7 13 Low-3V
PP NC6
C15
R618 R622 C17
10K 10K
14 NC-P FAN1_V=3.30V,Vfan=5V 4.7UF/10V,Y5V 0.1uF/25V,Y5V
TCM TCM C0805 C0402
TCM
FAN1_V=2.65V,Vfan=4V 50 55 60 65 70 75 80 85 90 95 100
C404
1uF/10V,X7R
SOP28_0D65_6D1 FAN1_V=1.98V,Vfan=3V
C0603
TCM
+V1.1S_VTT
+V1.1S_VTT
R356
1K,1%
R0402
R361
B B
10K
1
{21} GPU_OVT# 2 3
SHDN_LOCK#
Q25 SHDN_LOCK# {53}
MMBT3904-F
3
SOT23
R355 10K 5 2
{8,27} THERMTRIP#
Q26
C285 MMDT3904 Del OVP CIRCUIT
4
R357 1000pF/50V,X7R SC70_6

100K
3
Q27
2N7002E-T1
{43} ALT_ON 1
Use for temperature alarm driver.

2
R369
100K
A VerA:Delete GMCH_TEMP signal and components 071026 A
Shut Down PCB1 PCBA1

VIN
CPU R20 MB R20 PCBA
8VCC_358
TOPSTAR TECHNOLOGY
Throttling on
THRMTRIP# SHDN#
PCB PCBA U7B bent
AND LM358 Page Name
CPU Temperature MDC&BT/FAN/OTP
THERM_ALERT# so8_50_150
Throttling Off 5 Size
+ Project Name Rev
VDC 0 85 90 95 100 7 C C46
Thermal (Degree) A
6 -
sensor Date: Tuesday, January 05, 2010 Sheet 38 of 59
4

5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,40,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V3.3AL {6,23,24,26,27,29,32,33,36,38,40,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+V1.5S {40,41,56}
+DATA4
D -DATA4 D
+V3.3S +V3.3AL +V3.3S
1
D26 D25
ESDPAD_R0603 ESDPAD_R0603
EGA1-0603-V05 EGA1-0603-V05 R567
ns ns 0
2
R0603 R561 R557 R556
0 0 0 +V1.5S
R0603 R0603 R0603
ns ns
+V3.3S_PCIE +V3.3AL_PCIE
MPCIE2
MINIPCIE_half_r6
52
24
48
28
2
6
Keep USB2.0 Signal stub short
+3.3VAUX
+3.3V0
+3.3V1
+1.5V0
+1.5V1
+1.5V2
+V3.3AL +V3.3S
R550 0 R0402
R551 0 R0402
CHK8
90ohm@100M0.33A
l4_0805 ns ICTP R591
3 4 -DATA4 36 46 ns 10K
{26} MINICARD_USB_PN1 USB_D- LED_WPAN# T57
2 1 +DATA4 38 44 R0402 R585
{26} MINICARD_USB_PP1 USB_D+ LED_WLAN# Wireless_LED# {45}
42 ns 10K
LED_WWAN# T54
ICTP R547 0 R0402 R0402
CL_RST1# {23}
C ns ns C
11 22 R562 0 R0402 minicard_Wake#
{23} CLK_PCIE_MINICARD# REFCLK- PERST# BUF_PLT_RST# {8,17,26,38,40,41,43,44}
PCIE mini Card

13 1 minicard_Wake# R592 0 R0402 ns
{23} CLK_PCIE_MINICARD REFCLK+ WAKE# PCIE_WAKE# {24,40,41,43,44}
7 minicard_CLKREQ#_R R584 0 R0402 ns minicard_CLKREQ#_R ns
CLKREQ# minicard_CLKREQ# {23}
{23} PCIE_TXN4_WLAN 31 PETN0

33 32 R555 0 R0402 ns
{23} PCIE_TXP4_WLAN PETP0 SMB_DATA CL_DATA1 {23}
30 R554 0 R0402 ns
SMB_CLK CL_CLK1
+V3.3AL {23}
{23} PCIE_RXN4_WLAN 23 PERN0

{23} PCIE_RXP4_WLAN 25 PERP0
5 ns
CHANNEL_CLK T62
3 ns ICTP
T60 CHANNEL_DATA T63 R0402
ns ICTP 17 ICTP
ns ICTP T61 RESERVED0 10K
19 RESERVED1 R578
+V3.3AL 20 R577 0 R0402
+V3.3S RESERVED_DISABLE HW_RATIO_OFF# {43}
R588 0 37
R586 0 R0603 R0603 RESERVED_PCIE0 ICTP
39 RESERVED_PCIE1
R587 0 41 16 ns
RESERVED_PCIE2 RESERVED_SIM0 T56
ns 43 14 R565 0 R0402 ns
RESERVED_PCIE3 RESERVED_SIM1 PWR_SW_VCC2 {36,43,48}
R0603 45 12 R564 0 R0402 ns
RESERVED_PCIE4 RESERVED_SIM2 EC_DEBG_UTXD {43}
47 10 R563 0 R0402 ns
RESERVED_PCIE5 RESERVED_SIM3 EC_DEBG_URXD {43}
49 8 ns
RESERVED_PCIE6 RESERVED_SIM4 T55
51 ICTP
RESERVED_PCIE7
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
B
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9 +V3.3S_PCIE +V3.3AL_PCIE B
C390 C393 C389 C392

PCIE MINI CARD 10UF/6.3V,X5R 0.1UF/25V,Y5V 10UF/6.3V,X5R 0.1UF/25V,Y5V
9
15
21
27
29
35
4
18
26
34
40
50
53
54
56
57
58
59
60
61
55
C0805 C0402 C0805 C0402
ns R284,R295,R337,R341, Install R283

For chang PCIE SPEC to 1.1
Swain 081104
+V1.5S
C207 C203 C206 C205 C204

10UF/6.3V,X5R 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V
C0805 C0402 C0402 C0402 C0402
A A
TOPSTAR TECHNOLOGY
bent
Page Name
PCIE MINI SLOT 1
A3 C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,41,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.5S {39,41,56}
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,41,42,43,44,45,46,47,48,49,50,52,53,56,57}
+VDC {32,46,48,49,50,51,52,55,56,57}
PCIE_NUT1
Hole+Dowel
3G
+DATA8
-DATA8 +V3.3AL
+V3.3S +V3.3AL +V3.3AL
1 1
D29 D28
EGA10603V05A1-B EGA10603V05A1-B R627 R629 R285
ESDPAD_R0603 ESDPAD_R0603 0 0 0
ns ns R0603 R0603 R0603 +V1.5S
D 2 2 ns 3G 3G D
R594
3.3PCIE2 3.3ALPCIE2 10K
ns
MPCIE1
MINIPCIE_R6
Keep USB2.0 Signal stub short
52
24
48
28
2
6
3G
+3.3V0
+3.3V1
+3.3VAUX
+1.5V0
+1.5V1
+1.5V2
R621 0 3G WAKE#
R623 0 3G
CHK9
{26} MINICARD_USB_PN2 3 4 -DATA8 36 46 R628 0 ns
+DATA8 38 USB_D- LED_WPAN# R626 0 ns
{26} MINICARD_USB_PP2 2 1 USB_D+ LED_WLAN# 44
ns 42 R625 0 ns 3G_LED# {43,45}
90ohm@100M0.33A LED_WWAN#
l4_0805
{23} CLK_PCIE_3G# 11 REFCLK- PERST# 22 BUF_PLT_RST# {8,17,26,38,39,41,43,44}
PCIE mini Card

{23} CLK_PCIE_3G 13 1 WAKE# R231 0 ns
REFCLK+ WAKE# PCIE_WAKE# {24,39,41,43,44}
7 MiniPCIE_REQ1#_R R246 0 ns
CLKREQ# MiniPCIE_REQ# {23}
{23} PCIE_TXN2_3G 31 PETN0

33 32 R619 0 ns
{23} PCIE_TXP2_3G PETP0 SMB_DATA SMB_DATA_S {6,15,16,23,41}
30 R617 0 ns SIM_PWR R385 8.2K SIM_DATA
SMB_CLK SMB_CLK_S {6,15,16,23,41}
R0402
1
23 D17 C312
{23} PCIE_RXN2_3G PERN0
25 ESDPAD_R0603 C309 100pF/50V,NPO
{23} PCIE_RXP2_3G PERP0
1
5 EGA1-0603-V05 0.1UF/25V,Y5V C308 C0402 D21
CHANNEL_CLK ns C0402 1uF/10V,X7R ns
3
2
R271 0 R0402 ns CHANNEL_DATA ns ns
+VDC 17 RESERVED0 C0603
R280 0 R0402 Debug 19
{8,17,26,38,39,41,43,44} BUF_PLT_RST#
2
RESERVED1 ns
R300 0 R0402 ns 20 R614 0 3G
RESERVED_DISABLE HW_RATIO_OFF_3G# {43}
R296 0 R0402 37
{26} PCI_CLK_DEBUG RESERVED_PCIE0
PICE_39 39
R316 0 R0402 ns RESERVED_PCIE1 R605 0 SIM_VPP
41 RESERVED_PCIE2 RESERVED_SIM0 16
R321 0 R0402 43 14 SIM_REST R613 R612
{22,38,43} LPC_FRAME# RESERVED_PCIE3 RESERVED_SIM1
C R324 0 R0402 Debug 45 12 SIM_CLK 10K 10K C
{22,38,43} LPC_AD0 RESERVED_PCIE4 RESERVED_SIM2
R326 0 R0402 Debug 47 10 SIM_DATA ns
R332 0 R0402 Debug 49 8 SIM_PWR SIMCARD1
R336 0 R0402 Debug 51 3G SIM_PWR C1
{22,38,43} LPC_AD3 RESERVED_PCIE7 VCC1
SIM_REST C2 G1
+V3.3S SIM_CLK RESET HOLE0
C3 CLK HOLE1 G2
+V3.3AL C4 GND
1
D18 C310 SIM_VPP C5
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
VPP
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
注意后续不上DEBUG 3G卡需要下拉 0.1UF/25V,Y5V SIM_DATA C6 IO
1
C0402 D20 ns C7
R304 0 R0603PICE_39 ns GND1
+V3.3AL C8
2
GND2
1
+V3.3S R313 0 R0603 ns PCIE MINI CARD ns C311 D19
9
15
21
27
29
35
4
18
26
34
40
50
53
54
56
57
58
59
60
61
55
ns 47pF/50V,NPO SIMCARD
2
C0402 ns SIMCARD
3G
2
R386
56
Add SIM card
R0402
ns Swain 081111
ns SIM card periphery current

许沐锌 081222
+V1.5S
3.3PCIE2 3.3ALPCIE2
C416
C221 C257 C410 10UF/6.3V,X5R C394 C239
Add Option for 3G card
C254 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V C0805 0.1UF/25V,Y5V C238 0.1UF/25V,Y5V Swain 080820
1uF/10V,X7R C0402 C0402 C0402 C0402 1uF/10V,X7R C0402
C0603 3G 3G 3G 3G C0603 3G
3G 3G 3G
B B
+V3.3AL
R377 VerB:the SW1 controll the 3G_LED

10K
R0402
{43} 3G_OFF
3G
3GVDD_ON R380 0 3G
4
5
4
3G_SW1
1 1 LSS-12M-V-B
1 SW_W_S7A
3 3
2 2 2
3
6
3G
6
A A
TOPSTAR TECHNOLOGY
bent
Page Name
USB Port
A2 C46 A
Date: Wednesday, January 20, 2010 Sheet 40 of 59
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,42,43,44,45,49,50,51,52,53,55,56,57,58}
+V1.5S {39,40,56}
+V3.3S +V1.5S
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,42,43,44,45,46,47,48,49,50,52,53,56,57}
EP_MYLAR1
U17
C263 C272 P2231
0.1uF/10V,X5R QFNS20_0D5_0D85G
0.1uF/10V,X5R 12
14
1.5Vin1 3.3Vout1 3
5
EXP_3.3V
PVC Change mylar type follow ME advised
1.5Vin2 3.3Vout2 By Johan 071228
2 15 EXP_AUX_3.3V ASSY
+V3.3AL 3.3Vin1 3.3Vauxout
D 4 3.3Vin2 D
11 EXP_1.5V
1.5Vout1
17 3.3Vauxin 1.5Vout2 13
EP_CON1
C256 PM_SLP_S3# 1 8 EXP_RST# Shield
STBY# PERST# ASSY
0.1uF/10V,X5RPM_SLP_S4# 20 10 EXP_CPPE# 621000000002
SHDN# CPPE#
Newcard_RST# 6 9 CP_USB#
SYSRST# CPUSB#
16 NC GND2 G1
RCLKEN 18 G2
RCLKEN GND3
19 OC# GND1 7
R349 0 Newcard_RST#
{8,17,26,38,39,40,43,44} BUF_PLT_RST#
add power sw
EP_B1 EP_B2
PM_SLP_S3#
{24,43,53} PM_SLP_S3#
PM_SLP_S4# ASSY ASSY
{24,43,56} PM_SLP_S4#
Screw 2*5mm Screw 2*5mm
C C
+V3.3AL
R322
100K +V3.3AL
2
PM_SLP_S4# ns 1 D11 R310 0

BAT54S ns
SOT23 Q22
J3 ns 2N7002E-T1-E3
3
SOT23
{23} PCIE_TXP3_EXP 25 PETp0 CLKREQ# 16 2 3 EXPCARD_CLKREQ# {23}
{23} PCIE_TXN3_EXP 24 PETn0

6 ns
RESV1
{23} PCIE_RXP3_EXP 22
1
PERp0 EXP_3.3V RCLKEN
RESV2 5
{23} PCIE_RXN3_EXP 21 PERn0
B B
+3.3VS_2 15
{23} CLK_PCIE_EXPCARD 19 REFCLK+
+3.3VS_1 14 C248 C252
{23} CLK_PCIE_EXPCARD# 18 REFCLK- 0.1uF/10V,X5R 10uF/6.3V,X5R
EXP_CPPE# 17 26
CPPE# GND0 EXP_AUX_3.3V +V3.3AL
EXP_RST# 13 ns
PERST#
+3.3VAUX 12
{24,39,40,43,44} PCIE_WAKE# 11 WAKE# C267 C260
8 0.1uF/10V,X5R 10uF/6.3V,X5R
{6,15,16,23,40} SMB_DATA_S SMB_DATA
GND1 23
7 EXP_1.5V R351 R350 R320
{6,15,16,23,40} SMB_CLK_S SMB_CLK ns 100K 100K 10K
R631 0 R0402 CP_USB# 4 10
L4_0805 CPUSB# +1.5V_1
+1.5V_2 9
CHK102 1 3
{26} EXPCARD_USB_PP0 USB_D+
{26} EXPCARD_USB_PN0 3 4 GND2 20 C273
ns 2 CP_USB#
USB_D-
1
90ohm@100MHz,0.5A D31 D30 1 0.1uF/10V,X5R

GND3 C277
R633 0 EXP_CPPE#
R0402 27 10uF/6.3V,X5R
GND4 EXPCARD_CLKREQ#
28
2
EGA1-0603-V05 EGA1-0603-V05 GND5

G1
G2
ESDPAD_R0603 ESDPAD_R0603 ns CAP type from X7R to X5R

Chang the
ns ns PECA00-000LBS4Z4N0
G1
G2
NEW_CARD3
A A
TOPSTAR TECHNOLOGY
bent
Page Name EXPRESS CARD
A3 C46
A
5 4 3 2 1
5 4 3 2 1
All of by-pass capacitors must be closed to IC

+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,43,44,45,49,50,51,52,5
REG18V
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,43,44,45,46,47,48,49,50,52,53,56,57}
D3.3V
D3.3V
REG18V VDD18
+V3.3AL D3.3V
+V3.3AL
R330 R309 0 R0402 ns
D C240 30K R331 0 R0402 IT1337E-48 PIN MUX D
REG18V
DGND
DGND
0.1UF/25V,Y5V R0402 C243
C0402 C265 2.2uF/10V,X7R C251 PINs SM/xD SD/MMC MS
RST 4.7uF/10V,X5R C0805 0.1UF/25V,Y5V 05 SM_WPSW SD_CMD MS_BS
U16 C269 C0805 C0402
4.7uF/10V,X5R 06 SM_RD MS_INS
36
35
34
33
32
31
30
29
28
27
26
25
C0805
07 SM_RNB SD_CD
REG18Vout
REG33Vout
SM/SD/MS D7
SM/SD/MS D6
SM/SD/MS D5
VSS
REG33Vin
GPIO6
GPIO5
TC
GPIO1
GPIO4
08 SM_D0 SD_D0 MS_D0
+V3.3AL PWR_SW2
PWR_SW2
37 24 C253 C268 18 SM_D3 SD_D3 MS_D3
Clk12M-out 38 GPIO7 REG5Vin 2.2uF/10V,X7R C264
Clk12M_out GPIO0/LED 23 1uF/10V,X7R
SM_CE 39 22 C0805 0.1UF/25V,Y5V C0603 22 SM_D4 SD_D4 MS_D4
SM_WP SM_CE/SD_WP SM/SD/MS D4 RST
40 SM_WP/SD_CLK/MS_CLK RST 21 C0402
DGND 41 20 29 SM_D5 SD_D5 MS_D5
VSS GPIO3 ClkSel
EE_SDA
42
43
SM_WR IT1337E-48 ClkSel 19
18 SM_D3 32 SM_D6 SD_D6 MS_D6
EE_SCL EE_SDA SM/SD/MS D3 PWR_SW2
44 EE_CLK SD/MS/xD
SM_WP_SW/SD_CMD/MS_BS
SM_CD 17
D3.3V 45 16 34 SM_D7 SD_D7 MS_D7
D3.3V AVDD33 SM_ALE
{26} USB_CR_PP8 46 DP PWR_SW 15
C {26} USB_CR_PN8 47 DM VDD33 14 D3.3V 39 SM_CE SD_WP C
DGND 48 13 DGND
AVSS VSS C266 40 SM_WP SD_CLK MS_CLK
0.1UF/25V,Y5V
SM_RNB/SD_CD
SM_RD/MS_INS
C0402 SM_WP R283 0 R0402 SD_CLK

SM/SD/MS D0
SM/SD/MS D1
SM/SD/MS D2
SM_CLE
Clk48M
XTALO
xD_CD
VDD18
XTALI
+V3.3S
IT1337E-48
1
2
3
4
5
6
7
8
9
10
11
12
QFPS48_0D5_1D6
CLK_CR_48M
SM_WPSW
SM_RNB
3IN1 CONN
SM_RD
SM_D0
SM_D1
SM_D2
VDD18
C237
XTALI
VDD18 0.01uF/25V,X7R
C0402
use 48Mhz crystal　 J2A PWR_SW2

SM_D2 2
ClkSel R329 0 SM_D3 DAT2_SD
3 DAT3_SD VDD_SD 6
R0402 SM_WPSW 4 CMD_SD C255
SD_CLK 7 SD+MMC C250 1uF/10V,X7R
CLK_SD 0.1uF/10V,X7R C0603
B B
CLK_CR_48M {23} SM_D0 9 8
SM_D1 DAT0_SD VSS_SD2
10 DAT1_SD
SM_RNB 1 5
SM_CE CD_SD# VSS_SD1
11 WP_SD#
use 12Mhz crystal　
D3.3V 3IN1
PWR_SW2
R293 0 Clk12M-out Int-12MHz J2B
R0402 SD_CLK 14 13
C235 CLK_MS VCC_MS
EEprom Setting
0.1UF/25V,Y5V XTALI SM_D3 15
U18 C0402 SM_RD 16
DAT3_MS MS
ns SM_D2 INS_MS C258
1 A0 VCC 8 17 DTA2_MS VSS_MS1 12
2 7 SM_D0 18 21 C262 1uF/10V,X7R
A1 WP EE_SCL SM_D1 DTA0_MS VSS_MS2 0.1uF/10V,X7RC0603
3 A2 SCL 6 19 DTA1_MS GND1 22
4 5 EE_SDA SM_WPSW 20 23
VSS SDA BS_MS GND2
S-24CS02AFJ-TB-G R327 R328 3IN1
SO8_50_150 0 0
ns R0402 R0402
ns
S0=P12=EEP_SDA
S1=P13=EEP_SCK
TOPSTAR TECHNOLOGY
A A
bent
Page Name Cardreader(ITE1337)
Custom C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3S +V5S
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,44,45,49,50,51,52,53,55,56,57,58}
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,44,45,46,47,48,49,50,52,53,56,57}
+V5S {23,25,29,32,33,34,35,36,37,38,51,52,55,56}
R342 Q19
8.2K 2N7002E-T1 EC_V3.3AL
1
C415
R0402 10UF/6.3V,X5R C403 C399 C398 C408 C412
R630 C0805
2 3 A20GATE 0 +V3.3AL 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V
{27} H_A20GATE
ns FB11 R0805
EC Output Signal! 120ohm/100MHz,500mA
1 2FB0603 EC_V3.3AL 1 2 V18R
D9 1N4148WS
Should have a 0.1uF capacitor close to every GND-VCC pair + one
1
SOD323 C400 larger cap on the supply.
C246 C245 0.1UF/25V,Y5V C402
+V3.3S +V5S C0402 1uF/10V,X7R
0.1UF/25V,Y5V
0.1UF/25V,Y5V C0603
Q20 Vin>=1.5V turn on the cup FAN. HDD_ZOUT R334 10K
V18R
2N7002E-T1 HDD_YOUT R315 10K
1
D R318 HDD_XOUT R312 10K D

10K ns PM_STATE R664 10K
GM
124
111
125
RCIN#
67
96
33
22
{27} H_RCIN# 2 3
9
U14 CHG_ON R253 10K
EC Output Signal! ALW_PWROK need move to other
V18R
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
place.pin110&111 follow the
D10 1 1N4148WS sequence of R18EC
SOD323 63 SYS_I_Sense
AD0/GPI38 SYS_I_Sense {54}
ADC
64 HDD_ZOUT +V3.3AL
A20GATE AD1/GPI39 HDD_YOUT
1 GA20/GPIO00 AD2/GPI3A 65
RCIN# 2 66 HDD_XOUT
KBRST#/GPIO01 AD3/GPI3B
MSIC
20 SCI#/GPIO0E
{27} EC_RUNTIME_SCI# EC_RESET#37
ECRST#
EC Input Signal! C271 change to DG
SYS_I_Sense By Johan 071224
R608 0 EC_BUF_PLT_RST# 12 21
{8,17,26,38,39,40,41,44} BUF_PLT_RST# {26} CLK_591PCI PCICLK PWM0/GPIO0F BTL_BEEP {37}
PWM
3 23 SPI_CS# R593 10K
{22,38} INT_SERIRQ SERIRQ PWM1/GPIO10 POWERLED# {45} 3300pF/50V,X7R
R0402 4 25 EC_SPI_MOSI R248 10K
{22,38,40} LPC_FRAME# LFRAME# PWM2/GPIO11 SET_I {54} swap for DG C0402
10 34 EC_SPI_MISO R249ns 10K
{22,38,40} LPC_AD0 LAD0 PWM3/GPIO19 EC_BKLT_PWM {32} By Johan 071224
KBCON1 8 SPI_SCK R583ns 10K
{22,38,40} LPC_AD1 LAD1
ACES 85201-2602 +V3.3AL 7
LPC
{22,38,40} LPC_AD2 LAD2 ns
CNS26_1_R_2D5 5 ns
{22,38,40} LPC_AD3 LAD3
EC_PCI_RST# 13 28 EC_FAN_BACK 1 D12
PCIRST#/GPIO05 FANFB0/GPIO14 FAN_BACK {38}
FAN
26 R339 CLKREQ 38 29 1N4148WS
26 CLKRUN#/GPIO1D FANFB1/GPIO15 V3G_1.05G_ON {57}
25 4.7K R0402 CLKREQ 26 SOD323
25 FANPWM0/GPIO12 FAN1_V {38}
24 SCANOUT15 27 R303 1K R308 SM_BAT_SDA2 R287 5.6K
24 FANPWM1/GPIO13 Camera_ON {32}
23 SCANOUT10 R0402 100K
23 SCANOUT11 +V3.3AL SCANIN7 SM_BAT_SCL2 R289 5.6K
22 22 62 KSI7/GPIO37
21 SCANOUT14 SCANIN6 61
21 SCANOUT13 RN1 4.7K SCANIN5 KSI6/GPIO36 LIDR# R288 10K
20 20 60 KSI5/GPIO35
19 SCANOUT12 1 2 SCANIN0 SCANIN4 59
19 SCANOUT3 SCANIN1 SCANIN3 KSI4/GPIO34
18 18 3 4 58 KSI3/GPIO33
17 SCANOUT6 5 6 SCANIN2 SCANIN2 57 83 BAT_LOW# R257 10K
17 KSI2/GPIO32 PSCLK1/GPIO4A/P80CLK TPCLK {36}
16 SCANOUT8 7 8 SCANIN3 SCANIN1 56 84
16 KSI1/GPIO31 PSDAT1/GPIO4B/P80DAT TPDAT {36}
15 SCANOUT7 ns SCANIN0 55 85
15 KSI0/GPIO30/E51_TXD(ISP) PSCLK2/GPIO4C BT_PWRON {38}
14 SCANOUT4 RN2 4.7K 86
14 PSDAT2/GPIO4D HW_RATIO_OFF# {39}
PS2
13 SCANOUT2 1 2 SCANIN4 82 87 PCIE_WAKE#_EC R282 10K
13 {57} V1.8G_1.5G_ON KSO17/GPIO49 PSCLK3/GPIO4E VGPU_ON {52}
12 SCANIN7 3 4 SCANIN5 0 R284 81 88 PM_STATE
12 {24} AC_IN_PCH KSO16/GPIO48 PSDAT3/GPIO4F EXTSMI# {27}
KB3926
11 SCANOUT1 5 6 SCANIN6 SCANOUT15 54 PM_STATE R665 10K
11 SCANOUT5 SCANIN7 SCANOUT14 KSO15/GPIO2F/E51_RXD(ISP) ns R274 PM
10 10 7 8 53 KSO14/GPIO2E
9 SCANIN4 SCANOUT13 52 0
9 KSO13/GPIO2D ALW_ACK {24}
KB
8 SCANIN5 ns SCANOUT12 51 ALT_ON R270 10K ns
8 SCANOUT0 SCANOUT11 KSO12/GPIO2C R273
7 7 50 KSO11/GPIO2B
C 28 6 SCANIN2 SCANOUT10 49 0 +V3.3AL C
28 6 SCANIN3 SCANOUT9 KSO10/GPIO2A
27 27 5 5 48 KSO9/GPIO29 ns
4 SCANOUT9 SCANOUT8 47
4 KSO8/GPIO28
SMBUS
3 SCANIN1 SCANOUT7 46 80 SML1DATA GPXIOA00 R255 10K
3 KSO7/GPIO27 SDA1/GPIO47 SML1DATA {23}
2 SCANIN0 SCANOUT6 45 79 SML1CLK
2 KSO6/GPIO26 SCL1//GPIO46 SML1CLK {23}
1 SCANIN6 SCANOUT5 44 78 R234 R235 R236
1 KSO5/GPIO25 SDA0/GPIO45 SM_BAT_SDA2 {47}
SCANOUT4 43 77 10K 10K 10K Fuction P.M2 P.M1 P.M0
KSO4/GPIO24 SCL0/GPIO44 SM_BAT_SCL2 {47}
SCANOUT3 42 ns ns
SCANOUT2 KSO3/GPIO23/TP_ISP
41 KSO2/GPIO22/TP_ANA_TEST VerA 0 0 0
+V3.3AL Double confirmed SCANOUT1 40 PCB_Mark0
不用的pin上拉到+V3.3AL. By Johan 0711081231 SCANOUT0 KSO1/GPIO21/TP_PLL GPXIOA00 PCB_Mark1
39 KSO0/GPIO20/TP_TEST GPXIOA00/SDICS# 97 VerB 0 0 1
98 PCB_Mark2
GPXIOA01/SDICLK CHG_LED# {45}
R292 10K ns EC_IMVP_ON 99 Verc 0 1 0
GPXIOA02/SDIMOSI BTL_LED# {45}
GPXIOA
R298 10K EC_IR_IN EC_PMSUSStat# 6 GPIO04 100
GPXIOA03 PM_PWRBTN# {24}
R286 0 ns PCIE_WAKE#_EC
14 GPIO07/i_clk_8051 101 R250 R251 R252
{24,39,40,41,44} PCIE_WAKE# GPXIOA04 AMP_SHDW {37}
15 GPIO08/i_clk_peri 102 R650 0 10K 10K 10K
{21,46} AC_IN GPXIOA05 BT_ON {32}
16 GPIO0A/CIR_RX2 103 ns
{24,53} PM_RSMRST# GPXIOA06 CHG_ON {54}
R290 1K 17 GPIO0B/ESB_CLK 104 3G_LED# {40,45}
{32,36} LIDR# GPXIOA07 change vera to verb hads
+V3.3AL PWRSW# R294 1K 18 GPIO0C/ESB_DAT_O/ESB_DAT_I 105
GPXIOA08 HW_RATIO_OFF_3G# {40}
19 GPIO0D 106 HW_OFF_BKLT#
{24,41,53} PM_SLP_S3# GPXIOA09 HW_OFF_BKLT# {32} BIU configuration should match flash speed used
{24,41,56} PM_SLP_S4# 32 GPIO18 GPXIOA10 107 AC_OFF {46}
R281 10K ns BT_PWRON R3351.5K,1% R0402 36 GPIO1A/NUMLED# 108
{8} CPU_VTT_PWG GPXIOA11 EC_GPU_RST# {17}
EC_IR_IN 73
R291 0 EC_IMVP_ON 74 GPIO40/CIR_RX LABEL1
GPIO
{55} IMVP_ON GPIO41/CIR_RLC_TX U28

{38} ALT_ON 89 GPIO50 Topstar Soft
127 GPIO59/TEST_CLKSPICLKI 109 SPI_CS# 1 8 VCC_SPI R603 0 EC_V3.3AL BIOS Ver: X.XX
{49} V1_5_ON GPXIOD0/SDIMISO 3G_OFF {40} CS# VCC
0 EC_PMSUSStat#
R272 110 ALW_PWROK {48} EC_SPI_MISO 2 7 HOLD#1 R601
R0603
4.7K EC_V3.3AL EC Ver: X.XX
{24} PM_SUS_STAT# GPXIOD1 Q HOLD#
GPXIOD
68 112 PCB_Mark0 EC_V3.3AL 4.7K WP#1 3 6 SPI_SCK R0402
{48} ALWAYS_ON GPO3C GPXIOD2 W# CLK XXXX年XX月XX日
R279 70 GPO3D 114 PCB_Mark1 R602 R0402 VSS 4 5 EC_SPI_MOSI
{56} MAIN_ON GPXIOD3 VSS D
1K 71 GPO3E 115 PCB_Mark2 EC/BIOS Label
{50} V1_1S_VTT_ON GPXIOD4
{49} V0_75S_ON 72 GPO3F GPXIOD5 116 W25X80A ASSY
+V3.3AL 117 BATT_IN# {47}
GPXIOD6 BKLT_ON {32}
76 118 EC_BUF_PLT_RST# SOIC8_50_208
{55} IMVP_PWRGD GPI43 GPXIOD7
+V3.3AL 75
{24,53} MAIN_PWROK GPI42
R254 EC_SPI_MISO U27
MISO 119
SPI
PROCHOT# 90 120 EC_SPI_MOSI VCC_SPI 8 5 EC_SPI_MOSI

10K E51CS#/GPIO52 MOSI SPI_SCK VDD SI EC_SPI_MISO
{39} EC_DEBG_UTXD 30 E51TXD/GPIO16 SPICLK/GPIO58 126 SO 2
ns AMP_SHDW 31 128 SPI_CS# WP#1 3 1 SPI_CS#
{39} EC_DEBG_URXD E51RXD/GPIO17/E51CLK change to DG SPICS# WP# CE#
R651 0 PM 92 6 SPI_SCK
{21,33} GPU_HDMI_HPD E51TMR0/GPIO54/WDT_LED# By Johan 071224 SCK
93 HOLD#1 7
{52} VGACORE_PWRGD E51INT0/GPIO55/SCROLED# HOLD#
R263 0 VSS
8051
91 E51TMR1/GPIO53/CAPSLED# VSS 4
{24} BAT_LOW# 95 E51INT1/GPIO56 XCLK32K/GPIO57 121 VTT_PWG {50,53}
CLK
122 EC_32XCLK1 W25X40 ns

XCLKI EC_32XCLK0 SO8_50_150
XCLKO 123
B EC_V3.3AL B
AGND
GND
GND
GND
GND
GND
add 0 OHM
R325
KB3926 10K
69
113
94
35
24
11
C270 R0402
4.7UF/10V,Y5V VerB Colay tow roms
C0805 EC_RESET#
{24} EC_IMVP_PWRGD R340
3
The 0ohm RES will across the isolate C261
1 Q24 R338
island of anolog GND and digital GND +V3.3S MMBT3904-F 0.01uF/16V,Y5V 0
R299 R0603 C0402 R0402
2
0 +V3.3AL 100
+V3.3AL R0402 ns
PM_SLP_S4# R609 4.7K R0402 R345
ns 10K
PM_SLP_S3# +V3.3AL R0402
R295 R611 4.7K R0402
10K
R0402 ns C225
R604 4.7K R0402 EC_BUF_PLT_RST# 0 R607 EC_PCI_RST#
C247 C242
PWRSW# R0402 EC_32XCLK0 R269 121K,1% C0402
100pF/50V,NPO 100pF/50V,NPO ns
R606
3
Y2 15pF/50V,NPO
10K
1
Q21 C241 R0402 32.768KHz
ns R258 xd3_2X6
3
1 10M ASSY
{36,39,48} PWR_SW_VCC2
2N7002E-T1C0402 R0402
2
R319 1000pF/50V,X7R
C224
2
1M EC_32XCLK1 C0402
R0402
15pF/50V,NPO
+V5S
Q17
1
2N7002E-T1
EC Input Signal!
A 2 3 PROCHOT# A
{8} EC_PROCHOT#
R268 0 ns
R302 0 R0603
TOPSTAR TECHNOLOGY
bent
Page Name KBC(PC87541L)
Custom C46
A
5 4 3 2 1
5 4 3 2 1
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,45,46,47,48,49,50,52,53,56,57}
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,45,49,50,51,52,53,55,56,57,58}
Layout Note: R109 3.6K R0402
+V3.3AL VDD3D3_LAN
VDD3D3_LAN
Place close to VDD33_LAN PINS. VDD3D3_LAN
VDD3D3_LAN FB3
(PIN16,PIN37,PIN46 and PIN53)
100M Lan(RTL8101E/8102E) Power domain chart 120ohm/100MHz,500mA
1 2FB0603
R108 10K R0402 10K is used only
when 93C56 is
ns used.
RTL8101E RTL8102E VDD3D3_LAN AVDD33
VerD:LAN Delete Caps and change DVDD15
C61 C56 C73 C84 EECS 1 8
C0402 C0402 C0402 C0402 some options followed demo AVDD33 3.3V 3.3V EESK 2 CS VCC
7
0.1UF/25V,Y5V 0.1UF/25V,Y5V EEDI/AUX 3 SK NC1
0.1UF/25V,Y5V 0.1UF/25V,Y5V
board and colay 8102E EEDO DI NC2 6
4 DO GND 5
By K' 080522 AVDD18 1.8V 1.2V C92
D D
U24 C0402
Layout Note: AT93C46-10SU-2.7 0.1UF/10V,X7R
AVDD33 EVDD18 1.8V 1.2V SO8_50_150
Place close to AVDD33 PINS. U23
53
46
37
16
59
58
33
52
49
43
41
38
32
21
15
48
47
45
44
2
C91
(PIN2)
DVDD15 1.5V 1.2V
EESK
EEDI
EECS
EEDO
VDD33_04
VDD33_03
VDD33_02
VDD33_01
AVDD33_02
AVDD33_01
VDD15_10
VDD15_09
VDD15_08
VDD15_07
VDD15_06
VDD15_05
VDD15_04
VDD15_03
VDD15_02
VDD15_01
0.1UF/25V,Y5V Layout Note:
VerC:Delete Caps followed C0402
Place close to AVDD18 PINS.
demo board by Robin 080418 (PIN5,PIN8)
{23} PCIE_GLAN_CLKP 26 REFCLK_P EVDD18_02 28 EVDD18
{23} PCIE_GLAN_CLKN 27 REFCLK_N EVDD18_01 22
FB12
CTRL18 AVDD18 23 14
{23} PCIE_TXP1_LAN HSIP AVDD18_04 AVDD18
{23} PCIE_TXN1_LAN 24 HSIN AVDD18_03 11
RTL8111B/RTL8101E时为1.8V C324 C0402 29 8 Layout note:
RTL8111C是1.2V {23} PCIE_RXP1_LAN HSOP AVDD18_02
C326 C0402 0.1UF/10V,X7R 30 5 FB12
{23} PCIE_RXN1_LAN HSON AVDD18_01 0.01uf caps need to be
FB2 0 R0805 0.1UF/10V,X7R
20 63 DVDD15 C59 placed close to PIN5
{8,17,26,38,39,40,41,43} BUF_PLT_RST# PERSTB VCTRL15
1 CTRL18 C0402
C54 C55 C58 C57 VCTRL18 0.01uF/25V,X7R
{24,39,40,41,43} PCIE_WAKE# 19 LANWAKEB
C0805 C0402 C0402 C0402 3 LAN_TX0+
0.1UF/25V,Y5V 0.1UF/25V,Y5V +V3.3S R442 1K R0402 MDIP0 LAN_TX0-
36 ISOLATEB MDIN0 4
10UF/6.3V,X5R 0.1UF/25V,Y5V 6 LAN_TX1+
MDIP1 LAN_TX1-
R443 54 LED3 MDIN1 7
8101E 8101E 8101E 15K R0402 55 9 VerC:Add 0.01uF followed demo
LED2 MDIP2
56 10
R410 2.49K,1% R0402 57
LED1 MDIN2
12 for better EMI performance
8102E LED0 MDIP3
R68 0 R0805 R395 2K,1% R0402 RSET MDIN3 13 by Robin 080417
EVDD18 Layout Note: 64 RSET LAN_XTALOUT
8101E 8101E 61
C70 C74 C62 Place close to CKTAL2
60 LAN_XTALIN
C0402 C0402 C0805 CKTAL1 Y3 25MHz
0.1UF/25V,Y5V 0.1UF/25V,Y5V 1uF/25V,Y5V
EVDD18 PINS. 62 GVDD
1 2
EGND1
EGND2
(PIN22,PIN28)
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
XS2_3d3
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
8101E 8102E C69 C67 C323 C322
C0603 C0402 C0402 C0402
C 1uF/10V,Y5V 0.1UF/25V,Y5V 27pF/50V,NPO 27pF/50V,NPO C
25
31
G1
G2
G3
G4
G5
G6
G7
G8
G9
51
50
42
40
39
35
34
18
17
8101E 8101E RTL8101E-GR
DVDD15 DVDD15
TP2 TP1
ICTP
ICTP
Layout Note:
C85 C60 C82 C68 C83 C71 place close to transformer
10UF/6.3V,X5R 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V 0.1UF/25V,Y5V Layout Note:
C0805 C0402 C0402 C0402 C0402 C0402 place close to IC ns ns
8101E
LAN_TX1+
LAN_TX1-
Layout Note:
LAN_TX0+
LAN_TX0-
Place close to DVDD15 PINS
(PIN15,PIN21,PIN43,PIN49 and PIN58) C97 330PF/50V,X7R
DVDD15 C0603 R392 R391
R394 R393 C103 4.7uF/10V,Y5V 49.9,1% 49.9,1%
49.9,1% 49.9,1% C0805 R0402 R0402
R0402 R0402 C319 330PF/50V,X7R 8101E 8101E
8101E 8101E C0603
C80 C314 330PF/50V,X7R
0.1UF/25V,Y5V C0603 C316
C0402 C317 0.01UF/25V,Y5V
C0402 C0402
0.01UF/25V,Y5V IO_CASE_GND 8101E
8101E
RN3
AVDD18 VDAC 0x4
RA0603_8 IO_CASE_GND
B B
R390 0 R0402 U9 1 2
8101E 3 4 RJ1
TRAN16_50_272 5 6 RJ45
9
7 8 RJ45_S
GND 13 5 RJ45
IO_GND N4 N2
12 N3 N1 4
RJ45_TX0+ 1 TX0+
VDAC LAN_TX0- 9 8 TX0- CHK3 RJ45_TX0- 2 TX0- TX0+
TD- TX- TX1- RJ45_TX1- RJ45_TX1+ TX1+ TX0-
4 L2+ 5 L3+ 3
11 6 MCT5 TX1+ 3 6 RJ45_TX1+ RJ45_TX2+ 4 TX2+ TX1+
TDC CMT L2- L3- TX2+
TX0- 2 7 RJ45_TX0- RJ45_TX2- 5 TX2- TX2-
IH1 LAN_TX0+ TX0+ TX0+ L1+ L4+ RJ45_TX0+ RJ45_TX1- TX1-
10 TD+
1CT:1CT TX+ 7 1 L1- 8 L4- 6 TX1-
ns RJ45_TX3+ 7 TX3+ TX3+
LAN_TX1- 15 2 TX1- 90ohm@100MHz RJ45_TX3- 8 TX3- TX3-
RD- RX- CMC8
14 3 MCT6
RDC RXC
HOLE LAN_TX1+ 16 1 TX1+
1
10
TH_315_118 C315 C318 RD+
1CT:1CT RX+
ns C0402 C0402 Layout Note:
0.01UF/25V,Y5V 0.01UF/25V,Y5V Colay CHOCK AND RN
IO_CASE_GND
IO_CASE_GND
MCT5
RJ45_TX0+ RJ45_TX1- MCT6
RJ45_TX2+
RJ45_TX2-
D3 RJ45_TX3+
AZC099-04S RJ45_TX3-
6
SOT23_6
ns
R125 R122 R115 R107 R91 R90

75 75 75 75 75 75
A R0402 R0402 R0402 R0402 R0402 R0402 A
1
Topstardigital
C86
RJ45_TX0- RJ45_TX1+ C1206 bent
1000pF/2000V Page Name PWR/Lan/USB/RJ45 Board
IO_CASE_GND C C46
IO_CASE_GND A
to others or used for any purpose other than that for which it was obtained with the
expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,49,50,51,52,53,55,56,57,58}
WIRELS1 BL-HGB35A-TRB
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,46,47,48,49,50,52,53,56,57}
2 1 R648 220
{39} WIRELESS_LED#
LED2_0805 R0402
Blue color
3G_LED1 BL-HGB35A-TRB
D D
{40,43} 3G_LED# 2 1 3G+ R649 220
LED2_0805 3G R0402 SATA_LED# ESD4 1 2 EGA1-0603-V05
ns ESDPAD_R0603
HDD1 BL-HGB35A-TRB
2 1 IDE+ R647 150 WIRELESS_LED# ESD5 1 2 EGA1-0603-V05
{22} SATA_LED#
LED2_0805 R0402 ns ESDPAD_R0603
CHARGE_LED ESD1 1 2 EGA1-0603-V05

ns ESDPAD_R0603
C434 BAT_STATE_LED ESD2 1 2 EGA1-0603-V05

1000pF/50V,X7R C433 1000pF/50V,X7R ns ESDPAD_R0603
C0402 1000pF/50V,X7R C432
C0402 C0402 PWR_LED ESD3 1 2 EGA1-0603-V05
ns ESDPAD_R0603
+V3.3AL
S46/LED的颜色换成了蓝色
CHARGE1
G Blue Color BAT_STATE_LED C426 1000pF/50V,X7R C0402

R641 220 R0603 CHARGE_LED 2 1 C431
{43} CHG_LED#
R 0.1UF/10V,X7R CHARGE_LED C425 1000pF/50V,X7R C0402
R642 220 R0603 BAT_STATE_LED 4 3 C0402
{43} BTL_LED#
Red color PWR_LED C427 1000pF/50V,X7R C0402
HA1GE33B AMB/GREEN
LED4_1210A
C POWER1 C
{43} POWERLED# R645 220 R0603 PWR_LED 2 1
BL-HGB35A-TRB
LED2_0805
S46/加上LED灯，只有4个LED，包括一个双色的LED，Blue
B B
A A
TOPSTAR TECHNOLOGY
bent
Page Name LED&Touch PAD&QuickButton
C C46 A
5 4 3 2 1
+VDC {32,40,48,49,50,51,52,55,56,57}
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,47,48,49,50,52,53,56
AD+ {36,48}
BATT+ {47,54}
AD++
PD28
SSM34PT
{54} Isense_SYSN
SMA
S_Bot
1
Co-lay. {36,54} Isense_SYSP
18.5-19V/4A PQ41
PD29 SBM54PT
1 SMB
AO4419 ns
SO8_50_150 S_Bot PR222
AD+
4A 1S_Bot 8 8 1 4A
2 7 7 2
3 6 6 3 0.025,1%
S 5 5 S R2512
PR15 D PQ40 D PR11 S_Bot
PC11 51K G AO4419 G 51K PC9
1000pF/50V,X7R R0402 SO8_50_150 R0402 0.01UF/25V,X7R PC139
4
C0402 S_Top S_Bot S_Top C0402 0.1UF/25V,X7R
S_Top PD2 PD3
ns C0603
S_Top S_Bot
1 1
1N4148WS PR12 1N4148WS

AD+ SOD323 51K SOD323
S_Top S_Top
R0402
S_Top
VCC393
PR13 PQ1
3
PR10 51K 2N7002
8
10 R0402 SOT23
C+ R0402 S_Top S_Top
3 +
1 S_Top AC_OFF# 1
C- 2 -
PU1A 4A
2
LM393 PR14
4
SO8_50_150 51K
S_Top R0402 PC10
S_Top C0402
1000pF/50V,X7R
S_Top
AD+ +V3.3AL
VDC1
PQ44 TestP
PD4 AP4407 ns
PR42 SSM34PT SO8_50_150 TPC60
3
S_Bot
75K
R0402 PQ5
SMA
S_Top
1
6A 1S_Bot
2
8
7
S_Top 2N7002 +VDC
3 6
1 SOT23
S_Top
8 1 S 5 9V-19V/6A
PR39 9-12.6V/6A 7
6
2
3 G
D
2
51K BATT+ 5 S
AC_IN {21,43}
4
R0402 PQ43 D PR45
S_Top PR28 AP4407 G 51K
PR27 1K SO8_50_150 R0402
4
PC20 20K R0402 S_Bot S_Top
1000pF/50V,X7R R0402 S_Top PR32
C0402 S_Top PR7 51K
S_Top 2K R0402
R0402 2 PR30 S_Top
AD+ S_Top 10 PR36
3 VCC393 R0402 100K
S_Top R0402 PR44
BATT+ 1 PR35 S_Top 10K
PR9 PC8 0 R0402
PD1 10K 0.01uF/25V,X7R S_Top
R0402
3
BAT54C R0402 C0402 PR46
SOT23 ns S_Top AD++ S_Top 51K
3
S_Top S_Top ns PQ3 R0402
PR18 2N7002 S_Top
0 R0402 1 PQ6
AC_OFF# ns PR37 SOT23 2N7002
S_Top SOT23
51K {53} SHDN# 1
2
S_Top S_Top
R0402
8
PR21 PR22 S_Top
2
3
AD+ C+ 5 PR31 PR33
+
PR23 7 1 100K
3
2K,1% 49.9k,1% 15K,1% BATT+ C- 6 R0402 PR49

-
R0402 R0402 R0402 PU1B 300K S_Top 51K
2
S_Top S_Top S_Top PR17 LM393 R0402 PR29 PQ4 R0402 PC29
4
49.9k,1% PR16 SO8_50_150 PR40 S_Top MMBT3904-F S_Top 1000pF/50V,X7R

{43} AC_OFF 1 300K
PC16 R0402 15K,1% PC12 S_Top 51K SOT23 C0402
S_Top R0402 S_Top S_Top
PQ2 0.01UF/25V,X7R R0402 0.1uF/10V,X7R R0402 ns
2
2N7002 C0402 S_Top C0402 S_Top S_Top

1、执行battery learning时电池放电过程， PR25 SOT23 ns S_Top
2、S0下，EC监测到电池过压信号， 10K S_Top S_Top
这两种情况，EC发出AC_OFF高电平信号。 S_Top
VB:Add PC212.
PC212
0.22uF/10V,X7R
C0603
S_Top
TOPSTAR TECHNOLOGY
bent
Page Name ADAPTER IN
A3 M12
B
PC6
PFB1 0.1uF/25V,X7R
100ohm@100MHz,3A C0603
1 2 S_Top
S_Top PC5
BATT+ {46,54}
FB0805 0.1uF/25V,X7R
AD+ {36,46,48}
PFB2 100ohm@100MHz,3A C0603
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,48,49,50,52,53,56,57}
1 2 ns
S_Top PC7 PF1 S_Top BATCON1
FB0805 0.1uF/25V,X7R 8A
6A PFB3
1 2
C0603 ns
1
FUSE1206
S_Top 2 6A 7 BATT+
BATT+ S_Top
PC14 1000pF/50V,X7R 100ohm@100MHz,3A KEY
C0402 FB0805
S_Top SM_BAT_SDA2 S_Top PR4 100 SM_BAT_SDA 6 SDAT
{43} SM_BAT_SDA2
R0402
SM_BAT_SCL2 S_Top
100 SM_BAT_SCL 5 SCLK
{43} SM_BAT_SCL2
PR3 R0402
S_Top 4 TEMP
3 BAT_IN# +V3.3AL
2 GND +V3.3AL
BAT54SPT BAT54SPT
1 GND S_Top S_Top
6A SK-C103A3-100A
2 2
9
SM_BAT_SDA2 3 SM_BAT_SDA 3 SM_BAT_SCL
+V3.3AL PC3 PC1
SM_BAT_SCL2 0.1uF/25V,Y5V 1 0.1uF/25V,Y5V 1
C0402 C0402
S_Top S_Top
PZD2 PZD1
GND_BAT
PC4 PC2 PR2
5.6pF/50V,NPO 5.6pF/50V,NPO 300K
C0402 C0402 R0402
S_Top S_Top S_Top
PR1 1K
BATT_IN# {43}
R0402
S_Top
内层桥接走线,宽度保证有240mils.
PR6 0 R0402
GND_BAT
S_Top
PR5 0 R0402
S_Top
PR8 0 R0402
S_Top
GND_BAT
TOPSTAR TECHNOLOGY
bent
Page Name BATTERY IN
A3 M12
B
5 4 3 2 1
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,49,50,5
+VDC {32,40,46,49,50,51,52,55,56,57}
AD+ {36,46}
+V5AL {29,32,36,49,50,53,56}
EC_RTC {22}
1.输入电容要靠近MOSFET漏极
2.MOS管尽量靠近IC芯片
+V3.3AL
D 3.芯片的Thermal D
GND用至少5个过孔连到信号地,用来散热
PR210 4.信号地和电源地在输出电容的负极连到一起
10K
GND_TPS51125
R0402
S_Top +VDC
{43} ALW_PWROK
+VDC
2A 2A
PR201 PR202
7.68K,1% 10K,1%
R0402 R0402
PC207 PC210 PC211 S_Top PC200 S_Top PC205 PC204 PC206 PC155
4.7uF/25V,X7R 0.1uF/25V,X7R 1000pF/50V,X7R 0.22uF/16V,X7R 1000pF/50V,X7R 0.1uF/25V,X7R 4.7uF/25V,X7R 10uF/ 25V,X7R
C1206 C0603 C0402 PR209 C0603 PR208 C0402 C0603 C1206 C1210
S_Bot S_Bot S_Bot 5.11K,1% S_Bot S_Bot S_Bot S_Bot ns
R0402 15K,1% S_Bot
S_Top PR296 R0402
0 S_Top
VREF
GND_TPS51125 PR203 ENTRIP1 R0402 ENTRIP1 GND_TPS51125
R0402 S_Bot
200K PR204
PC120
200K
1
S_Top R0402
EC_RTC S_Top
10uF/6.3V,X5R
ENTRIP2
TONSEL
VREF
ENTRIP1
VFB2
VFB1
C0805
S_Top 7 24
C VO2 VO1 C
8
7
6
5
5
6
7
8
PQ77 8 23 PQ73
V3R3AL1 VREG3 PGOOD
D
AO4468 PC124 PC125 AO4468
D
TestP SO8_50_150 0.1uF/25V,X7R 0.1uF/25V,X7R SO8_50_150
ns 4 S_Bot C0603 9 VBST2 VBST1 22 C0603 S_Top S_Bot 4 V5AL1
S_Top
G
TPC60 G TestP
S
PL11 PR312 PR218 PL12 PC131 ns
S
S_Top
PC134 3.3uH/4.8A PR311 2.2 R0402 10 PU9 21 2.2 R0402 5.2uH/5.5A 4.7uF/25V,X7R TPC60
1
2
3
3
2
1
4.7uF/25V,X7R LS2_8836 10K DRVH2 DRVH1 LS2_1051 C1206 S_Bot
TPS51125
C1206 S_Bot R0402 S_Bot S_Top S_Top PR219 S_Bot S_Top
S_Top S_Bot 11 20 10K LL2
+V3.3AL 1 LL2 LL1 R0402
1
+V5AL
2
8
7
6
5
PR221 S_Top
5A ns 2.2 PR220
5A
D
+ + 12 19
1
DRVL2 DRVL1
2
R0805 PD27 2.2
SKIPSEL
5
6
7
8
1
S_Top
1N5819 4 PR309 0 PR310 R0805 ns
VREG5
2
S_Top
D
VCLK
PC215 SOD123 0 PZ4
1
G2 G1 + +
GND
1
1
EN0
S_Bot GND2 GND1
VIN
CT7343_19 S_Top PQ74 R0402 R0402 BZT52C5V6S-F/5.6
S
S_Top AO4468 S_Bot 4 PC129 SOD323

1
2
3
1
G
PZ5 220UF/2.5V,POSCAP SO8_50_150 GND_TPS51125 1000pF/50V,X7R PC216 S_Top
1
13
14
15
16
17
18
S_Bot
S
BZT52C3V6S-F/3.6 PC133 PC209 PQ72 PD31 C0402 CT7343_19
SOD323 1000pF/50V,X7R 220UF/6.3V,OSCON PC130 GND_TPS51125 AO4468 1N5819 S_Top S_Top
3
2
1
S_Top C0402 CAP6_6x7_3 1000pF/50V,X7R SO8_50_150 SOD123 220UF/2.5V,POSCAP PC132
S_Top S_Bot S_Bot S_Bot
C0402
S_Top 5A PR308
0 PD30
PC208
220UF/6.3V,OSCON
1000pF/50V,X7R
C0402
S_Top
R0402
S_Bot
+VDC VREG5
5A Co-lay. SSM34PT
SMA
CAP6_6x7_3
S_Bot
ns
B PC128 PC127 S_Bot B
VREF
1 PR215 1K EN0_AL 4.7uF/10V,X5R 10uF/6.3V,X5R
{36,39,43} PWR_SW_VCC2
PD26 R0402 ns C0805 C0805
1N4148WS PR213 S_Top S_Top
SOD323 S_Top 100K
2 S_Top R0402 PC126
{43} ALWAYS_ON
ns 0.022uF/16V,X7R
S_Top C0402 ns
3
1 GND_TPS51125 S_Top
GND_TPS51125 PR205
AD+
PD25 1K
PR207 PR206 BAT54C R0402
100K 15K PC121 SOT23 VREG5 S_Top
R0402 R0402 0.22uF/10V,X7R S_Top PR217 ENTRIP1
S_Top S_Top
C0603 1K R0402 PC118
S_Top ns 0.1uF/25V,Y5V
PR216 C0402
3
VB:调整Always电上电波形。 S_Top 4.7K ns

R0402 PQ37 S_Top
S_Top 2N7002
1 SOT23
PR212 PC122 S_Top
10K 0.1uF/10V,X7R
2
3
R0402 C0402 PR214 PR295 0

S_Top ns 1 30K R0402
S_Top R0402 S_Bot
S_Top
2
A
PR211 GND_TPS51125 A
30K PQ38 TOPSTAR TECHNOLOGY
R0402 MMBT3904-F
ns SOT23 bent
S_Top S_Top Page Name +V3.3AL/+V5AL
A3 C46
B
5 4 3 2 1
+V0.75S {15,16,56}
+V5AL {29,32,36,48,50,53,56}
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,50,52,53,56,57}
+VDC {32,40,46,48,50,51,52,55,56,57}
+V1.5 {8,11,15,16,56,57}
+V1.8S {11,26,28,29,31,56,57}
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,50,51,52,53
+V5AL
+V3.3AL
+VDC 2A
PU4
tps51218 PR103
PR98 QFN10_0D5_0D8G 0
4.7K S_Top R0402 PC53 PC41 PC49 PC43
5
6
7
8
9
R0402 S_Top PC50 0.1uF/25V,X7R 1000pF/50V,X7R 4.7uF/25V,X7R 10uF/ 25V,X7R
S_Top
D
TPS51218 0.1uF/25V,X7R C0603 C0402 C1206 C1210
1
{53} DDR_PWG 1 10 C0603 S_Top S_Top S_Top S_Top S_Top
PJ2 PR97 PGOOD VBST PQ49
4
G
PR90 JOPEN 147K,1% SI4892DY V1R5
S
2K RESISTOR_1 R0402 2 9 PR229 PR230 SO8_50_150_PPAK TestP
R0402 S_Top TRIP DRVH 2.2 10K S_Bot PL5 TPC60
3
2
1
S_Top ns S_Top
3 8
R0402
S_Bot
S_Bot 1.0uH/11A
LS2_6530 12A ns
S_Top
{43} V1_5_ON EN SW 1
S_Bot +V1.5
0.7V 12A
5
6
7
8
9
4 7 PR231 PC55
VFB V5IN
2
D
PR314 0 PC160 0.1uF/10V,X7R
100K R0402 PR119 220UF/6.3V,OSCON C0402
1
5 6 S_Bot 4 2.2 CAP6_6x7_3 S_Top PZ2
GND
R0402 RF DRVL S_Bot
G
R0805 BZT52C2V0S-F/2.0V
1
+ +
1
S_Top S_Top
S
PC52 PQ50 SOD323
1
4.7uF/10V,X5R AO4706 ns
11
3
2
1
2
S_Top
PR96
PR95
470K
C0805
S_Top
SO8_50_150_PPAK
S_Bot PC58
PC156
220UF/6.3V,OSCON OCP>14A
PC37
0.022uF/16V,X7R
10K,1%
R0402
R0402
S_Top
Set Fsw 290K 8.2m ohm@4.5V/AO4706 PD11
1000pF/50V,X7R
C0402
CAP6_6x7_3
S_Bot
+/-3.3% DC
C0402
ns
S_Top 4.3m ohm@4.5V/AOL1718 SSM34PT
SMA
S_Top 5% DC+ AC Switcher
S_Top S_Top
PR91
11.5K,1% R0402
S_Top
PC38 PR92
0.022uF/16V,X7R 20K
C0402 ns R0402 ns
S_Top S_Top
PU10
APL5331
SOP8_1D27_4G
S_Bot
加强此器件散热。
1A-2A 1 8
PD15 1N4148WS
SOD323
+V1.5 VIN NC3 V1R8S1
1 ns
PR54 +V3.3AL S_Top TestP
2 GND NC2 7
2K,1% TPC60
PC149 R0402 3 6 ns
S_Top REFEN VCNTL S_Top
4.7uF/10V,X5R 1A Max
ADJ/GND
PGND
C0805 4 5 +V3.3S 3 2 +V1.8S

PC147 S_Bot VOUT NC1 PC142 VIN VOUT
Vo 4
0.1UF/10V,X7R 4.7uF/10V,X5R
C0402 PR53 C0805 1A
9
S_Bot 2K,1% S_Bot PU6 PR140
1
R0402 APE1117C 220
S_Top SOT223 R0402
PC148 PC74 S_Top S_Top PC57 PC60 PC71 PR142
0.1UF/10V,X7R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 10uF/6.3V,X5R 1K
C0402 C0805 C0805 C0805 C0805 R0402
+V3.3AL S_Bot TPC60 S_Top S_Top S_Top S_Top ns
TestP PR141 S_Top
V0_75S1 100,1%
ns R0402
S_Bot S_Top
PR55
3
4.7K
R0402 PQ17
S_Top 2N7002 +V0.75S
PR57 1 SOT23
S_Top
10K
R0402 1A-2A
2
3
S_Top
1 PQ18
PC150
10uF/6.3V,X5R
PC151
10uF/6.3V,X5R 2A Max
{43} V0_75S_ON
MMBT3904-F
S_Top
C0805
S_Bot
C0805
S_Bot +/-15mV DC
+/-65mV DC+AC Linear
2
PR56
30K PC32
R0402 0.022uF/16V,X7R TOPSTAR TECHNOLOGY
ns C0402
S_Top ns bent
S_Top Page Name +V1.8/+V0.9S DDR
A3 M12
B
+VDC {32,40,46,48,49,51,52,55,56,57}
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,51,52,53,55,56,57,58}
+V5S {23,25,29,32,33,34,35,36,37,38,43,51,52,55,56}
+V1.05S {22,23,24,28,29,56,57,58}
+V1.5S {39,40,41,56}
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,52,53,56,57}
+V5AL +V5AL {29,32,36,48,49,53,56}
+V3.3S +V1.1S_VTT {8,10,11,27,28,29,38,51,55}
+VDC 3A
PU3
tps51218 PR85
PR84 QFN10_0D5_0D8G 0
4.7K S_Top R0402 PC143 PC144 PC146 PC152
5
6
7
8
9
R0402 S_Top PC35 0.1uF/25V,X7R 1000pF/50V,X7R 10uF/ 25V,X7R 10uF/ 25V,X7R
{43,53} VTT_PWG S_Top
D
TPS51218 0.1uF/25V,X7R C0603 C0402 C1210 C1210
1
1 10 C0603 S_Bot S_Bot S_Bot S_Bot
PJ1 PR83 PGOOD VBST S_Top PQ45 V1_1SVTT1
4
G
PR61 JOPEN 147K,1% AOL1426 TestP
S
2K RESISTOR_1 R0402 2 9 PR86 PR87 SO8_50_150_PPAK TPC60
R0402 S_Top TRIP DRVH 2.2 10K S_Bot PC161 ns
2
3
2
1
S_Top ns S_Bot
S_Top
3 8
R0603
S_Top
S_Top PL4 220UF/6.3V,OSCON
CAP6_6x7_3 20A
{43} V1_1S_VTT_ON EN SW 1 +V1.1S_VTT
1.0uH/18A S_Bot
Co-lay. LS2_1040
5
6
7
8
9
5
6
7
8
9
4 VFB V5IN 7 PR93 S_Bot PC166
18-20A
D
PR315 PC33 0 C0402
2
100K 0.022uF/16V,X7R R0603 PR89 0.1uF/10V,X7R
1
S_Top
ns 5 6 4 4 2.2 S_Bot
ICCmax=23A
GND
R0402 C0402 RF DRVL
G
R0805 + + + PZ7
1
S_Top S_Top S_Top
+/-2% DC,
S
PC145 PQ46 BZT52C2V0S-F/2.0V
4.7uF/10V,X5R AO4706 PC36 SOD323
3% AC+ripple Switcher
11
3
2
1
3
2
1
1
PR81 C0805 SO8_50_150_PPAK 1000pF/50V,X7R ns
470K S_Bot S_Bot C0402 S_Bot
R0402 PQ47 PD7 PD8 S_Top
S_Top AO4706 SSM34PT SBM54PT
Set Fsw 290K SO8_50_150_PPAK SMA
S_Bot S_Top SMB
PC34 PR60 20K PR88 ns
0.022uF/16V,X7R R0402 ns 0 S_Top PC157 PC158
C0402 ns S_Top R0603 8.2m ohm@4.5V/AO4706 220UF/6.3V,OSCON 220UF/6.3V,OSCON
S_Top 4.3m ohm@4.5V/AOL1718 CAP6_6x7_3 CAP6_6x7_3
S_Top S_Bot S_Bot
0.7V
PR59 4.99K,1%
R0402
PR58 PQ7 S_Top
3
71.5K,1% 2N7002
R0402 SOT23 PR76
PR82 S_Top S_Top R0402 47K
10K,1% 1
R0402 S_Top +V3.3S
S_Top
2
PR77
VTT_SELECT Vo
3
R0402 10K
PQ19 1 VTT_SELECT {10} Arrandale: High 1.05V
MMBT3904-F S_Top 高电平为1.05V/1.1V.
S_Top Clarksfield: Low 1.1V
2
PR78
100K
R0402
S_Top
ns
+V5AL
+V3.3AL
+VDC
Co-lay.
PU7
tps51218 PR139 2A
PR131 QFN10_0D5_0D8G 0
4.7K S_Top R0402 PC66 PC62 PC69 PC70
5
6
7
8
R0402 S_Top PC72 PQ51 0.1uF/25V,X7R 1000pF/50V,X7R 4.7uF/25V,X7R 10uF/ 25V,X7R

{53} V1.05S_PWG S_Top
D
TPS51218 0.1uF/25V,X7R AO4468 C0603 C0402 C1206 C1210

1
1 10 C0603 SO8_50_150 S_Top S_Top ns S_Top

PJ3 PR132 PGOOD VBST S_Top S_Bot S_Top V1_05S1
4
G
PR124 JOPEN 270K TestP

S
2K RESISTOR_1 R0402 2 9 PR233 PR232 PL6 TPC60

R0402 S_Top TRIP DRVH 2.2 10K 1.0uH/11A ns
2
3
2
1
S_Top ns S_Top
3 8
R0603
S_Bot
S_Bot LS2_6530 S_Bot
8A
{43} V1_1S_VTT_ON EN SW 1 +V1.05S
0.7V Co-lay. 8A
5
6
7
8
4 7 PR138 PC163
VFB V5IN
2
+/-5% Switcher
D
PR316 0 C0402
1
100K S_Top R0603 PD13 PR135 0.1uF/10V,X7R
5 6 S_Top 4 SSM34PT 2.2 + S_Bot PZ6
GND
1
R0402 RF DRVL
G
R0805 BZT52C2V0S-F/2.0V
1
S_Top SMA S_Top

S
PC73 PQ26 PD12 ns SOD323
1
4.7uF/10V,X5R AO4468 1N5819 S_Top PC162 ns
11
3
2
1
PR136 C0805 SO8_50_150 SOD123 220UF/6.3V,OSCON S_Bot

PC64 PR134 200K S_Top S_Top S_Top PC63 CAP6_6x7_3
0.022uF/16V,X7R 10K,1% R0402 22m ohm@4.5V/AO4468 1000pF/50V,X7R S_Bot
R0402 S_Top C0402
C0402 S_Top S_Top
Set Fsw 340K
ns
TOPSTAR TECHNOLOGY
S_Top
bent
PR128 Page Name +V1.5S/+V1.05S CHIPSET
4.99K,1% R0402
S_Top A3 M12
B
PC67 PR129 PROPERTY NOTE: this document contains information confidential and property to
0.022uF/16V,X7R 20K TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
C0402 ns R0402 ns to others or used for any purpose other than that for which it was obtained without
S_Top S_Top
PR243 PR241 +V1.1S_VTT
2.2K 2.2K +V1.1S_VTT {8,10,11,27,28,29,38,50,55}
R0402 R0402 +V5S {23,25,29,32,33,34,35,36,37,38,43,52,55,56}
S_Bot ns
S_Bot +V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,52,53,55,5
+VGFX {11}
+VDC {32,40,46,48,49,50,52,55,56,57}
PR240 +V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,49,50,52,53,56,57}
PR246
2.2K 2.2K
R0402 R0402
ns ns
S_Bot S_Bot
{11} GFXVR_VID_0
{11} GFXVR_VID_1
{11} GFXVR_VID_2
{11} GFXVR_VID_3
+V3.3S {11} GFXVR_VID_4
{11} GFXVR_VID_5
PR160 PR237
PR248 0 0
+V3.3AL 4.7K {11} GFXVR_VID_6 R0402 R0402 PC78 PC80
R0402 ns ns 0.1uF/25V,X7R 1000pF/50V,X7R
S_Bot S_Top S_Bot C0603 C0402
VGFX_ON S_Top S_Top
+VDC
PC90 PR166 0 R0402
PR157 0.022uF/16V,X7R S_Top
2A
3
PJ4 JOPEN 47K C0402

{11} GFXVR_DPRSLPVR
RESISTOR_1 R0402 ns
ns S_Top S_Top PC170 PC168
+V3.3S
5
6
7
8
9
1 2 1 10uF/ 25V,X7R 10uF/ 25V,X7R
14A
D
PR152 PQ30 PR250 10K R0402 C1210 C1210
28
27
26
25
24
23
22
10K S_Top 2N7002 ns S_Bot S_Bot S_Bot
2
3
R0402 SOT23 4 PQ53 LL=7 mOhm
VID6
VID5
VID4
VID3
VID2
DPRSLPVR
VR_ON
S_Top S_Top
G
1 PQ29 PR170 AOL1426 VGFX2
{11} GFXVR_EN +VGFX
S
MMBT3904-F PR171 2K PR236 PR235 SO8_50_150_PPAK PL8 Co-lay. TestP
高电平为1.05V/1.1V. SOT23 2K 2.2 10K S_Bot 1.0uH/18A TPC60
R0402
2
3
2
1
S_Top
PR151
R0402
S_Top
ns
S_Top
1 CLK_EN# VID1 21 R0402
S_Bot
S_Bot LS2_1040 S_Bot
1 +VGFX 14A ns
S_Bot
30K
R0402 2 20
{53} GFXVR_PWRGD PGOOD VID0
5
6
7
8
9
ns PR234 PR145 1
PC167
2
S_Top
D
PR172 47K R0402 2.2 2.2 C0402
PC79
PU8 +V5S
R0402 R0805 PL7 0.1uF/10V,X7R
3 RBIAS VCCP 19
1
0.022uF/16V,X7R S_Top S_Bot S_Top 1.0uH/11A
ISL62881 4
S_Bot
G
C0402 PC93 1000pF/50V,X7R LS2_6530 + +
1
S_Top
S
ns C0402 4 QFNS28_0D4_1G 18 PC172 PQ52 ns
1
S_Top PR177 S_Top
R0402 VW LGATE 1uF/10V,X7R AOL1718 Co-lay.
3
2
1
2
10K,1% 250KHz C0603 SO8_50_150_PPAK S_Bot
5 17 S_Bot S_Bot
S_Top
PC94 COMP VSSP PD17 PD16
3300pF/50V,X7R SSM54PT SSM34PT
C0402 6 16 SMA SMA
PC100 S_Top PR173 FB PHASE ns S_Top
PC95 S_Top
PR176 100pF/50V,NPO 2.37K,1% PC77 PC164 PC165 PZ3
470K C0402 R0402 7 15 PC87 1000pF/50V,X7R 220UF/6.3V,OSCON 220UF/6.3V,OSCON BZT52C2V0S-F/2.0V
S_Top S_Top VSEN UGATE 0.22uF/16V,X7R C0402 CAP6_6x7_3 CAP6_6x7_3 SOD323
R0402 S_Top S_Bot S_Bot
ns PR178 ISUM+
G2 C0603 ns
270pF/25V,X7R GND2 S_Top
BOOT
ISUM-
S_Top VGFXVSSSEN {11}
IMON
S_Top 75K G1
VDD
RTN
C0402 GND1
VIN
R0402 S_Top PC88
S_Top 0.22uF/10V,X7R
GND_ISL62881 PR179 GND_ISL62881 PR153 C0603
8
10
11
12
13
14
6.98K,1% 0 S_Top
R0402 R0402 VGFX_IMON1
S_Top S_Top PR159 PC213 TestP
+VGFX PR252 10 22.1K,1% 0.22uF/10V,X7R TPC60
R0402 R0402 C0603 ns
S_Bot PR161 100 S_Top S_Top S_Top VGFX_IMON {11}
{11} VGFXVCCSEN PR253 0 R0402 ns
R0402 S_Top
S_Bot PR239 0
+VDC
PC177 R0402
270pF/25V,X7R PR163 1 S_Bot
{11} VGFXVSSSEN +V5S
C0402 R0402 S_Top PC173
S_Bot GND_ISL62881 0.1uF/25V,X7R
GND_ISL62881 C0603
PR251 10 PC89 S_Bot
R0402 0.22uF/10V,X7R
GND_ISL62881
S_Bot C0603 PR244
S_Top
R0402
PC174 PC92 PC176 3.57K,1%
1000pF/50V,X7R PR169 0.047uF/50V,X7R 0.01uF/25V,X7R PR247
82.5,1% C0603 C0402 2.49K,1% S_Bot
C0402 S_Top S_Bot
PR175 0 S_Bot R0402 R0402
R0402 S_Top PR249 S_Bot
S_Top 10K,1%
PC96 R0402
0.01uF/25V,X7R PC91 S_Bot PR143
GND_ISL62881 C0402 0.1uF/25V,X7R 10K,1%
S_Top C0603
S_Top R0603
PR180 S_Top
4.02K,1%
R0402 TOPSTAR TECHNOLOGY
S_Top NTC thermistor
PR174 PC175 25度下，10K
PC99 0.1uF/10V,X7R 60度下，3.05K Page Name
100 470pF/25V,X7R 80度下，1.71K。 +V1.5AL
C0402
R0402 C0402 S_Bot 放于电感背面。 Size Project Name Rev
ns
S_Top ns
S_Top A3 C46
B
GND_ISL62881
5 4 3 2 1
+VGA_CORE {17}
+VDC {32,40,46,48,49,50,51,55,56,57}
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,53,55,56,57,58}
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,53,56,57}
+V5S {23,25,29,32,33,34,35,36,37,38,43,51,55,56}
+V3.3GPU {17,20,21,33,34,57}
PC42
0.1uF/10V,X7R +V5S
C0402
+VDC
D PM PC44 D
S_Top
1uF/10V,X7R 2A
PU5 C0603
ISL62872 PM PC40 PC153 PC154 PC39
S_Top
QFNR20_0D4_0D5 0.1uF/25V,X7R 10uF/ 25V 10uF/ 25V 1000pF/50V,X7R
PM S_Top C0603 C1210 C1210 C0402
PR99 PC45 PM PM PM PM
500mA LGATE 2.2 1uF/10V,X7R S_Top S_Bot S_Bot S_Top
1 LGATE PVCC 20
R0402 C0603
PM PM
S_Top S_Top
2 PGND VCC 19
5
6
7
8
9
PC48 PL2
D
PR104 0.1uF/10V,X7R PQ20 1.0uH/11A
PR101 30K C0402 3 18 PC46 AOL1426 LS2_6530 Co-lay. NVVDD_SENSE {17}
GND_62872 GND BOOT
2K R0402 ns 0.1uF/25V,X7R 4 SO8_50_150_PPAK ns 1 PR117
S_Top S_Bot
G
R0402 PM C0603 PM PR94 PM 10
{43} VGPU_ON S_Top S_Top
S
PM 4 17 500mA 2.2 PR102 PL3 R0402
S_Top EN UGATE S_Top R0402 2.2 1.0uH/18A PM
3
2
1
S_Top
VID1 5 16 500mA
PM
S_Top
Co-lay. R0805
PM
LS2_1040
PM 13A +VGA_CORE
VID1 PHASE S_Top 1
S_Bot +VGA_CORE
+V3.3AL 2 1
13A
5
6
7
8
9
J1 VID0 6 15 PR228 PR105
VID0 NC
D
JOPEN 2.2 9.31K,1%
VGA_CORE1
2
RESISTOR_1 R0402 PD10 R0402
ns 7 14 LGATE PM 4 SSM34PT PM + + TestP
1
SREF OCSET 500mA S_Bot S_Top
G
PZ1 TPC60
1
SMA
S
PQ48 PM BZT52C2V0S-F/2.0V ns
S_Top
2
C 8 13 AOL1718 S_Top SOD323 C
3
2
1
1
SET0 VO SO8_50_150_PPAK ns
PM S_Top
S_Bot PD9 PC51
S_Top 9 SET1 FB 12
PR110 PR112 PR113 SSM54PT PC47 0.047uF/50V,X7R
4.99K,1% 10K,1% 45.3K,1% SMA 1000pF/50V,X7R C0603 PM PC159
R0402 R0402 R0402 10 11 ns C0402 220uF/2.5V,POSCAP GC2
PM PM SET2 PGOOD S_Top PM S_Top CT7343_19 220uF/2.5V,POSCAP
S_Top S_Top
PM S_Top S_Top 9.31K,1% PM CT7343_19
PC54 PR114 PR107 R0402 S_Bot PM
0.1uF/10V,X7R 220K PM S_Top
C0402 R0402 PC56 S_Top
PM PM 3300pF/50V,X7R
S_Top S_Top C0402
PR109 100,1% PM
R0402 S_Top
GND_62872 GND_62872 PM
PR115 S_Top
+V3.3S
10K
R0402 PR111 2.49K,1%
PR100 0 R0402 PM R0402 PM
PM S_Top
S_Top
S_Top PR116
4.02K,1%
R0402
GND_62872 {43} VGACORE_PWRGD PM
S_Top
B GND_62872 B
+V3.3S +V3.3S
+VGA_CORE +V3.3GPU
PD14 PR137
PR108 PR106 1 10
10K 10K PM 1N5819 R0402
R0402 R0402 SOD123 ns
ns S_Top
S_Top S_Top S_Top
PM VID0 VID1
PQ22
2N7002
SOT23
3
3
PM
PR123 S_Top PR127 PQ21
1K 1K 2N7002 VID1 VID0 Vo
1 PR154 1 SOT23 PR155
{21} GPU_VID0 {21} GPU_VID1 0 0 1.03V
10K PM 10K
S_Top S_Top
R0402 S_Top
R0402 R0402 0 1 0.85V
2
R0402
PM PR122 PC59 S_Top PR130 PC65 S_Top 1 1 0.8V
10K 0.1uF/10V,X7R PM PM 10K 0.1uF/10V,X7R PM
R0402 C0402 R0402 C0402
ns PM ns
S_Top
PM S_Top S_Top S_Top
A A
TOPSTAR TECHNOLOGY
bent
Page Name +VGA_CORE
A3 S46
B
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,5
+V5AL {29,32,36,48,49,50,56}
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,56,57}
+V1.05S {22,23,24,28,29,50,56,57,58}
+V1.5S {39,40,41,56}
+VCC_CORE {10,55}
{46} SHDN# AD+ {36,46,48}
+V5AL
+V3.3AL
PZ9
2
PQ69 BZT52C5V6S-F/5.6
MMBT2907
SOD323
SOT23 S_Bot
2
PR307 10K S_Bot
R0402 1 PZ8
{38} SHDN_LOCK#
1
S_Bot BZT52C3V6S-F/3.6
SOD323
1
S_Bot
PQ66 3
MMBT3904-F 1
SOT23
S_Bot
2
PR304
100 PC203
R0402 1uF/10V,X7R
S_Bot C0603
S_Bot
+V3.3S
PR194
Power Good Logic CIRCUIT 10K

R0402
S_Top
{43,50} VTT_PWG 1
3 MAIN_PWROK {24,43}
PD21
2 BAT54A SOT23
{50} V1.05S_PWG
S_Top
PR195
R0402 PD33 1
{51} GFXVR_PWRGD
0 1N5819
S_Top GM SOD123 GM
PD32 1
{49} DDR_PWG
1N5819
SOD123
{24,43} PM_RSMRST# 1
3
R323 1K TOPSTAR TECHNOLOGY
{24,41,43} PM_SLP_S3# 2 bent
R0402 S_Top PD23
BAT54A Page Name Power Good Logic/OVP
C259 S_Top
0.1UF/10V,X7R M12
C0402 A4
B
S_Top
Date: Tuesday, January 05, 2010 Sheet 53 of 59
BATT+ {46,47}
PC21 PR50 0
1.5A
1uF/10V,X7R VDDP 15 2 Isense_SYSN {46}
C0603 VDDP ACSET S_Top CHG_GND
S_Top PR52 R0402
4.7 5V_internal_LDO PC135 Co-lay.
R0402 1 PC30 PC137 PC138 PC136
PC31 S_Top VDD 0.1uF/25V,X7R PD6 SOD323 1000pF/50V,X7R 0.1uF/25V,X7R 4.7uF/25V 10uF/ 25V
CHG_GND
1uF/10V,X7R 24 C0603 1N4148WS C0402 C0603 C1206 C1210
C0603 DCIN S_Top
1
ns S_Bot S_Bot S_Bot ns
S_Top S_Bot
{36,46} Isense_SYSP 19 CSIP
PC25 S_Top
PR51 0
PR47 0.1uF/25V,X7R R0402
C0603 20 17 PR224 2.2 S_Top
{46} Isense_SYSN S_Top CSIN UGATE R0402
10 R0402 S_Bot
PD5
1
PC26 PC27 PU2 PQ42
S_Top 1000pF/25V,X7R 5600pF/50V,Y5V 5 16 VDDP D1 D1 AO4932
C0603 ICOMP ISL6251HAZ BOOT 1
PR223 SO8_50_150
8
S_Top C0402 S_Top S_Bot
S_Top PC141 1N5819 10K G1 PR24
SSOP24_25_150 SOD123 R0402 S1 50mOHM,1% PC17
S_Top S_Bot
PC24 PC23
C0402
0.01uF/25V,X7R 6 VCOMP
0.1uF/25V,X7R
C0603 phase
PL1 R2512
S_Top 2A 0.1uF/25V,X7R
C0603
5 7 1 BATT+
R0402 10K S_Top 18 S_Bot phase S_Top
PHASE
6
15uH/3.6A
PR26 LS2_1040 PC13
12.63V
CHG_GND 3.3V
S_Top 11 VADJ
2.2 S_Bot
10uF/ 25V 2A Max
D2 R0805
14 PR19 3 ns C1210
LGATE 0 S_Top S_Top
{43} CHG_ON 3 EN R0402 G2 S2 PC15
13 S_Top 0.01uF/25V,X7R PC18
PC19
4
PGND C0402 1uF/25V,Y5V
PR226 10K 9 ns 10uF/ 25V C0805
{43} SET_I S_Bot CHLIM S_Top S_Top
21 PR48 C1210
CSOP S_Top
PR225 PC140 PC28 2.2 R0402
SET_I 充电电流 15.4K,1%
R0402 1uF/10V,X7R
2.39V_Vref 8 VREF 1uF/10V,X7R S_Top
CSON 22
ns C0603 C0603
S_Bot S_Bot S_Top
0V 0A PR41
10.5K,1%
10 ACLIM PR227 0 R0402
0.4V 0.4A R0402
S_Top CELLS 4
S_Bot CHG_GND
23 ACPRN
1.2V 1.2A 设置适配器限流值为
0.643Vref PR43
ICM 7 SYS_I_Sense {43}
2V 2A 82mV/25m ohm=3.28A.
PR38 100 R0402
20K,1% PC22
R0402 GND 12
S_Top 3300pF/50V,X7R Layout note:
S_Top C0402
S_Top Far away from critical signal trace
SYS_I_Sense SYS_CURRENT PR34 0
S_Top
500mV 1A CHG_GND R0402
1.5V 3A CHG_GND
1.67V 3.33A CHG_GND
SYS_CURRENT SYS_I_Sense SYS_I_Trip Cells status Battery Pak

>3.6A >1.8V High Float 2S
<3A <1.5V Low GND 3S
VDD 4S
TOPSTAR TECHNOLOGY
bent
Page Name CHARGER
A3 M12
B
5 4 3 2 1
PR147 1K R0402
{10} H_VID0 +V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,56,57,58}
S_Top +V5S {23,25,29,32,33,34,35,36,37,38,43,51,52,56}
PR148 1K R0402
{10} H_VID1 +VDC {32,40,46,48,49,50,51,52,56,57}
S_Top +VCC_CORE {10}
PR149 1K R0402
{10} H_VID2
PR269 S_Top
1K R0402 ns
{10} H_VID3 +V1.1S_VTT {8,10,11,27,28,29,38,50,51}
PR273 1K R0402 ns
{10} H_VID4 S_Bot
PR276 1K R0402 +VDC
{10} H_VID5 S_Bot +V1.1S_VTT
PR270 S_Bot
PR150 3A
{10} H_VID6
D 1K 1K PC182 D
R0402 R0402 0.01uF/25V,X7R
PR279 2K R0402 PR275 S_Bot PR268 S_Top C0402
{43} IMVP_ON PQ55 PC180 PC181 S_Bot PC103
1K 1K
S_BotR0402
PR278 1K AOL1426 10uF/ 25V 10uF/ 25V PC102 0.01uF/25V,X7R
R0402 R0402
PR287 470 R0402 S_Bot SO8_50_150_PPAK C1210 C1210 0.1uF/25V,X7R C0402
{10} PM_DPRSLPVR
S_Bot ns
S_Bot S_Bot S_Bot S_Bot C0603 S_Top
S_Bot
PR284 10K S_Top
+V1.1S_VTT
5
6
7
8
9
R0402 ns PR242
D
0
{6} CK505_CLK_EN#
S_Bot CPU_GND VCORE1
PR282 R0603
2K R0402 UG2 S_Bot TestP
40
39
38
37
36
35
34
33
32
31
4
G
TPC60
S_Bot
S
PR286 G9 PC101 PR245 PQ56 PD19 PC86 ns
CLK_EN#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON
+V3.3S G9 S_Top
2K R0402 G8 0.22uF/16V,X7R 10K AOL1718 SBM54PT PC83 220UF/2.5V,POSCAP
3
2
1
G8
S_Bot 1
G7 G7
30
C0603
S_Top Phase2
R0402
S_Bot
SO8_50_150_PPAK
S_Bot
SMB
S_Top
PL9
25A 220UF/2.5V,POSCAP CT7343_19
CT7343_19 S_Top +VCC_CORE
{43} IMVP_PWRGD PGOOD BOOT2 1
S_Top
+V1.1S_VTT PR291 10K R0402 0.36uH/30A 50A
5
6
7
8
9
5
6
7
8
9
ns PR263 PR167 LS2_1040
1
D
D
PR289 10K R0402 2 29 0 2.2 S_Bot
{10} PM_PSI# S_Bot PSI# UGATE2 R0603 R0805 PR256 + + + +
1
S_Bot S_Bot 4 4 ns 10K
S_Top
G
PR292 R0402 PR258 PC169
1
CPU_GND 3 28
2
RBIAS PHASE2 S_Bot
S
147K,1% PQ57 PC98 10 1uF/10V,X7R
R0402 AOL1718 0.01uF/25V,X7R R0402 S_Bot C0603
3
2
1
3
2
1
PC196 C0402 S_Bot SO8_50_150_PPAK C0402 S_Bot
ISEN2
{8} VR_PROCHOT# 4 VR_TT# VSSP2 27
1000pF/50V,X7R S_Bot ns
PR300 S_Top PC82
S_Bot 4.02K,1% PR185 NTC 5 26 LG2 PC106 220UF/2.5V,POSCAP PC85
CPU_GND NTC LGATE2
C R0402 470K,1% R0603 PR262 0 R0603 1uF/10V,X7R CT7343_19 220UF/2.5V,POSCAP C
S_Bot S_Top CT7343_19
NTC thermistor放到 PR301 R0402 S_Top PU11 S_Bot C0603
S_Top S_Top
板面最热的地方 6.98K,1%
6 VW ISL62882HRTZ VCCP 25 +V5S
PC197 S_Bot
QFNS40_0D4_1G
C0402 S_Bot 7 24 LG1b PC107
1000pF/50V,X7R COMP LGATE1b PC84
1uF/10V,X7R
PR182 0 R0603 220UF/2.5V,POSCAP
ISEN1
S_Bot C0603
8 23 S_Top PD20 CT7343_19
PC199 PC198 C0402 FB LGATE1a S_Top SBM54PT ns
1
3300pF/50V,X7R 100pF/50V,NPO PR255 0 R0603 SMB S_Top
C0402 9 22 S_Top + +
1
PC201 S_Bot S_Bot FB2 VSSP1 S_Bot PC97
100pF/50V,NPO SO8_50_150_PPAK 0.01uF/25V,X7R
2
3
2
1
3
2
1
C0402 PR302 ISEN2 10 21 AOL1718 C0402 ns PR261 PR259
ISEN2 PHASE1
UGATE1
S_Bot PQ58 10K 10
S
75K
BOOT1
ISUM+
S_Bot
ISEN1
S_Top
ISUM-
VSEN
1
IMON
LG1a R0402
G
R0402 4 4 R0402
VDD
RTN
PC112 S_Bot S_Bot

VIN
S_Bot PR168
G1
G2
G3
G4
G5
G6
0.22uF/16V,X7R 2.2
PR293 PC81
D
C0603 CPU_GND R0805
G1
G2
G3
11
12
13
14
15
16
17
18
19
20
G4
G5
G6
3.01K,1% S_Top 220UF/2.5V,POSCAP
PL10
5
6
7
8
9
5
6
7
8
9
Phase1 ns
S_Top CT7343_19
R0402 1
S_Bot PR303 ns
S_Top
10 PC116 0.22uF/16V,X7R PR265 PR264 SO8_50_150_PPAK 0.36uH/30A
25A
3
2
1
PR294 R0402 C0603 PR266 CPU_GND 0 10K AOL1718 LS2_1040
S_Bot S_Top PC105 R0603 R0402 PQ59 S_Bot
S
10 100
0.22uF/16V,X7R UG1 S_Bot 4S_Bot S_Bot PC187 PC104
ISEN1
G
R0402 R0402
S_Bot PC202 S_Bot C0603 0.1uF/25V,X7R 0.01uF/25V,X7R
1000pF/50V,X7R S_Top PR277 10 R0402 PQ61 PR257 PR260
B +V5S C0603 S_TopC0402 B
PR198 C0402 AOL1426 S_Bot 3.57K,1% 3.57K,1%
D
{10} VCCSENSE S_Bot
10 S_Bot PC188 1uF/10V,X7R C0603 SO8_50_150_PPAK R0402 R0402
5
6
7
8
9
R0402 PC117 S_Bot S_Bot S_Bot
PC115 S_Top PC114 1000pF/50V,X7R S_Bot
1uF/10V,X7R 0.1UF/10V,X7R C0402 PC185 0.1uF/25V,X7RC0603
ISUM-
C0603 C0402 S_Top PC110 PC109 PC184

ns S_Top S_Bot CPU_GND 10uF/ 25V 10uF/ 25V 0.01uF/25V,X7R
S_Top PR267 PR274 C0402
+VDC C1210 C1210 S_Bot
CPU_GND 10K,1% 10 S_Top S_Top
PR196 R0402 R0402 Vcore_IMON {10}
{10} VSSSENSE S_Bot S_Bot
0
R0402 Vcore_IMON1 3A +VDC
S_Top PC113 TestP TPC60
1000pF/50V,X7R PC183 ns
C0402 0.22uF/10V,X7R ISUM+
S_Top C0603
S_Bot
CPU_GND PC192
0.01uF/25V,X7R PR281
PR280 PC191 C0402 2.49K,1%
82.5,1% 0.1uF/25V,X7R S_Bot
R0402
R0402 C0603 PR283 S_Bot
PR193 S_Bot S_Bot 10K,1%
PC193 R0402
0.01uF/25V,X7R PC190 S_Bot PR238
0 C0402 0.1uF/25V,X7R 10K,1%
R0603 S_Bot C0603
S_Top S_Bot R0603
PR288 S_Bot ISUM-
CPU_GND 1.58K,1%
A
R0402 A
S_Bot NTC thermistor TOPSTAR TECHNOLOGY
PR290 PC195 25度下，10K
PC194 0.1uF/10V,X7R 60度下，3.05K bent
100 470pF/25V,X7R C0402 80度下，1.71K。 Page Name +VCC_CORE
R0402 C0402 S_Bot 放于电感背面。
ns
S_Bot ns
S_Bot Size Project Name Rev
GND_ISL62881 A3 C46
B
5 4 3 2 1
5 4 3 2 1
+VDC {32,40,46,48,49,50,51,52,55,57}
+V5S {23,25,29,32,33,34,35,36,37,38,43,51,52,55}
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,5
+V5AL {29,32,36,48,49,50,53}
+V3.3AL {6,23,24,26,27,29,32,33,36,38,39,40,41,42,43,44,45,46,47,48,49,50,52,53,57}
+V1.05S {22,23,24,28,29,50,57,58}
+V1.5 {8,11,15,16,49,57}
+V1.8S {11,26,28,29,31,49,57}
+V0.75S {15,16,49}
AD+ {36,46,48}
BATT+ {46,47,54}
+V1.5S {39,40,41}
D D
+V3.3AL
PD24
1N4148WS PQ39
+VDC SOD323 AO4468
5
6
7
8
S_Top
1 SO8_50_150
S_Top
D
V3_3S1
TestP
2 3 4 TPC60
G
ns
S_Top
S
PQ33 PR199 PR197
DTB114EK 20K 51K
3
2
1
PR186 SOT23 +V5AL R0402 R0402 +V3.3S
1
100K PC108 S_Top S_Top S_Top
R0402 0.01uF/25V,X7R PR187 PR200 PC111
S_Top C0402 10K 33K 0.01uF/25V,X7R
S_Top R0402 R0402 C0402 PC123
S_Top S_Top PQ65 S_Top 1uF/10V,X7R
5
6
7
8
AO4468 C0603
S_Top
D
PR184 SO8_50_150
1K S_Bot
R0402 4
S_Top
G
V5S1
S
MAIN_OFF TestP
TPC60
3
2
1
3 ns +V5S +V1.5
PQ31 S_Bot
C 2N7002 C
{43} MAIN_ON 1
S_Top PC119 PC189
PR183 SOT23 0.01uF/25V,X7R 1uF/10V,X7R PD18 PQ28
2
1K PR181 C0402 C0603 1N4148WS AO4468

R0402 510K S_Top S_Bot SOD323 SO8_50_150 PQ27
5
6
7
8
S_Top R0402 S_Top 1 S_Top AO4468
5
6
7
8
S_Top
D
SO8_50_150
D
ns
dri1.5 4 S_Top
G
dri1.5 4
G
S
PR146 PR144
S
10K 100K
3
2
1
R0402 R0402
3
2
1
S_Top PR20 S_Top
+V1.5S
100K PC75
R0402 0.01uF/25V,X7R
S_Top C0402 PC76
S_Top 1uF/10V,X7R
C0603
S_Top
+V1.05S +V0.75S +V1.8S

+V5S +V3.3S +V1.5 +VDC
+V1.5S
2
B PR298 B
2
2
PR192 PR79 100
2
100 PR188 PR189 PR191 100 PR80 PR75 R0402
R0402 100 100 PR190 100 R0402 100 100 S_Bot PR297
S_Top R0402 R0402 100 R0402 ns R0402 R0402 100
1
ns ns R0402 S_Top S_Top S_Top S_Top R0402 PR305

1
1
S_Top S_Top S_Top V1_8DISCHG ns 510K
1
S_Bot R0402
S_Bot
PQ67
3
3
PQ36 PQ35 PQ68 2N7002
3
3
2N7002 PQ34 2N7002 PQ15 PQ16 PQ14 2N7002 SOT23
SOT23 2N7002 SOT23 2N7002 2N7002 2N7002 SOT23 S_Bot
S_Top SOT23 S_Top SOT23 SOT23 SOT23 PR306 10K S_Bot
1 {24,41,43} PM_SLP_S4# 1 1 V1_8DISCHG
ns1 ns S_Top S_Top R0402
1 S_Top 1 S_Top 1 1
S_Bot
2
2
PR299
2
200K
R0402
S_Bot
MAIN_OFF
A A
TOPSTAR TECHNOLOGY
bent
Page Name SYSTEM/DISCHARGE
A3 M12
B
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,4
+V1.05S {22,23,24,28,29,50,56}
+V1.5 {8,11,15,16,49,56}
+V3.3S
+V1.8S {11,26,28,29,31,49,56}
+V3.3GPU {17,20,21,33,34}
+V1.05GPU {17,18,19,20}
+VDC
+V1.8GPU {20}
+V1.5GPU {18,19}
PR317
+VDC {32,36,40,46,48,49,50,51,52,55,56}
51K +V5S {23,29,32,33,34,35,36,37,38,43,51,52,55,56}
R0402 PR318 PQ78
D 10 AO4468 D
5
6
7
8
PM R0402 SO8_50_150 PR133
D
S_Top PM PM 0 V1_8GPU1
+VDC S_Bot S_Bot V3_3GPU1 R0402 S_Top TestP
4 TestP +V1.8S PM TPC60
G
TPC60 +VDC ns
S_Bot
S
ns
S_Top +V3.3S 2 3 +V1.8GPU
3
2
1
PR64 PR319 PR71
+V3.3GPU
51K PR120
51K 510K <0.5A
3
PR65 0
R0402 R0402 3.5A R0402
2
PM 10 PM PC214 PM R0402 PR125 PQ25
1
S_Top R0402 PM S_Top 0.01uF/25V,X7R PR68 S_Top PR72 ns AO3415
20K
PQ9 C0402 PR67 220 10 S_Top SOT23 PC68
1 R0402
2
2N7002 S_Top PQ79 PM 220 R0402 PQ8 R0402 PM ns PM 1uF/10V,X7R
SOT23 2N7002 S_Bot R0402 PM 2N7002 S_Top S_Top S_Top C0603 PR73
1
3
PM SOT23 PM S_Top SOT23 PM 100

S_Top
3
PM PC61 S_Top PM S_Top R0402
S_Top 1uF/10V,X7R S_Top PM
3 1
PR158 C0603 S_Top
1
51K PM 1
V3G_1.05G_ON {43} V1.8G_1.5G_ON PR156
PR62 R0402 S_Bot PQ12
{43}
2
3
1K PR63 PM PR70 51K 2N7002
2
R0402 510K S_Top 1K PR69 R0402 1 SOT23
C C
PM R0402 R0402 510K PM PM
S_Top PM V3GPU_OFF R0402 S_Top S_Top
1 PM
2
S_Top S_Top PM
PQ11 S_Top
2
2N7002
SOT23
PM
S_Top PQ63 +V1.5
+VDC AO4468
SO8_50_150
PM
S_Bot
PR285
51K PQ62
+VDC R0402 AO4468
5
6
7
8
5
6
7
8
+V1.05S PQ54 PR272 SO8_50_150
D
AO4468 PM 10 PM
SO8_50_150 S_Bot R0402 PM S_Bot V1_5GPU1
ns 4 4 TestP
S_Bot S_Bot
G
TPC60
S
PR121 ns
3
PR254 PQ60 S_Bot
51K
3
2
1
3
2
1
R0402 10 AO4468 +V1.5GPU
5
6
7
8
5
6
7
8
B R0402 SO8_50_150 PR271 B
D
D
PM PM V1_05GPU1
S_Top
PM
S_Bot S_Bot TestP
1 200K 3A
R0402
2
4 4 TPC60 ns PQ64 S_Bot PC178
2
G
G
S_Top 2N7002 PM 1uF/10V,X7R PR74
3
S
SOT23 C0603 100
PM PM R0402
3
2
1
3
2
1
PR126 S_Bot S_Bot PM
+V1.05GPU
1
S_Top
1 200K
PQ24 PC186
R0402 0.53A
3
2N7002 PM PC179 0.01uF/25V,X7R PQ13
2
SOT23
PM
S_Top 0.01uF/25V,X7R
C0402
PC171
1uF/10V,X7R
PR66
100
峰值可为2.5A C0402
PM
2N7002
SOT23
S_Top PM C0603 R0402 S_Bot PM 1
S_Bot PM PM S_Top
1
S_Bot S_Top
2
3
PQ10
2N7002
SOT23
PM 1
S_Top
TOPSTAR TECHNOLOGY
2
A bent A
B M12
B
5 4 3 2 1
5 4 3 2 1
+V3.3S {6,8,15,16,22,23,24,25,26,27,28,29,31,32,33,34,35,37,38,39,40,41,42,43,44,45,49,50,51,52,53,55,56,57}
+V1.05S {22,23,24,28,29,50,56,57}
D D
H19
H22 H15 H18 H23 H20 H16 H21 H17 H24 H25
HOLE
1
TH_315_118_P HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1
ns TH_315_118_P TH_315_118_P TH_315_118_P TH_315_118_P TH_315_118_P TH_315_118_PTH_197_118 TH_315_118_P TH_315_118_P
S_Top TH_315_118_P
ns ns ns ns ns ns ns ns ns ns
S_Top S_Top S_Top S_Top S_Top S_Top S_Top S_Top S_Top S_Top
GND GND_AUD GND GND GND GND GND GND GND

GND GND
C C
+V3.3S +V3.3S +V1.05S +V1.05S +V1.05S +V1.05S
C219 C228 C133 C115 C99 C121

0.1UF/10V,X7R 0.1UF/10V,X7R 0.1UF/10V,X7R 0.1UF/10V,X7R 0.1UF/10V,X7R 0.1UF/10V,X7R
C0402 C0402 C0402 C0402 C0402 C0402
S_Top S_Top S_Top S_Top S_Top S_Top
+V3.3S +V3.3S
+V3.3S +V3.3S
C194 C202
0.1UF/10V,X7R 0.1UF/10V,X7R
C0402 C0402
S_Top S_Top
B B
E4 E7 E2 E5 E6 E9 E10
1
EMI EMI EMI EMI EMI EMI EMI
1
ns ns ns ns ns ns ns
S_Top S_Top S_Top S_Top S_Bot S_Bot S_Top
Add for EMI

By Johan 071228
GND
FD7 FD8 FD1 FD4 FD6 FD5 FD3 FD2
1 1 1 1 1 1 1 1 1 1 1 1
FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS
ns ns ns ns ns ns ns ns
FD9 FD10 FD11 FD12 FD13 FD14 FD15 FD16
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS

ns ns ns ns ns ns ns ns
A A
TOPSTAR TECHNOLOGY
bent
C C46
A
5 4 3 2 1
5 4 3 2 1
CLOCK Distribution:
SODIMM0
SODIMM1
MEM_CHA_CLK0
MEM_CHA_CLK#0
MEM_CHA_CLK2
Auburndale MEM_CHA_CLK#2
MEM_CHA_CLK1
BCLK_CPU
BCLK_CPU
BCLK_CPU
MEM_CHA_CLK#1
D D
MEM_CHA_CLK3
MEM_CHA_CLK#3
BCLK 133MHz
DMI 100 MHz

14.318MHz
DP 120MHz
100MHz
EXPRESS CARD
Pin22 133MHz CLK_BUF_BCLK_N
CPU_0#
CPU_0 Pin23 133MHz CLK_BUF_BCLK_P
100MHz Mini PCIE
Pin4 100MHz
DOT96# CLK_BUF_DOT96_N
DOT96 Pin3 100MHz
CLK_BUF_DOT96_P
100MHz PCIE LAN
IBEX_PEAK 25MHz
Pin11 100MHz
SRC0#/SATA CLK_BUF_SATA_N
SRC0/SATA Pin10 100MHz
CLK_BUF_SATA_P
Pin14 100MHz 33MHz

SRC1# CLK_BUF_EXP_N
SRC1 Pin13 100MHz EC(KB3926) 32.768KHz
CLK_BUF_EXP_P
C C
Pin30 48MHz Card Reader

REF/FS 14.318MHz
CLK_BUF_REF14 (IT1337E)
CLKOUT_PEG_A_P
CLKOUT_PEG_A_N 24MHz Audio Codec
ALC662
32.768KHz
25MHz
100MHz
100MHz
GDDR3 1
Pin6 27MHz
27NSS XTAL_IN FBA_CLK0
N11 FBA_CLK0#
Pin7 27MHz 200MHz 64Mb*16bit*4

27SS XTAL_SSIN
FBA_CLK1
GDDR3 2
FBA_CLK1#
B B
A A
TOPSTAR TECHNOLOGY
bent
Page Name N10M PCIE&PWR&GND
C C46
A
5 4 3 2 1

Topstar C46 VerA PDF

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Topstar C46 VerA PDF

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5 4 3 2 1

Topstar Digital technologies Co.,LTD

Hardware drawing by: Hardware check by: EMI Check by:

Power drawing by: Power check by:

Manager Sign by:

LVDS switch SLG8SP585

Memory DDR3 SODIMM0

C46 POWER BLOCK Ver:A

PCH CPU_PWRGD CPU-M

+V1.1S_VTT 1.1V for CPU

+V1.5S 1.5S for PCIE Device

+V1.8S 1.8V for display votage

+V3.3GPU 3.3V for external GPU

+V1.05GPU 1.05V for external GPU

+V1.8GPU 1.8V for external GPU

+V1.5GPU 1.5V for external GPU

Power States/AC mode

S0(Full On) HIGH HIGH HIGH ON ON ON ON

IN2 Trace Impedence:50ohm +/-15%(Default)

8 CARD Reader TOPSTAR TECHNOLOG

VerA to VerB Changelist

VerB to VerC Changelist

VerC to VerD Changelist

+V3.3S FB102 1 100ohm@100MHz,3A +V3.3S_CK_VDD

10UF/6.3V,X5R 0.1UF/25V,Y5V 0.1UF/25V,Y5V

SMBUS ADD:1101 001X

PEG_IRCOMP_R R560 49.9,1%

PCI EXPRESS -- GRAPHICS

H_CPURST#_R TCK AN28 TCK

JTAG & BPM

Processor Compensation DDR3 Compensation Signals

H_COMP0 H_COMP2 SM_RCOMP_0

SB_CK[0] W8 M_CLK_DDR2 {15}

DDR SYSTEM MEMORY - B

C AC27 VCC39 VTT0_36 AB10 C

V28 VCC68 VID[4] AL33 H_VID4 {55}

R28 VCC88 VCC_SENSE AJ34 VCCSENSE {55}

J26 VTT1_50 VTT1_66 H21

E25 VTT1_58 VCCPLL2 L27

VCCPLL FB8 1 2 FB0805

C200 C201 C195 C193

AT20 VSS1 VSS81 AE34

CFG[0] PIC-Express Bifurcation enable Single PCIE Graphics

GPIO8 Weak internal pull-up Weak internal

Name Pin Attr Description Name Pin Attr Description

R47 R51 C43

close to DDR pin

R53 R436 C327

VerA: all PCIE singala lane reversal llh0523

GC115 GC147 GC151 GC148 GC175 GC122 GC99

FBA_CLK0 GC138 GC142 GC141 GC187 GC186 GC137 GC95

A16 FBC_DQM0 FBC_CLK0 E17

ADD 1K pull low by bent 091022

PM/SSC S_Top S_Top ns IFPCD S_Top

S_Bot XTAL_OUT PM/HDMI S_Top

ADD pull low by bent 091022 AG7 R490 10K R0402

Place close to balls NB10_G128

ITEM FUNC Action

GPIO0 GPIO no using , PD 10K

GPIO1 HPD-C connect to HDMI conn with level shifter

PM N1 GPIO3 Panel Power enable , active high connect LCDVDD_ON

AA9 MIOB_VDDQ1 GPIO22 SWAPRDY 10K PU V3.3S

SPONGE_RTC1 Voltage Swing on RTCX1 pin