SCHOOL OF ELECTRONICS ENGINEERING

LINEAR INTEGRATED CIRCUITS

Course Code: ECE3013

Design a half-wave and full-wave rectifier

Name: ADARSH RAJ

Register No: 16BEC0075

Faculty : Deepika rani sona

Slot: L49+L50
 EXPERIMENT NO. 4

AIM: Design of half wave Rectifier and verify the output.

Theory
Case 1 : Vi > 0 : Recalling virtual ground concept we can say that Vp = Vn = OV.
For Vi > 0, Vi is positive with respect to Vn and hence current through R1 flows
from left to right. Only one path for this current to flow is through diode D1. Hence
diode D1 is forward biased and diode D2 is reverse biased. As current flow through
R2 is zero, Vo = Vn = 0V.
Case 2 : Vi < 0: For Vi < 0, Vi is negative with respect to Vn and hence current
through R1 flows from right to left. Only one path for this current to flow is through
diode D2 and resistor R2, indicating that V0A > Vn. Hence diode D1 is OFF, and
diode D2 is ON. With these diode states, circuit acts like an inverting amplifier and
output voltage is given as

If R1 and R2 are made equal, then we can write Vo = -Vi

Hardware
Lab-work
 EXPERIMENT NO. 5

AIM: Design of full wave Rectifier and verify the output.

Theory
The Full Wave Rectifiers accept an ac signal at the input, inverts either the
negative or the positive half, and delivers both the inverted and non-inverted
halves at the output.

The operation of the positive full wave rectifier is expressed as

And that of the negative rectifier as

Case 1 : Vi > 0 : When Vi > 0, inverting side of Al will force its output to swing
negative, thus forward biasing D1 and reverse biasing D2. Since no current flows
through resistance R connected between Vn1 and Vp2, both are equipotential

The Fig. shows the equivalent circuit.

From equivalent circuit, the output voltage can be given

Case 2 : Vi < 0 : When Vi < 0, negative, the output voltage of Al swings to positive,
making diode D1 reverse biased and diode D2 forward biased.
The Fig. shows the equivalent circuit.

Let the output voltage of op-amp Al be V. Since the differential input to A2 is. zero,
the inverting input terminal is also at voltage V, as shown in the Fig. 2.65.
Applying KCL at node ‘a’ we have
To find Vo in terms of V we concentrate on the equivalent circuit of A2, as shown
in the Fig.

Substituting value of V in above equation

Hence, for Vi < 0 the output is positive.

Hardware
Lab-work
Graph: