Ili9806e An V093 20140328 PDF

ILI9806E
a-Si TFT LCD Single Chip Driver with

480(RGB) x 864 Resolution , 16.7M-color
without internal GRAM
Application Notes
Version: V093
Date: Mar. 28, 2013
ILI TECHNOLOGY CORP.

8F, No.38, Taiyuan St., Jhubei City, Hsinchu County,
Taiwan 302, R.O.C.
Tel.886-3-5600099; Fax.886-3-5600585
http://www.ilitek.com
a-Si TFT LCD Single Chip Driver
480RGBx864 Resolution and 16.7M color ILI9806E
1. HSD PANEL .......................................................................................................................................................................3
1.1 HSD 3.97” (C0401D)INITIAL CODE ...........................................................................................................................4

1.2 HSD 5.0” (C0500)INITIAL CODE ..............................................................................................................................13
1.3 HSD 5.3” (C0501)INITIAL CODE ..............................................................................................................................22
2. CPT PANEL......................................................................................................................................................................31
2.1 CPT 3.97” (040LJ) INITIAL CODE............................................................................................................................32

2.2 CPT 4.5” (045LA) INITIAL CODE .............................................................................................................................41
2.3 CPT 5.0” (050LD) INITIAL CODE .............................................................................................................................50
3. BOE PANEL .....................................................................................................................................................................59
3.1 BOE 4.46” INITIAL CODE .........................................................................................................................................60

3.2 BOE 4.95” INITIAL CODE (4.5G) ..............................................................................................................................69
3.3 BOE 4.95” INITIAL CODE (6G) .................................................................................................................................78
4. GP PANEL ........................................................................................................................................................................87
4.1 GP 4.5” INITIAL CODE ..............................................................................................................................................88

4.2 GP 5.0” INITIAL CODE ..............................................................................................................................................97
5. IVO PANEL ....................................................................................................................................................................106
5.1 IVO 3.97” INITIAL CODE ........................................................................................................................................107
6. REVISION HISTORY ................................................................................................................................................... 116
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed, reproduced, or disclosed in
whole or in part without prior written permission of ILI Technology Corp.
Page 2 of 116 V093
J1
1
2 DUMMY
J2
VGLO C1 2.2uF/6.3V VCOM 3 DUMMY
60 GND VCOMOUT
GND VCOM OTP
T2
T1
1 1 4
2
1 1 VGL 5 MTP_PWR
59 HSSI_D1_P VGL
VGL_REG 3 1 VGL HSSI_D1_P VGLO 6
C2 1uF/25V VGL_REG 7 VGLO
HSSI_D1_N
0
58 VGL_REG
HSSI_D1_N VGL VCL
R5
T3
1 C3 2.2uF/6.3V 8
1 C4 VREF15 9 VCL
57 GND 1uF/6.3V
HSSI_D1_P GND GND 10 VREF15
Note:
AGND
Connector 60
HSSI_D1_N 56 HSSI_CLK_P 11
HSSI_CLK_P VGLO VCI VCI
T4
1 C5 1uF/6.3V 12
1 GND 13 VCIR
55 HSSI_CLK_N VSSR
HSSI_CLK_N VCI 14
HSSI_CLK_P 15 VDD_DET_DMY
54 GND DIOPWR
HSSI_CLK_N GND VGL_REG
T5
1 16
1 17 VGSN_DMY
53 HSSI_D0_P VGSP_DMY
HSSI_D0_P VREG2OUT 18
HSSI_D0_P VREG1OUT 19 VREG2OUT
52 HSSI_D0_N VREG1OUT
HSSI_D0_N HSSI_D0_N VGH GND
T6
1 20
1 C6 1uF/6.3V VCORE 21 DGND
51 GND VCORE
GND VCI 22
VCL 23 VCI
50 VCL
TE VCORE GND
T7
1 24
1 LANSEL 25 AGND
49 TE LANSEL
TE DSWAP 26
ILI9806_HSD GLASS(5.3"+5.0"+3.97")
VGL:PUMP circuit
PSWAP 27 DSWAP
48 LEDON PSWAP
先Lay這些訊號，兩兩一對並包地線
LEDON VCL GND
T8
1 28
1 NBWSEL 29 DSTB_SEL_TESTIN[6]
47 LEDPWM NBWSEL
LEDPWM 30
31 RGBBP_TESTIN[7]
46 I2C_SA0_TESTOUT[0]
Page7 : R17h => 22h

Page6 : R53h => 10h
Page7 : R17h => 32h
Page6 : R53h => 12h
NC VCI IM3
T9
1 32
1 IM2 33 IM3
45 IOVCC IM2
IOVCC IM1 34
NBWSEL IM1
VGLO tie VGL Command :

44 IOVCC IM0 35
IOVCC 1 V12_MIPI EXB1T 36 IM0
2
T10
1 TE 37 EXB1T_TESTOUT[1]
43 VCI TE
3 1 IOVCC VCI 38
VSEL_TESTOUT[2]
VGLO tie VGL_REG Command :

VCI SDO 39
0
42 SDO
VCI VCORE_MIPI SDI
R7
1 40
T11
1 41 SDI
41 VCI
VGL_REG:Regulator power circuit

VCI SCL 42 DCX
43 WRX
40 DB23 RDX
DB23 1 IOVCC CSX 44
T12
1 RESX 45 CSX
39 DB22
1. HSD Panel
DB22 GND 46 RESX

DGND
NBWSEL
38 DB21 IOVCC 47
DB21 1 DVDDH 1uF/6.3V DB23 48 IOVCC
T13
1 C7 DB22 49 D23
37 DB20
1
0
DB20 DB21 50 D22
DB20 51 D21
36 DB19 D20
DB19 1 DVDDL DB19 52
T14
DSWAP 1 DB18 D19
35 DB18 53
D18
2
DB18 DB17 54
DB16 55 D17
3 1 IOVCC 34 DB17 D16
DB17 1 VREF15 DB15 56
T15
1 D15
black
white
DB14 57
0
33 DB16 D14
R9
DB16 DB13 58
DB12 59 D13
PSWAP 32 DB15 D12
DB15 1 TE DB11 60
T16
1 D11
2
DB10
MIPI interface)
31 DB14 61
DB14 DB9 62 D10
3 1 IOVCC DB8 D9
(necessary in RGB
30 DB13 63
DB13 1 VREG2OUT DB7 64 D8
0
T17
1 DB6 65 D7
DB12
R10
29 D6
DB12 DB5
IOVCC Cap : Optional

66
DB4 67 D5
28 DB11 D4
DB11 1 VREG1OUT DB3 68
T18
1 DB2 D3
Interface ; floating in
27 DB10 69
1
0
DB10 DB1 70 D2
DB0 71 D1
26 DB9 D0
DB9 DE 72
PCLK 73 DE
25 DB8 PCLK
DB8 HSYNC 74
1
0
1
0
VSYNC 75 HS
24 DB7 VS
DB7 LEDPWM 76
DSWAP PSWAP
LEDON 77 LEDPWM
23 DB6 LEDON
DB6 IOVCC 78
GND 79 IOVCC
V255 > V254 >…> V1 > V0, normally

V0 > V1 >…> V254 > V255, normally
22 DB5 DGND
DB5 C8 2.2uF/10V DVDDH 80
GND 81 DVDDH
21 DB4 AGND
DB4 C9 2.2uF/10V DVDDL 82
VCI 83 DVDDL
20 DB3 VCI
DB3 GND 84
VCORE 85 DGND
19 DB2 VCORE
DB2 GND 86
CLK_P CLK_N
CLK_N CLK_P
CLK_P CLK_N
LANSEL 87 DGND
18 DB1 HSSI_D1_P
DB1 HSSI_D1_P 88
2
89 HSSI_D1_P
17 DB0 HSSI_D1_N
3 1 IOVCC DB0 HSSI_D1_N 90
HSSI_D1_N
CLK_N CLK_P D1_N

CLK_P CLK_N D1_P
D0_N
GND
D0_P
91
For MIPI interface

IM3
0
16 DGND
IM3
R8
92
HSSI_CLK_P 93 HSSI_CLK_P
15 IM2 HSSI_CLK_P
IM2 94
Pins
HSSI_CLK_N 95 HSSI_CLK_N
14 RESX HSSI_CLK_N
D1_N
D1_P
D0_P
D0_N
RESX GND
D0_P D0_N
96
97 DGND
13 HSSI_D0_P
74245_OUT3 HSSI_D0_P 98
99 HSSI_D0_P
12 SCL HSSI_D0_N

WRX HSSI_D0_N 100
HSSI_D0_N
D0_N
D0_P
D1_P
GND
D1_N
D1_P
11 101
RDX 102 DGND
C10 1uF/6.3V V12_MIPI 103 V12_MIPI
10 V12_MIPI
Page 3 of 116
DCX 104
C11 1uF/6.3V VCORE_MIPI 105 VCORE_MIPI
9 CSX
D0_P
D0_N
D1_P
D1_N
D1_N
CSX VCI 106 VCORE_MIPI
VCI 107 VCI
IM1
HIGH:2 data lanes

8
LOW ： 1 data lanes

IM1 GND 108 VCI
NC 109 VSSR
7 IM0 VREFCP_DMY
IM0 110
111 EXTP
6 SDI DMY
SDA 112
113 EXTN
5 SDO DMY
SD0 VCI 114
VCIP
Capacitor：Optional
4 PCLK GND 115

DOTCLK 116 CGND
C11P
V12_MIPI & VCORE_MIPI
3 DE C13 1uF/6.3V C11P 117

C11P
inpute pin to select 1 data lane

ENABLE 118
Fix to GND level when not in use.

C11N 119 C11N
2 HSYNC C11N
or 2 data lanes in MIPI interface .

HSYNC 120
C14 1uF/6.3V C12P 121 C12P
1 VSYNC C12P
floating in RGB interface)
VSYNC 122
C12N 123 C12N
124 C12N
C13P
(necessary in MIPI Interface;
C15 1uF/6.3V C13P 125

126 C13P
C13N 127 C13N
128 C13N
C14P C14P
C16 1uF/6.3V 129

130 C14P
C14N 131 C14N
DVDDH 132 C14N
1. Please ensure the same naming pin is connected certainly.

GND DVDDH
1
0
0
1
1
1
0
133
DVDDL 134 CGND
IM3
135 DVDDL
C17 1uF/6.3V C21P 136 C21P
C21P
480RGBx864 Resolution and 16.7M color
IM0 137
C21N C21N
1
1
1
0
0
0
0
138
2
139 C21N
IM2
C18 1uF/6.3V C22P 140 C22P

3 1 IOVCC C22P
141
C22N
0
C22N 142
R1
C22N
1
1
0
1
1
0
1
143
C19 1uF/6.3V C23P 144 C23P
IM1
IM1 C23P
145
2
C23N 146 C23N

147 C23N
3 1 IOVCC C24P
C24P
1
1
1
1
0
1
1
C20 1uF/6.3V 148

C24P
0
149
IM0
R2
C24N 150 C24N

VCI 151 C24N
IM2 VCIP
VCL 152
2
GND 153 VCL

154 VSSR
3 1 IOVCC CGND
155
C31P
0
C21 1uF/6.3V C31P 156

R3
157 C31P
MIPI DSI
C31N 158 C31N

Bus Interface Pins
IM3 C31N
159
2
C22 1uF/6.3V C32P 160 C32P

161 C32P
3 1 IOVCC C32N
C32N 162
C32N
0
VCORE 163
R4
GND 164 VCORE

165 AGND
C23 1uF/16V C41P 166 C41P
167 C41P
C41N 168 C41N
Interface
C24 1uF/25V VGH 169 C41N

170 VGH
C25 1uF/16V C51P 171 C51P
(SCL falling edge)
(SCL rising edge)
172 C51P
DPI with SPI 3-line
DPI with SPI 3-line
C51N 173 C51N

VGL_REG 174 C51N
2 1 VGLO 175 VGL_REG
MIPI DSI+SPI (SCL rising edge)
VGL VGLO
MIPI DSI+SPI (SCL falling edge)
176
HSC226 D1 VCOM 177 VGL
178 VCOMOUT
179 DUMMY
C26 1uF/25V DUMMY
V093
ILI9806E
1.1 HSD 3.97” (C0401D)Initial Code

Void ILI9806E_Initial_Code_HSD(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms // This delay time is necessary
LCD_nRESET = 1;
delayms(120); // Delay 120 ms
//************* Start Initial Sequence **********//
LCD_ILI9806E_CMD(0xFF); // Change to Page 1 CMD
LCD_ILI9806E_INDEX(0xFF);
LCD_ILI9806E_INDEX(0x98);
LCD_ILI9806E_CMD(0x08); //Output SDA

LCD_ILI9806E_CMD(0x021); //DE = 1 Active

LCD_ILI9806E_CMD(0x30); //Resolution setting 480 X 800

LCD_ILI9806E_CMD(0x31); //Inversion setting for 2-dot

LCD_ILI9806E_CMD(0x40); //
Page 4 of 116 V093
LCD_ILI9806E_CMD(0x52); //Flicker MSB

LCD_ILI9806E_CMD(0x53); //Flicker LSB

LCD_ILI9806E_INDEX(0x6E);
LCD_ILI9806E_CMD(0x57); //Low voltage detection

LCD_ILI9806E_CMD(0xA0); //Positive Gamma

LCD_ILI9806E_CMD(0xA1); //
LCD_ILI9806E_INDEX(0x0A);
LCD_ILI9806E_INDEX(0x0F);
Page 5 of 116 V093
LCD_ILI9806E_CMD(0xAA); //
LCD_ILI9806E_CMD(0xAB); //
LCD_ILI9806E_CMD(0xAC); //
LCD_ILI9806E_INDEX(0x0B);
LCD_ILI9806E_CMD(0xAD); //
LCD_ILI9806E_CMD(0xAE); //
LCD_ILI9806E_CMD(0xAF); //
LCD_ILI9806E_CMD(0xC0); //Negative Gamma

LCD_ILI9806E_CMD(0xC1); //
Page 6 of 116 V093
LCD_ILI9806E_CMD(0xCA); //
LCD_ILI9806E_CMD(0xCB); //
LCD_ILI9806E_CMD(0xCC); //
LCD_ILI9806E_CMD(0xCD); //
LCD_ILI9806E_INDEX(0x2D);
LCD_ILI9806E_CMD(0xCE); //
LCD_ILI9806E_CMD(0xCF); //
LCD_ILI9806E_CMD(0xFF); // Change to Page 6 CMD for GIP timing

Page 7 of 116 V093
LCD_ILI9806E_CMD(0x0A); //
LCD_ILI9806E_CMD(0x0B); //
LCD_ILI9806E_CMD(0x0C); //
LCD_ILI9806E_CMD(0x0D); //
LCD_ILI9806E_CMD(0x0E); //
LCD_ILI9806E_CMD(0x0F); //
LCD_ILI9806E_INDEX(0xF0);
LCD_ILI9806E_INDEX(0xC0);
Page 8 of 116 V093
Page 9 of 116 V093
LCD_ILI9806E_INDEX(0xBB);
LCD_ILI9806E_INDEX(0xAA);
LCD_ILI9806E_INDEX(0xDD);
LCD_ILI9806E_INDEX(0xCC);
LCD_ILI9806E_INDEX(0x10); //
LCD_ILI9806E_INDEX(0x10); //Default
//LCD_ILI9806E_INDEX(0x12) for VGLO tie VGL_REG;
LCD_ILI9806E_CMD(0xFF); // Change to Page 7 CMD for user command

Page 10 of 116 V093
LCD_ILI9806E_CMD(0XE1); //
LCD_ILI9806E_CMD(0xFF); // Change to Page 0 CMD for Normal command

LCD_ILI9806E_CMD(0x11); //Exit Sleep

Delayms(120);
LCD_ILI9806E_CMD(0x29); // Display On
Delayms(10);
LCD_ILI9806E_CMD(0x35); // TE On
Delayms(10);
}
Void ILI9806E_EnterSleep_Code(void)
{
Delayms(1)
LCD_ILI9806E_CMD(0x28); //Display Off
Delayms(10);
LCD_ILI9806E_CMD(0x10); //Sleep-In
Delayms(120);
}
Page 11 of 116 V093
Void ILI9806E_ExitSleep_Code(void)
{
Delayms(1)
LCD_ILI9806E_CMD(0x11); // Sleep-Out
Delayms(120);
Delayms(10);
}
Page 12 of 116 V093
1.2 HSD 5.0” (C0500)Initial Code

{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;
//************* Start Initial Sequence *********//




LCD_ILI9806E_CMD(0x40); //BT
LCD_ILI9806E_CMD(0x41); //Default
Page 13 of 116 V093
LCD_ILI9806E_CMD(0x50); //VREG1OUT voltage






Page 14 of 116 V093
LCD_ILI9806E_INDEX(0x0C);

Page 15 of 116 V093

Page 16 of 116 V093
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Delayms(120);
Delayms(10);
Delayms(10);
}
{
Delayms(1);
Page 20 of 116 V093

Delayms(10);
Delayms(120);
}
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 21 of 116 V093
1.3 HSD 5.3” (C0501)Initial Code

{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;




Page 22 of 116 V093






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Page 28 of 116 V093


Delayms(120);
Delayms(10);
Delayms(10);
}
{
Delayms(1);
Delayms(10);
Delayms(120);
}
Page 29 of 116 V093
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 30 of 116 V093
VGLO
J1
1
2 DUMMY
J2
GND VCOM 3 DUMMY
60
2
GND VGL 4 VCOM
VGL_REG VGL VGL
GOUT2
3 1 59 HSSI_D1_P 1 GOUT2 5
HSSI_D1_P 1 1 VGLE 6 GOUT2
VGLE
0
HSSI_D1_N 1 1 CKBE 7 VGLE
R1
58
CKBE
HSSI_D1_N 1 1 CKE 8 CKBE
CKE
HSSI_D1_P GND 1 1 STVE 9 CKE
STVE
57
HSSI_D1_N GND 1 1 GOUT800 10 STVE
GOUT800
1 GOUT800
Connector 60
56 HSSI_CLK_P 11
HSSI_CLK_P VCOM VCOM VCOM
T2
1 12
1 VCOM
Note:
55 HSSI_CLK_N D1 HSC226 13
HSSI_CLK_P HSSI_CLK_N 2 1 VGL 14 VGL
HSSI_CLK_N GND 15 VGL
54
GND VGL VGLO VGLO
T3
ILI9806_CPT GLASS
1 16
HSSI_D0_P 1 C26 1uF/25V 17 VGLO
53
HSSI_D0_P HSSI_D0_P VGL_REG 18 VGL_REG
HSSI_D0_N HSSI_D0_N 19 VGL_REG
52
HSSI_D0_N VGLO C51N C51N
T4
1 C25 1uF/16V 20
GND 1 21 C51N
51
GND C51P 22 C51P
TE_L 23 C51P
50
TE VGL_REG C24 VGH VGH
T5
1 1uF/25V 24
TE_R 1 25 VGH
49
TE 1uF/16V C41N 26 C41N
C23
C41N
VGL:PUMP circuit
48 LEDON 27
LEDON VGH C41P C41P
T6
1 28
LEDPWM 1 GND 29 C41P
47
LEDPWM VCORE 30 AGND
31 VCORE
46
NC VCORE 1uF/6.3V C32P C32N
T7
1 C22 32
Page7 : R17h => 22h

Page6 : R53h => 10h
Page7 : R17h => 32h
Page6 : R53h => 12h
IOVCC 1 33 C32N
45
IOVCC C32N 34 C32P
IOVCC 35 C32P

44
IOVCC VCL 1uF/6.3V C31N C31N
T8
1 C21 36
VCI 1 37 C31N
43
VCI C31P 38 C31P
VCI 39 C31P

42
VCI VCI GND CGND
T9
1 40
VCI 1 GND 41 CGND
41
VCI VSSR

42
DB23 VCL 43 VCL
40
DB23 1 V12_MIPI 44 VCL
T10
DB22 1 VCI 45 VCIP
39
DB22 46 VCIP
DB21 C20 1uF/6.3V C24N 47 C24N
38
DB21 1 VCORE_MIPI 48 C24N
T11
DB20 1 C24P 49 C24P
37
DB20 50 C24P
DB19 C19 1uF/6.3V C23N 51 C23N
LANSEL 36
DB19 1 IOVCC 52 C23N
T12
DB18 1 C23P 53 C23P
35
DB18 54 C23P
C22N
2
34 DB17 C18 1uF/6.3V C22N 55
DB17 C22N
2. CPT Panel
1 DVDDH 56
3 1 IOVCC
T13
DB16 1 C22P 57 C22P
33
DB16 C22P
0
58
DB15 C17 1uF/6.3V C21N 59 C21N
R13
32
DB15 1 DVDDL 60 C21N
T14
DB14 1 C21P 61 C21P
31
DB14 62 C21P
DB13 2.2uF/10V DDVDL 63 DDVDL
30 C16
DB13 1 VREF15 64 DDVDL
T15
DB12 1 GND 65 CGND
29
DB12 66 CGND
DB11 C15 2.2uF/10V DDVDH 67 DDVDH
28
DB11 1 TE_R 68 DDVDH
T16
DB10 1 C14 1uF/6.3V C14N 69 C14N
27
DB10 70 C14N
DB9 C14P 71 C14P
26
DB9 1 VREG2OUT 72 C14P
T17
DB8 1 C13 1uF/6.3V C13N 73 C13N
25
C13N
HIGH:2 data lanes

DB8

74
DB7 C13P 75 C13P
24
DB7 1 VREG1OUT 76 C13P
T18
DB6 1 C12 1uF/6.3V C12N 77 C12N
23
DB6 78 C12N
DB5 C12P 79 C12P
22
DB5 1 TE_L 80 C12P
T19
DB4 1 C11 1uF/6.3V C11N 81 C11N
21
DB4 82 C11N
DB3 C11P 83 C11P
20
DB3 84 C11P

CGND

19 DB2 GND 85
DB2 86 CGND

DB1 VCI 87 VCIP
18
DB1 88 VCIP
DB0 89 CSN_DMY
17
DB0 90 EXTN
IM3 91 CSP_DMY
16
IM3 C10 NC 92 EXTP
IM2 GND 93 VREFCP_DMY
15
IM2 1 TE_R 94 VSSR
RESX 1 95 TE_R
14
RESX 96 VCI
TE_R
VCI 97 VCI
13
74245_OUT3 98 VCI
SCL C9 1uF/6.3VVCORE_MIPI 99 VCORE_MIPI
DSWAP 12
WRX 100 VCORE_MIPI
V12_MIPI
2
11 C8 1uF/6.3V V12_MIPI 101
RDX GND 102 V12_MIPI
3 1 IOVCC DGND
10 103
DCX HSSI_D0_N
0
HSSI_D0_N 104
R8
HSSI_D0_N
Capacitor : Optional
9 CSX 105
CSX HSSI_D0_P
HSSI_D0_P 106
PSWAP IM1 GND 107 HSSI_D0_P
8
IM1 108 DGND
2
IM0 HSSI_CLK_N 109 HSSI_CLK_N
7
3 1 IOVCC IM0 110 HSSI_CLK_N
SDI HSSI_CLK_P 111 HSSI_CLK_P
6
0
SDA GND 112 HSSI_CLK_P
R12
DGND
; floating in RGB interface)
(necessary in MIPI Interface
5 SDO 113
SD0 HSSI_D1_N 114 HSSI_D1_N
PCLK 115 HSSI_D1_N
4
DOTCLK HSSI_D1_P 116 HSSI_D1_P
DE GND 117 HSSI_D1_P
3
1
0
ENABLE VCORE 118 DGND
HSYNC GND 119 VCORE
2
HSYNC DGND
DSWAP
VCI 120
VSYNC 121 VCI
1
VSYNC DDVDL 122 DDVDL
GND 123 DDVDL
AGND

124
1
0
1
0
DDVDH 125 DDVDH
GND 126 DDVDH
DGND
PSWAP
IOVCC 127
1 ERR 128 IOVCC
1 LEDON 129 ERR
ERR
LEDPWM 130 LEDON
Page 31 of 116
VSYNC 131 LEDPWM
HSYNC 132 VS
PCLK 133 HS
DE 134 PCLK
DB0 135 DE
DB1 136 D0
DB2 137 D1
DB3 138 D2
DB4 139 D3
DB5 140 D4
DB6 141 D5
DB7 142 D6
DB8 143 D7
DB9 144 D8
D9
CLK_N CLK_P D1_N

CLK_P CLK_N D1_P
CLK_N CLK_P D0_N
CLK_P CLK_N D0_P
CLK_P CLK_N D0_P
DB10 145
D10
Pins
DB11 146
DB12 147 D11
DB13 148 D12
DB14 149 D13
DB15 150 D14
D15
D1_P
D1_N
D0_P
D0_N
D0_N
DB16 151
DB17 152 D16
DB18 153 D17
DB19 154 D18
DB20 155 D19
DB21 156 D20
D21
D0_N
D0_P
D1_N
D1_P
D1_P
DB22 157
DB23 158 D22
C7 1uF/6.3V IOVCC 159 D23
GND 160 IOVCC
RESX 161 DGND

CSX 162 RESX
CSX
D0_P
D0_N
D1_P
D1_N
D1_N
RDX 163
SCL 164 RDX_TESTD_EN
DCX 165 WRX_SCL
SDI 166 DCX_TESTOUT[3]

SDO 167 SDI
168 SDO
1 TE_L 169 VSEL_TESTOUT[2]
1 170 TE_L
TE_L
171 EXB1T_TESTOUT[1]
GPO0
1
0
0
1
1
1
0
172
floating in MIPI interface)
173 GPO1
IM3

174 GPO2
(necessary in RGB Interface ;
IM0 175 GPO3

IM1 176 IM0
IM2 IM1
1
1
1
0
0
0
0
177
IM3 178 IM2
IM2
IM3 179 IM3

I2C_SA0_TESTOUT[0]
2
180
181 RGBBP_TESTIN[7]
3 1 IOVCC PSWAP DSTB_SEL_TESTIN[6]
1
1
0
1
1
0
1
182
DSWAP 183 PSWAP
0
IM1
DSWAP
R9
LANSEL 184
GND 185 LANSEL
IM2 VCL 186 AGND
VCL
2
1
1
1
1
0
1
1
187
VCI 188 VCI
IM0
3 1 IOVCC C6 1uF/6.3V VCORE 189 VCI

GND 190 VCORE
0
1 VREG1OUT 191 DGND

R10
1 1 VREG2OUT 192 VREG1OUT

1 193 VREG2OUT
IM1 194 VGSP_DMY
VRE1GOUT
195 VGSN_DMY
2
VREG2OUT
VCI 196 DIOPWR

MIPI DSI
3 1 IOVCC GND 197 VDD_DET_DMY

198 VSSR
C5 1uF/6.3V VCI 199 VCIR
0
VCI
R4
GND 200
IM0 C4 1uF/6.3V VREF15 201 AGND
VREF15
2
202
C3 2.2uF/6.3V VCL 203 VCL
3 1 IOVCC VGL_REG 204 VCL
1uF/25V C2 VGLO 205 VGL_REG
0
VGLO
R5
VGL
T1
206
207 VGL
Interface
1 MTP_PWR 208 MTP_PWR

MTP_PWR
1 MTP_PWR
CNT1B
1 CNT1B 209
1 1 CNT1A 210 CONTACT1B
(SCL falling edge)
(SCL rising edge)
1 CONTACT1A
CNT1A
211
DPI with SPI 3-line
DPI with SPI 3-line
C1 2.2uF/6.3V VCOM 212 VCOM

1 GOUT799 213 VCOM
1 1 STVO 214 GOUT799
1 CKO STVO
1 215
1 1 CKBO 216 CKO
1 1 VGLOO 217 CKBO
STVO
GOUT799
1 1 GOUT1 218 VGLO

1 VCOM 219 GOUT1
CKO
220 VCOM
221 DUMMY
CKBO
DUMMY
VGLOO
GOUT1
V093
ILI9806E
2.1 CPT 3.97” (040LJ) Initial Code

Void ILI9806E_Initial_Code_CPT(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;




Page 32 of 116 V093






Page 33 of 116 V093

Page 34 of 116 V093

Page 35 of 116 V093
Page 36 of 116 V093
Page 37 of 116 V093
Page 38 of 116 V093



Delayms(120);
Delayms(10);
Delayms(10);
}
{
Delayms(1);
Page 39 of 116 V093

Delayms(10);
Delayms(120);
}
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 40 of 116 V093
2.2 CPT 4.5” (045LA) Initial Code

{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;



LCD_ILI9806E_CMD(0x31); // Column Inversion

Page 41 of 116 V093




Page 42 of 116 V093

Page 43 of 116 V093

Page 44 of 116 V093
Page 45 of 116 V093
Page 46 of 116 V093
Page 47 of 116 V093



Delayms(120);
Delayms(10);
Delayms(10);
}
{
Delayms(1);
Page 48 of 116 V093
Delayms(10);
Delayms(120);
}
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 49 of 116 V093
2.3 CPT 5.0” (050LD) Initial Code

{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;



LCD_ILI9806E_CMD(0x31); // Inversion setting for for Column Inversion

Page 50 of 116 V093




Page 51 of 116 V093

Page 52 of 116 V093

Page 53 of 116 V093
Page 54 of 116 V093
Page 55 of 116 V093

Page 56 of 116 V093


Delayms(120);
Delayms(10);
Delayms(10);
}
{
Delayms(1);
Delayms(10);
Delayms(120);
}
Page 57 of 116 V093
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 58 of 116 V093
J1
1
J2
VGLO 2 DUMMY1
60 GND NULL2
GND VCOM
T2
1 3
2
1 4 GND3
59 HSSI_D1_P GND4
VGL_REG 3 1 VGL HSSI_D1_P 5
6 DUMMY5
HSSI_D1_N
0
58 DUMMY6
HSSI_D1_N VGL
R5
T3
1 7
1 C1 1uF/25V 8 GND7
57 GND GND8
HSSI_D1_P GND VCOM 9
VCOM_R9
Connector 60
Note:
HSSI_CLK_P VGLO VCOM_R10
T4
1 2 1 VGL 11
1 VGLO 12 VGL11
55 HSSI_CLK_N VGLO_R12
HSSI_CLK_N HSC226 D1 VGL_REG 13
HSSI_CLK_P C51N 14 VGL_REG_R13
54 GND C51N14
T5
1 C2 1uF/16V 15
1 16 C51N15
ILI9806E_BOE_ GLASS(4.5")
53 HSSI_D0_P C51P16
HSSI_D0_P C51P 17
HSSI_D0_P 18 C51P17
52 HSSI_D0_N C51P18
HSSI_D0_N HSSI_D0_N VGH
T6
1 C3 1uF/25V VGH_REG 19
1 VGHO 20 VGH_REG_R19
51 GND VGHO20
GND C4 1uF/25V VGH 21
C41N 22 VGH21
50 TE_R C41N22
TE VCORE
T7
1 C5 1uF/16V 23
1 24 C41N23
49 TE_L C41P24
TE C41P 25
26 C41P25
48 LEDON
AGND26
VGL:PUMP circuit
LEDON VCL
T8
1 C6 1uF/6.3V 27
1 C32N 28 VCORE27(DVDD)
47 LEDPWM C32N28
LEDPWM C7 1uF/6.3V 29
C32N29
Page7 : R17h => 22h

Page6 : R53h => 10h
Page7 : R17h => 32h
Page6 : R53h => 12h
46 C32P 30
NC VCI C31N C32P30
T9
1 31
1 C8 1uF/6.3VC31P 32 C31N31
45 IOVCC C31P32

IOVCC 33
NBWSEL 34 CGND33
44 IOVCC AVSS34
IOVCC 1 V12_MIPI 35
2
T10
1 C9 2.2uF/6.3V VCL 36 VCL35
43 VCI VCL36
3 1 IOVCC

VCI 37
VCI 38 VCIP37
VCI
0
42 VCIP38
VCI VCORE_MIPI C24N
R7
1 39
T11
1 C10 1uF/6.3V 40 C24N39
41 VCI C24N40
VCI 41
C24P41

40 DB23 C24P 42
DB23 1 IOVCC C23N 43 C24P42
T12
1 C11 1uF/6.3V 44 C23N43
39 DB22 C23N44
DB22 45
C23P45
NBWSEL
38 DB21 C23P 46
DB21 1 DVDDH C22N 47 C23P46
T13
1 C12 1uF/6.3VC22P 48 C22N47
37 DB20
1
0
DB20 C21N 49 C22P48
C26 1uF/6.3VC21P 50 C21N49
DB19
3. BOE Panel
36 C21P50
DB19 1 DVDDL DDVDL 51
T14
DSWAP 1 DDVDL51
35 DB18 52
CGND52
2
DB18 DDVDH 53
54 DDVDH53
3 1 IOVCC 34 DB17 DDVDH54
DB17 1 VREF15 C14N 55
T15
1 C14N55
black
white
C13 1uF/6.3V 56
0
33 DB16 C14N56
R9
DB16 57
C14P 58 C14P57
PSWAP 32 DB15 C14P58
DB15 1 TE_R C13N 59
T16
1 C13N59
2
31 DB14 C14 1uF/6.3VC13P 60
DB14 C12N 61 C13P60
3 1 IOVCC C15 1uF6.3VC12P 62 C12N61
30 DB13 C12P62
DB13 1 VREG2OUT 63
0
T17
1 C11N 64 C11N63
DB12
R10
29 C11N64
DB12 C16 1uF/6.3VC11P 65
66 C11P65
28 DB11 CGND66
DB11 1 VREG1OUT VCI 67
T18
1 68 VCIP67
27 DB10
1
0
DB10 69 DUMMY68(CSN)
70 EXTN69
26 DB9 DUMMY70(CSP)
DB9 1 VPP 71
T19
1 VGH_REG 72 EXTP71
25 DB8 VGH_REG72
DB8 73
1
0
1
0
74 DUMMY73(NDVDD)
24 DB7 VSSR74
DB7 75
DSWAP PSWAP
TE_R 76 TE_R75
23 DB6 TE_R76
DB6 VCI 77
C17 1uF/6.3V 78 VCI77
V255 > V254 >…> V1 > V0, normally

V0 > V1 >…> V254 > V255, normally
22 DB5 VCI78
DB5 VCORE_MIPI 79
C18 1uF/6.3V V12_MIPI 80 VCORE_MIPI79
21 DB4 V12_MIPI80
DB4 C19 1uF/6.3V 81
82 DGND81
20 DB3 DGND82
DB3 HS_D0N 83
HS_D0N 84 HS_D0N83
19 DB2 HS_D0N84
DB2 HS_D0P 85
CLK_P CLK_N
CLK_N CLK_P
CLK_P CLK_N
LANSEL HS_D0P 86 HS_D0P85
DB1
Capacitor： Optional
18 HS_D0P86
DB1 87
2
88 DGND87
17 DB0 DGND88
3 1 IOVCC DB0 HS_CN 89
HS_CN89
CLK_N CLK_P D1_N

CLK_P CLK_N D1_P
D0_N
D0_P
HS_CP 90
For MIPI interface

IM3
0
16 HS_CP90
IM3
R8
91
HS_D1N 92 DGND91
15 IM2 HS_D1N92
IM2 HS_D1P 93
Pins
94 HS_D1P93
14 RESX DGND94
D1_N
D1_P
D0_P
D0_N
RESX VCORE
D0_P D0_N
C20 1uF/6.3V 95
96 VCORE95(DVDD)
13 DGND96
74245_OUT3 VCI 97
C21 2.2uF/10V DDVDL 98 VCI97
12 SCL DDVDL98
WRX 99
DDVDL99
D0_N
D0_P
D1_P
D1_N
D1_P
11 100
RDX 101 AGND
C22 2.2uF/10V DDVDH 102 DDVDH101
10 DDVDH102
DCX 103
C23 1uF/6.3V IOVCC 104 DGND103
9 CSX
D0_P
D0_N
D1_P
D1_N
D1_N
CSX 105 IOVCC104
LEDON 106 ERR105
IM1
HIGH:2 data lanes

8

IM1 107 LEDON106
LEDPWM 108 LEDPWM107
7 IM0 LEDPWM108
IM0 VS 109
HS 110 VS109
SDI

6 HS110
SDA PCLK 111
DE 112 PCLK111
5 SDO DE112
SD0 DB0 113
DB1 114 DB0
4 PCLK DB1
DOTCLK DB2 115
DB2
Page 59 of 116
3 DE DB3 116
MIPI interface)
DB3

ENABLE DB4 117

DB5 118 DB4
2 HSYNC DB5

HSYNC DB6 119
DB7 120 DB6
1 VSYNC DB7
VSYNC DB8 121
DB9 122 DB8
DB10 123 DB9
DB11 124 DB10
DB12 125 DB11
DB13 126 DB12
DB14 DB13
in RGB Interface ; floating in
127
DB14
IOVCC Cap : Optional (necessary
DB15 128
DB16 129 DB15
DB17 130 DB16
DB18 131 DB17
DB19 DB18
1
0
0
1
1
1
0
132
DB20 133 DB19
IM3
DB21 134 DB20

DB22 135 DB21
DB23 136 DB22
IM0 DB23
IOVCC
1
1
1
0
0
0
0
137
2
138 IOVCC137
IM2
RESX 139 DGND138

3 1 IOVCC RESX139
140
RESX140
0
CSX 141
R1
CSX141
1
1
0
1
1
0
1
142
SCL TESTD_EN142(T_RDX)
143
IM1
IM1 SCL143
144
2
SDI 145 TESTDOUT[3]144(DCX)

SDO 146 SDI145
3 1 IOVCC SDO146

1
1
1
1
0
1
1
147
TESTDOUT[2]147(VSEL)
0
148
IM0
R2
TE_L 149 TE_L148

150 TE_L149
IM2 TESTDOUT[1]150(EXBT)
151
2
GPO0
152
153 GPO1
3 1 IOVCC GPO2
154
GPO3
0
IM0 155
R3
IM1 156 IM0

MIPI DSI
IM2 157 IM1

Bus Interface Pins
IM3 IM2
IM3 158
2
159 IM3
160 TESTDOUT[0]159(I2C_SA0)
3 1 IOVCC TESTDIN[7]160(T_RGBBP)
NBWSEL 161
NBWSEL161
0
162
R4
PSWAP 163 TESTDIN[6]162(T_DSTB_SEL)

DSWAP 164 PSWAP163
LANSEL 165 DSWAP164
166 LANSEL165
VCL 167 AGND166
Interface
168 VCL167
VCI 169 VCI168
170 VCI169
(SCL falling edge)
(SCL rising edge)
VCORE 171 VCORE_170

DPI with SPI 3-line
DPI with SPI 3-line
172 VCORE_171
VREG1OUT 173 DGND_172
VREG2OUT 174 VREG1OUT173(VGMP)
VREG2OUT174(VGMN)
175
176 DUMMY175(VGSP)
177 DUMMY176(VGSN)
VCI 178 TESTDIN[5]177(DIOPWR)
179 DUMMY178(VDD_DET)
180 VSR179
VCI 181 VCIR180
182 VCI181
183 AGND182
C24 1uF/6.3V VCL 184 VREF15_183(VREF_PWR)
VGH_REG 185 VCL184
VGL_REG 186 VGH_REG_L185
VGLO 187 VGL_REG_L186
VGL 188 VGLO_L187
VPP 189 VGL188
190 VPP189(OTP_PWR)
C25 2.2uF/6.3V 191 VCOM_L190
192 DUMMY191
193 GND192
194 DUMMY193
195 DUMMY194
196 GND195
197 GND196
198 NULL197
DUMMY198
V093
ILI9806E
3.1 BOE 4.46” Initial Code

Void ILI9806E_Initial_code_BOE (void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;
LCD_ILI9806E_CMD(0xFF); //Change to page1 CMD
LCD_ILI9806E_CMD(0x08); // Output SDA

LCD_ILI9806E_CMD(0x21); // DE = 1 Active
LCD_ILI9806E_CMD(0x30); // Resolution setting 480 X 800

LCD_ILI9806E_CMD(0x31); // Inversion setting for Column inversion

LCD_ILI9806E_CMD(0x40); // BT 2.5/-2.5 pump for DDVDH-L

LCD_ILI9806E_CMD(0x41); // DDVDH/ DDVDL clamp

LCD_ILI9806E_CMD(0x42); // VGH/VGL
Page 60 of 116 V093
LCD_ILI9806E_CMD(0x43);
LCD_ILI9806E_CMD(0x50); // VREG1OUT voltage

LCD_ILI9806E_CMD(0x51); // VREG2OUT voltage

LCD_ILI9806E_CMD(0x52); // Flicker MSB

LCD_ILI9806E_CMD(0x53); // Flicker LSB


LCD_ILI9806E_CMD(0x60); // SDTI
LCD_ILI9806E_CMD(0x61); // CRTI
LCD_ILI9806E_CMD(0x62); // EQTI
LCD_ILI9806E_CMD(0x63); // PCTI
LCD_ILI9806E_CMD(0XA0); // Positive Gamma

Page 61 of 116 V093
LCD_ILI9806E_CMD(0XA1);
LCD_ILI9806E_CMD(0XAA);
LCD_ILI9806E_CMD(0XAB);
LCD_ILI9806E_CMD(0XAC);
LCD_ILI9806E_CMD(0XAD);
LCD_ILI9806E_INDEX(0x18)
LCD_ILI9806E_CMD(0XAE);
LCD_ILI9806E_CMD(0XAF);
LCD_ILI9806E_CMD(0XC0); // Negative Gamma

LCD_ILI9806E_CMD(0XC1);
Page 62 of 116 V093
LCD_ILI9806E_CMD(0XCA);
LCD_ILI9806E_CMD(0XCB);
LCD_ILI9806E_CMD(0XCC);
LCD_ILI9806E_CMD(0XCD);
LCD_ILI9806E_CMD(0XCE);
LCD_ILI9806E_CMD(0XCF);
LCD_ILI9806E_CMD(0XFF);
LCD_ILI9806E_INDEX(0x06); //Change to page6 for GIP timing
LCD_ILI9806E_CMD(0X00);
Page 63 of 116 V093
LCD_ILI9806E_CMD(0X0A);
LCD_ILI9806E_CMD(0X0B);
LCD_ILI9806E_CMD(0X0C);
LCD_ILI9806E_CMD(0X0D);
LCD_ILI9806E_CMD(0X0E);
LCD_ILI9806E_CMD(0X0F);
Page 64 of 116 V093
Page 65 of 116 V093
Page 66 of 116 V093

LCD_ILI9806E_INDEX(0x00); //Change to page0

Delayms(120);
Delayms(10);
Delayms(10);
}
{
Delayms(1);
Page 67 of 116 V093
Delayms(10);
Delayms(120);
}
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 68 of 116 V093
3.2 BOE 4.95” Initial Code (4.5G)

Void ILI9806E_Initial_Code_BOE(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;


LCD_ILI9806E_CMD(0x31); // Inversion setting for for 2-dot

LCD_ILI9806E_CMD(0x40); // Pump for DDVDH-L


Page 69 of 116 V093
LCD_ILI9806E_CMD(0x50); // VREG1OUT VOLTAGE





Page 70 of 116 V093


Page 71 of 116 V093
LCD_ILI9806E_INDEX(0x06); //Change to page6 for GIP timing ( For 4.5G)
Page 72 of 116 V093
Page 73 of 116 V093
LCD_ILI9806E_INDEX(0XC0);
Page 74 of 116 V093
Page 75 of 116 V093


Delayms(120);
Delayms(10);
Delayms(10);
}
{
Page 76 of 116 V093
Delayms(1);
Delayms(10);
Delayms(120);
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 77 of 116 V093
3.3 BOE 4.95” Initial Code (6G)

Void ILI9806E_Initial_Code_BOE(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;





Page 78 of 116 V093





Page 79 of 116 V093


Page 80 of 116 V093
LCD_ILI9806E_INDEX(0x06); //Change to page6 for GIP timing ( For 6G)
Page 81 of 116 V093
Page 82 of 116 V093
Page 83 of 116 V093

Page 84 of 116 V093

Delayms(120);
Delayms(10);
Delayms(10);
}
{
Delayms(1);
Page 85 of 116 V093

Delayms(10);
Delayms(120);
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 86 of 116 V093
J1
1
2 DUMMY
J2
VGLO C1 2.2uF/6.3V VCOM 3 DUMMY
60 GND VCOM_L
GND VCOM OTP
T2
T1
1 1 4
2
1 1 VGL 5 MTP_PWR
59 HSSI_D1_P VGL
VGL_REG 3 1 VGL HSSI_D1_P VGLO 6
C2 1uF/25V VGL_REG 7 VGLO_L
HSSI_D1_N
0
58 VGL_REG_L
HSSI_D1_N VGL VCL
R5
T3
1 C3 2.2uF/6.3V 8
1 C4 VREF15 9 VCL
57 GND 1uF/6.3V
HSSI_D1_P GND GND 10 VREF15
Note:
AGND
Connector 60
HSSI_CLK_P VGLO VCI VCI
T4
1 C5 1uF/6.3V 12
1 GND 13 VCIR
55 HSSI_CLK_N VSSR
HSSI_CLK_N VCI 14
HSSI_CLK_P 15 VDD_DET_DMY
54 GND DIOPWR
T5
1 16
1 17 VGSN_DMY
53 HSSI_D0_P VGSP_DMY
HSSI_D0_P VREG2OUT 18
HSSI_D0_P VREG1OUT 19 VREG2OUT
52 HSSI_D0_N VREG1OUT
HSSI_D0_N HSSI_D0_N VGH GND
T6
1 20
1 C6 1uF/6.3V VCORE 21 DGND
51 GND VCORE
ILI9806_GP GLASS(4.5"+5.0")
GND VCI 22
VCL 23 VCI
50 VCL
TE VCORE GND
T7
1 24
1 LANSEL 25 AGND
49 TE LANSEL
TE DSWAP 26
PSWAP 27 DSWAP
VGL:PUMP circuit
48 LEDON PSWAP
LEDON VCL GND
T8
1 28
1 NBWSEL 29 DSTB_SEL_TESTIN[6]
47 LEDPWM NBWSEL
LEDPWM 30
31 RGBBP_TESTIN[7]
46 I2C_SA0_TESTOUT[0]
NC VCI IM3
T9
1 32
1 IM3
Page7 : R17h => 22h

Page6 : R53h => 10h
Page7 : R17h => 32h
Page6 : R53h => 12h
45 IOVCC IM2 33
IOVCC IM1 34 IM2
NBWSEL IM0 35 IM1
44 IOVCC IM0

IOVCC 1 V12_MIPI EXB1T 36
2
T10
1 TE 37 EXB1T_TESTOUT[1]
43 VCI TE_L
3 1 IOVCC VCI 38
SDO 39 VSEL_TESTOUT[2]
VCI
0
42 SDO

VCI VCORE_MIPI SDI
R7
1 40
T11
1 41 SDI
41 VCI
4. GP Panel
VCI SCL 42 DCX

43 SCL
40 DB23 RDX
DB23 1 IOVCC CSX 44
T12
1 RESX 45 CSX
39 DB22 RESX
DB22 GND 46
DGND
NBWSEL
38 DB21 IOVCC 47
DB21 1 DVDDH 1uF/6.3V DB23 48 IOVCC
T13
1 C7 DB22 49 D23
37 DB20
1
0
DB20 DB21 50 D22
DB20 51 D21
36 DB19 D20
DB19 1 DVDDL DB19 52
T14
DSWAP 1 DB18 D19
35 DB18 53
D18
2
DB18 DB17 54
DB16 55 D17
3 1 IOVCC 34 DB17 D16
DB17 1 VREF15 DB15 56
T15
1 D15
black
white
DB14 57
0
33 DB16 D14
R9
DB16 DB13 58
DB12 59 D13
PSWAP 32 DB15 D12
DB15 1 TE DB11 60
T16
1 D11
2
31 DB14 DB10 61
DB14 DB9 62 D10
3 1 IOVCC DB8 63 D9
30 DB13 D8
DB13 1 VREG2OUT DB7 64
0
T17
1 DB6 65 D7
DB12
R10
29
MIPI interface)
DB12 DB5 66 D6
DB4 67 D5
28 DB11
(necessary in RGB
T18
1 DB2 69 D3
27 DB10
1
0
DB10 DB1 70 D2
DB0 71 D1
26 DB9 D0
DB9 DE 72
PCLK 73 DE
25 DB8
DB8 HSYNC 74 PCLK
1
0
1
0
VSYNC 75 HS
24 DB7 VS
DB7 LEDPWM 76
DSWAP PSWAP
LEDON 77 LEDPWM
23 DB6 LEDON
DB6 IOVCC 78
GND 79 IOVCC
V255 > V254 >…> V1 > V0, normally

V0 > V1 >…> V254 > V255, normally
22 DB5 DGND
DB5 C8 2.2uF/10V DVDDH 80
GND 81 DDVDH
21 DB4 AGND
DB4 C9 2.2uF/10V DVDDL 82
VCI 83 DDVDL
20 DB3 VCI
DB3 GND 84
VCORE 85 DGND
19 DB2 VCORE
DB2 GND 86
CLK_P CLK_N
CLK_N CLK_P
CLK_P CLK_N
LANSEL 87 DGND
18 DB1 HSSI_D1_P
DB1 HSSI_D1_P 88
2
89 HSSI_D1_P
17 DB0 HSSI_D1_N
3 1 IOVCC DB0 HSSI_D1_N 90
HSSI_D1_N
CLK_N CLK_P D1_N

CLK_P CLK_N D1_P
D0_N
GND
D0_P
D0_P
91
For MIPI interface

IM3
0
16 DGND
IM3
R8
92
HSSI_CLK_P 93 HSSI_CLK_P
15 IM2 HSSI_CLK_P
IM2 94
Pins
HSSI_CLK_N 95 HSSI_CLK_N
14 RESX HSSI_CLK_N
D1_N
D1_P
D0_P
D0_N
RESX GND
D0_N
96
97 DGND
13 HSSI_D0_P
74245_OUT3 HSSI_D0_P 98
99 HSSI_D0_P
12 SCL

WRX HSSI_D0_N 100 HSSI_D0_N
HSSI_D0_N
D0_N
D0_P
D1_P
GND
D1_N
D1_P
11 101
RDX 102 DGND
C10 1uF/6.3V V12_MIPI 103 V12_MIPI
10 V12_MIPI
DCX 104
VCORE_MIPI
Page 87 of 116
9 CSX C11 1uF/6.3V VCORE_MIPI 105
D0_P
D0_N
Capacitor： Optional
D1_P
D1_N
D1_N
CSX VCI 106 VCORE_MIPI
VCI 107 VCI

IM1
HIGH:2 data lanes

8

IM1 GND 108 VCI
VSSR
7 IM0 NC 109
IM0 110 VREFCP_DMY
111 EXTP
6 SDI DMY
SDA 112
113 EXTN
5 SDO DMY
SD0 VCI 114
GND 115 VCIP
4 PCLK CGND
DOTCLK 116
C13 1uF/6.3V C11P 117 C11P
3 DE C11P

ENABLE 118

C11N 119 C11N
2 HSYNC C11N

HSYNC 120
C14 1uF/6.3V C12P 121 C12P
1 VSYNC C12P
VSYNC 122
C12N 123 C12N
124 C12N
C15 1uF/6.3V C13N 125 C13P
126 C13P
C13P 127 C13N
128 C13N
C14P C14P
C16 1uF/6.3V 129

130 C14P
C14N 131 C14N
DVDDH 132 C14N

GND DVDDH
1
0
0
1
1
1
0
133
DVDDL 134 CGND
IM3
135 DVDDL
C17 1uF/6.3V C21P 136 C21P
C21P
IM0 137
C21N C21N
1
1
1
0
0
0
0
138
2
139 C21N
IM2
C18 1uF/6.3V C22P 140 C22P

3 1 IOVCC C22P
141
C22N
0
C22N 142
R1
C22N
1
1
0
1
1
0
1
143
C19 1uF/6.3V C23P 144 C23P
IM1
IM1 C23P
145
2
C23N 146 C23N

147 C23N
3 1 IOVCC C24P
C24P
1
1
1
1
0
1
1
C20 1uF/6.3V 148

C24P
0
149
IM0
R2
C24N 150 C24N

VCI 151 C24N
IM2 VCIP
VCL 152
2
GND 153 VCL

154 VSSR
3 1 IOVCC CGND
155
C31P
0
C21 1uF/6.3V C31P 156

R3
157 C31P
MIPI DSI
C31N 158 C31N

Bus Interface Pins
IM3 C31N
159
2
C22 1uF/6.3V C32N 160 C32P

161 C32P
3 1 IOVCC C32N
C32P 162
C32N
0
VCORE 163
R4
GND 164 VCORE

165 AGND
C23 1uF/16V C41P 166 C41P
167 C41P
C41N 168 C41N
Interface
C24 1uF/25V VGH 169 C41N

170 VGH
C25 1uF/16V C51P 171 C51P
(SCL falling edge)
(SCL rising edge)
172 C51P
DPI with SPI 3-line
DPI with SPI 3-line
C51N 173 C51N

VGL_REG 174 C51N
2 1 VGLO 175 VGL_REG_R
VGL VGLO_R
176
HSC226 D1 VCOM 177 VGL
178 VCOM_R
179 DUMMY
C26 1uF/25V DUMMY
V093
ILI9806E
4.1 GP 4.5” Initial Code

Void ILI9806E_Initial_Code_GP (void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;





Page 88 of 116 V093






Page 89 of 116 V093
LCD_ILI9806E_INDEX(0x2C)

Page 90 of 116 V093
Page 91 of 116 V093
LCD_ILI9806E_INDEX(0xEF);
LCD_ILI9806E_INDEX(0xE0);
Page 92 of 116 V093
Page 93 of 116 V093
Page 94 of 116 V093


Delayms(120);
Delayms(10);
Delayms(10);
}
{
Page 95 of 116 V093
Delayms(1);
Delayms(10);
Delayms(120);
}
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 96 of 116 V093
4.2 GP 5.0” Initial Code

Void ILI9806E_Initial_Code_GP (void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;





Page 97 of 116 V093




Page 98 of 116 V093
LCD_ILI9806E_INDEX(0x2E)

Page 99 of 116 V093
Page 100 of 116 V093
LCD_ILI9806E_INDEX(0xEF);
LCD_ILI9806E_INDEX(0xE0);
Page 101 of 116 V093
Page 102 of 116 V093
Page 103 of 116 V093

LCD_ILI9806E_INDEX(0x00); // Change to Page 0 CMD for Normal command

Delayms(120);
Delayms(10);
Delayms(10);
}
{
Page 104 of 116 V093
Delayms(1);
Delayms(10);
Delayms(120);
}
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 105 of 116 V093
J1
1
J2
VGLO DUMMY
60 GND 2
GND DUMMY
2
C1 2.2uF/6.3V VCOM 3
VCOM VCOMOUT
T2
HSSI_CLK_N 1 OTP 4
T1
VGL_REG 3 1 VGL 59 1 1
HSSI_CLK_N 1 VGL 5 VPP
VGLO VGLX
0
58 HSSI_CLK_P 6
VGLO
R5
HSSI_CLK_P C2 1uF/25V VGL_REG 7
VGL VGL_REG
T3
57 GND 1 C3 2.2uF/6.3V VCL 8
HSSI_D1_P GND 1 VCL
C4 1uF/6.3V VREF15 9
HSSI_D1_N VREF15
Connector 60
56 HSSI_D1_N 10
Note:
HSSI_D1_N 11 AGND
VGLO VCI
T4
55 HSSI_D1_P 1 C5 1uF/6.3V VCI 12
HSSI_D1_P 1 VCIR
13
HSSI_CLK_P GND 14 VSSR
54
HSSI_CLK_N GND 15 DMY
VGL_REG TESTDIN5]
T5
53 HSSI_D0_N 1 16
HSSI_D0_N 1 DUMMY
17
HSSI_D0_P HSSI_D0_P VREG2OUT 18 DUMMY
52
HSSI_D0_N HSSI_D0_P VREG1OUT 19 VREG2OUT
ILI9806_IVO GLASS(3.97")
VGH VREG1OUT
T6
51 GND 1 20
GND 1 DGND
C6 1uF/6.3V VCORE 21
GND VCI 22 VCORE
50
GND VCI
power circuit
VCL 23
VCORE VCL
T7
49 TE 1 24
TE 1 AGND
LANSEL 25
LANSEL
VGL:PUMP circuit
48 LEDON DSWAP 26
LEDON DSWAP
VGL_REG:Regulator
PSWAP 27
VCL PSWAP
T8
47 LEDPWM 1 28
LEDPWM 1 TESTDIN[6]
NBWSEL 29
TESTDIN[7] 30 NBWSEL
46
NC 31 TESTDIN[7]
Page7 : R17h => 22h

Page6 : R53h => 10h
Page7 : R17h => 32h
Page6 : R53h => 12h
VCI TESTDOUT[0]
T9
45 IOVCC 1 IM3 32
IOVCC 1 IM3
IM2 33
NBWSEL IM2
44 IOVCC IM1 34

IOVCC IM1
2
IM0 35
VCI 1 V12_MIPI 36 IM0
43
T10
3 1 IOVCC VCI 1 TESTDOUT[1]
TE 37
TE_L
0
42 VCI 38

TESTDOUT[2]
R7
VCI SDO 39
VCI 1 VCORE_MIPI SDI 40 SDO
41
T11
VCI 1 SDI
41
DB23 SCL 42 TESTDOUT[3]
40
DB23 43 SCL
TESTD_EN
5. IVO Panel
39 DB22 1 IOVCC CSX 44
T12
DB22 1 CSX
RESX 45
NBWSEL
DB21 46 RESX
38
DB21 IOVCC 47 DGND
C7 1uF/6.3V
DB20 1 DVDDH DB23 48 IOVCC
37
T13
1
0
DB20 1 D23
DB22 49
DB19 DB21 50 D22
36
DB19 DB20 51 D21
DSWAP D20
35 DB18 1 DVDDL DB19 52
T14
1
2
DB18 DB18 53 D19
DB17 DB17 54 D18
3 1 IOVCC 34
DB17 DB16 55 D17
black
white
VREF15 D16
0
33 DB16 1 DB15 56
T15
1
R9
DB16 DB14 57 D15
DB15 DB13 58 D14
PSWAP 32
DB15 DB12 59 D13
2
DB14 1 TE DB11 60 D12
31
T16
DB14 1 D11
3 1 IOVCC DB10 61
DB13 DB9 62 D10
30
DB13 D9
0
DB8 63
1 VREG2OUT DB7 D8
R10
29 DB12 64
T17
1
MIPI interface)
DB12 DB6 65 D7
DB11 DB5 66 D6
28
(necessary in RGB
DB11 DB4 67 D5
27
T18
1
0
DB10 1 D3
DB2 69
DB9 DB1 70 D2
26
DB9 DB0 71 D1
DB8 DE 72 D0
25
DB8 PCLK 73 DE
1
0
1
0
DB7 HSYNC 74 PCLK
24
DB7 VSYNC 75 HS
DSWAP PSWAP
DB6 LEDPWM 76 VS
23
DB6 LEDON 77 LEDPWM
LEDON
V255 > V254 >…> V1 > V0, normally

V0 > V1 >…> V254 > V255, normally
22 DB5 IOVCC 78
DB5 79 IOVCC
DB4 2.2uF/10V DDVDH 80 DGND
21 C8
DB4 81 DDVDH
DB3 DDVDL 82 AGND
20 C9 2.2uF/10V
DB3 VCI 83 DDVDL
DB2 84 VCI
19
DB2 DGND
CLK_P CLK_N
VCORE 85
CLK_N CLK_P
CLK_P CLK_N
LANSEL VCORE
18 DB1 86
DB1 DGND
2
HSSI_D1_P 87
DB0 88 HSSI_D1_P
3 1 IOVCC 17
DB0 HSSI_D1_N 89 HSSI_D1_P
CLK_N CLK_P D1_N

CLK_P CLK_N D1_P
D0_N
HSSI_D1_N
D0_P
D0_P
For MIPI interface
0
16 IM3 90
HSSI_D1_N
R8
IM3 91
IM2 HSSI_CLK_P 92 DGND
15
IM2 HSSI_CLK_P
Pins
93
RESX HSSI_CLK_N 94 HSSI_CLK_P
14
D1_N
D1_P
D0_P
D0_N
HSSI_CLK_N
D0_N
RESX 95
GND 96 HSSI_CLK_N
13
74245_OUT3 97 DGND
SCL HSSI_D0_P 98 HSSI_D0_P
12
WRX 99 HSSI_D0_P
D0_N
D0_P
D1_P
HSSI_D0_N
D1_N
D1_P
11 HSSI_D0_N 100
RDX HSSI_D0_N

101
102 DGND
10
DCX V12_MIPI 103 V12_MIPI
C10 1uF/6.3V
CSX 104 V12_MIPI
D0_P
D0_N
9
D1_P
D1_N
D1_N
CSX VCORE_MIPI
Capacitor：Optional
C11 1uF/6.3V VCORE_MIPI 105

VCORE_MIPI
HIGH:2 data lanes

IM1 VCI 106

8
IM1 VCI
Page 106 of 116

VCI 107
IM0 108 VCI
7
IM0 109 VSSR
C12 NC
SDI 110 VREFCP_DMY
6
SDA 111 EXTP
DUMMY
5 SDO 112
SD0 113 EXTN
PCLK VCI 114 DUMMY
4
DOTCLK VCIP
115
DE 116 CGND
3

ENABLE C11P 117 C11P
C13 1uF/6.3V

HSYNC 118 C11P
2
HSYNC C11N 119 C11N
VSYNC 120 C11N
1
VSYNC C12P 121 C12P
C14 1uF/6.3V
122 C12P
C12N 123 C12N
124 C12N
C13N 125 C13P
C15 1uF/6.3V
126 C13P
C13P 127 C13N
128 C13N
C14P 129 C14P
C16 1uF/6.3V
130 C14P
C14N 131 C14N

DDVDH 132 C14N
133 DDVDH
DDVDL 134 CGND

135 DDVDL
1
0
0
1
1
1
0
C21P 136 C21P

C17 1uF/6.3V
IM3
137 C21P
C21N 138 C21N
139 C21N
IM0 C22P
C18 1uF/6.3V C22P 140
1
1
1
0
0
0
0
C22P
2
141
IM2
C22N 142 C22N

3 1 IOVCC C22N
143
C23P
0
C19 1uF/6.3V C23P 144

C23P
R1
145
1
1
0
1
1
0
1
C23N 146 C23N

IM1
IM1 C23N
147
C24P
2
C20 1uF/6.3V C24P 148

149 C24P
3 1 IOVCC C24N
C24N 150
1
1
1
1
0
1
1
VCI C24N
0
151
IM0
VCIP
R2
VCL 152
153 VCL
IM2 VSSR
154
CGND
2
155
C31P 156 C31P
3 1 IOVCC C21 1uF/6.3V
157 C31P
C31N
0
C31N 158
C31N
R3
159
C32P
MIPI DSI
C22 1uF/6.3V C32N 160

Bus Interface Pins
IM3 C32P
161
C32N
2
C32P 162
VCORE 163 C32N
3 1 IOVCC VCORE
164
AGND
0
165
C41P
R4
C23 1uF/16V C41P 166

167 C41P
C41N 168 C41N
VGH 169 C41N
C24 1uF/25V
170 VGH
Interface
C51P 171 C51P

C25 1uF/16V
172 C51P
C51N 173 C51N
(SCL falling edge)
C51N
(SCL rising edge)
VGL_REG 174
DPI with SPI 3-line
DPI with SPI 3-line
VGLO 175 VGL_REG

2 1
VGL 176 VGLO
D1 VCOM VGL
HSC226 177
178 VCOMOUT
179 DUMMY
C26 1uF/25V
DUMMY
V093
ILI9806E
5.1 IVO 3.97” Initial Code

Void ILI9806E_Initial_Code_IVO (void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
LCD_nRESET = 0;
LCD_nRESET = 1;





Page 107 of 116 V093





Page 108 of 116 V093


Page 109 of 116 V093
Page 110 of 116 V093
Page 111 of 116 V093
Page 112 of 116 V093
LCD_ILI9806E_INDEX(0xBA);
LCD_ILI9806E_INDEX(0xAB);
LCD_ILI9806E_INDEX(0xDC);
LCD_ILI9806E_INDEX(0xCD);
Page 113 of 116 V093


Delayms(120);
Delayms(10);
Delayms(10);
}
{
Page 114 of 116 V093
Delayms(1);
Delayms(10);
Delayms(120);
{
Delayms(1)
Delayms(120);
Delayms(10);
}
Page 115 of 116 V093
6. Revision History
Version No. Date Page Description
V090 20130715 all New creation

V091 20130820 3,28~81 1. FPC Hardware Descrpition
2. Add CPT ,BOE and GP FPC schematic and initial
code
3. Add Page7 command.
V092 20131119 All 1. Add Page7 RE1h = 79 in each code.
2. Add Page0 R35h in each code for TE signal.
3. Add IVO FPC circuit and initial code.
V093 20140328 All 1. Add void function delaytimes(1),
2. 2 Add BOE 4.95’’ 4.5G and 6G initial code
3. IVO Page6 R00h
Page 116 of 116 V093

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ILI9806E

a-Si TFT LCD Single Chip Driver with

ILI TECHNOLOGY CORP.

1. HSD PANEL .......................................................................................................................................................................3

1.1 HSD 3.97” (C0401D)INITIAL CODE ...........................................................................................................................4

2.1 CPT 3.97” (040LJ) INITIAL CODE............................................................................................................................32

3. BOE PANEL .....................................................................................................................................................................59

3.1 BOE 4.46” INITIAL CODE .........................................................................................................................................60

4.1 GP 4.5” INITIAL CODE ..............................................................................................................................................88

5. IVO PANEL ....................................................................................................................................................................106

5.1 IVO 3.97” INITIAL CODE ........................................................................................................................................107

6. REVISION HISTORY ................................................................................................................................................... 116

Page7 : R17h => 22h

VGLO tie VGL Command :

VGLO tie VGL_REG Command :

VGL_REG:Regulator power circuit

DB22 GND 46 RESX

IOVCC Cap : Optional

V255 > V254 >…> V1 > V0, normally

CLK_N CLK_P D1_N

For MIPI interface

whole or in part without prior written permission of ILI Technology Corp.

HIGH:2 data lanes

LOW ： 1 data lanes

4 PCLK GND 115

3 DE C13 1uF/6.3V C11P 117

inpute pin to select 1 data lane

Fix to GND level when not in use.

or 2 data lanes in MIPI interface .

C15 1uF/6.3V C13P 125

C16 1uF/6.3V 129

1. Please ensure the same naming pin is connected certainly.

C18 1uF/6.3V C22P 140 C22P

C23N 146 C23N

C20 1uF/6.3V 148

C24N 150 C24N

GND 153 VCL

C21 1uF/6.3V C31P 156

C31N 158 C31N

C22 1uF/6.3V C32P 160 C32P

GND 164 VCORE

C24 1uF/25V VGH 169 C41N

C51N 173 C51N

1.1 HSD 3.97” (C0401D)Initial Code

LCD_ILI9806E_CMD(0x08); //Output SDA

LCD_ILI9806E_CMD(0x021); //DE = 1 Active

LCD_ILI9806E_CMD(0x30); //Resolution setting 480 X 800

LCD_ILI9806E_CMD(0x31); //Inversion setting for 2-dot

LCD_ILI9806E_CMD(0x52); //Flicker MSB

LCD_ILI9806E_CMD(0x53); //Flicker LSB

LCD_ILI9806E_CMD(0x57); //Low voltage detection

LCD_ILI9806E_CMD(0xA0); //Positive Gamma

LCD_ILI9806E_CMD(0xC0); //Negative Gamma

LCD_ILI9806E_CMD(0xFF); // Change to Page 6 CMD for GIP timing

LCD_ILI9806E_CMD(0xFF); // Change to Page 7 CMD for user command

LCD_ILI9806E_CMD(0xFF); // Change to Page 0 CMD for Normal command

LCD_ILI9806E_CMD(0x11); //Exit Sleep

1.2 HSD 5.0” (C0500)Initial Code

LCD_ILI9806E_CMD(0x08); //Output SDA

LCD_ILI9806E_CMD(0x021); //DE = 1 Active

LCD_ILI9806E_CMD(0x30); //Resolution setting 480 X 800

LCD_ILI9806E_CMD(0x31); //Inversion setting for 2-dot

LCD_ILI9806E_CMD(0x50); //VREG1OUT voltage